1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2019 Arm Ltd.
3
4 #include <linux/arm-smccc.h>
5 #include <linux/kvm_host.h>
6
7 #include <asm/kvm_emulate.h>
8 #include <asm/stage2_pgtable.h>
9 #include <asm/kvm_pkvm.h>
10
11 #include <kvm/arm_hypercalls.h>
12 #include <kvm/arm_psci.h>
13
14 #define KVM_ARM_SMCCC_STD_FEATURES \
15 GENMASK(KVM_REG_ARM_STD_BMAP_BIT_COUNT - 1, 0)
16 #define KVM_ARM_SMCCC_STD_HYP_FEATURES \
17 GENMASK(KVM_REG_ARM_STD_HYP_BMAP_BIT_COUNT - 1, 0)
18 #define KVM_ARM_SMCCC_VENDOR_HYP_FEATURES \
19 GENMASK(KVM_REG_ARM_VENDOR_HYP_BMAP_BIT_COUNT - 1, 0)
20
kvm_ptp_get_time(struct kvm_vcpu * vcpu,u64 * val)21 static void kvm_ptp_get_time(struct kvm_vcpu *vcpu, u64 *val)
22 {
23 struct system_time_snapshot systime_snapshot;
24 u64 cycles = ~0UL;
25 u32 feature;
26
27 /*
28 * system time and counter value must captured at the same
29 * time to keep consistency and precision.
30 */
31 ktime_get_snapshot(&systime_snapshot);
32
33 /*
34 * This is only valid if the current clocksource is the
35 * architected counter, as this is the only one the guest
36 * can see.
37 */
38 if (systime_snapshot.cs_id != CSID_ARM_ARCH_COUNTER)
39 return;
40
41 /*
42 * The guest selects one of the two reference counters
43 * (virtual or physical) with the first argument of the SMCCC
44 * call. In case the identifier is not supported, error out.
45 */
46 feature = smccc_get_arg1(vcpu);
47 switch (feature) {
48 case KVM_PTP_VIRT_COUNTER:
49 cycles = systime_snapshot.cycles - vcpu->kvm->arch.timer_data.voffset;
50 break;
51 case KVM_PTP_PHYS_COUNTER:
52 cycles = systime_snapshot.cycles - vcpu->kvm->arch.timer_data.poffset;
53 break;
54 default:
55 return;
56 }
57
58 /*
59 * This relies on the top bit of val[0] never being set for
60 * valid values of system time, because that is *really* far
61 * in the future (about 292 years from 1970, and at that stage
62 * nobody will give a damn about it).
63 */
64 val[0] = upper_32_bits(systime_snapshot.real);
65 val[1] = lower_32_bits(systime_snapshot.real);
66 val[2] = upper_32_bits(cycles);
67 val[3] = lower_32_bits(cycles);
68 }
69
kvm_smccc_default_allowed(u32 func_id)70 static bool kvm_smccc_default_allowed(u32 func_id)
71 {
72 switch (func_id) {
73 /*
74 * List of function-ids that are not gated with the bitmapped
75 * feature firmware registers, and are to be allowed for
76 * servicing the call by default.
77 */
78 case ARM_SMCCC_VERSION_FUNC_ID:
79 case ARM_SMCCC_ARCH_FEATURES_FUNC_ID:
80 case ARM_SMCCC_VENDOR_HYP_KVM_MEM_SHARE_FUNC_ID:
81 case ARM_SMCCC_VENDOR_HYP_KVM_MEM_UNSHARE_FUNC_ID:
82 case ARM_SMCCC_VENDOR_HYP_KVM_MEM_RELINQUISH_FUNC_ID:
83 return true;
84 default:
85 /* PSCI 0.2 and up is in the 0:0x1f range */
86 if (ARM_SMCCC_OWNER_NUM(func_id) == ARM_SMCCC_OWNER_STANDARD &&
87 ARM_SMCCC_FUNC_NUM(func_id) <= 0x1f)
88 return true;
89
90 /*
91 * KVM's PSCI 0.1 doesn't comply with SMCCC, and has
92 * its own function-id base and range
93 */
94 if (func_id >= KVM_PSCI_FN(0) && func_id <= KVM_PSCI_FN(3))
95 return true;
96
97 return false;
98 }
99 }
100
kvm_smccc_test_fw_bmap(struct kvm_vcpu * vcpu,u32 func_id)101 static bool kvm_smccc_test_fw_bmap(struct kvm_vcpu *vcpu, u32 func_id)
102 {
103 struct kvm_smccc_features *smccc_feat = &vcpu->kvm->arch.smccc_feat;
104
105 switch (func_id) {
106 case ARM_SMCCC_TRNG_VERSION:
107 case ARM_SMCCC_TRNG_FEATURES:
108 case ARM_SMCCC_TRNG_GET_UUID:
109 case ARM_SMCCC_TRNG_RND32:
110 case ARM_SMCCC_TRNG_RND64:
111 return test_bit(KVM_REG_ARM_STD_BIT_TRNG_V1_0,
112 &smccc_feat->std_bmap);
113 case ARM_SMCCC_HV_PV_TIME_FEATURES:
114 case ARM_SMCCC_HV_PV_TIME_ST:
115 return test_bit(KVM_REG_ARM_STD_HYP_BIT_PV_TIME,
116 &smccc_feat->std_hyp_bmap);
117 case ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID:
118 case ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID:
119 return test_bit(KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT,
120 &smccc_feat->vendor_hyp_bmap);
121 case ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID:
122 return test_bit(KVM_REG_ARM_VENDOR_HYP_BIT_PTP,
123 &smccc_feat->vendor_hyp_bmap);
124 case ARM_SMCCC_VENDOR_HYP_KVM_MEM_RELINQUISH_FUNC_ID:
125 return test_bit(ARM_SMCCC_KVM_FUNC_MEM_RELINQUISH,
126 &smccc_feat->vendor_hyp_bmap);
127 default:
128 return false;
129 }
130 }
131
132 #define SMC32_ARCH_RANGE_BEGIN ARM_SMCCC_VERSION_FUNC_ID
133 #define SMC32_ARCH_RANGE_END ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
134 ARM_SMCCC_SMC_32, \
135 0, ARM_SMCCC_FUNC_MASK)
136
137 #define SMC64_ARCH_RANGE_BEGIN ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
138 ARM_SMCCC_SMC_64, \
139 0, 0)
140 #define SMC64_ARCH_RANGE_END ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
141 ARM_SMCCC_SMC_64, \
142 0, ARM_SMCCC_FUNC_MASK)
143
kvm_smccc_filter_insert_reserved(struct kvm * kvm)144 static int kvm_smccc_filter_insert_reserved(struct kvm *kvm)
145 {
146 int r;
147
148 /*
149 * Prevent userspace from handling any SMCCC calls in the architecture
150 * range, avoiding the risk of misrepresenting Spectre mitigation status
151 * to the guest.
152 */
153 r = mtree_insert_range(&kvm->arch.smccc_filter,
154 SMC32_ARCH_RANGE_BEGIN, SMC32_ARCH_RANGE_END,
155 xa_mk_value(KVM_SMCCC_FILTER_HANDLE),
156 GFP_KERNEL_ACCOUNT);
157 if (r)
158 goto out_destroy;
159
160 r = mtree_insert_range(&kvm->arch.smccc_filter,
161 SMC64_ARCH_RANGE_BEGIN, SMC64_ARCH_RANGE_END,
162 xa_mk_value(KVM_SMCCC_FILTER_HANDLE),
163 GFP_KERNEL_ACCOUNT);
164 if (r)
165 goto out_destroy;
166
167 return 0;
168 out_destroy:
169 mtree_destroy(&kvm->arch.smccc_filter);
170 return r;
171 }
172
kvm_smccc_filter_configured(struct kvm * kvm)173 static bool kvm_smccc_filter_configured(struct kvm *kvm)
174 {
175 return !mtree_empty(&kvm->arch.smccc_filter);
176 }
177
kvm_smccc_set_filter(struct kvm * kvm,struct kvm_smccc_filter __user * uaddr)178 static int kvm_smccc_set_filter(struct kvm *kvm, struct kvm_smccc_filter __user *uaddr)
179 {
180 const void *zero_page = page_to_virt(ZERO_PAGE(0));
181 struct kvm_smccc_filter filter;
182 u32 start, end;
183 int r;
184
185 if (copy_from_user(&filter, uaddr, sizeof(filter)))
186 return -EFAULT;
187
188 if (memcmp(filter.pad, zero_page, sizeof(filter.pad)))
189 return -EINVAL;
190
191 start = filter.base;
192 end = start + filter.nr_functions - 1;
193
194 if (end < start || filter.action >= NR_SMCCC_FILTER_ACTIONS)
195 return -EINVAL;
196
197 mutex_lock(&kvm->arch.config_lock);
198
199 if (kvm_vm_has_ran_once(kvm)) {
200 r = -EBUSY;
201 goto out_unlock;
202 }
203
204 if (!kvm_smccc_filter_configured(kvm)) {
205 r = kvm_smccc_filter_insert_reserved(kvm);
206 if (WARN_ON_ONCE(r))
207 goto out_unlock;
208 }
209
210 r = mtree_insert_range(&kvm->arch.smccc_filter, start, end,
211 xa_mk_value(filter.action), GFP_KERNEL_ACCOUNT);
212 out_unlock:
213 mutex_unlock(&kvm->arch.config_lock);
214 return r;
215 }
216
kvm_smccc_filter_get_action(struct kvm * kvm,u32 func_id)217 static u8 kvm_smccc_filter_get_action(struct kvm *kvm, u32 func_id)
218 {
219 unsigned long idx = func_id;
220 void *val;
221
222 if (!kvm_smccc_filter_configured(kvm))
223 return KVM_SMCCC_FILTER_HANDLE;
224
225 /*
226 * But where's the error handling, you say?
227 *
228 * mt_find() returns NULL if no entry was found, which just so happens
229 * to match KVM_SMCCC_FILTER_HANDLE.
230 */
231 val = mt_find(&kvm->arch.smccc_filter, &idx, idx);
232 return xa_to_value(val);
233 }
234
kvm_smccc_get_action(struct kvm_vcpu * vcpu,u32 func_id)235 static u8 kvm_smccc_get_action(struct kvm_vcpu *vcpu, u32 func_id)
236 {
237 /*
238 * Intervening actions in the SMCCC filter take precedence over the
239 * pseudo-firmware register bitmaps.
240 */
241 u8 action = kvm_smccc_filter_get_action(vcpu->kvm, func_id);
242 if (action != KVM_SMCCC_FILTER_HANDLE)
243 return action;
244
245 if (kvm_smccc_test_fw_bmap(vcpu, func_id) ||
246 kvm_smccc_default_allowed(func_id))
247 return KVM_SMCCC_FILTER_HANDLE;
248
249 return KVM_SMCCC_FILTER_DENY;
250 }
251
kvm_prepare_hypercall_exit(struct kvm_vcpu * vcpu,u32 func_id)252 static void kvm_prepare_hypercall_exit(struct kvm_vcpu *vcpu, u32 func_id)
253 {
254 u8 ec = ESR_ELx_EC(kvm_vcpu_get_esr(vcpu));
255 struct kvm_run *run = vcpu->run;
256 u64 flags = 0;
257
258 if (ec == ESR_ELx_EC_SMC32 || ec == ESR_ELx_EC_SMC64)
259 flags |= KVM_HYPERCALL_EXIT_SMC;
260
261 if (!kvm_vcpu_trap_il_is32bit(vcpu))
262 flags |= KVM_HYPERCALL_EXIT_16BIT;
263
264 run->exit_reason = KVM_EXIT_HYPERCALL;
265 run->hypercall = (typeof(run->hypercall)) {
266 .nr = func_id,
267 .flags = flags,
268 };
269 }
270
kvm_smccc_call_handler(struct kvm_vcpu * vcpu)271 int kvm_smccc_call_handler(struct kvm_vcpu *vcpu)
272 {
273 struct kvm_smccc_features *smccc_feat = &vcpu->kvm->arch.smccc_feat;
274 u32 func_id = smccc_get_function(vcpu);
275 u64 val[4] = {SMCCC_RET_NOT_SUPPORTED};
276 u32 feature;
277 u8 action;
278 gpa_t gpa;
279
280 action = kvm_smccc_get_action(vcpu, func_id);
281 switch (action) {
282 case KVM_SMCCC_FILTER_HANDLE:
283 break;
284 case KVM_SMCCC_FILTER_DENY:
285 goto out;
286 case KVM_SMCCC_FILTER_FWD_TO_USER:
287 kvm_prepare_hypercall_exit(vcpu, func_id);
288 return 0;
289 default:
290 WARN_RATELIMIT(1, "Unhandled SMCCC filter action: %d\n", action);
291 goto out;
292 }
293
294 switch (func_id) {
295 case ARM_SMCCC_VERSION_FUNC_ID:
296 val[0] = ARM_SMCCC_VERSION_1_1;
297 break;
298 case ARM_SMCCC_ARCH_FEATURES_FUNC_ID:
299 feature = smccc_get_arg1(vcpu);
300 switch (feature) {
301 case ARM_SMCCC_ARCH_WORKAROUND_1:
302 switch (arm64_get_spectre_v2_state()) {
303 case SPECTRE_VULNERABLE:
304 break;
305 case SPECTRE_MITIGATED:
306 val[0] = SMCCC_RET_SUCCESS;
307 break;
308 case SPECTRE_UNAFFECTED:
309 val[0] = SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED;
310 break;
311 }
312 break;
313 case ARM_SMCCC_ARCH_WORKAROUND_2:
314 switch (arm64_get_spectre_v4_state()) {
315 case SPECTRE_VULNERABLE:
316 break;
317 case SPECTRE_MITIGATED:
318 /*
319 * SSBS everywhere: Indicate no firmware
320 * support, as the SSBS support will be
321 * indicated to the guest and the default is
322 * safe.
323 *
324 * Otherwise, expose a permanent mitigation
325 * to the guest, and hide SSBS so that the
326 * guest stays protected.
327 */
328 if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, SSBS, IMP))
329 break;
330 fallthrough;
331 case SPECTRE_UNAFFECTED:
332 val[0] = SMCCC_RET_NOT_REQUIRED;
333 break;
334 }
335 break;
336 case ARM_SMCCC_ARCH_WORKAROUND_3:
337 switch (arm64_get_spectre_bhb_state()) {
338 case SPECTRE_VULNERABLE:
339 break;
340 case SPECTRE_MITIGATED:
341 val[0] = SMCCC_RET_SUCCESS;
342 break;
343 case SPECTRE_UNAFFECTED:
344 val[0] = SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED;
345 break;
346 }
347 break;
348 case ARM_SMCCC_HV_PV_TIME_FEATURES:
349 if (test_bit(KVM_REG_ARM_STD_HYP_BIT_PV_TIME,
350 &smccc_feat->std_hyp_bmap))
351 val[0] = SMCCC_RET_SUCCESS;
352 break;
353 }
354 break;
355 case ARM_SMCCC_HV_PV_TIME_FEATURES:
356 val[0] = kvm_hypercall_pv_features(vcpu);
357 break;
358 case ARM_SMCCC_HV_PV_TIME_ST:
359 gpa = kvm_init_stolen_time(vcpu);
360 if (gpa != INVALID_GPA)
361 val[0] = gpa;
362 break;
363 case ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID:
364 val[0] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_0;
365 val[1] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_1;
366 val[2] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_2;
367 val[3] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_3;
368 break;
369 case ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID:
370 val[0] = smccc_feat->vendor_hyp_bmap;
371 break;
372 case ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID:
373 kvm_ptp_get_time(vcpu, val);
374 break;
375 case ARM_SMCCC_VENDOR_HYP_KVM_MEM_RELINQUISH_FUNC_ID:
376 pkvm_host_reclaim_page(vcpu->kvm, smccc_get_arg1(vcpu));
377 val[0] = SMCCC_RET_SUCCESS;
378 break;
379 case ARM_SMCCC_TRNG_VERSION:
380 case ARM_SMCCC_TRNG_FEATURES:
381 case ARM_SMCCC_TRNG_GET_UUID:
382 case ARM_SMCCC_TRNG_RND32:
383 case ARM_SMCCC_TRNG_RND64:
384 return kvm_trng_call(vcpu);
385 default:
386 return kvm_psci_call(vcpu);
387 }
388
389 out:
390 smccc_set_retval(vcpu, val[0], val[1], val[2], val[3]);
391 return 1;
392 }
393
394 static const u64 kvm_arm_fw_reg_ids[] = {
395 KVM_REG_ARM_PSCI_VERSION,
396 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1,
397 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2,
398 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3,
399 KVM_REG_ARM_STD_BMAP,
400 KVM_REG_ARM_STD_HYP_BMAP,
401 KVM_REG_ARM_VENDOR_HYP_BMAP,
402 };
403
kvm_arm_init_hypercalls(struct kvm * kvm)404 void kvm_arm_init_hypercalls(struct kvm *kvm)
405 {
406 struct kvm_smccc_features *smccc_feat = &kvm->arch.smccc_feat;
407
408 smccc_feat->std_bmap = KVM_ARM_SMCCC_STD_FEATURES;
409 smccc_feat->std_hyp_bmap = KVM_ARM_SMCCC_STD_HYP_FEATURES;
410 smccc_feat->vendor_hyp_bmap = KVM_ARM_SMCCC_VENDOR_HYP_FEATURES;
411
412 mt_init(&kvm->arch.smccc_filter);
413 }
414
kvm_arm_teardown_hypercalls(struct kvm * kvm)415 void kvm_arm_teardown_hypercalls(struct kvm *kvm)
416 {
417 mtree_destroy(&kvm->arch.smccc_filter);
418 }
419
kvm_arm_get_fw_num_regs(struct kvm_vcpu * vcpu)420 int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu)
421 {
422 return ARRAY_SIZE(kvm_arm_fw_reg_ids);
423 }
424
kvm_arm_copy_fw_reg_indices(struct kvm_vcpu * vcpu,u64 __user * uindices)425 int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
426 {
427 int i;
428
429 for (i = 0; i < ARRAY_SIZE(kvm_arm_fw_reg_ids); i++) {
430 if (put_user(kvm_arm_fw_reg_ids[i], uindices++))
431 return -EFAULT;
432 }
433
434 return 0;
435 }
436
437 #define KVM_REG_FEATURE_LEVEL_MASK GENMASK(3, 0)
438
439 /*
440 * Convert the workaround level into an easy-to-compare number, where higher
441 * values mean better protection.
442 */
get_kernel_wa_level(struct kvm_vcpu * vcpu,u64 regid)443 static int get_kernel_wa_level(struct kvm_vcpu *vcpu, u64 regid)
444 {
445 switch (regid) {
446 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
447 switch (arm64_get_spectre_v2_state()) {
448 case SPECTRE_VULNERABLE:
449 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
450 case SPECTRE_MITIGATED:
451 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL;
452 case SPECTRE_UNAFFECTED:
453 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED;
454 }
455 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
456 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
457 switch (arm64_get_spectre_v4_state()) {
458 case SPECTRE_MITIGATED:
459 /*
460 * As for the hypercall discovery, we pretend we
461 * don't have any FW mitigation if SSBS is there at
462 * all times.
463 */
464 if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, SSBS, IMP))
465 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
466 fallthrough;
467 case SPECTRE_UNAFFECTED:
468 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
469 case SPECTRE_VULNERABLE:
470 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
471 }
472 break;
473 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
474 switch (arm64_get_spectre_bhb_state()) {
475 case SPECTRE_VULNERABLE:
476 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
477 case SPECTRE_MITIGATED:
478 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_AVAIL;
479 case SPECTRE_UNAFFECTED:
480 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_REQUIRED;
481 }
482 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
483 }
484
485 return -EINVAL;
486 }
487
kvm_arm_get_fw_reg(struct kvm_vcpu * vcpu,const struct kvm_one_reg * reg)488 int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
489 {
490 struct kvm_smccc_features *smccc_feat = &vcpu->kvm->arch.smccc_feat;
491 void __user *uaddr = (void __user *)(long)reg->addr;
492 u64 val;
493
494 switch (reg->id) {
495 case KVM_REG_ARM_PSCI_VERSION:
496 val = kvm_psci_version(vcpu);
497 break;
498 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
499 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
500 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
501 val = get_kernel_wa_level(vcpu, reg->id) & KVM_REG_FEATURE_LEVEL_MASK;
502 break;
503 case KVM_REG_ARM_STD_BMAP:
504 val = READ_ONCE(smccc_feat->std_bmap);
505 break;
506 case KVM_REG_ARM_STD_HYP_BMAP:
507 val = READ_ONCE(smccc_feat->std_hyp_bmap);
508 break;
509 case KVM_REG_ARM_VENDOR_HYP_BMAP:
510 val = READ_ONCE(smccc_feat->vendor_hyp_bmap);
511 break;
512 default:
513 return -ENOENT;
514 }
515
516 if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)))
517 return -EFAULT;
518
519 return 0;
520 }
521
kvm_arm_set_fw_reg_bmap(struct kvm_vcpu * vcpu,u64 reg_id,u64 val)522 static int kvm_arm_set_fw_reg_bmap(struct kvm_vcpu *vcpu, u64 reg_id, u64 val)
523 {
524 int ret = 0;
525 struct kvm *kvm = vcpu->kvm;
526 struct kvm_smccc_features *smccc_feat = &kvm->arch.smccc_feat;
527 unsigned long *fw_reg_bmap, fw_reg_features;
528
529 switch (reg_id) {
530 case KVM_REG_ARM_STD_BMAP:
531 fw_reg_bmap = &smccc_feat->std_bmap;
532 fw_reg_features = KVM_ARM_SMCCC_STD_FEATURES;
533 break;
534 case KVM_REG_ARM_STD_HYP_BMAP:
535 fw_reg_bmap = &smccc_feat->std_hyp_bmap;
536 fw_reg_features = KVM_ARM_SMCCC_STD_HYP_FEATURES;
537 break;
538 case KVM_REG_ARM_VENDOR_HYP_BMAP:
539 fw_reg_bmap = &smccc_feat->vendor_hyp_bmap;
540 fw_reg_features = KVM_ARM_SMCCC_VENDOR_HYP_FEATURES;
541 break;
542 default:
543 return -ENOENT;
544 }
545
546 /* Check for unsupported bit */
547 if (val & ~fw_reg_features)
548 return -EINVAL;
549
550 mutex_lock(&kvm->arch.config_lock);
551
552 if (kvm_vm_has_ran_once(kvm) && val != *fw_reg_bmap) {
553 ret = -EBUSY;
554 goto out;
555 }
556
557 WRITE_ONCE(*fw_reg_bmap, val);
558 out:
559 mutex_unlock(&kvm->arch.config_lock);
560 return ret;
561 }
562
kvm_arm_set_fw_reg(struct kvm_vcpu * vcpu,const struct kvm_one_reg * reg)563 int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
564 {
565 void __user *uaddr = (void __user *)(long)reg->addr;
566 u64 val;
567 int wa_level;
568
569 if (KVM_REG_SIZE(reg->id) != sizeof(val))
570 return -ENOENT;
571 if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)))
572 return -EFAULT;
573
574 switch (reg->id) {
575 case KVM_REG_ARM_PSCI_VERSION:
576 {
577 bool wants_02;
578
579 wants_02 = vcpu_has_feature(vcpu, KVM_ARM_VCPU_PSCI_0_2);
580
581 switch (val) {
582 case KVM_ARM_PSCI_0_1:
583 if (wants_02)
584 return -EINVAL;
585 vcpu->kvm->arch.psci_version = val;
586 return 0;
587 case KVM_ARM_PSCI_0_2:
588 case KVM_ARM_PSCI_1_0:
589 case KVM_ARM_PSCI_1_1:
590 if (!wants_02)
591 return -EINVAL;
592 vcpu->kvm->arch.psci_version = val;
593 return 0;
594 }
595 break;
596 }
597
598 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
599 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
600 if (val & ~KVM_REG_FEATURE_LEVEL_MASK)
601 return -EINVAL;
602
603 if (get_kernel_wa_level(vcpu, reg->id) < val)
604 return -EINVAL;
605
606 return 0;
607
608 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
609 if (val & ~(KVM_REG_FEATURE_LEVEL_MASK |
610 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED))
611 return -EINVAL;
612
613 /* The enabled bit must not be set unless the level is AVAIL. */
614 if ((val & KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED) &&
615 (val & KVM_REG_FEATURE_LEVEL_MASK) != KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL)
616 return -EINVAL;
617
618 /*
619 * Map all the possible incoming states to the only two we
620 * really want to deal with.
621 */
622 switch (val & KVM_REG_FEATURE_LEVEL_MASK) {
623 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL:
624 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN:
625 wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
626 break;
627 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL:
628 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED:
629 wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
630 break;
631 default:
632 return -EINVAL;
633 }
634
635 /*
636 * We can deal with NOT_AVAIL on NOT_REQUIRED, but not the
637 * other way around.
638 */
639 if (get_kernel_wa_level(vcpu, reg->id) < wa_level)
640 return -EINVAL;
641
642 return 0;
643 case KVM_REG_ARM_STD_BMAP:
644 case KVM_REG_ARM_STD_HYP_BMAP:
645 case KVM_REG_ARM_VENDOR_HYP_BMAP:
646 return kvm_arm_set_fw_reg_bmap(vcpu, reg->id, val);
647 default:
648 return -ENOENT;
649 }
650
651 return -EINVAL;
652 }
653
kvm_vm_smccc_has_attr(struct kvm * kvm,struct kvm_device_attr * attr)654 int kvm_vm_smccc_has_attr(struct kvm *kvm, struct kvm_device_attr *attr)
655 {
656 switch (attr->attr) {
657 case KVM_ARM_VM_SMCCC_FILTER:
658 return 0;
659 default:
660 return -ENXIO;
661 }
662 }
663
kvm_vm_smccc_set_attr(struct kvm * kvm,struct kvm_device_attr * attr)664 int kvm_vm_smccc_set_attr(struct kvm *kvm, struct kvm_device_attr *attr)
665 {
666 void __user *uaddr = (void __user *)attr->addr;
667
668 switch (attr->attr) {
669 case KVM_ARM_VM_SMCCC_FILTER:
670 return kvm_smccc_set_filter(kvm, uaddr);
671 default:
672 return -ENXIO;
673 }
674 }
675