1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Based on arch/arm/mm/fault.c
4 *
5 * Copyright (C) 1995 Linus Torvalds
6 * Copyright (C) 1995-2004 Russell King
7 * Copyright (C) 2012 ARM Ltd.
8 */
9
10 #include <linux/acpi.h>
11 #include <linux/bitfield.h>
12 #include <linux/extable.h>
13 #include <linux/kfence.h>
14 #include <linux/signal.h>
15 #include <linux/mm.h>
16 #include <linux/hardirq.h>
17 #include <linux/init.h>
18 #include <linux/kasan.h>
19 #include <linux/kprobes.h>
20 #include <linux/uaccess.h>
21 #include <linux/page-flags.h>
22 #include <linux/sched/signal.h>
23 #include <linux/sched/debug.h>
24 #include <linux/highmem.h>
25 #include <linux/perf_event.h>
26 #include <linux/pkeys.h>
27 #include <linux/preempt.h>
28 #include <linux/hugetlb.h>
29 #include <linux/gfp_types.h>
30
31 #include <asm/acpi.h>
32 #include <asm/bug.h>
33 #include <asm/cmpxchg.h>
34 #include <asm/cpufeature.h>
35 #include <asm/efi.h>
36 #include <asm/exception.h>
37 #include <asm/daifflags.h>
38 #include <asm/debug-monitors.h>
39 #include <asm/esr.h>
40 #include <asm/kprobes.h>
41 #include <asm/mte.h>
42 #include <asm/processor.h>
43 #include <asm/sysreg.h>
44 #include <asm/system_misc.h>
45 #include <asm/tlbflush.h>
46 #include <asm/traps.h>
47 #include <asm/virt.h>
48
49 #include <trace/hooks/fault.h>
50
51 struct fault_info {
52 int (*fn)(unsigned long far, unsigned long esr,
53 struct pt_regs *regs);
54 int sig;
55 int code;
56 const char *name;
57 };
58
59 static const struct fault_info fault_info[];
60 static struct fault_info debug_fault_info[];
61
esr_to_fault_info(unsigned long esr)62 static inline const struct fault_info *esr_to_fault_info(unsigned long esr)
63 {
64 return fault_info + (esr & ESR_ELx_FSC);
65 }
66
esr_to_debug_fault_info(unsigned long esr)67 static inline const struct fault_info *esr_to_debug_fault_info(unsigned long esr)
68 {
69 return debug_fault_info + DBG_ESR_EVT(esr);
70 }
71
data_abort_decode(unsigned long esr)72 static void data_abort_decode(unsigned long esr)
73 {
74 unsigned long iss2 = ESR_ELx_ISS2(esr);
75
76 pr_alert("Data abort info:\n");
77
78 if (esr & ESR_ELx_ISV) {
79 pr_alert(" Access size = %u byte(s)\n",
80 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT));
81 pr_alert(" SSE = %lu, SRT = %lu\n",
82 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT,
83 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT);
84 pr_alert(" SF = %lu, AR = %lu\n",
85 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT,
86 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT);
87 } else {
88 pr_alert(" ISV = 0, ISS = 0x%08lx, ISS2 = 0x%08lx\n",
89 esr & ESR_ELx_ISS_MASK, iss2);
90 }
91
92 pr_alert(" CM = %lu, WnR = %lu, TnD = %lu, TagAccess = %lu\n",
93 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT,
94 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT,
95 (iss2 & ESR_ELx_TnD) >> ESR_ELx_TnD_SHIFT,
96 (iss2 & ESR_ELx_TagAccess) >> ESR_ELx_TagAccess_SHIFT);
97
98 pr_alert(" GCS = %ld, Overlay = %lu, DirtyBit = %lu, Xs = %llu\n",
99 (iss2 & ESR_ELx_GCS) >> ESR_ELx_GCS_SHIFT,
100 (iss2 & ESR_ELx_Overlay) >> ESR_ELx_Overlay_SHIFT,
101 (iss2 & ESR_ELx_DirtyBit) >> ESR_ELx_DirtyBit_SHIFT,
102 (iss2 & ESR_ELx_Xs_MASK) >> ESR_ELx_Xs_SHIFT);
103 }
104
mem_abort_decode(unsigned long esr)105 static void mem_abort_decode(unsigned long esr)
106 {
107 pr_alert("Mem abort info:\n");
108
109 pr_alert(" ESR = 0x%016lx\n", esr);
110 pr_alert(" EC = 0x%02lx: %s, IL = %u bits\n",
111 ESR_ELx_EC(esr), esr_get_class_string(esr),
112 (esr & ESR_ELx_IL) ? 32 : 16);
113 pr_alert(" SET = %lu, FnV = %lu\n",
114 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT,
115 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT);
116 pr_alert(" EA = %lu, S1PTW = %lu\n",
117 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT,
118 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT);
119 pr_alert(" FSC = 0x%02lx: %s\n", (esr & ESR_ELx_FSC),
120 esr_to_fault_info(esr)->name);
121
122 if (esr_is_data_abort(esr))
123 data_abort_decode(esr);
124 }
125
mm_to_pgd_phys(struct mm_struct * mm)126 static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm)
127 {
128 /* Either init_pg_dir or swapper_pg_dir */
129 if (mm == &init_mm)
130 return __pa_symbol(mm->pgd);
131
132 return (unsigned long)virt_to_phys(mm->pgd);
133 }
134
135 /*
136 * Dump out the page tables associated with 'addr' in the currently active mm.
137 */
show_pte(unsigned long addr)138 static void show_pte(unsigned long addr)
139 {
140 struct mm_struct *mm;
141 pgd_t *pgdp;
142 pgd_t pgd;
143
144 if (is_ttbr0_addr(addr)) {
145 /* TTBR0 */
146 mm = current->active_mm;
147 if (mm == &init_mm) {
148 pr_alert("[%016lx] user address but active_mm is swapper\n",
149 addr);
150 return;
151 }
152 } else if (is_ttbr1_addr(addr)) {
153 /* TTBR1 */
154 mm = &init_mm;
155 } else {
156 pr_alert("[%016lx] address between user and kernel address ranges\n",
157 addr);
158 return;
159 }
160
161 pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n",
162 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K,
163 vabits_actual, mm_to_pgd_phys(mm));
164 pgdp = pgd_offset(mm, addr);
165 pgd = READ_ONCE(*pgdp);
166 pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd));
167
168 do {
169 p4d_t *p4dp, p4d;
170 pud_t *pudp, pud;
171 pmd_t *pmdp, pmd;
172 pte_t *ptep, pte;
173
174 if (pgd_none(pgd) || pgd_bad(pgd))
175 break;
176
177 p4dp = p4d_offset(pgdp, addr);
178 p4d = READ_ONCE(*p4dp);
179 pr_cont(", p4d=%016llx", p4d_val(p4d));
180 if (p4d_none(p4d) || p4d_bad(p4d))
181 break;
182
183 pudp = pud_offset(p4dp, addr);
184 pud = READ_ONCE(*pudp);
185 pr_cont(", pud=%016llx", pud_val(pud));
186 if (pud_none(pud) || pud_bad(pud))
187 break;
188
189 pmdp = pmd_offset(pudp, addr);
190 pmd = READ_ONCE(*pmdp);
191 pr_cont(", pmd=%016llx", pmd_val(pmd));
192 if (pmd_none(pmd) || pmd_bad(pmd))
193 break;
194
195 ptep = pte_offset_map(pmdp, addr);
196 if (!ptep)
197 break;
198
199 pte = __ptep_get(ptep);
200 pr_cont(", pte=%016llx", pte_val(pte));
201 pte_unmap(ptep);
202 } while(0);
203
204 pr_cont("\n");
205 }
206
207 /*
208 * This function sets the access flags (dirty, accessed), as well as write
209 * permission, and only to a more permissive setting.
210 *
211 * It needs to cope with hardware update of the accessed/dirty state by other
212 * agents in the system and can safely skip the __sync_icache_dcache() call as,
213 * like __set_ptes(), the PTE is never changed from no-exec to exec here.
214 *
215 * Returns whether or not the PTE actually changed.
216 */
__ptep_set_access_flags(struct vm_area_struct * vma,unsigned long address,pte_t * ptep,pte_t entry,int dirty)217 int __ptep_set_access_flags(struct vm_area_struct *vma,
218 unsigned long address, pte_t *ptep,
219 pte_t entry, int dirty)
220 {
221 pteval_t old_pteval, pteval;
222 pte_t pte = __ptep_get(ptep);
223
224 if (pte_same(pte, entry))
225 return 0;
226
227 /* only preserve the access flags and write permission */
228 pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY;
229
230 /*
231 * Setting the flags must be done atomically to avoid racing with the
232 * hardware update of the access/dirty state. The PTE_RDONLY bit must
233 * be set to the most permissive (lowest value) of *ptep and entry
234 * (calculated as: a & b == ~(~a | ~b)).
235 */
236 pte_val(entry) ^= PTE_RDONLY;
237 pteval = pte_val(pte);
238 do {
239 old_pteval = pteval;
240 pteval ^= PTE_RDONLY;
241 pteval |= pte_val(entry);
242 pteval ^= PTE_RDONLY;
243 pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval);
244 } while (pteval != old_pteval);
245
246 /* Invalidate a stale read-only entry */
247 if (dirty)
248 flush_tlb_page(vma, address);
249 return 1;
250 }
251
is_el1_instruction_abort(unsigned long esr)252 static bool is_el1_instruction_abort(unsigned long esr)
253 {
254 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR;
255 }
256
is_el1_data_abort(unsigned long esr)257 static bool is_el1_data_abort(unsigned long esr)
258 {
259 return ESR_ELx_EC(esr) == ESR_ELx_EC_DABT_CUR;
260 }
261
is_el1_permission_fault(unsigned long addr,unsigned long esr,struct pt_regs * regs)262 static inline bool is_el1_permission_fault(unsigned long addr, unsigned long esr,
263 struct pt_regs *regs)
264 {
265 if (!is_el1_data_abort(esr) && !is_el1_instruction_abort(esr))
266 return false;
267
268 if (esr_fsc_is_permission_fault(esr))
269 return true;
270
271 if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan())
272 return esr_fsc_is_translation_fault(esr) &&
273 (regs->pstate & PSR_PAN_BIT);
274
275 return false;
276 }
277
is_pkvm_stage2_abort(unsigned int esr)278 static bool is_pkvm_stage2_abort(unsigned int esr)
279 {
280 /*
281 * S1PTW should only ever be set in ESR_EL1 if the pkvm hypervisor
282 * injected a stage-2 abort -- see host_inject_abort().
283 */
284 return is_pkvm_initialized() && (esr & ESR_ELx_S1PTW);
285 }
286
is_spurious_el1_translation_fault(unsigned long addr,unsigned long esr,struct pt_regs * regs)287 static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr,
288 unsigned long esr,
289 struct pt_regs *regs)
290 {
291 unsigned long flags;
292 u64 par, dfsc;
293
294 if (!is_el1_data_abort(esr) || !esr_fsc_is_translation_fault(esr))
295 return false;
296
297 if (is_pkvm_stage2_abort(esr))
298 return false;
299
300 local_irq_save(flags);
301 asm volatile("at s1e1r, %0" :: "r" (addr));
302 isb();
303 par = read_sysreg_par();
304 local_irq_restore(flags);
305
306 /*
307 * If we now have a valid translation, treat the translation fault as
308 * spurious.
309 */
310 if (!(par & SYS_PAR_EL1_F))
311 return true;
312
313 /*
314 * If we got a different type of fault from the AT instruction,
315 * treat the translation fault as spurious.
316 */
317 dfsc = FIELD_GET(SYS_PAR_EL1_FST, par);
318 return !esr_fsc_is_translation_fault(dfsc);
319 }
320
die_kernel_fault(const char * msg,unsigned long addr,unsigned long esr,struct pt_regs * regs)321 static void die_kernel_fault(const char *msg, unsigned long addr,
322 unsigned long esr, struct pt_regs *regs)
323 {
324 bust_spinlocks(1);
325
326 pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg,
327 addr);
328
329 kasan_non_canonical_hook(addr);
330
331 trace_android_rvh_die_kernel_fault(msg, addr, esr, regs);
332 mem_abort_decode(esr);
333
334 show_pte(addr);
335 die("Oops", regs, esr);
336 bust_spinlocks(0);
337 make_task_dead(SIGKILL);
338 }
339
340 #ifdef CONFIG_KASAN_HW_TAGS
report_tag_fault(unsigned long addr,unsigned long esr,struct pt_regs * regs)341 static void report_tag_fault(unsigned long addr, unsigned long esr,
342 struct pt_regs *regs)
343 {
344 /*
345 * SAS bits aren't set for all faults reported in EL1, so we can't
346 * find out access size.
347 */
348 bool is_write = !!(esr & ESR_ELx_WNR);
349 kasan_report((void *)addr, 0, is_write, regs->pc);
350 }
351 #else
352 /* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */
report_tag_fault(unsigned long addr,unsigned long esr,struct pt_regs * regs)353 static inline void report_tag_fault(unsigned long addr, unsigned long esr,
354 struct pt_regs *regs) { }
355 #endif
356
do_tag_recovery(unsigned long addr,unsigned long esr,struct pt_regs * regs)357 static void do_tag_recovery(unsigned long addr, unsigned long esr,
358 struct pt_regs *regs)
359 {
360
361 report_tag_fault(addr, esr, regs);
362
363 /*
364 * Disable MTE Tag Checking on the local CPU for the current EL.
365 * It will be done lazily on the other CPUs when they will hit a
366 * tag fault.
367 */
368 sysreg_clear_set(sctlr_el1, SCTLR_EL1_TCF_MASK,
369 SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF, NONE));
370 isb();
371 }
372
is_el1_mte_sync_tag_check_fault(unsigned long esr)373 static bool is_el1_mte_sync_tag_check_fault(unsigned long esr)
374 {
375 unsigned long fsc = esr & ESR_ELx_FSC;
376
377 if (!is_el1_data_abort(esr))
378 return false;
379
380 if (fsc == ESR_ELx_FSC_MTE)
381 return true;
382
383 return false;
384 }
385
__do_kernel_fault(unsigned long addr,unsigned long esr,struct pt_regs * regs)386 static void __do_kernel_fault(unsigned long addr, unsigned long esr,
387 struct pt_regs *regs)
388 {
389 const char *msg;
390
391 /*
392 * Are we prepared to handle this kernel fault?
393 * We are almost certainly not prepared to handle instruction faults.
394 */
395 if (!is_el1_instruction_abort(esr) && fixup_exception(regs))
396 return;
397
398 if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs),
399 "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr))
400 return;
401
402 if (is_el1_mte_sync_tag_check_fault(esr)) {
403 do_tag_recovery(addr, esr, regs);
404
405 return;
406 }
407
408 if (is_el1_permission_fault(addr, esr, regs)) {
409 if (esr & ESR_ELx_WNR)
410 msg = "write to read-only memory";
411 else if (is_el1_instruction_abort(esr))
412 msg = "execute from non-executable memory";
413 else
414 msg = "read from unreadable memory";
415 } else if (addr < PAGE_SIZE) {
416 msg = "NULL pointer dereference";
417 } else if (is_pkvm_stage2_abort(esr)) {
418 msg = "access to hypervisor-protected memory";
419 } else {
420 if (esr_fsc_is_translation_fault(esr) &&
421 kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs))
422 return;
423
424 msg = "paging request";
425 }
426
427 if (efi_runtime_fixup_exception(regs, msg))
428 return;
429
430 die_kernel_fault(msg, addr, esr, regs);
431 }
432
set_thread_esr(unsigned long address,unsigned long esr)433 static void set_thread_esr(unsigned long address, unsigned long esr)
434 {
435 current->thread.fault_address = address;
436
437 /*
438 * If the faulting address is in the kernel, we must sanitize the ESR.
439 * From userspace's point of view, kernel-only mappings don't exist
440 * at all, so we report them as level 0 translation faults.
441 * (This is not quite the way that "no mapping there at all" behaves:
442 * an alignment fault not caused by the memory type would take
443 * precedence over translation fault for a real access to empty
444 * space. Unfortunately we can't easily distinguish "alignment fault
445 * not caused by memory type" from "alignment fault caused by memory
446 * type", so we ignore this wrinkle and just return the translation
447 * fault.)
448 */
449 if (!is_ttbr0_addr(current->thread.fault_address)) {
450 switch (ESR_ELx_EC(esr)) {
451 case ESR_ELx_EC_DABT_LOW:
452 /*
453 * These bits provide only information about the
454 * faulting instruction, which userspace knows already.
455 * We explicitly clear bits which are architecturally
456 * RES0 in case they are given meanings in future.
457 * We always report the ESR as if the fault was taken
458 * to EL1 and so ISV and the bits in ISS[23:14] are
459 * clear. (In fact it always will be a fault to EL1.)
460 */
461 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL |
462 ESR_ELx_CM | ESR_ELx_WNR;
463 esr |= ESR_ELx_FSC_FAULT;
464 break;
465 case ESR_ELx_EC_IABT_LOW:
466 /*
467 * Claim a level 0 translation fault.
468 * All other bits are architecturally RES0 for faults
469 * reported with that DFSC value, so we clear them.
470 */
471 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL;
472 esr |= ESR_ELx_FSC_FAULT;
473 break;
474 default:
475 /*
476 * This should never happen (entry.S only brings us
477 * into this code for insn and data aborts from a lower
478 * exception level). Fail safe by not providing an ESR
479 * context record at all.
480 */
481 WARN(1, "ESR 0x%lx is not DABT or IABT from EL0\n", esr);
482 esr = 0;
483 break;
484 }
485 }
486
487 current->thread.fault_code = esr;
488 }
489
do_bad_area(unsigned long far,unsigned long esr,struct pt_regs * regs)490 static void do_bad_area(unsigned long far, unsigned long esr,
491 struct pt_regs *regs)
492 {
493 unsigned long addr = untagged_addr(far);
494
495 /*
496 * If we are in kernel mode at this point, we have no context to
497 * handle this fault with.
498 */
499 if (user_mode(regs)) {
500 const struct fault_info *inf = esr_to_fault_info(esr);
501
502 set_thread_esr(addr, esr);
503 arm64_force_sig_fault(inf->sig, inf->code, far, inf->name);
504 } else {
505 __do_kernel_fault(addr, esr, regs);
506 }
507 }
508
fault_from_pkey(struct vm_area_struct * vma,unsigned int mm_flags)509 static bool fault_from_pkey(struct vm_area_struct *vma, unsigned int mm_flags)
510 {
511 if (!system_supports_poe())
512 return false;
513
514 /*
515 * We do not check whether an Overlay fault has occurred because we
516 * cannot make a decision based solely on its value:
517 *
518 * - If Overlay is set, a fault did occur due to POE, but it may be
519 * spurious in those cases where we update POR_EL0 without ISB (e.g.
520 * on context-switch). We would then need to manually check POR_EL0
521 * against vma_pkey(vma), which is exactly what
522 * arch_vma_access_permitted() does.
523 *
524 * - If Overlay is not set, we may still need to report a pkey fault.
525 * This is the case if an access was made within a mapping but with no
526 * page mapped, and POR_EL0 forbids the access (according to
527 * vma_pkey()). Such access will result in a SIGSEGV regardless
528 * because core code checks arch_vma_access_permitted(), but in order
529 * to report the correct error code - SEGV_PKUERR - we must handle
530 * that case here.
531 */
532 return !arch_vma_access_permitted(vma,
533 mm_flags & FAULT_FLAG_WRITE,
534 mm_flags & FAULT_FLAG_INSTRUCTION,
535 false);
536 }
537
is_el0_instruction_abort(unsigned long esr)538 static bool is_el0_instruction_abort(unsigned long esr)
539 {
540 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;
541 }
542
543 /*
544 * Note: not valid for EL1 DC IVAC, but we never use that such that it
545 * should fault. EL0 cannot issue DC IVAC (undef).
546 */
is_write_abort(unsigned long esr)547 static bool is_write_abort(unsigned long esr)
548 {
549 return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM);
550 }
551
do_page_fault(unsigned long far,unsigned long esr,struct pt_regs * regs)552 static int __kprobes do_page_fault(unsigned long far, unsigned long esr,
553 struct pt_regs *regs)
554 {
555 const struct fault_info *inf;
556 struct mm_struct *mm = current->mm;
557 vm_fault_t fault;
558 unsigned long vm_flags;
559 unsigned int mm_flags = FAULT_FLAG_DEFAULT;
560 unsigned long addr = untagged_addr(far);
561 struct vm_area_struct *vma;
562 int si_code;
563 int pkey = -1;
564
565 if (kprobe_page_fault(regs, esr))
566 return 0;
567
568 /*
569 * If we're in an interrupt or have no user context, we must not take
570 * the fault.
571 */
572 if (faulthandler_disabled() || !mm)
573 goto no_context;
574
575 if (user_mode(regs))
576 mm_flags |= FAULT_FLAG_USER;
577
578 /*
579 * vm_flags tells us what bits we must have in vma->vm_flags
580 * for the fault to be benign, __do_page_fault() would check
581 * vma->vm_flags & vm_flags and returns an error if the
582 * intersection is empty
583 */
584 if (is_el0_instruction_abort(esr)) {
585 /* It was exec fault */
586 vm_flags = VM_EXEC;
587 mm_flags |= FAULT_FLAG_INSTRUCTION;
588 } else if (is_write_abort(esr)) {
589 /* It was write fault */
590 vm_flags = VM_WRITE;
591 mm_flags |= FAULT_FLAG_WRITE;
592 } else {
593 /* It was read fault */
594 vm_flags = VM_READ;
595 /* Write implies read */
596 vm_flags |= VM_WRITE;
597 /* If EPAN is absent then exec implies read */
598 if (!alternative_has_cap_unlikely(ARM64_HAS_EPAN))
599 vm_flags |= VM_EXEC;
600 }
601
602 if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) {
603 if (is_el1_instruction_abort(esr))
604 die_kernel_fault("execution of user memory",
605 addr, esr, regs);
606
607 if (!search_exception_tables(regs->pc))
608 die_kernel_fault("access to user memory outside uaccess routines",
609 addr, esr, regs);
610 }
611
612 if (is_pkvm_stage2_abort(esr)) {
613 if (!user_mode(regs))
614 goto no_context;
615 arm64_force_sig_fault(SIGSEGV, SEGV_ACCERR, far, "stage-2 fault");
616 return 0;
617 }
618
619 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
620
621 if (!(mm_flags & FAULT_FLAG_USER))
622 goto lock_mmap;
623
624 vma = lock_vma_under_rcu(mm, addr);
625 if (!vma)
626 goto lock_mmap;
627
628 if (!(vma->vm_flags & vm_flags)) {
629 vma_end_read(vma);
630 fault = 0;
631 si_code = SEGV_ACCERR;
632 count_vm_vma_lock_event(VMA_LOCK_SUCCESS);
633 goto bad_area;
634 }
635
636 if (fault_from_pkey(vma, mm_flags)) {
637 pkey = vma_pkey(vma);
638 vma_end_read(vma);
639 fault = 0;
640 si_code = SEGV_PKUERR;
641 count_vm_vma_lock_event(VMA_LOCK_SUCCESS);
642 goto bad_area;
643 }
644
645 fault = handle_mm_fault(vma, addr, mm_flags | FAULT_FLAG_VMA_LOCK, regs);
646 if (!(fault & (VM_FAULT_RETRY | VM_FAULT_COMPLETED)))
647 vma_end_read(vma);
648
649 if (!(fault & VM_FAULT_RETRY)) {
650 count_vm_vma_lock_event(VMA_LOCK_SUCCESS);
651 goto done;
652 }
653 count_vm_vma_lock_event(VMA_LOCK_RETRY);
654 if (fault & VM_FAULT_MAJOR)
655 mm_flags |= FAULT_FLAG_TRIED;
656
657 /* Quick path to respond to signals */
658 if (fault_signal_pending(fault, regs)) {
659 if (!user_mode(regs))
660 goto no_context;
661 return 0;
662 }
663 lock_mmap:
664
665 retry:
666 vma = lock_mm_and_find_vma(mm, addr, regs);
667 if (unlikely(!vma)) {
668 fault = 0;
669 si_code = SEGV_MAPERR;
670 goto bad_area;
671 }
672
673 if (!(vma->vm_flags & vm_flags)) {
674 mmap_read_unlock(mm);
675 fault = 0;
676 si_code = SEGV_ACCERR;
677 goto bad_area;
678 }
679
680 if (fault_from_pkey(vma, mm_flags)) {
681 pkey = vma_pkey(vma);
682 mmap_read_unlock(mm);
683 fault = 0;
684 si_code = SEGV_PKUERR;
685 goto bad_area;
686 }
687
688 fault = handle_mm_fault(vma, addr, mm_flags, regs);
689
690 /* Quick path to respond to signals */
691 if (fault_signal_pending(fault, regs)) {
692 if (!user_mode(regs))
693 goto no_context;
694 return 0;
695 }
696
697 /* The fault is fully completed (including releasing mmap lock) */
698 if (fault & VM_FAULT_COMPLETED)
699 return 0;
700
701 if (fault & VM_FAULT_RETRY) {
702 mm_flags |= FAULT_FLAG_TRIED;
703 goto retry;
704 }
705 mmap_read_unlock(mm);
706
707 done:
708 /* Handle the "normal" (no error) case first. */
709 if (likely(!(fault & VM_FAULT_ERROR)))
710 return 0;
711
712 si_code = SEGV_MAPERR;
713 bad_area:
714 /*
715 * If we are in kernel mode at this point, we have no context to
716 * handle this fault with.
717 */
718 if (!user_mode(regs))
719 goto no_context;
720
721 if (fault & VM_FAULT_OOM) {
722 /*
723 * We ran out of memory, call the OOM killer, and return to
724 * userspace (which will retry the fault, or kill us if we got
725 * oom-killed).
726 */
727 pagefault_out_of_memory();
728 return 0;
729 }
730
731 inf = esr_to_fault_info(esr);
732 set_thread_esr(addr, esr);
733 if (fault & VM_FAULT_SIGBUS) {
734 /*
735 * We had some memory, but were unable to successfully fix up
736 * this page fault.
737 */
738 arm64_force_sig_fault(SIGBUS, BUS_ADRERR, far, inf->name);
739 } else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) {
740 unsigned int lsb;
741
742 lsb = PAGE_SHIFT;
743 if (fault & VM_FAULT_HWPOISON_LARGE)
744 lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
745
746 arm64_force_sig_mceerr(BUS_MCEERR_AR, far, lsb, inf->name);
747 } else {
748 /*
749 * The pkey value that we return to userspace can be different
750 * from the pkey that caused the fault.
751 *
752 * 1. T1 : mprotect_key(foo, PAGE_SIZE, pkey=4);
753 * 2. T1 : set POR_EL0 to deny access to pkey=4, touches, page
754 * 3. T1 : faults...
755 * 4. T2: mprotect_key(foo, PAGE_SIZE, pkey=5);
756 * 5. T1 : enters fault handler, takes mmap_lock, etc...
757 * 6. T1 : reaches here, sees vma_pkey(vma)=5, when we really
758 * faulted on a pte with its pkey=4.
759 */
760 /* Something tried to access memory that out of memory map */
761 if (si_code == SEGV_PKUERR)
762 arm64_force_sig_fault_pkey(far, inf->name, pkey);
763 else
764 arm64_force_sig_fault(SIGSEGV, si_code, far, inf->name);
765 }
766
767 return 0;
768
769 no_context:
770 __do_kernel_fault(addr, esr, regs);
771 return 0;
772 }
773
do_translation_fault(unsigned long far,unsigned long esr,struct pt_regs * regs)774 static int __kprobes do_translation_fault(unsigned long far,
775 unsigned long esr,
776 struct pt_regs *regs)
777 {
778 unsigned long addr = untagged_addr(far);
779
780 if (is_ttbr0_addr(addr))
781 return do_page_fault(far, esr, regs);
782
783 do_bad_area(far, esr, regs);
784 return 0;
785 }
786
do_alignment_fault(unsigned long far,unsigned long esr,struct pt_regs * regs)787 static int do_alignment_fault(unsigned long far, unsigned long esr,
788 struct pt_regs *regs)
789 {
790 if (IS_ENABLED(CONFIG_COMPAT_ALIGNMENT_FIXUPS) &&
791 compat_user_mode(regs))
792 return do_compat_alignment_fixup(far, regs);
793 do_bad_area(far, esr, regs);
794 return 0;
795 }
796
do_bad(unsigned long far,unsigned long esr,struct pt_regs * regs)797 static int do_bad(unsigned long far, unsigned long esr, struct pt_regs *regs)
798 {
799 return 1; /* "fault" */
800 }
801
do_sea(unsigned long far,unsigned long esr,struct pt_regs * regs)802 static int do_sea(unsigned long far, unsigned long esr, struct pt_regs *regs)
803 {
804 const struct fault_info *inf;
805 unsigned long siaddr;
806 bool can_fixup = false;
807
808 trace_android_vh_try_fixup_sea(far, esr, regs, &can_fixup);
809 if (can_fixup && fixup_exception(regs))
810 return 0;
811
812 inf = esr_to_fault_info(esr);
813
814 if (user_mode(regs) && apei_claim_sea(regs) == 0) {
815 /*
816 * APEI claimed this as a firmware-first notification.
817 * Some processing deferred to task_work before ret_to_user().
818 */
819 return 0;
820 }
821
822 if (esr & ESR_ELx_FnV) {
823 siaddr = 0;
824 } else {
825 /*
826 * The architecture specifies that the tag bits of FAR_EL1 are
827 * UNKNOWN for synchronous external aborts. Mask them out now
828 * so that userspace doesn't see them.
829 */
830 siaddr = untagged_addr(far);
831 }
832 trace_android_rvh_do_sea(siaddr, esr, regs);
833 add_taint(TAINT_MACHINE_CHECK, LOCKDEP_STILL_OK);
834 arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr);
835
836 return 0;
837 }
838
do_tag_check_fault(unsigned long far,unsigned long esr,struct pt_regs * regs)839 static int do_tag_check_fault(unsigned long far, unsigned long esr,
840 struct pt_regs *regs)
841 {
842 /*
843 * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN
844 * for tag check faults. Set them to corresponding bits in the untagged
845 * address.
846 */
847 far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK);
848 do_bad_area(far, esr, regs);
849 return 0;
850 }
851
852 static const struct fault_info fault_info[] = {
853 { do_bad, SIGKILL, SI_KERNEL, "ttbr address size fault" },
854 { do_bad, SIGKILL, SI_KERNEL, "level 1 address size fault" },
855 { do_bad, SIGKILL, SI_KERNEL, "level 2 address size fault" },
856 { do_bad, SIGKILL, SI_KERNEL, "level 3 address size fault" },
857 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" },
858 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" },
859 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" },
860 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" },
861 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 0 access flag fault" },
862 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" },
863 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" },
864 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" },
865 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 0 permission fault" },
866 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" },
867 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" },
868 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" },
869 { do_sea, SIGBUS, BUS_OBJERR, "synchronous external abort" },
870 { do_tag_check_fault, SIGSEGV, SEGV_MTESERR, "synchronous tag check fault" },
871 { do_bad, SIGKILL, SI_KERNEL, "unknown 18" },
872 { do_sea, SIGKILL, SI_KERNEL, "level -1 (translation table walk)" },
873 { do_sea, SIGKILL, SI_KERNEL, "level 0 (translation table walk)" },
874 { do_sea, SIGKILL, SI_KERNEL, "level 1 (translation table walk)" },
875 { do_sea, SIGKILL, SI_KERNEL, "level 2 (translation table walk)" },
876 { do_sea, SIGKILL, SI_KERNEL, "level 3 (translation table walk)" },
877 { do_sea, SIGBUS, BUS_OBJERR, "synchronous parity or ECC error" }, // Reserved when RAS is implemented
878 { do_bad, SIGKILL, SI_KERNEL, "unknown 25" },
879 { do_bad, SIGKILL, SI_KERNEL, "unknown 26" },
880 { do_sea, SIGKILL, SI_KERNEL, "level -1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
881 { do_sea, SIGKILL, SI_KERNEL, "level 0 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
882 { do_sea, SIGKILL, SI_KERNEL, "level 1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
883 { do_sea, SIGKILL, SI_KERNEL, "level 2 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
884 { do_sea, SIGKILL, SI_KERNEL, "level 3 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
885 { do_bad, SIGKILL, SI_KERNEL, "unknown 32" },
886 { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" },
887 { do_bad, SIGKILL, SI_KERNEL, "unknown 34" },
888 { do_bad, SIGKILL, SI_KERNEL, "unknown 35" },
889 { do_bad, SIGKILL, SI_KERNEL, "unknown 36" },
890 { do_bad, SIGKILL, SI_KERNEL, "unknown 37" },
891 { do_bad, SIGKILL, SI_KERNEL, "unknown 38" },
892 { do_bad, SIGKILL, SI_KERNEL, "unknown 39" },
893 { do_bad, SIGKILL, SI_KERNEL, "unknown 40" },
894 { do_bad, SIGKILL, SI_KERNEL, "level -1 address size fault" },
895 { do_bad, SIGKILL, SI_KERNEL, "unknown 42" },
896 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level -1 translation fault" },
897 { do_bad, SIGKILL, SI_KERNEL, "unknown 44" },
898 { do_bad, SIGKILL, SI_KERNEL, "unknown 45" },
899 { do_bad, SIGKILL, SI_KERNEL, "unknown 46" },
900 { do_bad, SIGKILL, SI_KERNEL, "unknown 47" },
901 { do_bad, SIGKILL, SI_KERNEL, "TLB conflict abort" },
902 { do_bad, SIGKILL, SI_KERNEL, "Unsupported atomic hardware update fault" },
903 { do_bad, SIGKILL, SI_KERNEL, "unknown 50" },
904 { do_bad, SIGKILL, SI_KERNEL, "unknown 51" },
905 { do_bad, SIGKILL, SI_KERNEL, "implementation fault (lockdown abort)" },
906 { do_bad, SIGBUS, BUS_OBJERR, "implementation fault (unsupported exclusive)" },
907 { do_bad, SIGKILL, SI_KERNEL, "unknown 54" },
908 { do_bad, SIGKILL, SI_KERNEL, "unknown 55" },
909 { do_bad, SIGKILL, SI_KERNEL, "unknown 56" },
910 { do_bad, SIGKILL, SI_KERNEL, "unknown 57" },
911 { do_bad, SIGKILL, SI_KERNEL, "unknown 58" },
912 { do_bad, SIGKILL, SI_KERNEL, "unknown 59" },
913 { do_bad, SIGKILL, SI_KERNEL, "unknown 60" },
914 { do_bad, SIGKILL, SI_KERNEL, "section domain fault" },
915 { do_bad, SIGKILL, SI_KERNEL, "page domain fault" },
916 { do_bad, SIGKILL, SI_KERNEL, "unknown 63" },
917 };
918
do_mem_abort(unsigned long far,unsigned long esr,struct pt_regs * regs)919 void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs)
920 {
921 const struct fault_info *inf = esr_to_fault_info(esr);
922 unsigned long addr = untagged_addr(far);
923
924 if (!inf->fn(far, esr, regs))
925 return;
926
927 if (!user_mode(regs))
928 die_kernel_fault(inf->name, addr, esr, regs);
929
930 /*
931 * At this point we have an unrecognized fault type whose tag bits may
932 * have been defined as UNKNOWN. Therefore we only expose the untagged
933 * address to the signal handler.
934 */
935 arm64_notify_die(inf->name, regs, inf->sig, inf->code, addr, esr);
936 }
937 NOKPROBE_SYMBOL(do_mem_abort);
938
do_sp_pc_abort(unsigned long addr,unsigned long esr,struct pt_regs * regs)939 void do_sp_pc_abort(unsigned long addr, unsigned long esr, struct pt_regs *regs)
940 {
941 trace_android_rvh_do_sp_pc_abort(addr, esr, regs);
942
943 arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN,
944 addr, esr);
945 }
946 NOKPROBE_SYMBOL(do_sp_pc_abort);
947
948 /*
949 * __refdata because early_brk64 is __init, but the reference to it is
950 * clobbered at arch_initcall time.
951 * See traps.c and debug-monitors.c:debug_traps_init().
952 */
953 static struct fault_info __refdata debug_fault_info[] = {
954 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware breakpoint" },
955 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware single-step" },
956 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware watchpoint" },
957 { do_bad, SIGKILL, SI_KERNEL, "unknown 3" },
958 { do_bad, SIGTRAP, TRAP_BRKPT, "aarch32 BKPT" },
959 { do_bad, SIGKILL, SI_KERNEL, "aarch32 vector catch" },
960 { early_brk64, SIGTRAP, TRAP_BRKPT, "aarch64 BRK" },
961 { do_bad, SIGKILL, SI_KERNEL, "unknown 7" },
962 };
963
hook_debug_fault_code(int nr,int (* fn)(unsigned long,unsigned long,struct pt_regs *),int sig,int code,const char * name)964 void __init hook_debug_fault_code(int nr,
965 int (*fn)(unsigned long, unsigned long, struct pt_regs *),
966 int sig, int code, const char *name)
967 {
968 BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info));
969
970 debug_fault_info[nr].fn = fn;
971 debug_fault_info[nr].sig = sig;
972 debug_fault_info[nr].code = code;
973 debug_fault_info[nr].name = name;
974 }
975
976 /*
977 * In debug exception context, we explicitly disable preemption despite
978 * having interrupts disabled.
979 * This serves two purposes: it makes it much less likely that we would
980 * accidentally schedule in exception context and it will force a warning
981 * if we somehow manage to schedule by accident.
982 */
debug_exception_enter(struct pt_regs * regs)983 static void debug_exception_enter(struct pt_regs *regs)
984 {
985 preempt_disable();
986
987 /* This code is a bit fragile. Test it. */
988 RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work");
989 }
990 NOKPROBE_SYMBOL(debug_exception_enter);
991
debug_exception_exit(struct pt_regs * regs)992 static void debug_exception_exit(struct pt_regs *regs)
993 {
994 preempt_enable_no_resched();
995 }
996 NOKPROBE_SYMBOL(debug_exception_exit);
997
do_debug_exception(unsigned long addr_if_watchpoint,unsigned long esr,struct pt_regs * regs)998 void do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr,
999 struct pt_regs *regs)
1000 {
1001 const struct fault_info *inf = esr_to_debug_fault_info(esr);
1002 unsigned long pc = instruction_pointer(regs);
1003
1004 debug_exception_enter(regs);
1005
1006 if (user_mode(regs) && !is_ttbr0_addr(pc))
1007 arm64_apply_bp_hardening();
1008
1009 if (inf->fn(addr_if_watchpoint, esr, regs)) {
1010 arm64_notify_die(inf->name, regs, inf->sig, inf->code, pc, esr);
1011 }
1012
1013 debug_exception_exit(regs);
1014 }
1015 NOKPROBE_SYMBOL(do_debug_exception);
1016
1017 /*
1018 * Used during anonymous page fault handling.
1019 */
vma_alloc_zeroed_movable_folio(struct vm_area_struct * vma,unsigned long vaddr)1020 struct folio *vma_alloc_zeroed_movable_folio(struct vm_area_struct *vma,
1021 unsigned long vaddr)
1022 {
1023 gfp_t flags = GFP_HIGHUSER_MOVABLE | __GFP_ZERO | __GFP_CMA;
1024
1025 /*
1026 * If the page is mapped with PROT_MTE, initialise the tags at the
1027 * point of allocation and page zeroing as this is usually faster than
1028 * separate DC ZVA and STGM.
1029 */
1030 if (vma->vm_flags & VM_MTE)
1031 flags |= __GFP_ZEROTAGS;
1032
1033 return vma_alloc_folio(flags, 0, vma, vaddr, false);
1034 }
1035
tag_clear_highpage(struct page * page)1036 void tag_clear_highpage(struct page *page)
1037 {
1038 /* Newly allocated page, shouldn't have been tagged yet */
1039 WARN_ON_ONCE(!try_page_mte_tagging(page));
1040 mte_zero_clear_page_tags(page_address(page));
1041 set_page_mte_tagged(page);
1042 }
1043