1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * arch/m68k/mvme147/config.c
4 *
5 * Copyright (C) 1996 Dave Frascone [chaos@mindspring.com]
6 * Cloned from Richard Hirst [richard@sleepie.demon.co.uk]
7 *
8 * Based on:
9 *
10 * Copyright (C) 1993 Hamish Macdonald
11 */
12
13 #include <linux/types.h>
14 #include <linux/kernel.h>
15 #include <linux/mm.h>
16 #include <linux/tty.h>
17 #include <linux/clocksource.h>
18 #include <linux/console.h>
19 #include <linux/linkage.h>
20 #include <linux/init.h>
21 #include <linux/major.h>
22 #include <linux/rtc.h>
23 #include <linux/interrupt.h>
24
25 #include <asm/bootinfo.h>
26 #include <asm/bootinfo-vme.h>
27 #include <asm/byteorder.h>
28 #include <asm/setup.h>
29 #include <asm/irq.h>
30 #include <asm/traps.h>
31 #include <asm/machdep.h>
32 #include <asm/mvme147hw.h>
33 #include <asm/config.h>
34
35 #include "mvme147.h"
36
37 static void mvme147_get_model(char *model);
38 extern void mvme147_sched_init(void);
39 extern int mvme147_hwclk (int, struct rtc_time *);
40 extern void mvme147_reset (void);
41
42
43 static int bcd2int (unsigned char b);
44
45
mvme147_parse_bootinfo(const struct bi_record * bi)46 int __init mvme147_parse_bootinfo(const struct bi_record *bi)
47 {
48 uint16_t tag = be16_to_cpu(bi->tag);
49 if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO)
50 return 0;
51 else
52 return 1;
53 }
54
mvme147_reset(void)55 void mvme147_reset(void)
56 {
57 pr_info("\r\n\nCalled mvme147_reset\r\n");
58 m147_pcc->watchdog = 0x0a; /* Clear timer */
59 m147_pcc->watchdog = 0xa5; /* Enable watchdog - 100ms to reset */
60 while (1)
61 ;
62 }
63
mvme147_get_model(char * model)64 static void mvme147_get_model(char *model)
65 {
66 sprintf(model, "Motorola MVME147");
67 }
68
69 /*
70 * This function is called during kernel startup to initialize
71 * the mvme147 IRQ handling routines.
72 */
73
mvme147_init_IRQ(void)74 static void __init mvme147_init_IRQ(void)
75 {
76 m68k_setup_user_interrupt(VEC_USER, 192);
77 }
78
config_mvme147(void)79 void __init config_mvme147(void)
80 {
81 mach_sched_init = mvme147_sched_init;
82 mach_init_IRQ = mvme147_init_IRQ;
83 mach_hwclk = mvme147_hwclk;
84 mach_reset = mvme147_reset;
85 mach_get_model = mvme147_get_model;
86
87 /* Board type is only set by newer versions of vmelilo/tftplilo */
88 if (!vme_brdtype)
89 vme_brdtype = VME_TYPE_MVME147;
90 }
91
92 static u64 mvme147_read_clk(struct clocksource *cs);
93
94 static struct clocksource mvme147_clk = {
95 .name = "pcc",
96 .rating = 250,
97 .read = mvme147_read_clk,
98 .mask = CLOCKSOURCE_MASK(32),
99 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
100 };
101
102 static u32 clk_total;
103
104 #define PCC_TIMER_CLOCK_FREQ 160000
105 #define PCC_TIMER_CYCLES (PCC_TIMER_CLOCK_FREQ / HZ)
106 #define PCC_TIMER_PRELOAD (0x10000 - PCC_TIMER_CYCLES)
107
108 /* Using pcc tick timer 1 */
109
mvme147_timer_int(int irq,void * dev_id)110 static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
111 {
112 unsigned long flags;
113
114 local_irq_save(flags);
115 m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF | PCC_TIMER_COC_EN |
116 PCC_TIMER_TIC_EN;
117 m147_pcc->t1_int_cntrl = PCC_INT_ENAB | PCC_TIMER_INT_CLR |
118 PCC_LEVEL_TIMER1;
119 clk_total += PCC_TIMER_CYCLES;
120 legacy_timer_tick(1);
121 local_irq_restore(flags);
122
123 return IRQ_HANDLED;
124 }
125
126
mvme147_sched_init(void)127 void mvme147_sched_init (void)
128 {
129 if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, IRQF_TIMER,
130 "timer 1", NULL))
131 pr_err("Couldn't register timer interrupt\n");
132
133 /* Init the clock with a value */
134 /* The clock counter increments until 0xFFFF then reloads */
135 m147_pcc->t1_preload = PCC_TIMER_PRELOAD;
136 m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF | PCC_TIMER_COC_EN |
137 PCC_TIMER_TIC_EN;
138 m147_pcc->t1_int_cntrl = PCC_INT_ENAB | PCC_TIMER_INT_CLR |
139 PCC_LEVEL_TIMER1;
140
141 clocksource_register_hz(&mvme147_clk, PCC_TIMER_CLOCK_FREQ);
142 }
143
mvme147_read_clk(struct clocksource * cs)144 static u64 mvme147_read_clk(struct clocksource *cs)
145 {
146 unsigned long flags;
147 u8 overflow, tmp;
148 u16 count;
149 u32 ticks;
150
151 local_irq_save(flags);
152 tmp = m147_pcc->t1_cntrl >> 4;
153 count = m147_pcc->t1_count;
154 overflow = m147_pcc->t1_cntrl >> 4;
155 if (overflow != tmp)
156 count = m147_pcc->t1_count;
157 count -= PCC_TIMER_PRELOAD;
158 ticks = count + overflow * PCC_TIMER_CYCLES;
159 ticks += clk_total;
160 local_irq_restore(flags);
161
162 return ticks;
163 }
164
bcd2int(unsigned char b)165 static int bcd2int (unsigned char b)
166 {
167 return ((b>>4)*10 + (b&15));
168 }
169
mvme147_hwclk(int op,struct rtc_time * t)170 int mvme147_hwclk(int op, struct rtc_time *t)
171 {
172 if (!op) {
173 m147_rtc->ctrl = RTC_READ;
174 t->tm_year = bcd2int (m147_rtc->bcd_year);
175 t->tm_mon = bcd2int(m147_rtc->bcd_mth) - 1;
176 t->tm_mday = bcd2int (m147_rtc->bcd_dom);
177 t->tm_hour = bcd2int (m147_rtc->bcd_hr);
178 t->tm_min = bcd2int (m147_rtc->bcd_min);
179 t->tm_sec = bcd2int (m147_rtc->bcd_sec);
180 m147_rtc->ctrl = 0;
181 if (t->tm_year < 70)
182 t->tm_year += 100;
183 } else {
184 /* FIXME Setting the time is not yet supported */
185 return -EOPNOTSUPP;
186 }
187 return 0;
188 }
189
scc_delay(void)190 static void scc_delay(void)
191 {
192 __asm__ __volatile__ ("nop; nop;");
193 }
194
scc_write(char ch)195 static void scc_write(char ch)
196 {
197 do {
198 scc_delay();
199 } while (!(in_8(M147_SCC_A_ADDR) & BIT(2)));
200 scc_delay();
201 out_8(M147_SCC_A_ADDR, 8);
202 scc_delay();
203 out_8(M147_SCC_A_ADDR, ch);
204 }
205
mvme147_scc_write(struct console * co,const char * str,unsigned int count)206 void mvme147_scc_write(struct console *co, const char *str, unsigned int count)
207 {
208 unsigned long flags;
209
210 local_irq_save(flags);
211 while (count--) {
212 if (*str == '\n')
213 scc_write('\r');
214 scc_write(*str++);
215 }
216 local_irq_restore(flags);
217 }
218