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1/* SPDX-License-Identifier: GPL-2.0 */
2
3/*
4 * Copyright C 2016, Oracle and/or its affiliates. All rights reserved.
5 */
6
7	.code32
8	.text
9#define _pa(x)          ((x) - __START_KERNEL_map)
10#define rva(x)          ((x) - pvh_start_xen)
11
12#include <linux/elfnote.h>
13#include <linux/init.h>
14#include <linux/linkage.h>
15#include <asm/desc_defs.h>
16#include <asm/segment.h>
17#include <asm/asm.h>
18#include <asm/boot.h>
19#include <asm/pgtable.h>
20#include <asm/processor-flags.h>
21#include <asm/msr.h>
22#include <asm/nospec-branch.h>
23#include <xen/interface/elfnote.h>
24
25	__HEAD
26
27/*
28 * Entry point for PVH guests.
29 *
30 * Xen ABI specifies the following register state when we come here:
31 *
32 * - `ebx`: contains the physical memory address where the loader has placed
33 *          the boot start info structure.
34 * - `cr0`: bit 0 (PE) must be set. All the other writeable bits are cleared.
35 * - `cr4`: all bits are cleared.
36 * - `cs `: must be a 32-bit read/execute code segment with a base of `0`
37 *          and a limit of `0xFFFFFFFF`. The selector value is unspecified.
38 * - `ds`, `es`: must be a 32-bit read/write data segment with a base of
39 *               `0` and a limit of `0xFFFFFFFF`. The selector values are all
40 *               unspecified.
41 * - `tr`: must be a 32-bit TSS (active) with a base of '0' and a limit
42 *         of '0x67'.
43 * - `eflags`: bit 17 (VM) must be cleared. Bit 9 (IF) must be cleared.
44 *             Bit 8 (TF) must be cleared. Other bits are all unspecified.
45 *
46 * All other processor registers and flag bits are unspecified. The OS is in
47 * charge of setting up its own stack, GDT and IDT.
48 */
49
50#define PVH_GDT_ENTRY_CS	1
51#define PVH_GDT_ENTRY_DS	2
52#define PVH_CS_SEL		(PVH_GDT_ENTRY_CS * 8)
53#define PVH_DS_SEL		(PVH_GDT_ENTRY_DS * 8)
54
55SYM_CODE_START_LOCAL(pvh_start_xen)
56	UNWIND_HINT_END_OF_STACK
57	cld
58
59	/*
60	 * See the comment for startup_32 for more details.  We need to
61	 * execute a call to get the execution address to be position
62	 * independent, but we don't have a stack.  Save and restore the
63	 * magic field of start_info in ebx, and use that as the stack.
64	 */
65	mov  (%ebx), %eax
66	leal 4(%ebx), %esp
67	ANNOTATE_INTRA_FUNCTION_CALL
68	call 1f
691:	popl %ebp
70	mov  %eax, (%ebx)
71	subl $rva(1b), %ebp
72	movl $0, %esp
73
74	leal rva(gdt)(%ebp), %eax
75	leal rva(gdt_start)(%ebp), %ecx
76	movl %ecx, 2(%eax)
77	lgdt (%eax)
78
79	mov $PVH_DS_SEL,%eax
80	mov %eax,%ds
81	mov %eax,%es
82	mov %eax,%ss
83
84	/* Stash hvm_start_info. */
85	leal rva(pvh_start_info)(%ebp), %edi
86	mov %ebx, %esi
87	movl rva(pvh_start_info_sz)(%ebp), %ecx
88	shr $2,%ecx
89	rep
90	movsl
91
92	leal rva(early_stack_end)(%ebp), %esp
93
94	/* Enable PAE mode. */
95	mov %cr4, %eax
96	orl $X86_CR4_PAE, %eax
97	mov %eax, %cr4
98
99#ifdef CONFIG_X86_64
100	/* Enable Long mode. */
101	mov $MSR_EFER, %ecx
102	rdmsr
103	btsl $_EFER_LME, %eax
104	wrmsr
105
106	mov %ebp, %ebx
107	subl $_pa(pvh_start_xen), %ebx /* offset */
108	jz .Lpagetable_done
109
110	/* Fixup page-tables for relocation. */
111	leal rva(pvh_init_top_pgt)(%ebp), %edi
112	movl $PTRS_PER_PGD, %ecx
1132:
114	testl $_PAGE_PRESENT, 0x00(%edi)
115	jz 1f
116	addl %ebx, 0x00(%edi)
1171:
118	addl $8, %edi
119	decl %ecx
120	jnz 2b
121
122	/* L3 ident has a single entry. */
123	leal rva(pvh_level3_ident_pgt)(%ebp), %edi
124	addl %ebx, 0x00(%edi)
125
126	leal rva(pvh_level3_kernel_pgt)(%ebp), %edi
127	addl %ebx, (PAGE_SIZE - 16)(%edi)
128	addl %ebx, (PAGE_SIZE - 8)(%edi)
129
130	/* pvh_level2_ident_pgt is fine - large pages */
131
132	/* pvh_level2_kernel_pgt needs adjustment - large pages */
133	leal rva(pvh_level2_kernel_pgt)(%ebp), %edi
134	movl $PTRS_PER_PMD, %ecx
1352:
136	testl $_PAGE_PRESENT, 0x00(%edi)
137	jz 1f
138	addl %ebx, 0x00(%edi)
1391:
140	addl $8, %edi
141	decl %ecx
142	jnz 2b
143
144.Lpagetable_done:
145	/* Enable pre-constructed page tables. */
146	leal rva(pvh_init_top_pgt)(%ebp), %eax
147	mov %eax, %cr3
148	mov $(X86_CR0_PG | X86_CR0_PE), %eax
149	mov %eax, %cr0
150
151	/* Jump to 64-bit mode. */
152	pushl $PVH_CS_SEL
153	leal  rva(1f)(%ebp), %eax
154	pushl %eax
155	lretl
156
157	/* 64-bit entry point. */
158	.code64
1591:
160	UNWIND_HINT_END_OF_STACK
161
162	/* Set base address in stack canary descriptor. */
163	mov $MSR_GS_BASE,%ecx
164	leal canary(%rip), %eax
165	xor %edx, %edx
166	wrmsr
167
168	/*
169	 * Calculate load offset and store in phys_base.  __pa() needs
170	 * phys_base set to calculate the hypercall page in xen_pvh_init().
171	 */
172	movq %rbp, %rbx
173	subq $_pa(pvh_start_xen), %rbx
174	movq %rbx, phys_base(%rip)
175
176	/* Call xen_prepare_pvh() via the kernel virtual mapping */
177	leaq xen_prepare_pvh(%rip), %rax
178	subq phys_base(%rip), %rax
179	addq $__START_KERNEL_map, %rax
180	ANNOTATE_RETPOLINE_SAFE
181	call *%rax
182
183	/*
184	 * Clear phys_base.  __startup_64 will *add* to its value,
185	 * so reset to 0.
186	 */
187	xor  %rbx, %rbx
188	movq %rbx, phys_base(%rip)
189
190	/* startup_64 expects boot_params in %rsi. */
191	lea pvh_bootparams(%rip), %rsi
192	jmp startup_64
193
194#else /* CONFIG_X86_64 */
195
196	call mk_early_pgtbl_32
197
198	mov $_pa(initial_page_table), %eax
199	mov %eax, %cr3
200
201	mov %cr0, %eax
202	or $(X86_CR0_PG | X86_CR0_PE), %eax
203	mov %eax, %cr0
204
205	ljmp $PVH_CS_SEL, $1f
2061:
207	call xen_prepare_pvh
208	mov $_pa(pvh_bootparams), %esi
209
210	/* startup_32 doesn't expect paging and PAE to be on. */
211	ljmp $PVH_CS_SEL, $_pa(2f)
2122:
213	mov %cr0, %eax
214	and $~X86_CR0_PG, %eax
215	mov %eax, %cr0
216	mov %cr4, %eax
217	and $~X86_CR4_PAE, %eax
218	mov %eax, %cr4
219
220	ljmp $PVH_CS_SEL, $_pa(startup_32)
221#endif
222SYM_CODE_END(pvh_start_xen)
223
224	.section ".init.data","aw"
225	.balign 8
226SYM_DATA_START_LOCAL(gdt)
227	.word gdt_end - gdt_start
228	.long _pa(gdt_start) /* x86-64 will overwrite if relocated. */
229	.word 0
230SYM_DATA_END(gdt)
231SYM_DATA_START_LOCAL(gdt_start)
232	.quad 0x0000000000000000            /* NULL descriptor */
233#ifdef CONFIG_X86_64
234	.quad GDT_ENTRY(DESC_CODE64, 0, 0xfffff) /* PVH_CS_SEL */
235#else
236	.quad GDT_ENTRY(DESC_CODE32, 0, 0xfffff) /* PVH_CS_SEL */
237#endif
238	.quad GDT_ENTRY(DESC_DATA32, 0, 0xfffff) /* PVH_DS_SEL */
239SYM_DATA_END_LABEL(gdt_start, SYM_L_LOCAL, gdt_end)
240
241	.balign 16
242SYM_DATA_LOCAL(canary, .fill 48, 1, 0)
243
244SYM_DATA_START_LOCAL(early_stack)
245	.fill BOOT_STACK_SIZE, 1, 0
246SYM_DATA_END_LABEL(early_stack, SYM_L_LOCAL, early_stack_end)
247
248#ifdef CONFIG_X86_64
249/*
250 * Xen PVH needs a set of identity mapped and kernel high mapping
251 * page tables.  pvh_start_xen starts running on the identity mapped
252 * page tables, but xen_prepare_pvh calls into the high mapping.
253 * These page tables need to be relocatable and are only used until
254 * startup_64 transitions to init_top_pgt.
255 */
256SYM_DATA_START_PAGE_ALIGNED(pvh_init_top_pgt)
257	.quad   pvh_level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
258	.org    pvh_init_top_pgt + L4_PAGE_OFFSET * 8, 0
259	.quad   pvh_level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
260	.org    pvh_init_top_pgt + L4_START_KERNEL * 8, 0
261	/* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
262	.quad   pvh_level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
263SYM_DATA_END(pvh_init_top_pgt)
264
265SYM_DATA_START_PAGE_ALIGNED(pvh_level3_ident_pgt)
266	.quad	pvh_level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
267	.fill	511, 8, 0
268SYM_DATA_END(pvh_level3_ident_pgt)
269SYM_DATA_START_PAGE_ALIGNED(pvh_level2_ident_pgt)
270	/*
271	 * Since I easily can, map the first 1G.
272	 * Don't set NX because code runs from these pages.
273	 *
274	 * Note: This sets _PAGE_GLOBAL despite whether
275	 * the CPU supports it or it is enabled.  But,
276	 * the CPU should ignore the bit.
277	 */
278	PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD)
279SYM_DATA_END(pvh_level2_ident_pgt)
280SYM_DATA_START_PAGE_ALIGNED(pvh_level3_kernel_pgt)
281	.fill	L3_START_KERNEL, 8, 0
282	/* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */
283	.quad	pvh_level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
284	.quad	0 /* no fixmap */
285SYM_DATA_END(pvh_level3_kernel_pgt)
286
287SYM_DATA_START_PAGE_ALIGNED(pvh_level2_kernel_pgt)
288	/*
289	 * Kernel high mapping.
290	 *
291	 * The kernel code+data+bss must be located below KERNEL_IMAGE_SIZE in
292	 * virtual address space, which is 1 GiB if RANDOMIZE_BASE is enabled,
293	 * 512 MiB otherwise.
294	 *
295	 * (NOTE: after that starts the module area, see MODULES_VADDR.)
296	 *
297	 * This table is eventually used by the kernel during normal runtime.
298	 * Care must be taken to clear out undesired bits later, like _PAGE_RW
299	 * or _PAGE_GLOBAL in some cases.
300	 */
301	PMDS(0, __PAGE_KERNEL_LARGE_EXEC, KERNEL_IMAGE_SIZE / PMD_SIZE)
302SYM_DATA_END(pvh_level2_kernel_pgt)
303
304	ELFNOTE(Xen, XEN_ELFNOTE_PHYS32_RELOC,
305		     .long CONFIG_PHYSICAL_ALIGN;
306		     .long LOAD_PHYSICAL_ADDR;
307		     .long KERNEL_IMAGE_SIZE - 1)
308#endif
309
310	ELFNOTE(Xen, XEN_ELFNOTE_PHYS32_ENTRY,
311	             _ASM_PTR (pvh_start_xen - __START_KERNEL_map))
312