1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 *
4 * Bluetooth support for Intel devices
5 *
6 * Copyright (C) 2015 Intel Corporation
7 */
8
9 /* List of tlv type */
10 enum {
11 INTEL_TLV_CNVI_TOP = 0x10,
12 INTEL_TLV_CNVR_TOP,
13 INTEL_TLV_CNVI_BT,
14 INTEL_TLV_CNVR_BT,
15 INTEL_TLV_CNVI_OTP,
16 INTEL_TLV_CNVR_OTP,
17 INTEL_TLV_DEV_REV_ID,
18 INTEL_TLV_USB_VENDOR_ID,
19 INTEL_TLV_USB_PRODUCT_ID,
20 INTEL_TLV_PCIE_VENDOR_ID,
21 INTEL_TLV_PCIE_DEVICE_ID,
22 INTEL_TLV_PCIE_SUBSYSTEM_ID,
23 INTEL_TLV_IMAGE_TYPE,
24 INTEL_TLV_TIME_STAMP,
25 INTEL_TLV_BUILD_TYPE,
26 INTEL_TLV_BUILD_NUM,
27 INTEL_TLV_FW_BUILD_PRODUCT,
28 INTEL_TLV_FW_BUILD_HW,
29 INTEL_TLV_FW_STEP,
30 INTEL_TLV_BT_SPEC,
31 INTEL_TLV_MFG_NAME,
32 INTEL_TLV_HCI_REV,
33 INTEL_TLV_LMP_SUBVER,
34 INTEL_TLV_OTP_PATCH_VER,
35 INTEL_TLV_SECURE_BOOT,
36 INTEL_TLV_KEY_FROM_HDR,
37 INTEL_TLV_OTP_LOCK,
38 INTEL_TLV_API_LOCK,
39 INTEL_TLV_DEBUG_LOCK,
40 INTEL_TLV_MIN_FW,
41 INTEL_TLV_LIMITED_CCE,
42 INTEL_TLV_SBE_TYPE,
43 INTEL_TLV_OTP_BDADDR,
44 INTEL_TLV_UNLOCKED_STATE,
45 INTEL_TLV_GIT_SHA1,
46 INTEL_TLV_FW_ID = 0x50
47 };
48
49 struct intel_tlv {
50 u8 type;
51 u8 len;
52 u8 val[];
53 } __packed;
54
55 #define BTINTEL_CNVI_BLAZARI 0x900
56
57 #define BTINTEL_IMG_BOOTLOADER 0x01 /* Bootloader image */
58 #define BTINTEL_IMG_IML 0x02 /* Intermediate image */
59 #define BTINTEL_IMG_OP 0x03 /* Operational image */
60
61 #define BTINTEL_FWID_MAXLEN 64
62
63 struct intel_version_tlv {
64 u32 cnvi_top;
65 u32 cnvr_top;
66 u32 cnvi_bt;
67 u32 cnvr_bt;
68 u16 dev_rev_id;
69 u8 img_type;
70 u16 timestamp;
71 u8 build_type;
72 u32 build_num;
73 u8 secure_boot;
74 u8 otp_lock;
75 u8 api_lock;
76 u8 debug_lock;
77 u8 min_fw_build_nn;
78 u8 min_fw_build_cw;
79 u8 min_fw_build_yy;
80 u8 limited_cce;
81 u8 sbe_type;
82 u32 git_sha1;
83 u8 fw_id[BTINTEL_FWID_MAXLEN];
84 bdaddr_t otp_bd_addr;
85 };
86
87 struct intel_version {
88 u8 status;
89 u8 hw_platform;
90 u8 hw_variant;
91 u8 hw_revision;
92 u8 fw_variant;
93 u8 fw_revision;
94 u8 fw_build_num;
95 u8 fw_build_ww;
96 u8 fw_build_yy;
97 u8 fw_patch_num;
98 } __packed;
99
100 struct intel_boot_params {
101 __u8 status;
102 __u8 otp_format;
103 __u8 otp_content;
104 __u8 otp_patch;
105 __le16 dev_revid;
106 __u8 secure_boot;
107 __u8 key_from_hdr;
108 __u8 key_type;
109 __u8 otp_lock;
110 __u8 api_lock;
111 __u8 debug_lock;
112 bdaddr_t otp_bdaddr;
113 __u8 min_fw_build_nn;
114 __u8 min_fw_build_cw;
115 __u8 min_fw_build_yy;
116 __u8 limited_cce;
117 __u8 unlocked_state;
118 } __packed;
119
120 struct intel_bootup {
121 __u8 zero;
122 __u8 num_cmds;
123 __u8 source;
124 __u8 reset_type;
125 __u8 reset_reason;
126 __u8 ddc_status;
127 } __packed;
128
129 struct intel_secure_send_result {
130 __u8 result;
131 __le16 opcode;
132 __u8 status;
133 } __packed;
134
135 struct intel_reset {
136 __u8 reset_type;
137 __u8 patch_enable;
138 __u8 ddc_reload;
139 __u8 boot_option;
140 __le32 boot_param;
141 } __packed;
142
143 struct intel_debug_features {
144 __u8 page1[16];
145 } __packed;
146
147 struct intel_offload_use_cases {
148 __u8 status;
149 __u8 preset[8];
150 } __packed;
151
152 #define INTEL_OP_PPAG_CMD 0xFE0B
153 struct hci_ppag_enable_cmd {
154 __le32 ppag_enable_flags;
155 } __packed;
156
157 #define INTEL_TLV_TYPE_ID 0x01
158
159 #define INTEL_TLV_SYSTEM_EXCEPTION 0x00
160 #define INTEL_TLV_FATAL_EXCEPTION 0x01
161 #define INTEL_TLV_DEBUG_EXCEPTION 0x02
162 #define INTEL_TLV_TEST_EXCEPTION 0xDE
163
164 #define INTEL_HW_PLATFORM(cnvx_bt) ((u8)(((cnvx_bt) & 0x0000ff00) >> 8))
165 #define INTEL_HW_VARIANT(cnvx_bt) ((u8)(((cnvx_bt) & 0x003f0000) >> 16))
166 #define INTEL_CNVX_TOP_TYPE(cnvx_top) ((cnvx_top) & 0x00000fff)
167 #define INTEL_CNVX_TOP_STEP(cnvx_top) (((cnvx_top) & 0x0f000000) >> 24)
168 #define INTEL_CNVX_TOP_PACK_SWAB(t, s) __swab16(((__u16)(((t) << 4) | (s))))
169
170 enum {
171 INTEL_BOOTLOADER,
172 INTEL_DOWNLOADING,
173 INTEL_FIRMWARE_LOADED,
174 INTEL_FIRMWARE_FAILED,
175 INTEL_BOOTING,
176 INTEL_BROKEN_INITIAL_NCMD,
177 INTEL_BROKEN_SHUTDOWN_LED,
178 INTEL_ROM_LEGACY,
179 INTEL_ROM_LEGACY_NO_WBS_SUPPORT,
180 INTEL_ACPI_RESET_ACTIVE,
181 INTEL_WAIT_FOR_D0,
182
183 __INTEL_NUM_FLAGS,
184 };
185
186 struct btintel_data {
187 DECLARE_BITMAP(flags, __INTEL_NUM_FLAGS);
188 int (*acpi_reset_method)(struct hci_dev *hdev);
189 };
190
191 #define btintel_set_flag(hdev, nr) \
192 do { \
193 struct btintel_data *intel = hci_get_priv((hdev)); \
194 set_bit((nr), intel->flags); \
195 } while (0)
196
197 #define btintel_clear_flag(hdev, nr) \
198 do { \
199 struct btintel_data *intel = hci_get_priv((hdev)); \
200 clear_bit((nr), intel->flags); \
201 } while (0)
202
203 #define btintel_wake_up_flag(hdev, nr) \
204 do { \
205 struct btintel_data *intel = hci_get_priv((hdev)); \
206 wake_up_bit(intel->flags, (nr)); \
207 } while (0)
208
209 #define btintel_get_flag(hdev) \
210 (((struct btintel_data *)hci_get_priv(hdev))->flags)
211
212 #define btintel_test_flag(hdev, nr) test_bit((nr), btintel_get_flag(hdev))
213 #define btintel_test_and_clear_flag(hdev, nr) test_and_clear_bit((nr), btintel_get_flag(hdev))
214 #define btintel_wait_on_flag_timeout(hdev, nr, m, to) \
215 wait_on_bit_timeout(btintel_get_flag(hdev), (nr), m, to)
216
217 #if IS_ENABLED(CONFIG_BT_INTEL) || IS_ENABLED(CONFIG_BT_INTEL_PCIE)
218
219 int btintel_check_bdaddr(struct hci_dev *hdev);
220 int btintel_enter_mfg(struct hci_dev *hdev);
221 int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched);
222 int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
223 int btintel_set_diag(struct hci_dev *hdev, bool enable);
224
225 int btintel_version_info(struct hci_dev *hdev, struct intel_version *ver);
226 int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name);
227 int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug);
228 int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver);
229 struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read,
230 u16 opcode_write);
231 int btintel_send_intel_reset(struct hci_dev *hdev, u32 boot_param);
232 int btintel_read_boot_params(struct hci_dev *hdev,
233 struct intel_boot_params *params);
234 int btintel_download_firmware(struct hci_dev *dev, struct intel_version *ver,
235 const struct firmware *fw, u32 *boot_param);
236 int btintel_configure_setup(struct hci_dev *hdev, const char *driver_name);
237 int btintel_recv_event(struct hci_dev *hdev, struct sk_buff *skb);
238 void btintel_bootup(struct hci_dev *hdev, const void *ptr, unsigned int len);
239 void btintel_secure_send_result(struct hci_dev *hdev,
240 const void *ptr, unsigned int len);
241 int btintel_set_quality_report(struct hci_dev *hdev, bool enable);
242 int btintel_version_info_tlv(struct hci_dev *hdev,
243 struct intel_version_tlv *version);
244 int btintel_parse_version_tlv(struct hci_dev *hdev,
245 struct intel_version_tlv *version,
246 struct sk_buff *skb);
247 void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant);
248 int btintel_bootloader_setup_tlv(struct hci_dev *hdev,
249 struct intel_version_tlv *ver);
250 int btintel_shutdown_combined(struct hci_dev *hdev);
251 void btintel_hw_error(struct hci_dev *hdev, u8 code);
252 void btintel_print_fseq_info(struct hci_dev *hdev);
253 int btintel_diagnostics(struct hci_dev *hdev, struct sk_buff *skb);
254 #else
255
btintel_check_bdaddr(struct hci_dev * hdev)256 static inline int btintel_check_bdaddr(struct hci_dev *hdev)
257 {
258 return -EOPNOTSUPP;
259 }
260
btintel_enter_mfg(struct hci_dev * hdev)261 static inline int btintel_enter_mfg(struct hci_dev *hdev)
262 {
263 return -EOPNOTSUPP;
264 }
265
btintel_exit_mfg(struct hci_dev * hdev,bool reset,bool patched)266 static inline int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched)
267 {
268 return -EOPNOTSUPP;
269 }
270
btintel_set_bdaddr(struct hci_dev * hdev,const bdaddr_t * bdaddr)271 static inline int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
272 {
273 return -EOPNOTSUPP;
274 }
275
btintel_set_diag(struct hci_dev * hdev,bool enable)276 static inline int btintel_set_diag(struct hci_dev *hdev, bool enable)
277 {
278 return -EOPNOTSUPP;
279 }
280
btintel_version_info(struct hci_dev * hdev,struct intel_version * ver)281 static inline int btintel_version_info(struct hci_dev *hdev,
282 struct intel_version *ver)
283 {
284 return -EOPNOTSUPP;
285 }
286
btintel_load_ddc_config(struct hci_dev * hdev,const char * ddc_name)287 static inline int btintel_load_ddc_config(struct hci_dev *hdev,
288 const char *ddc_name)
289 {
290 return -EOPNOTSUPP;
291 }
292
btintel_set_event_mask_mfg(struct hci_dev * hdev,bool debug)293 static inline int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug)
294 {
295 return -EOPNOTSUPP;
296 }
297
btintel_read_version(struct hci_dev * hdev,struct intel_version * ver)298 static inline int btintel_read_version(struct hci_dev *hdev,
299 struct intel_version *ver)
300 {
301 return -EOPNOTSUPP;
302 }
303
btintel_regmap_init(struct hci_dev * hdev,u16 opcode_read,u16 opcode_write)304 static inline struct regmap *btintel_regmap_init(struct hci_dev *hdev,
305 u16 opcode_read,
306 u16 opcode_write)
307 {
308 return ERR_PTR(-EINVAL);
309 }
310
btintel_send_intel_reset(struct hci_dev * hdev,u32 reset_param)311 static inline int btintel_send_intel_reset(struct hci_dev *hdev,
312 u32 reset_param)
313 {
314 return -EOPNOTSUPP;
315 }
316
btintel_read_boot_params(struct hci_dev * hdev,struct intel_boot_params * params)317 static inline int btintel_read_boot_params(struct hci_dev *hdev,
318 struct intel_boot_params *params)
319 {
320 return -EOPNOTSUPP;
321 }
322
btintel_download_firmware(struct hci_dev * dev,const struct firmware * fw,u32 * boot_param)323 static inline int btintel_download_firmware(struct hci_dev *dev,
324 const struct firmware *fw,
325 u32 *boot_param)
326 {
327 return -EOPNOTSUPP;
328 }
329
btintel_configure_setup(struct hci_dev * hdev,const char * driver_name)330 static inline int btintel_configure_setup(struct hci_dev *hdev,
331 const char *driver_name)
332 {
333 return -ENODEV;
334 }
335
btintel_bootup(struct hci_dev * hdev,const void * ptr,unsigned int len)336 static inline void btintel_bootup(struct hci_dev *hdev,
337 const void *ptr, unsigned int len)
338 {
339 }
340
btintel_secure_send_result(struct hci_dev * hdev,const void * ptr,unsigned int len)341 static inline void btintel_secure_send_result(struct hci_dev *hdev,
342 const void *ptr, unsigned int len)
343 {
344 }
345
btintel_set_quality_report(struct hci_dev * hdev,bool enable)346 static inline int btintel_set_quality_report(struct hci_dev *hdev, bool enable)
347 {
348 return -ENODEV;
349 }
350
btintel_version_info_tlv(struct hci_dev * hdev,struct intel_version_tlv * version)351 static inline int btintel_version_info_tlv(struct hci_dev *hdev,
352 struct intel_version_tlv *version)
353 {
354 return -EOPNOTSUPP;
355 }
356
btintel_parse_version_tlv(struct hci_dev * hdev,struct intel_version_tlv * version,struct sk_buff * skb)357 static inline int btintel_parse_version_tlv(struct hci_dev *hdev,
358 struct intel_version_tlv *version,
359 struct sk_buff *skb)
360 {
361 return -EOPNOTSUPP;
362 }
363
btintel_set_msft_opcode(struct hci_dev * hdev,u8 hw_variant)364 static inline void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant)
365
366 {
367 }
368
btintel_bootloader_setup_tlv(struct hci_dev * hdev,struct intel_version_tlv * ver)369 static inline int btintel_bootloader_setup_tlv(struct hci_dev *hdev,
370 struct intel_version_tlv *ver)
371 {
372 return -ENODEV;
373 }
374
btintel_shutdown_combined(struct hci_dev * hdev)375 static inline int btintel_shutdown_combined(struct hci_dev *hdev)
376 {
377 return -ENODEV;
378 }
379
btintel_hw_error(struct hci_dev * hdev,u8 code)380 static inline void btintel_hw_error(struct hci_dev *hdev, u8 code)
381 {
382 }
383
btintel_print_fseq_info(struct hci_dev * hdev)384 static inline void btintel_print_fseq_info(struct hci_dev *hdev)
385 {
386 }
387
btintel_diagnostics(struct hci_dev * hdev,struct sk_buff * skb)388 static inline int btintel_diagnostics(struct hci_dev *hdev, struct sk_buff *skb)
389 {
390 return -EOPNOTSUPP;
391 }
392 #endif
393