1 /*
2 * Copyright 2012 Red Hat Inc.
3 * Parts based on xf86-video-ast
4 * Copyright (c) 2005 ASPEED Technology Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 *
26 */
27 /*
28 * Authors: Dave Airlie <airlied@redhat.com>
29 */
30
31 #include <linux/delay.h>
32 #include <linux/export.h>
33 #include <linux/pci.h>
34
35 #include <drm/drm_atomic.h>
36 #include <drm/drm_atomic_helper.h>
37 #include <drm/drm_crtc.h>
38 #include <drm/drm_damage_helper.h>
39 #include <drm/drm_format_helper.h>
40 #include <drm/drm_fourcc.h>
41 #include <drm/drm_gem_atomic_helper.h>
42 #include <drm/drm_gem_framebuffer_helper.h>
43 #include <drm/drm_gem_shmem_helper.h>
44 #include <drm/drm_managed.h>
45 #include <drm/drm_panic.h>
46 #include <drm/drm_probe_helper.h>
47
48 #include "ast_drv.h"
49 #include "ast_tables.h"
50
51 #define AST_LUT_SIZE 256
52
ast_load_palette_index(struct ast_device * ast,u8 index,u8 red,u8 green,u8 blue)53 static inline void ast_load_palette_index(struct ast_device *ast,
54 u8 index, u8 red, u8 green,
55 u8 blue)
56 {
57 ast_io_write8(ast, AST_IO_VGADWR, index);
58 ast_io_read8(ast, AST_IO_VGASRI);
59 ast_io_write8(ast, AST_IO_VGAPDR, red);
60 ast_io_read8(ast, AST_IO_VGASRI);
61 ast_io_write8(ast, AST_IO_VGAPDR, green);
62 ast_io_read8(ast, AST_IO_VGASRI);
63 ast_io_write8(ast, AST_IO_VGAPDR, blue);
64 ast_io_read8(ast, AST_IO_VGASRI);
65 }
66
ast_crtc_set_gamma_linear(struct ast_device * ast,const struct drm_format_info * format)67 static void ast_crtc_set_gamma_linear(struct ast_device *ast,
68 const struct drm_format_info *format)
69 {
70 int i;
71
72 switch (format->format) {
73 case DRM_FORMAT_C8: /* In this case, gamma table is used as color palette */
74 case DRM_FORMAT_RGB565:
75 case DRM_FORMAT_XRGB8888:
76 for (i = 0; i < AST_LUT_SIZE; i++)
77 ast_load_palette_index(ast, i, i, i, i);
78 break;
79 default:
80 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n",
81 &format->format);
82 break;
83 }
84 }
85
ast_crtc_set_gamma(struct ast_device * ast,const struct drm_format_info * format,struct drm_color_lut * lut)86 static void ast_crtc_set_gamma(struct ast_device *ast,
87 const struct drm_format_info *format,
88 struct drm_color_lut *lut)
89 {
90 int i;
91
92 switch (format->format) {
93 case DRM_FORMAT_C8: /* In this case, gamma table is used as color palette */
94 case DRM_FORMAT_RGB565:
95 case DRM_FORMAT_XRGB8888:
96 for (i = 0; i < AST_LUT_SIZE; i++)
97 ast_load_palette_index(ast, i,
98 lut[i].red >> 8,
99 lut[i].green >> 8,
100 lut[i].blue >> 8);
101 break;
102 default:
103 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n",
104 &format->format);
105 break;
106 }
107 }
108
ast_get_vbios_mode_info(const struct drm_format_info * format,const struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode,struct ast_vbios_mode_info * vbios_mode)109 static bool ast_get_vbios_mode_info(const struct drm_format_info *format,
110 const struct drm_display_mode *mode,
111 struct drm_display_mode *adjusted_mode,
112 struct ast_vbios_mode_info *vbios_mode)
113 {
114 u32 refresh_rate_index = 0, refresh_rate;
115 const struct ast_vbios_enhtable *best = NULL;
116 u32 hborder, vborder;
117 bool check_sync;
118
119 switch (format->cpp[0] * 8) {
120 case 8:
121 vbios_mode->std_table = &vbios_stdtable[VGAModeIndex];
122 break;
123 case 16:
124 vbios_mode->std_table = &vbios_stdtable[HiCModeIndex];
125 break;
126 case 24:
127 case 32:
128 vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex];
129 break;
130 default:
131 return false;
132 }
133
134 switch (mode->hdisplay) {
135 case 640:
136 vbios_mode->enh_table = &res_640x480[refresh_rate_index];
137 break;
138 case 800:
139 vbios_mode->enh_table = &res_800x600[refresh_rate_index];
140 break;
141 case 1024:
142 vbios_mode->enh_table = &res_1024x768[refresh_rate_index];
143 break;
144 case 1152:
145 vbios_mode->enh_table = &res_1152x864[refresh_rate_index];
146 break;
147 case 1280:
148 if (mode->vdisplay == 800)
149 vbios_mode->enh_table = &res_1280x800[refresh_rate_index];
150 else
151 vbios_mode->enh_table = &res_1280x1024[refresh_rate_index];
152 break;
153 case 1360:
154 vbios_mode->enh_table = &res_1360x768[refresh_rate_index];
155 break;
156 case 1440:
157 vbios_mode->enh_table = &res_1440x900[refresh_rate_index];
158 break;
159 case 1600:
160 if (mode->vdisplay == 900)
161 vbios_mode->enh_table = &res_1600x900[refresh_rate_index];
162 else
163 vbios_mode->enh_table = &res_1600x1200[refresh_rate_index];
164 break;
165 case 1680:
166 vbios_mode->enh_table = &res_1680x1050[refresh_rate_index];
167 break;
168 case 1920:
169 if (mode->vdisplay == 1080)
170 vbios_mode->enh_table = &res_1920x1080[refresh_rate_index];
171 else
172 vbios_mode->enh_table = &res_1920x1200[refresh_rate_index];
173 break;
174 default:
175 return false;
176 }
177
178 refresh_rate = drm_mode_vrefresh(mode);
179 check_sync = vbios_mode->enh_table->flags & WideScreenMode;
180
181 while (1) {
182 const struct ast_vbios_enhtable *loop = vbios_mode->enh_table;
183
184 while (loop->refresh_rate != 0xff) {
185 if ((check_sync) &&
186 (((mode->flags & DRM_MODE_FLAG_NVSYNC) &&
187 (loop->flags & PVSync)) ||
188 ((mode->flags & DRM_MODE_FLAG_PVSYNC) &&
189 (loop->flags & NVSync)) ||
190 ((mode->flags & DRM_MODE_FLAG_NHSYNC) &&
191 (loop->flags & PHSync)) ||
192 ((mode->flags & DRM_MODE_FLAG_PHSYNC) &&
193 (loop->flags & NHSync)))) {
194 loop++;
195 continue;
196 }
197 if (loop->refresh_rate <= refresh_rate
198 && (!best || loop->refresh_rate > best->refresh_rate))
199 best = loop;
200 loop++;
201 }
202 if (best || !check_sync)
203 break;
204 check_sync = 0;
205 }
206
207 if (best)
208 vbios_mode->enh_table = best;
209
210 hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0;
211 vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0;
212
213 adjusted_mode->crtc_hdisplay = vbios_mode->enh_table->hde;
214 adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht;
215 adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder;
216 adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder;
217 adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder +
218 vbios_mode->enh_table->hfp;
219 adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder +
220 vbios_mode->enh_table->hfp +
221 vbios_mode->enh_table->hsync);
222
223 adjusted_mode->crtc_vdisplay = vbios_mode->enh_table->vde;
224 adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt;
225 adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder;
226 adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder;
227 adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder +
228 vbios_mode->enh_table->vfp;
229 adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder +
230 vbios_mode->enh_table->vfp +
231 vbios_mode->enh_table->vsync);
232
233 return true;
234 }
235
ast_set_vbios_color_reg(struct ast_device * ast,const struct drm_format_info * format,const struct ast_vbios_mode_info * vbios_mode)236 static void ast_set_vbios_color_reg(struct ast_device *ast,
237 const struct drm_format_info *format,
238 const struct ast_vbios_mode_info *vbios_mode)
239 {
240 u32 color_index;
241
242 switch (format->cpp[0]) {
243 case 1:
244 color_index = VGAModeIndex - 1;
245 break;
246 case 2:
247 color_index = HiCModeIndex;
248 break;
249 case 3:
250 case 4:
251 color_index = TrueCModeIndex;
252 break;
253 default:
254 return;
255 }
256
257 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8c, (u8)((color_index & 0x0f) << 4));
258
259 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00);
260
261 if (vbios_mode->enh_table->flags & NewModeInfo) {
262 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8);
263 ast_set_index_reg(ast, AST_IO_VGACRI, 0x92, format->cpp[0] * 8);
264 }
265 }
266
ast_set_vbios_mode_reg(struct ast_device * ast,const struct drm_display_mode * adjusted_mode,const struct ast_vbios_mode_info * vbios_mode)267 static void ast_set_vbios_mode_reg(struct ast_device *ast,
268 const struct drm_display_mode *adjusted_mode,
269 const struct ast_vbios_mode_info *vbios_mode)
270 {
271 u32 refresh_rate_index, mode_id;
272
273 refresh_rate_index = vbios_mode->enh_table->refresh_rate_index;
274 mode_id = vbios_mode->enh_table->mode_id;
275
276 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8d, refresh_rate_index & 0xff);
277 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8e, mode_id & 0xff);
278
279 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00);
280
281 if (vbios_mode->enh_table->flags & NewModeInfo) {
282 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8);
283 ast_set_index_reg(ast, AST_IO_VGACRI, 0x93, adjusted_mode->clock / 1000);
284 ast_set_index_reg(ast, AST_IO_VGACRI, 0x94, adjusted_mode->crtc_hdisplay);
285 ast_set_index_reg(ast, AST_IO_VGACRI, 0x95, adjusted_mode->crtc_hdisplay >> 8);
286 ast_set_index_reg(ast, AST_IO_VGACRI, 0x96, adjusted_mode->crtc_vdisplay);
287 ast_set_index_reg(ast, AST_IO_VGACRI, 0x97, adjusted_mode->crtc_vdisplay >> 8);
288 }
289 }
290
ast_set_std_reg(struct ast_device * ast,struct drm_display_mode * mode,struct ast_vbios_mode_info * vbios_mode)291 static void ast_set_std_reg(struct ast_device *ast,
292 struct drm_display_mode *mode,
293 struct ast_vbios_mode_info *vbios_mode)
294 {
295 const struct ast_vbios_stdtable *stdtable;
296 u32 i;
297 u8 jreg;
298
299 stdtable = vbios_mode->std_table;
300
301 jreg = stdtable->misc;
302 ast_io_write8(ast, AST_IO_VGAMR_W, jreg);
303
304 /* Set SEQ; except Screen Disable field */
305 ast_set_index_reg(ast, AST_IO_VGASRI, 0x00, 0x03);
306 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0x20, stdtable->seq[0]);
307 for (i = 1; i < 4; i++) {
308 jreg = stdtable->seq[i];
309 ast_set_index_reg(ast, AST_IO_VGASRI, (i + 1), jreg);
310 }
311
312 /* Set CRTC; except base address and offset */
313 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00);
314 for (i = 0; i < 12; i++)
315 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]);
316 for (i = 14; i < 19; i++)
317 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]);
318 for (i = 20; i < 25; i++)
319 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]);
320
321 /* set AR */
322 jreg = ast_io_read8(ast, AST_IO_VGAIR1_R);
323 for (i = 0; i < 20; i++) {
324 jreg = stdtable->ar[i];
325 ast_io_write8(ast, AST_IO_VGAARI_W, (u8)i);
326 ast_io_write8(ast, AST_IO_VGAARI_W, jreg);
327 }
328 ast_io_write8(ast, AST_IO_VGAARI_W, 0x14);
329 ast_io_write8(ast, AST_IO_VGAARI_W, 0x00);
330
331 jreg = ast_io_read8(ast, AST_IO_VGAIR1_R);
332 ast_io_write8(ast, AST_IO_VGAARI_W, 0x20);
333
334 /* Set GR */
335 for (i = 0; i < 9; i++)
336 ast_set_index_reg(ast, AST_IO_VGAGRI, i, stdtable->gr[i]);
337 }
338
ast_set_crtc_reg(struct ast_device * ast,struct drm_display_mode * mode,struct ast_vbios_mode_info * vbios_mode)339 static void ast_set_crtc_reg(struct ast_device *ast,
340 struct drm_display_mode *mode,
341 struct ast_vbios_mode_info *vbios_mode)
342 {
343 u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0;
344 u16 temp, precache = 0;
345
346 if ((IS_AST_GEN6(ast) || IS_AST_GEN7(ast)) &&
347 (vbios_mode->enh_table->flags & AST2500PreCatchCRT))
348 precache = 40;
349
350 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00);
351
352 temp = (mode->crtc_htotal >> 3) - 5;
353 if (temp & 0x100)
354 jregAC |= 0x01; /* HT D[8] */
355 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x00, 0x00, temp);
356
357 temp = (mode->crtc_hdisplay >> 3) - 1;
358 if (temp & 0x100)
359 jregAC |= 0x04; /* HDE D[8] */
360 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x01, 0x00, temp);
361
362 temp = (mode->crtc_hblank_start >> 3) - 1;
363 if (temp & 0x100)
364 jregAC |= 0x10; /* HBS D[8] */
365 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x02, 0x00, temp);
366
367 temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f;
368 if (temp & 0x20)
369 jreg05 |= 0x80; /* HBE D[5] */
370 if (temp & 0x40)
371 jregAD |= 0x01; /* HBE D[5] */
372 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x03, 0xE0, (temp & 0x1f));
373
374 temp = ((mode->crtc_hsync_start-precache) >> 3) - 1;
375 if (temp & 0x100)
376 jregAC |= 0x40; /* HRS D[5] */
377 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x04, 0x00, temp);
378
379 temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f;
380 if (temp & 0x20)
381 jregAD |= 0x04; /* HRE D[5] */
382 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05));
383
384 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAC, 0x00, jregAC);
385 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAD, 0x00, jregAD);
386
387 // Workaround for HSync Time non octave pixels (1920x1080@60Hz HSync 44 pixels);
388 if (IS_AST_GEN7(ast) && (mode->crtc_vdisplay == 1080))
389 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x02);
390 else
391 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x00);
392
393 /* vert timings */
394 temp = (mode->crtc_vtotal) - 2;
395 if (temp & 0x100)
396 jreg07 |= 0x01;
397 if (temp & 0x200)
398 jreg07 |= 0x20;
399 if (temp & 0x400)
400 jregAE |= 0x01;
401 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x06, 0x00, temp);
402
403 temp = (mode->crtc_vsync_start) - 1;
404 if (temp & 0x100)
405 jreg07 |= 0x04;
406 if (temp & 0x200)
407 jreg07 |= 0x80;
408 if (temp & 0x400)
409 jregAE |= 0x08;
410 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x10, 0x00, temp);
411
412 temp = (mode->crtc_vsync_end - 1) & 0x3f;
413 if (temp & 0x10)
414 jregAE |= 0x20;
415 if (temp & 0x20)
416 jregAE |= 0x40;
417 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x70, temp & 0xf);
418
419 temp = mode->crtc_vdisplay - 1;
420 if (temp & 0x100)
421 jreg07 |= 0x02;
422 if (temp & 0x200)
423 jreg07 |= 0x40;
424 if (temp & 0x400)
425 jregAE |= 0x02;
426 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x12, 0x00, temp);
427
428 temp = mode->crtc_vblank_start - 1;
429 if (temp & 0x100)
430 jreg07 |= 0x08;
431 if (temp & 0x200)
432 jreg09 |= 0x20;
433 if (temp & 0x400)
434 jregAE |= 0x04;
435 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x15, 0x00, temp);
436
437 temp = mode->crtc_vblank_end - 1;
438 if (temp & 0x100)
439 jregAE |= 0x10;
440 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x16, 0x00, temp);
441
442 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x07, 0x00, jreg07);
443 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x09, 0xdf, jreg09);
444 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAE, 0x00, (jregAE | 0x80));
445
446 if (precache)
447 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x80);
448 else
449 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x00);
450
451 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x80);
452 }
453
ast_set_offset_reg(struct ast_device * ast,struct drm_framebuffer * fb)454 static void ast_set_offset_reg(struct ast_device *ast,
455 struct drm_framebuffer *fb)
456 {
457 u16 offset;
458
459 offset = fb->pitches[0] >> 3;
460 ast_set_index_reg(ast, AST_IO_VGACRI, 0x13, (offset & 0xff));
461 ast_set_index_reg(ast, AST_IO_VGACRI, 0xb0, (offset >> 8) & 0x3f);
462 }
463
ast_set_dclk_reg(struct ast_device * ast,struct drm_display_mode * mode,struct ast_vbios_mode_info * vbios_mode)464 static void ast_set_dclk_reg(struct ast_device *ast,
465 struct drm_display_mode *mode,
466 struct ast_vbios_mode_info *vbios_mode)
467 {
468 const struct ast_vbios_dclk_info *clk_info;
469
470 if (IS_AST_GEN6(ast) || IS_AST_GEN7(ast))
471 clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index];
472 else
473 clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
474
475 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc0, 0x00, clk_info->param1);
476 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc1, 0x00, clk_info->param2);
477 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xbb, 0x0f,
478 (clk_info->param3 & 0xc0) |
479 ((clk_info->param3 & 0x3) << 4));
480 }
481
ast_set_color_reg(struct ast_device * ast,const struct drm_format_info * format)482 static void ast_set_color_reg(struct ast_device *ast,
483 const struct drm_format_info *format)
484 {
485 u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;
486
487 switch (format->cpp[0] * 8) {
488 case 8:
489 jregA0 = 0x70;
490 jregA3 = 0x01;
491 jregA8 = 0x00;
492 break;
493 case 15:
494 case 16:
495 jregA0 = 0x70;
496 jregA3 = 0x04;
497 jregA8 = 0x02;
498 break;
499 case 32:
500 jregA0 = 0x70;
501 jregA3 = 0x08;
502 jregA8 = 0x02;
503 break;
504 }
505
506 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa0, 0x8f, jregA0);
507 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xf0, jregA3);
508 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa8, 0xfd, jregA8);
509 }
510
ast_set_crtthd_reg(struct ast_device * ast)511 static void ast_set_crtthd_reg(struct ast_device *ast)
512 {
513 /* Set Threshold */
514 if (IS_AST_GEN7(ast)) {
515 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0xe0);
516 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0xa0);
517 } else if (IS_AST_GEN6(ast) || IS_AST_GEN5(ast) || IS_AST_GEN4(ast)) {
518 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x78);
519 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x60);
520 } else if (IS_AST_GEN3(ast) || IS_AST_GEN2(ast)) {
521 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x3f);
522 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x2f);
523 } else {
524 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x2f);
525 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x1f);
526 }
527 }
528
ast_set_sync_reg(struct ast_device * ast,struct drm_display_mode * mode,struct ast_vbios_mode_info * vbios_mode)529 static void ast_set_sync_reg(struct ast_device *ast,
530 struct drm_display_mode *mode,
531 struct ast_vbios_mode_info *vbios_mode)
532 {
533 u8 jreg;
534
535 jreg = ast_io_read8(ast, AST_IO_VGAMR_R);
536 jreg &= ~0xC0;
537 if (vbios_mode->enh_table->flags & NVSync)
538 jreg |= 0x80;
539 if (vbios_mode->enh_table->flags & NHSync)
540 jreg |= 0x40;
541 ast_io_write8(ast, AST_IO_VGAMR_W, jreg);
542 }
543
ast_set_start_address_crt1(struct ast_device * ast,unsigned int offset)544 static void ast_set_start_address_crt1(struct ast_device *ast,
545 unsigned int offset)
546 {
547 u32 addr;
548
549 addr = offset >> 2;
550 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0d, (u8)(addr & 0xff));
551 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0c, (u8)((addr >> 8) & 0xff));
552 ast_set_index_reg(ast, AST_IO_VGACRI, 0xaf, (u8)((addr >> 16) & 0xff));
553
554 }
555
ast_wait_for_vretrace(struct ast_device * ast)556 static void ast_wait_for_vretrace(struct ast_device *ast)
557 {
558 unsigned long timeout = jiffies + HZ;
559 u8 vgair1;
560
561 do {
562 vgair1 = ast_io_read8(ast, AST_IO_VGAIR1_R);
563 } while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout));
564 }
565
566 /*
567 * Planes
568 */
569
ast_plane_init(struct drm_device * dev,struct ast_plane * ast_plane,void __iomem * vaddr,u64 offset,unsigned long size,uint32_t possible_crtcs,const struct drm_plane_funcs * funcs,const uint32_t * formats,unsigned int format_count,const uint64_t * format_modifiers,enum drm_plane_type type)570 static int ast_plane_init(struct drm_device *dev, struct ast_plane *ast_plane,
571 void __iomem *vaddr, u64 offset, unsigned long size,
572 uint32_t possible_crtcs,
573 const struct drm_plane_funcs *funcs,
574 const uint32_t *formats, unsigned int format_count,
575 const uint64_t *format_modifiers,
576 enum drm_plane_type type)
577 {
578 struct drm_plane *plane = &ast_plane->base;
579
580 ast_plane->vaddr = vaddr;
581 ast_plane->offset = offset;
582 ast_plane->size = size;
583
584 return drm_universal_plane_init(dev, plane, possible_crtcs, funcs,
585 formats, format_count, format_modifiers,
586 type, NULL);
587 }
588
589 /*
590 * Primary plane
591 */
592
593 static const uint32_t ast_primary_plane_formats[] = {
594 DRM_FORMAT_XRGB8888,
595 DRM_FORMAT_RGB565,
596 DRM_FORMAT_C8,
597 };
598
ast_primary_plane_helper_atomic_check(struct drm_plane * plane,struct drm_atomic_state * state)599 static int ast_primary_plane_helper_atomic_check(struct drm_plane *plane,
600 struct drm_atomic_state *state)
601 {
602 struct drm_device *dev = plane->dev;
603 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);
604 struct drm_crtc_state *new_crtc_state = NULL;
605 struct ast_crtc_state *new_ast_crtc_state;
606 int ret;
607
608 if (new_plane_state->crtc)
609 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc);
610
611 ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state,
612 DRM_PLANE_NO_SCALING,
613 DRM_PLANE_NO_SCALING,
614 false, true);
615 if (ret) {
616 return ret;
617 } else if (!new_plane_state->visible) {
618 if (drm_WARN_ON(dev, new_plane_state->crtc)) /* cannot legally happen */
619 return -EINVAL;
620 else
621 return 0;
622 }
623
624 new_ast_crtc_state = to_ast_crtc_state(new_crtc_state);
625
626 new_ast_crtc_state->format = new_plane_state->fb->format;
627
628 return 0;
629 }
630
ast_handle_damage(struct ast_plane * ast_plane,struct iosys_map * src,struct drm_framebuffer * fb,const struct drm_rect * clip)631 static void ast_handle_damage(struct ast_plane *ast_plane, struct iosys_map *src,
632 struct drm_framebuffer *fb,
633 const struct drm_rect *clip)
634 {
635 struct iosys_map dst = IOSYS_MAP_INIT_VADDR_IOMEM(ast_plane->vaddr);
636
637 iosys_map_incr(&dst, drm_fb_clip_offset(fb->pitches[0], fb->format, clip));
638 drm_fb_memcpy(&dst, fb->pitches, src, fb, clip);
639 }
640
ast_primary_plane_helper_atomic_update(struct drm_plane * plane,struct drm_atomic_state * state)641 static void ast_primary_plane_helper_atomic_update(struct drm_plane *plane,
642 struct drm_atomic_state *state)
643 {
644 struct drm_device *dev = plane->dev;
645 struct ast_device *ast = to_ast_device(dev);
646 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
647 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
648 struct drm_framebuffer *fb = plane_state->fb;
649 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
650 struct drm_framebuffer *old_fb = old_plane_state->fb;
651 struct ast_plane *ast_plane = to_ast_plane(plane);
652 struct drm_crtc *crtc = plane_state->crtc;
653 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
654 struct drm_rect damage;
655 struct drm_atomic_helper_damage_iter iter;
656
657 if (!old_fb || (fb->format != old_fb->format) || crtc_state->mode_changed) {
658 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
659 struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info;
660
661 ast_set_color_reg(ast, fb->format);
662 ast_set_vbios_color_reg(ast, fb->format, vbios_mode_info);
663 }
664
665 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state);
666 drm_atomic_for_each_plane_damage(&iter, &damage) {
667 ast_handle_damage(ast_plane, shadow_plane_state->data, fb, &damage);
668 }
669
670 /*
671 * Some BMCs stop scanning out the video signal after the driver
672 * reprogrammed the offset. This stalls display output for several
673 * seconds and makes the display unusable. Therefore only update
674 * the offset if it changes.
675 */
676 if (!old_fb || old_fb->pitches[0] != fb->pitches[0])
677 ast_set_offset_reg(ast, fb);
678 }
679
ast_primary_plane_helper_atomic_enable(struct drm_plane * plane,struct drm_atomic_state * state)680 static void ast_primary_plane_helper_atomic_enable(struct drm_plane *plane,
681 struct drm_atomic_state *state)
682 {
683 struct ast_device *ast = to_ast_device(plane->dev);
684 struct ast_plane *ast_plane = to_ast_plane(plane);
685
686 /*
687 * Some BMCs stop scanning out the video signal after the driver
688 * reprogrammed the scanout address. This stalls display
689 * output for several seconds and makes the display unusable.
690 * Therefore only reprogram the address after enabling the plane.
691 */
692 ast_set_start_address_crt1(ast, (u32)ast_plane->offset);
693 }
694
ast_primary_plane_helper_atomic_disable(struct drm_plane * plane,struct drm_atomic_state * state)695 static void ast_primary_plane_helper_atomic_disable(struct drm_plane *plane,
696 struct drm_atomic_state *state)
697 {
698 /*
699 * Keep this empty function to avoid calling
700 * atomic_update when disabling the plane.
701 */
702 }
703
ast_primary_plane_helper_get_scanout_buffer(struct drm_plane * plane,struct drm_scanout_buffer * sb)704 static int ast_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane,
705 struct drm_scanout_buffer *sb)
706 {
707 struct ast_plane *ast_plane = to_ast_plane(plane);
708
709 if (plane->state && plane->state->fb && ast_plane->vaddr) {
710 sb->format = plane->state->fb->format;
711 sb->width = plane->state->fb->width;
712 sb->height = plane->state->fb->height;
713 sb->pitch[0] = plane->state->fb->pitches[0];
714 iosys_map_set_vaddr_iomem(&sb->map[0], ast_plane->vaddr);
715 return 0;
716 }
717 return -ENODEV;
718 }
719
720 static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = {
721 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
722 .atomic_check = ast_primary_plane_helper_atomic_check,
723 .atomic_update = ast_primary_plane_helper_atomic_update,
724 .atomic_enable = ast_primary_plane_helper_atomic_enable,
725 .atomic_disable = ast_primary_plane_helper_atomic_disable,
726 .get_scanout_buffer = ast_primary_plane_helper_get_scanout_buffer,
727 };
728
729 static const struct drm_plane_funcs ast_primary_plane_funcs = {
730 .update_plane = drm_atomic_helper_update_plane,
731 .disable_plane = drm_atomic_helper_disable_plane,
732 .destroy = drm_plane_cleanup,
733 DRM_GEM_SHADOW_PLANE_FUNCS,
734 };
735
ast_primary_plane_init(struct ast_device * ast)736 static int ast_primary_plane_init(struct ast_device *ast)
737 {
738 struct drm_device *dev = &ast->base;
739 struct ast_plane *ast_primary_plane = &ast->primary_plane;
740 struct drm_plane *primary_plane = &ast_primary_plane->base;
741 void __iomem *vaddr = ast->vram;
742 u64 offset = 0; /* with shmem, the primary plane is always at offset 0 */
743 unsigned long cursor_size = roundup(AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE, PAGE_SIZE);
744 unsigned long size = ast->vram_fb_available - cursor_size;
745 int ret;
746
747 ret = ast_plane_init(dev, ast_primary_plane, vaddr, offset, size,
748 0x01, &ast_primary_plane_funcs,
749 ast_primary_plane_formats, ARRAY_SIZE(ast_primary_plane_formats),
750 NULL, DRM_PLANE_TYPE_PRIMARY);
751 if (ret) {
752 drm_err(dev, "ast_plane_init() failed: %d\n", ret);
753 return ret;
754 }
755 drm_plane_helper_add(primary_plane, &ast_primary_plane_helper_funcs);
756 drm_plane_enable_fb_damage_clips(primary_plane);
757
758 return 0;
759 }
760
761 /*
762 * Cursor plane
763 */
764
ast_update_cursor_image(u8 __iomem * dst,const u8 * src,int width,int height)765 static void ast_update_cursor_image(u8 __iomem *dst, const u8 *src, int width, int height)
766 {
767 union {
768 u32 ul;
769 u8 b[4];
770 } srcdata32[2], data32;
771 union {
772 u16 us;
773 u8 b[2];
774 } data16;
775 u32 csum = 0;
776 s32 alpha_dst_delta, last_alpha_dst_delta;
777 u8 __iomem *dstxor;
778 const u8 *srcxor;
779 int i, j;
780 u32 per_pixel_copy, two_pixel_copy;
781
782 alpha_dst_delta = AST_MAX_HWC_WIDTH << 1;
783 last_alpha_dst_delta = alpha_dst_delta - (width << 1);
784
785 srcxor = src;
786 dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta;
787 per_pixel_copy = width & 1;
788 two_pixel_copy = width >> 1;
789
790 for (j = 0; j < height; j++) {
791 for (i = 0; i < two_pixel_copy; i++) {
792 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
793 srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0;
794 data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
795 data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
796 data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4);
797 data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4);
798
799 writel(data32.ul, dstxor);
800 csum += data32.ul;
801
802 dstxor += 4;
803 srcxor += 8;
804
805 }
806
807 for (i = 0; i < per_pixel_copy; i++) {
808 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
809 data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
810 data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
811 writew(data16.us, dstxor);
812 csum += (u32)data16.us;
813
814 dstxor += 2;
815 srcxor += 4;
816 }
817 dstxor += last_alpha_dst_delta;
818 }
819
820 /* write checksum + signature */
821 dst += AST_HWC_SIZE;
822 writel(csum, dst);
823 writel(width, dst + AST_HWC_SIGNATURE_SizeX);
824 writel(height, dst + AST_HWC_SIGNATURE_SizeY);
825 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX);
826 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY);
827 }
828
ast_set_cursor_base(struct ast_device * ast,u64 address)829 static void ast_set_cursor_base(struct ast_device *ast, u64 address)
830 {
831 u8 addr0 = (address >> 3) & 0xff;
832 u8 addr1 = (address >> 11) & 0xff;
833 u8 addr2 = (address >> 19) & 0xff;
834
835 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc8, addr0);
836 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc9, addr1);
837 ast_set_index_reg(ast, AST_IO_VGACRI, 0xca, addr2);
838 }
839
ast_set_cursor_location(struct ast_device * ast,u16 x,u16 y,u8 x_offset,u8 y_offset)840 static void ast_set_cursor_location(struct ast_device *ast, u16 x, u16 y,
841 u8 x_offset, u8 y_offset)
842 {
843 u8 x0 = (x & 0x00ff);
844 u8 x1 = (x & 0x0f00) >> 8;
845 u8 y0 = (y & 0x00ff);
846 u8 y1 = (y & 0x0700) >> 8;
847
848 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc2, x_offset);
849 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc3, y_offset);
850 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc4, x0);
851 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc5, x1);
852 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc6, y0);
853 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc7, y1);
854 }
855
ast_set_cursor_enabled(struct ast_device * ast,bool enabled)856 static void ast_set_cursor_enabled(struct ast_device *ast, bool enabled)
857 {
858 static const u8 mask = (u8)~(AST_IO_VGACRCB_HWC_16BPP |
859 AST_IO_VGACRCB_HWC_ENABLED);
860
861 u8 vgacrcb = AST_IO_VGACRCB_HWC_16BPP;
862
863 if (enabled)
864 vgacrcb |= AST_IO_VGACRCB_HWC_ENABLED;
865
866 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xcb, mask, vgacrcb);
867 }
868
869 static const uint32_t ast_cursor_plane_formats[] = {
870 DRM_FORMAT_ARGB8888,
871 };
872
ast_cursor_plane_helper_atomic_check(struct drm_plane * plane,struct drm_atomic_state * state)873 static int ast_cursor_plane_helper_atomic_check(struct drm_plane *plane,
874 struct drm_atomic_state *state)
875 {
876 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);
877 struct drm_framebuffer *new_fb = new_plane_state->fb;
878 struct drm_crtc_state *new_crtc_state = NULL;
879 int ret;
880
881 if (new_plane_state->crtc)
882 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc);
883
884 ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state,
885 DRM_PLANE_NO_SCALING,
886 DRM_PLANE_NO_SCALING,
887 true, true);
888 if (ret || !new_plane_state->visible)
889 return ret;
890
891 if (new_fb->width > AST_MAX_HWC_WIDTH || new_fb->height > AST_MAX_HWC_HEIGHT)
892 return -EINVAL;
893
894 return 0;
895 }
896
ast_cursor_plane_helper_atomic_update(struct drm_plane * plane,struct drm_atomic_state * state)897 static void ast_cursor_plane_helper_atomic_update(struct drm_plane *plane,
898 struct drm_atomic_state *state)
899 {
900 struct ast_plane *ast_plane = to_ast_plane(plane);
901 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
902 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
903 struct drm_framebuffer *fb = plane_state->fb;
904 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
905 struct ast_device *ast = to_ast_device(plane->dev);
906 struct iosys_map src_map = shadow_plane_state->data[0];
907 struct drm_rect damage;
908 const u8 *src = src_map.vaddr; /* TODO: Use mapping abstraction properly */
909 u64 dst_off = ast_plane->offset;
910 u8 __iomem *dst = ast_plane->vaddr; /* TODO: Use mapping abstraction properly */
911 u8 __iomem *sig = dst + AST_HWC_SIZE; /* TODO: Use mapping abstraction properly */
912 unsigned int offset_x, offset_y;
913 u16 x, y;
914 u8 x_offset, y_offset;
915
916 /*
917 * Do data transfer to hardware buffer and point the scanout
918 * engine to the offset.
919 */
920
921 if (drm_atomic_helper_damage_merged(old_plane_state, plane_state, &damage)) {
922 ast_update_cursor_image(dst, src, fb->width, fb->height);
923 ast_set_cursor_base(ast, dst_off);
924 }
925
926 /*
927 * Update location in HWC signature and registers.
928 */
929
930 writel(plane_state->crtc_x, sig + AST_HWC_SIGNATURE_X);
931 writel(plane_state->crtc_y, sig + AST_HWC_SIGNATURE_Y);
932
933 offset_x = AST_MAX_HWC_WIDTH - fb->width;
934 offset_y = AST_MAX_HWC_HEIGHT - fb->height;
935
936 if (plane_state->crtc_x < 0) {
937 x_offset = (-plane_state->crtc_x) + offset_x;
938 x = 0;
939 } else {
940 x_offset = offset_x;
941 x = plane_state->crtc_x;
942 }
943 if (plane_state->crtc_y < 0) {
944 y_offset = (-plane_state->crtc_y) + offset_y;
945 y = 0;
946 } else {
947 y_offset = offset_y;
948 y = plane_state->crtc_y;
949 }
950
951 ast_set_cursor_location(ast, x, y, x_offset, y_offset);
952
953 /* Dummy write to enable HWC and make the HW pick-up the changes. */
954 ast_set_cursor_enabled(ast, true);
955 }
956
ast_cursor_plane_helper_atomic_disable(struct drm_plane * plane,struct drm_atomic_state * state)957 static void ast_cursor_plane_helper_atomic_disable(struct drm_plane *plane,
958 struct drm_atomic_state *state)
959 {
960 struct ast_device *ast = to_ast_device(plane->dev);
961
962 ast_set_cursor_enabled(ast, false);
963 }
964
965 static const struct drm_plane_helper_funcs ast_cursor_plane_helper_funcs = {
966 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
967 .atomic_check = ast_cursor_plane_helper_atomic_check,
968 .atomic_update = ast_cursor_plane_helper_atomic_update,
969 .atomic_disable = ast_cursor_plane_helper_atomic_disable,
970 };
971
972 static const struct drm_plane_funcs ast_cursor_plane_funcs = {
973 .update_plane = drm_atomic_helper_update_plane,
974 .disable_plane = drm_atomic_helper_disable_plane,
975 .destroy = drm_plane_cleanup,
976 DRM_GEM_SHADOW_PLANE_FUNCS,
977 };
978
ast_cursor_plane_init(struct ast_device * ast)979 static int ast_cursor_plane_init(struct ast_device *ast)
980 {
981 struct drm_device *dev = &ast->base;
982 struct ast_plane *ast_cursor_plane = &ast->cursor_plane;
983 struct drm_plane *cursor_plane = &ast_cursor_plane->base;
984 size_t size;
985 void __iomem *vaddr;
986 u64 offset;
987 int ret;
988
989 /*
990 * Allocate backing storage for cursors. The BOs are permanently
991 * pinned to the top end of the VRAM.
992 */
993
994 size = roundup(AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE, PAGE_SIZE);
995
996 if (ast->vram_fb_available < size)
997 return -ENOMEM;
998
999 vaddr = ast->vram + ast->vram_fb_available - size;
1000 offset = ast->vram_fb_available - size;
1001
1002 ret = ast_plane_init(dev, ast_cursor_plane, vaddr, offset, size,
1003 0x01, &ast_cursor_plane_funcs,
1004 ast_cursor_plane_formats, ARRAY_SIZE(ast_cursor_plane_formats),
1005 NULL, DRM_PLANE_TYPE_CURSOR);
1006 if (ret) {
1007 drm_err(dev, "ast_plane_init() failed: %d\n", ret);
1008 return ret;
1009 }
1010 drm_plane_helper_add(cursor_plane, &ast_cursor_plane_helper_funcs);
1011 drm_plane_enable_fb_damage_clips(cursor_plane);
1012
1013 ast->vram_fb_available -= size;
1014
1015 return 0;
1016 }
1017
1018 /*
1019 * CRTC
1020 */
1021
1022 static enum drm_mode_status
ast_crtc_helper_mode_valid(struct drm_crtc * crtc,const struct drm_display_mode * mode)1023 ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)
1024 {
1025 struct ast_device *ast = to_ast_device(crtc->dev);
1026 enum drm_mode_status status;
1027 uint32_t jtemp;
1028
1029 if (ast->support_wide_screen) {
1030 if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050))
1031 return MODE_OK;
1032 if ((mode->hdisplay == 1280) && (mode->vdisplay == 800))
1033 return MODE_OK;
1034 if ((mode->hdisplay == 1440) && (mode->vdisplay == 900))
1035 return MODE_OK;
1036 if ((mode->hdisplay == 1360) && (mode->vdisplay == 768))
1037 return MODE_OK;
1038 if ((mode->hdisplay == 1600) && (mode->vdisplay == 900))
1039 return MODE_OK;
1040 if ((mode->hdisplay == 1152) && (mode->vdisplay == 864))
1041 return MODE_OK;
1042
1043 if ((ast->chip == AST2100) || // GEN2, but not AST1100 (?)
1044 (ast->chip == AST2200) || // GEN3, but not AST2150 (?)
1045 IS_AST_GEN4(ast) || IS_AST_GEN5(ast) ||
1046 IS_AST_GEN6(ast) || IS_AST_GEN7(ast)) {
1047 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080))
1048 return MODE_OK;
1049
1050 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) {
1051 jtemp = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, 0xff);
1052 if (jtemp & 0x01)
1053 return MODE_NOMODE;
1054 else
1055 return MODE_OK;
1056 }
1057 }
1058 }
1059
1060 status = MODE_NOMODE;
1061
1062 switch (mode->hdisplay) {
1063 case 640:
1064 if (mode->vdisplay == 480)
1065 status = MODE_OK;
1066 break;
1067 case 800:
1068 if (mode->vdisplay == 600)
1069 status = MODE_OK;
1070 break;
1071 case 1024:
1072 if (mode->vdisplay == 768)
1073 status = MODE_OK;
1074 break;
1075 case 1152:
1076 if (mode->vdisplay == 864)
1077 status = MODE_OK;
1078 break;
1079 case 1280:
1080 if (mode->vdisplay == 1024)
1081 status = MODE_OK;
1082 break;
1083 case 1600:
1084 if (mode->vdisplay == 1200)
1085 status = MODE_OK;
1086 break;
1087 default:
1088 break;
1089 }
1090
1091 return status;
1092 }
1093
ast_crtc_helper_mode_set_nofb(struct drm_crtc * crtc)1094 static void ast_crtc_helper_mode_set_nofb(struct drm_crtc *crtc)
1095 {
1096 struct drm_device *dev = crtc->dev;
1097 struct ast_device *ast = to_ast_device(dev);
1098 struct drm_crtc_state *crtc_state = crtc->state;
1099 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
1100 struct ast_vbios_mode_info *vbios_mode_info =
1101 &ast_crtc_state->vbios_mode_info;
1102 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
1103
1104 /*
1105 * Ensure that no scanout takes place before reprogramming mode
1106 * and format registers.
1107 *
1108 * TODO: Get vblank interrupts working and remove this line.
1109 */
1110 ast_wait_for_vretrace(ast);
1111
1112 ast_set_vbios_mode_reg(ast, adjusted_mode, vbios_mode_info);
1113 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa1, 0x06);
1114 ast_set_std_reg(ast, adjusted_mode, vbios_mode_info);
1115 ast_set_crtc_reg(ast, adjusted_mode, vbios_mode_info);
1116 ast_set_dclk_reg(ast, adjusted_mode, vbios_mode_info);
1117 ast_set_crtthd_reg(ast);
1118 ast_set_sync_reg(ast, adjusted_mode, vbios_mode_info);
1119 }
1120
ast_crtc_helper_atomic_check(struct drm_crtc * crtc,struct drm_atomic_state * state)1121 static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc,
1122 struct drm_atomic_state *state)
1123 {
1124 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
1125 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
1126 struct ast_crtc_state *old_ast_crtc_state = to_ast_crtc_state(old_crtc_state);
1127 struct drm_device *dev = crtc->dev;
1128 struct ast_crtc_state *ast_state;
1129 const struct drm_format_info *format;
1130 bool succ;
1131 int ret;
1132
1133 if (!crtc_state->enable)
1134 return 0;
1135
1136 ret = drm_atomic_helper_check_crtc_primary_plane(crtc_state);
1137 if (ret)
1138 return ret;
1139
1140 ast_state = to_ast_crtc_state(crtc_state);
1141
1142 format = ast_state->format;
1143 if (drm_WARN_ON_ONCE(dev, !format))
1144 return -EINVAL; /* BUG: We didn't set format in primary check(). */
1145
1146 /*
1147 * The gamma LUT has to be reloaded after changing the primary
1148 * plane's color format.
1149 */
1150 if (old_ast_crtc_state->format != format)
1151 crtc_state->color_mgmt_changed = true;
1152
1153 if (crtc_state->color_mgmt_changed && crtc_state->gamma_lut) {
1154 if (crtc_state->gamma_lut->length !=
1155 AST_LUT_SIZE * sizeof(struct drm_color_lut)) {
1156 drm_err(dev, "Wrong size for gamma_lut %zu\n",
1157 crtc_state->gamma_lut->length);
1158 return -EINVAL;
1159 }
1160 }
1161
1162 succ = ast_get_vbios_mode_info(format, &crtc_state->mode,
1163 &crtc_state->adjusted_mode,
1164 &ast_state->vbios_mode_info);
1165 if (!succ)
1166 return -EINVAL;
1167
1168 return 0;
1169 }
1170
1171 static void
ast_crtc_helper_atomic_flush(struct drm_crtc * crtc,struct drm_atomic_state * state)1172 ast_crtc_helper_atomic_flush(struct drm_crtc *crtc,
1173 struct drm_atomic_state *state)
1174 {
1175 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
1176 crtc);
1177 struct drm_device *dev = crtc->dev;
1178 struct ast_device *ast = to_ast_device(dev);
1179 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
1180
1181 /*
1182 * The gamma LUT has to be reloaded after changing the primary
1183 * plane's color format.
1184 */
1185 if (crtc_state->enable && crtc_state->color_mgmt_changed) {
1186 if (crtc_state->gamma_lut)
1187 ast_crtc_set_gamma(ast,
1188 ast_crtc_state->format,
1189 crtc_state->gamma_lut->data);
1190 else
1191 ast_crtc_set_gamma_linear(ast, ast_crtc_state->format);
1192 }
1193 }
1194
ast_crtc_helper_atomic_enable(struct drm_crtc * crtc,struct drm_atomic_state * state)1195 static void ast_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state)
1196 {
1197 struct ast_device *ast = to_ast_device(crtc->dev);
1198
1199 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, 0x00);
1200 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, 0x00);
1201 }
1202
ast_crtc_helper_atomic_disable(struct drm_crtc * crtc,struct drm_atomic_state * state)1203 static void ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state)
1204 {
1205 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
1206 struct ast_device *ast = to_ast_device(crtc->dev);
1207 u8 vgacrb6;
1208
1209 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, AST_IO_VGASR1_SD);
1210
1211 vgacrb6 = AST_IO_VGACRB6_VSYNC_OFF |
1212 AST_IO_VGACRB6_HSYNC_OFF;
1213 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, vgacrb6);
1214
1215 /*
1216 * HW cursors require the underlying primary plane and CRTC to
1217 * display a valid mode and image. This is not the case during
1218 * full modeset operations. So we temporarily disable any active
1219 * plane, including the HW cursor. Each plane's atomic_update()
1220 * helper will re-enable it if necessary.
1221 *
1222 * We only do this during *full* modesets. It does not affect
1223 * simple pageflips on the planes.
1224 */
1225 drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);
1226 }
1227
1228 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {
1229 .mode_valid = ast_crtc_helper_mode_valid,
1230 .mode_set_nofb = ast_crtc_helper_mode_set_nofb,
1231 .atomic_check = ast_crtc_helper_atomic_check,
1232 .atomic_flush = ast_crtc_helper_atomic_flush,
1233 .atomic_enable = ast_crtc_helper_atomic_enable,
1234 .atomic_disable = ast_crtc_helper_atomic_disable,
1235 };
1236
ast_crtc_reset(struct drm_crtc * crtc)1237 static void ast_crtc_reset(struct drm_crtc *crtc)
1238 {
1239 struct ast_crtc_state *ast_state =
1240 kzalloc(sizeof(*ast_state), GFP_KERNEL);
1241
1242 if (crtc->state)
1243 crtc->funcs->atomic_destroy_state(crtc, crtc->state);
1244
1245 if (ast_state)
1246 __drm_atomic_helper_crtc_reset(crtc, &ast_state->base);
1247 else
1248 __drm_atomic_helper_crtc_reset(crtc, NULL);
1249 }
1250
1251 static struct drm_crtc_state *
ast_crtc_atomic_duplicate_state(struct drm_crtc * crtc)1252 ast_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
1253 {
1254 struct ast_crtc_state *new_ast_state, *ast_state;
1255 struct drm_device *dev = crtc->dev;
1256
1257 if (drm_WARN_ON(dev, !crtc->state))
1258 return NULL;
1259
1260 new_ast_state = kmalloc(sizeof(*new_ast_state), GFP_KERNEL);
1261 if (!new_ast_state)
1262 return NULL;
1263 __drm_atomic_helper_crtc_duplicate_state(crtc, &new_ast_state->base);
1264
1265 ast_state = to_ast_crtc_state(crtc->state);
1266
1267 new_ast_state->format = ast_state->format;
1268 memcpy(&new_ast_state->vbios_mode_info, &ast_state->vbios_mode_info,
1269 sizeof(new_ast_state->vbios_mode_info));
1270
1271 return &new_ast_state->base;
1272 }
1273
ast_crtc_atomic_destroy_state(struct drm_crtc * crtc,struct drm_crtc_state * state)1274 static void ast_crtc_atomic_destroy_state(struct drm_crtc *crtc,
1275 struct drm_crtc_state *state)
1276 {
1277 struct ast_crtc_state *ast_state = to_ast_crtc_state(state);
1278
1279 __drm_atomic_helper_crtc_destroy_state(&ast_state->base);
1280 kfree(ast_state);
1281 }
1282
1283 static const struct drm_crtc_funcs ast_crtc_funcs = {
1284 .reset = ast_crtc_reset,
1285 .destroy = drm_crtc_cleanup,
1286 .set_config = drm_atomic_helper_set_config,
1287 .page_flip = drm_atomic_helper_page_flip,
1288 .atomic_duplicate_state = ast_crtc_atomic_duplicate_state,
1289 .atomic_destroy_state = ast_crtc_atomic_destroy_state,
1290 };
1291
ast_crtc_init(struct drm_device * dev)1292 static int ast_crtc_init(struct drm_device *dev)
1293 {
1294 struct ast_device *ast = to_ast_device(dev);
1295 struct drm_crtc *crtc = &ast->crtc;
1296 int ret;
1297
1298 ret = drm_crtc_init_with_planes(dev, crtc, &ast->primary_plane.base,
1299 &ast->cursor_plane.base, &ast_crtc_funcs,
1300 NULL);
1301 if (ret)
1302 return ret;
1303
1304 drm_mode_crtc_set_gamma_size(crtc, AST_LUT_SIZE);
1305 drm_crtc_enable_color_mgmt(crtc, 0, false, AST_LUT_SIZE);
1306
1307 drm_crtc_helper_add(crtc, &ast_crtc_helper_funcs);
1308
1309 return 0;
1310 }
1311
1312 /*
1313 * Mode config
1314 */
1315
ast_mode_config_helper_atomic_commit_tail(struct drm_atomic_state * state)1316 static void ast_mode_config_helper_atomic_commit_tail(struct drm_atomic_state *state)
1317 {
1318 struct ast_device *ast = to_ast_device(state->dev);
1319
1320 /*
1321 * Concurrent operations could possibly trigger a call to
1322 * drm_connector_helper_funcs.get_modes by reading the display
1323 * modes. Protect access to registers by acquiring the modeset
1324 * lock.
1325 */
1326 mutex_lock(&ast->modeset_lock);
1327 drm_atomic_helper_commit_tail(state);
1328 mutex_unlock(&ast->modeset_lock);
1329 }
1330
1331 static const struct drm_mode_config_helper_funcs ast_mode_config_helper_funcs = {
1332 .atomic_commit_tail = ast_mode_config_helper_atomic_commit_tail,
1333 };
1334
ast_mode_config_mode_valid(struct drm_device * dev,const struct drm_display_mode * mode)1335 static enum drm_mode_status ast_mode_config_mode_valid(struct drm_device *dev,
1336 const struct drm_display_mode *mode)
1337 {
1338 static const unsigned long max_bpp = 4; /* DRM_FORMAT_XRGB8888 */
1339 struct ast_device *ast = to_ast_device(dev);
1340 unsigned long fbsize, fbpages, max_fbpages;
1341
1342 max_fbpages = (ast->vram_fb_available) >> PAGE_SHIFT;
1343
1344 fbsize = mode->hdisplay * mode->vdisplay * max_bpp;
1345 fbpages = DIV_ROUND_UP(fbsize, PAGE_SIZE);
1346
1347 if (fbpages > max_fbpages)
1348 return MODE_MEM;
1349
1350 return MODE_OK;
1351 }
1352
1353 static const struct drm_mode_config_funcs ast_mode_config_funcs = {
1354 .fb_create = drm_gem_fb_create_with_dirty,
1355 .mode_valid = ast_mode_config_mode_valid,
1356 .atomic_check = drm_atomic_helper_check,
1357 .atomic_commit = drm_atomic_helper_commit,
1358 };
1359
ast_mode_config_init(struct ast_device * ast)1360 int ast_mode_config_init(struct ast_device *ast)
1361 {
1362 struct drm_device *dev = &ast->base;
1363 int ret;
1364
1365 ret = drmm_mutex_init(dev, &ast->modeset_lock);
1366 if (ret)
1367 return ret;
1368
1369 ret = drmm_mode_config_init(dev);
1370 if (ret)
1371 return ret;
1372
1373 dev->mode_config.funcs = &ast_mode_config_funcs;
1374 dev->mode_config.min_width = 0;
1375 dev->mode_config.min_height = 0;
1376 dev->mode_config.preferred_depth = 24;
1377
1378 if (ast->chip == AST2100 || // GEN2, but not AST1100 (?)
1379 ast->chip == AST2200 || // GEN3, but not AST2150 (?)
1380 IS_AST_GEN7(ast) ||
1381 IS_AST_GEN6(ast) ||
1382 IS_AST_GEN5(ast) ||
1383 IS_AST_GEN4(ast)) {
1384 dev->mode_config.max_width = 1920;
1385 dev->mode_config.max_height = 2048;
1386 } else {
1387 dev->mode_config.max_width = 1600;
1388 dev->mode_config.max_height = 1200;
1389 }
1390
1391 dev->mode_config.helper_private = &ast_mode_config_helper_funcs;
1392
1393 ret = ast_primary_plane_init(ast);
1394 if (ret)
1395 return ret;
1396
1397 ret = ast_cursor_plane_init(ast);
1398 if (ret)
1399 return ret;
1400
1401 ast_crtc_init(dev);
1402
1403 if (ast->tx_chip_types & AST_TX_NONE_BIT) {
1404 ret = ast_vga_output_init(ast);
1405 if (ret)
1406 return ret;
1407 }
1408 if (ast->tx_chip_types & AST_TX_SIL164_BIT) {
1409 ret = ast_sil164_output_init(ast);
1410 if (ret)
1411 return ret;
1412 }
1413 if (ast->tx_chip_types & AST_TX_DP501_BIT) {
1414 ret = ast_dp501_output_init(ast);
1415 if (ret)
1416 return ret;
1417 }
1418 if (ast->tx_chip_types & AST_TX_ASTDP_BIT) {
1419 ret = ast_astdp_output_init(ast);
1420 if (ret)
1421 return ret;
1422 }
1423
1424 drm_mode_config_reset(dev);
1425
1426 ret = drmm_kms_helper_poll_init(dev);
1427 if (ret)
1428 return ret;
1429
1430 return 0;
1431 }
1432