1 // SPDX-License-Identifier: MIT
2 /*
3 * Copyright © 2022 Intel Corporation
4 */
5
6 #include "xe_query.h"
7
8 #include <linux/nospec.h>
9 #include <linux/sched/clock.h>
10
11 #include <drm/ttm/ttm_placement.h>
12 #include <generated/xe_wa_oob.h>
13 #include <uapi/drm/xe_drm.h>
14
15 #include "regs/xe_engine_regs.h"
16 #include "regs/xe_gt_regs.h"
17 #include "xe_bo.h"
18 #include "xe_device.h"
19 #include "xe_exec_queue.h"
20 #include "xe_force_wake.h"
21 #include "xe_ggtt.h"
22 #include "xe_gt.h"
23 #include "xe_guc_hwconfig.h"
24 #include "xe_macros.h"
25 #include "xe_mmio.h"
26 #include "xe_ttm_vram_mgr.h"
27 #include "xe_wa.h"
28
29 static const u16 xe_to_user_engine_class[] = {
30 [XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER,
31 [XE_ENGINE_CLASS_COPY] = DRM_XE_ENGINE_CLASS_COPY,
32 [XE_ENGINE_CLASS_VIDEO_DECODE] = DRM_XE_ENGINE_CLASS_VIDEO_DECODE,
33 [XE_ENGINE_CLASS_VIDEO_ENHANCE] = DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE,
34 [XE_ENGINE_CLASS_COMPUTE] = DRM_XE_ENGINE_CLASS_COMPUTE,
35 };
36
37 static const enum xe_engine_class user_to_xe_engine_class[] = {
38 [DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER,
39 [DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY,
40 [DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE,
41 [DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE,
42 [DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE,
43 };
44
calc_hw_engine_info_size(struct xe_device * xe)45 static size_t calc_hw_engine_info_size(struct xe_device *xe)
46 {
47 struct xe_hw_engine *hwe;
48 enum xe_hw_engine_id id;
49 struct xe_gt *gt;
50 u8 gt_id;
51 int i = 0;
52
53 for_each_gt(gt, xe, gt_id)
54 for_each_hw_engine(hwe, gt, id) {
55 if (xe_hw_engine_is_reserved(hwe))
56 continue;
57 i++;
58 }
59
60 return sizeof(struct drm_xe_query_engines) +
61 i * sizeof(struct drm_xe_engine);
62 }
63
64 typedef u64 (*__ktime_func_t)(void);
__clock_id_to_func(clockid_t clk_id)65 static __ktime_func_t __clock_id_to_func(clockid_t clk_id)
66 {
67 /*
68 * Use logic same as the perf subsystem to allow user to select the
69 * reference clock id to be used for timestamps.
70 */
71 switch (clk_id) {
72 case CLOCK_MONOTONIC:
73 return &ktime_get_ns;
74 case CLOCK_MONOTONIC_RAW:
75 return &ktime_get_raw_ns;
76 case CLOCK_REALTIME:
77 return &ktime_get_real_ns;
78 case CLOCK_BOOTTIME:
79 return &ktime_get_boottime_ns;
80 case CLOCK_TAI:
81 return &ktime_get_clocktai_ns;
82 default:
83 return NULL;
84 }
85 }
86
87 static void
__read_timestamps(struct xe_gt * gt,struct xe_reg lower_reg,struct xe_reg upper_reg,u64 * engine_ts,u64 * cpu_ts,u64 * cpu_delta,__ktime_func_t cpu_clock)88 __read_timestamps(struct xe_gt *gt,
89 struct xe_reg lower_reg,
90 struct xe_reg upper_reg,
91 u64 *engine_ts,
92 u64 *cpu_ts,
93 u64 *cpu_delta,
94 __ktime_func_t cpu_clock)
95 {
96 u32 upper, lower, old_upper, loop = 0;
97
98 upper = xe_mmio_read32(gt, upper_reg);
99 do {
100 *cpu_delta = local_clock();
101 *cpu_ts = cpu_clock();
102 lower = xe_mmio_read32(gt, lower_reg);
103 *cpu_delta = local_clock() - *cpu_delta;
104 old_upper = upper;
105 upper = xe_mmio_read32(gt, upper_reg);
106 } while (upper != old_upper && loop++ < 2);
107
108 *engine_ts = (u64)upper << 32 | lower;
109 }
110
111 static int
query_engine_cycles(struct xe_device * xe,struct drm_xe_device_query * query)112 query_engine_cycles(struct xe_device *xe,
113 struct drm_xe_device_query *query)
114 {
115 struct drm_xe_query_engine_cycles __user *query_ptr;
116 struct drm_xe_engine_class_instance *eci;
117 struct drm_xe_query_engine_cycles resp;
118 size_t size = sizeof(resp);
119 __ktime_func_t cpu_clock;
120 struct xe_hw_engine *hwe;
121 struct xe_gt *gt;
122
123 if (query->size == 0) {
124 query->size = size;
125 return 0;
126 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
127 return -EINVAL;
128 }
129
130 query_ptr = u64_to_user_ptr(query->data);
131 if (copy_from_user(&resp, query_ptr, size))
132 return -EFAULT;
133
134 cpu_clock = __clock_id_to_func(resp.clockid);
135 if (!cpu_clock)
136 return -EINVAL;
137
138 eci = &resp.eci;
139 if (eci->gt_id >= XE_MAX_GT_PER_TILE)
140 return -EINVAL;
141
142 gt = xe_device_get_gt(xe, eci->gt_id);
143 if (!gt)
144 return -EINVAL;
145
146 if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class))
147 return -EINVAL;
148
149 hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class],
150 eci->engine_instance, true);
151 if (!hwe)
152 return -EINVAL;
153
154 if (xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL))
155 return -EIO;
156
157 __read_timestamps(gt,
158 RING_TIMESTAMP(hwe->mmio_base),
159 RING_TIMESTAMP_UDW(hwe->mmio_base),
160 &resp.engine_cycles,
161 &resp.cpu_timestamp,
162 &resp.cpu_delta,
163 cpu_clock);
164
165 xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL);
166
167 if (GRAPHICS_VER(xe) >= 20)
168 resp.width = 64;
169 else
170 resp.width = 36;
171
172 /* Only write to the output fields of user query */
173 if (put_user(resp.cpu_timestamp, &query_ptr->cpu_timestamp))
174 return -EFAULT;
175
176 if (put_user(resp.cpu_delta, &query_ptr->cpu_delta))
177 return -EFAULT;
178
179 if (put_user(resp.engine_cycles, &query_ptr->engine_cycles))
180 return -EFAULT;
181
182 if (put_user(resp.width, &query_ptr->width))
183 return -EFAULT;
184
185 return 0;
186 }
187
query_engines(struct xe_device * xe,struct drm_xe_device_query * query)188 static int query_engines(struct xe_device *xe,
189 struct drm_xe_device_query *query)
190 {
191 size_t size = calc_hw_engine_info_size(xe);
192 struct drm_xe_query_engines __user *query_ptr =
193 u64_to_user_ptr(query->data);
194 struct drm_xe_query_engines *engines;
195 struct xe_hw_engine *hwe;
196 enum xe_hw_engine_id id;
197 struct xe_gt *gt;
198 u8 gt_id;
199 int i = 0;
200
201 if (query->size == 0) {
202 query->size = size;
203 return 0;
204 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
205 return -EINVAL;
206 }
207
208 engines = kzalloc(size, GFP_KERNEL);
209 if (!engines)
210 return -ENOMEM;
211
212 for_each_gt(gt, xe, gt_id)
213 for_each_hw_engine(hwe, gt, id) {
214 if (xe_hw_engine_is_reserved(hwe))
215 continue;
216
217 engines->engines[i].instance.engine_class =
218 xe_to_user_engine_class[hwe->class];
219 engines->engines[i].instance.engine_instance =
220 hwe->logical_instance;
221 engines->engines[i].instance.gt_id = gt->info.id;
222
223 i++;
224 }
225
226 engines->num_engines = i;
227
228 if (copy_to_user(query_ptr, engines, size)) {
229 kfree(engines);
230 return -EFAULT;
231 }
232 kfree(engines);
233
234 return 0;
235 }
236
calc_mem_regions_size(struct xe_device * xe)237 static size_t calc_mem_regions_size(struct xe_device *xe)
238 {
239 u32 num_managers = 1;
240 int i;
241
242 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i)
243 if (ttm_manager_type(&xe->ttm, i))
244 num_managers++;
245
246 return offsetof(struct drm_xe_query_mem_regions, mem_regions[num_managers]);
247 }
248
query_mem_regions(struct xe_device * xe,struct drm_xe_device_query * query)249 static int query_mem_regions(struct xe_device *xe,
250 struct drm_xe_device_query *query)
251 {
252 size_t size = calc_mem_regions_size(xe);
253 struct drm_xe_query_mem_regions *mem_regions;
254 struct drm_xe_query_mem_regions __user *query_ptr =
255 u64_to_user_ptr(query->data);
256 struct ttm_resource_manager *man;
257 int ret, i;
258
259 if (query->size == 0) {
260 query->size = size;
261 return 0;
262 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
263 return -EINVAL;
264 }
265
266 mem_regions = kzalloc(size, GFP_KERNEL);
267 if (XE_IOCTL_DBG(xe, !mem_regions))
268 return -ENOMEM;
269
270 man = ttm_manager_type(&xe->ttm, XE_PL_TT);
271 mem_regions->mem_regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
272 /*
273 * The instance needs to be a unique number that represents the index
274 * in the placement mask used at xe_gem_create_ioctl() for the
275 * xe_bo_create() placement.
276 */
277 mem_regions->mem_regions[0].instance = 0;
278 mem_regions->mem_regions[0].min_page_size = PAGE_SIZE;
279 mem_regions->mem_regions[0].total_size = man->size << PAGE_SHIFT;
280 if (perfmon_capable())
281 mem_regions->mem_regions[0].used = ttm_resource_manager_usage(man);
282 mem_regions->num_mem_regions = 1;
283
284 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) {
285 man = ttm_manager_type(&xe->ttm, i);
286 if (man) {
287 mem_regions->mem_regions[mem_regions->num_mem_regions].mem_class =
288 DRM_XE_MEM_REGION_CLASS_VRAM;
289 mem_regions->mem_regions[mem_regions->num_mem_regions].instance =
290 mem_regions->num_mem_regions;
291 mem_regions->mem_regions[mem_regions->num_mem_regions].min_page_size =
292 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ?
293 SZ_64K : PAGE_SIZE;
294 mem_regions->mem_regions[mem_regions->num_mem_regions].total_size =
295 man->size;
296
297 if (perfmon_capable()) {
298 xe_ttm_vram_get_used(man,
299 &mem_regions->mem_regions
300 [mem_regions->num_mem_regions].used,
301 &mem_regions->mem_regions
302 [mem_regions->num_mem_regions].cpu_visible_used);
303 }
304
305 mem_regions->mem_regions[mem_regions->num_mem_regions].cpu_visible_size =
306 xe_ttm_vram_get_cpu_visible_size(man);
307 mem_regions->num_mem_regions++;
308 }
309 }
310
311 if (!copy_to_user(query_ptr, mem_regions, size))
312 ret = 0;
313 else
314 ret = -ENOSPC;
315
316 kfree(mem_regions);
317 return ret;
318 }
319
query_config(struct xe_device * xe,struct drm_xe_device_query * query)320 static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
321 {
322 const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1;
323 size_t size =
324 sizeof(struct drm_xe_query_config) + num_params * sizeof(u64);
325 struct drm_xe_query_config __user *query_ptr =
326 u64_to_user_ptr(query->data);
327 struct drm_xe_query_config *config;
328
329 if (query->size == 0) {
330 query->size = size;
331 return 0;
332 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
333 return -EINVAL;
334 }
335
336 config = kzalloc(size, GFP_KERNEL);
337 if (!config)
338 return -ENOMEM;
339
340 config->num_params = num_params;
341 config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
342 xe->info.devid | (xe->info.revid << 16);
343 if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
344 config->info[DRM_XE_QUERY_CONFIG_FLAGS] =
345 DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM;
346 config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
347 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
348 config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
349 config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
350 xe_exec_queue_device_get_max_priority(xe);
351
352 if (copy_to_user(query_ptr, config, size)) {
353 kfree(config);
354 return -EFAULT;
355 }
356 kfree(config);
357
358 return 0;
359 }
360
query_gt_list(struct xe_device * xe,struct drm_xe_device_query * query)361 static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query)
362 {
363 struct xe_gt *gt;
364 size_t size = sizeof(struct drm_xe_query_gt_list) +
365 xe->info.gt_count * sizeof(struct drm_xe_gt);
366 struct drm_xe_query_gt_list __user *query_ptr =
367 u64_to_user_ptr(query->data);
368 struct drm_xe_query_gt_list *gt_list;
369 int iter = 0;
370 u8 id;
371
372 if (query->size == 0) {
373 query->size = size;
374 return 0;
375 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
376 return -EINVAL;
377 }
378
379 gt_list = kzalloc(size, GFP_KERNEL);
380 if (!gt_list)
381 return -ENOMEM;
382
383 gt_list->num_gt = xe->info.gt_count;
384
385 for_each_gt(gt, xe, id) {
386 if (xe_gt_is_media_type(gt))
387 gt_list->gt_list[iter].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
388 else
389 gt_list->gt_list[iter].type = DRM_XE_QUERY_GT_TYPE_MAIN;
390 gt_list->gt_list[iter].tile_id = gt_to_tile(gt)->id;
391 gt_list->gt_list[iter].gt_id = gt->info.id;
392 gt_list->gt_list[iter].reference_clock = gt->info.reference_clock;
393 /*
394 * The mem_regions indexes in the mask below need to
395 * directly identify the struct
396 * drm_xe_query_mem_regions' instance constructed at
397 * query_mem_regions()
398 *
399 * For our current platforms:
400 * Bit 0 -> System Memory
401 * Bit 1 -> VRAM0 on Tile0
402 * Bit 2 -> VRAM1 on Tile1
403 * However the uAPI is generic and it's userspace's
404 * responsibility to check the mem_class, without any
405 * assumption.
406 */
407 if (!IS_DGFX(xe))
408 gt_list->gt_list[iter].near_mem_regions = 0x1;
409 else
410 gt_list->gt_list[iter].near_mem_regions =
411 BIT(gt_to_tile(gt)->id) << 1;
412 gt_list->gt_list[iter].far_mem_regions = xe->info.mem_region_mask ^
413 gt_list->gt_list[iter].near_mem_regions;
414
415 gt_list->gt_list[iter].ip_ver_major =
416 REG_FIELD_GET(GMD_ID_ARCH_MASK, gt->info.gmdid);
417 gt_list->gt_list[iter].ip_ver_minor =
418 REG_FIELD_GET(GMD_ID_RELEASE_MASK, gt->info.gmdid);
419 gt_list->gt_list[iter].ip_ver_rev =
420 REG_FIELD_GET(GMD_ID_REVID, gt->info.gmdid);
421
422 iter++;
423 }
424
425 if (copy_to_user(query_ptr, gt_list, size)) {
426 kfree(gt_list);
427 return -EFAULT;
428 }
429 kfree(gt_list);
430
431 return 0;
432 }
433
query_hwconfig(struct xe_device * xe,struct drm_xe_device_query * query)434 static int query_hwconfig(struct xe_device *xe,
435 struct drm_xe_device_query *query)
436 {
437 struct xe_gt *gt = xe_root_mmio_gt(xe);
438 size_t size = xe_guc_hwconfig_size(>->uc.guc);
439 void __user *query_ptr = u64_to_user_ptr(query->data);
440 void *hwconfig;
441
442 if (query->size == 0) {
443 query->size = size;
444 return 0;
445 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
446 return -EINVAL;
447 }
448
449 hwconfig = kzalloc(size, GFP_KERNEL);
450 if (!hwconfig)
451 return -ENOMEM;
452
453 xe_guc_hwconfig_copy(>->uc.guc, hwconfig);
454
455 if (copy_to_user(query_ptr, hwconfig, size)) {
456 kfree(hwconfig);
457 return -EFAULT;
458 }
459 kfree(hwconfig);
460
461 return 0;
462 }
463
calc_topo_query_size(struct xe_device * xe)464 static size_t calc_topo_query_size(struct xe_device *xe)
465 {
466 struct xe_gt *gt;
467 size_t query_size = 0;
468 int id;
469
470 for_each_gt(gt, xe, id) {
471 query_size += 3 * sizeof(struct drm_xe_query_topology_mask) +
472 sizeof_field(struct xe_gt, fuse_topo.g_dss_mask) +
473 sizeof_field(struct xe_gt, fuse_topo.c_dss_mask) +
474 sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss);
475
476 /* L3bank mask may not be available for some GTs */
477 if (!XE_WA(gt, no_media_l3))
478 query_size += sizeof(struct drm_xe_query_topology_mask) +
479 sizeof_field(struct xe_gt, fuse_topo.l3_bank_mask);
480 }
481
482 return query_size;
483 }
484
copy_mask(void __user ** ptr,struct drm_xe_query_topology_mask * topo,void * mask,size_t mask_size)485 static int copy_mask(void __user **ptr,
486 struct drm_xe_query_topology_mask *topo,
487 void *mask, size_t mask_size)
488 {
489 topo->num_bytes = mask_size;
490
491 if (copy_to_user(*ptr, topo, sizeof(*topo)))
492 return -EFAULT;
493 *ptr += sizeof(topo);
494
495 if (copy_to_user(*ptr, mask, mask_size))
496 return -EFAULT;
497 *ptr += mask_size;
498
499 return 0;
500 }
501
query_gt_topology(struct xe_device * xe,struct drm_xe_device_query * query)502 static int query_gt_topology(struct xe_device *xe,
503 struct drm_xe_device_query *query)
504 {
505 void __user *query_ptr = u64_to_user_ptr(query->data);
506 size_t size = calc_topo_query_size(xe);
507 struct drm_xe_query_topology_mask topo;
508 struct xe_gt *gt;
509 int id;
510
511 if (query->size == 0) {
512 query->size = size;
513 return 0;
514 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
515 return -EINVAL;
516 }
517
518 for_each_gt(gt, xe, id) {
519 int err;
520
521 topo.gt_id = id;
522
523 topo.type = DRM_XE_TOPO_DSS_GEOMETRY;
524 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.g_dss_mask,
525 sizeof(gt->fuse_topo.g_dss_mask));
526 if (err)
527 return err;
528
529 topo.type = DRM_XE_TOPO_DSS_COMPUTE;
530 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.c_dss_mask,
531 sizeof(gt->fuse_topo.c_dss_mask));
532 if (err)
533 return err;
534
535 /*
536 * If the kernel doesn't have a way to obtain a correct L3bank
537 * mask, then it's better to omit L3 from the query rather than
538 * reporting bogus or zeroed information to userspace.
539 */
540 if (!XE_WA(gt, no_media_l3)) {
541 topo.type = DRM_XE_TOPO_L3_BANK;
542 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.l3_bank_mask,
543 sizeof(gt->fuse_topo.l3_bank_mask));
544 if (err)
545 return err;
546 }
547
548 topo.type = gt->fuse_topo.eu_type == XE_GT_EU_TYPE_SIMD16 ?
549 DRM_XE_TOPO_SIMD16_EU_PER_DSS :
550 DRM_XE_TOPO_EU_PER_DSS;
551 err = copy_mask(&query_ptr, &topo,
552 gt->fuse_topo.eu_mask_per_dss,
553 sizeof(gt->fuse_topo.eu_mask_per_dss));
554 if (err)
555 return err;
556 }
557
558 return 0;
559 }
560
561 static int
query_uc_fw_version(struct xe_device * xe,struct drm_xe_device_query * query)562 query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
563 {
564 struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data);
565 size_t size = sizeof(struct drm_xe_query_uc_fw_version);
566 struct drm_xe_query_uc_fw_version resp;
567 struct xe_uc_fw_version *version = NULL;
568
569 if (query->size == 0) {
570 query->size = size;
571 return 0;
572 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
573 return -EINVAL;
574 }
575
576 if (copy_from_user(&resp, query_ptr, size))
577 return -EFAULT;
578
579 if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved))
580 return -EINVAL;
581
582 switch (resp.uc_type) {
583 case XE_QUERY_UC_TYPE_GUC_SUBMISSION: {
584 struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
585
586 version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY];
587 break;
588 }
589 case XE_QUERY_UC_TYPE_HUC: {
590 struct xe_gt *media_gt = NULL;
591 struct xe_huc *huc;
592
593 if (MEDIA_VER(xe) >= 13) {
594 struct xe_tile *tile;
595 u8 gt_id;
596
597 for_each_tile(tile, xe, gt_id) {
598 if (tile->media_gt) {
599 media_gt = tile->media_gt;
600 break;
601 }
602 }
603 } else {
604 media_gt = xe->tiles[0].primary_gt;
605 }
606
607 if (!media_gt)
608 break;
609
610 huc = &media_gt->uc.huc;
611 if (huc->fw.status == XE_UC_FIRMWARE_RUNNING)
612 version = &huc->fw.versions.found[XE_UC_FW_VER_RELEASE];
613 break;
614 }
615 default:
616 return -EINVAL;
617 }
618
619 if (version) {
620 resp.branch_ver = 0;
621 resp.major_ver = version->major;
622 resp.minor_ver = version->minor;
623 resp.patch_ver = version->patch;
624 } else {
625 return -ENODEV;
626 }
627
628 if (copy_to_user(query_ptr, &resp, size))
629 return -EFAULT;
630
631 return 0;
632 }
633
calc_oa_unit_query_size(struct xe_device * xe)634 static size_t calc_oa_unit_query_size(struct xe_device *xe)
635 {
636 size_t size = sizeof(struct drm_xe_query_oa_units);
637 struct xe_gt *gt;
638 int i, id;
639
640 for_each_gt(gt, xe, id) {
641 for (i = 0; i < gt->oa.num_oa_units; i++) {
642 size += sizeof(struct drm_xe_oa_unit);
643 size += gt->oa.oa_unit[i].num_engines *
644 sizeof(struct drm_xe_engine_class_instance);
645 }
646 }
647
648 return size;
649 }
650
query_oa_units(struct xe_device * xe,struct drm_xe_device_query * query)651 static int query_oa_units(struct xe_device *xe,
652 struct drm_xe_device_query *query)
653 {
654 void __user *query_ptr = u64_to_user_ptr(query->data);
655 size_t size = calc_oa_unit_query_size(xe);
656 struct drm_xe_query_oa_units *qoa;
657 enum xe_hw_engine_id hwe_id;
658 struct drm_xe_oa_unit *du;
659 struct xe_hw_engine *hwe;
660 struct xe_oa_unit *u;
661 int gt_id, i, j, ret;
662 struct xe_gt *gt;
663 u8 *pdu;
664
665 if (query->size == 0) {
666 query->size = size;
667 return 0;
668 } else if (XE_IOCTL_DBG(xe, query->size != size)) {
669 return -EINVAL;
670 }
671
672 qoa = kzalloc(size, GFP_KERNEL);
673 if (!qoa)
674 return -ENOMEM;
675
676 pdu = (u8 *)&qoa->oa_units[0];
677 for_each_gt(gt, xe, gt_id) {
678 for (i = 0; i < gt->oa.num_oa_units; i++) {
679 u = >->oa.oa_unit[i];
680 du = (struct drm_xe_oa_unit *)pdu;
681
682 du->oa_unit_id = u->oa_unit_id;
683 du->oa_unit_type = u->type;
684 du->oa_timestamp_freq = xe_oa_timestamp_frequency(gt);
685 du->capabilities = DRM_XE_OA_CAPS_BASE | DRM_XE_OA_CAPS_SYNCS;
686
687 j = 0;
688 for_each_hw_engine(hwe, gt, hwe_id) {
689 if (!xe_hw_engine_is_reserved(hwe) &&
690 xe_oa_unit_id(hwe) == u->oa_unit_id) {
691 du->eci[j].engine_class =
692 xe_to_user_engine_class[hwe->class];
693 du->eci[j].engine_instance = hwe->logical_instance;
694 du->eci[j].gt_id = gt->info.id;
695 j++;
696 }
697 }
698 du->num_engines = j;
699 pdu += sizeof(*du) + j * sizeof(du->eci[0]);
700 qoa->num_oa_units++;
701 }
702 }
703
704 ret = copy_to_user(query_ptr, qoa, size);
705 kfree(qoa);
706
707 return ret ? -EFAULT : 0;
708 }
709
710 static int (* const xe_query_funcs[])(struct xe_device *xe,
711 struct drm_xe_device_query *query) = {
712 query_engines,
713 query_mem_regions,
714 query_config,
715 query_gt_list,
716 query_hwconfig,
717 query_gt_topology,
718 query_engine_cycles,
719 query_uc_fw_version,
720 query_oa_units,
721 };
722
xe_query_ioctl(struct drm_device * dev,void * data,struct drm_file * file)723 int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
724 {
725 struct xe_device *xe = to_xe_device(dev);
726 struct drm_xe_device_query *query = data;
727 u32 idx;
728
729 if (XE_IOCTL_DBG(xe, query->extensions) ||
730 XE_IOCTL_DBG(xe, query->reserved[0] || query->reserved[1]))
731 return -EINVAL;
732
733 if (XE_IOCTL_DBG(xe, query->query >= ARRAY_SIZE(xe_query_funcs)))
734 return -EINVAL;
735
736 idx = array_index_nospec(query->query, ARRAY_SIZE(xe_query_funcs));
737 if (XE_IOCTL_DBG(xe, !xe_query_funcs[idx]))
738 return -EINVAL;
739
740 return xe_query_funcs[idx](xe, query);
741 }
742