1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * AMD MP2 common macros and structures
4 *
5 * Copyright (c) 2022, Advanced Micro Devices, Inc.
6 * All Rights Reserved.
7 *
8 * Author: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
9 */
10 #ifndef AMD_SFH_COMMON_H
11 #define AMD_SFH_COMMON_H
12
13 #include <linux/mutex.h>
14 #include <linux/pci.h>
15 #include "amd_sfh_hid.h"
16
17 #define PCI_DEVICE_ID_AMD_MP2 0x15E4
18 #define PCI_DEVICE_ID_AMD_MP2_1_1 0x164A
19
20 #define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4))
21 #define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4))
22
23 #define AMD_C2P_MSG_V1(regno) (0x10900 + ((regno) * 4))
24 #define AMD_P2C_MSG_V1(regno) (0x10500 + ((regno) * 4))
25
26 #define SENSOR_ENABLED 4
27 #define SENSOR_DISABLED 5
28
29 #define AMD_SFH_IDLE_LOOP 200
30
31 enum cmd_id {
32 NO_OP,
33 ENABLE_SENSOR,
34 DISABLE_SENSOR,
35 STOP_ALL_SENSORS = 8,
36 };
37
38 struct amd_mp2_sensor_info {
39 u8 sensor_idx;
40 u32 period;
41 dma_addr_t dma_address;
42 };
43
44 struct sfh_dev_status {
45 bool is_hpd_present;
46 bool is_als_present;
47 };
48
49 struct amd_mp2_dev {
50 struct pci_dev *pdev;
51 struct amdtp_cl_data *cl_data;
52 void __iomem *mmio;
53 void __iomem *vsbase;
54 const struct amd_sfh1_1_ops *sfh1_1_ops;
55 struct amd_mp2_ops *mp2_ops;
56 struct amd_input_data in_data;
57 /* mp2 active control status */
58 u32 mp2_acs;
59 struct sfh_dev_status dev_en;
60 struct work_struct work;
61 /* mp2 to protect data */
62 struct mutex lock;
63 u8 init_done;
64 u8 rver;
65 };
66
67 struct amd_mp2_ops {
68 void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);
69 void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx);
70 void (*stop_all)(struct amd_mp2_dev *privdata);
71 int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);
72 void (*clear_intr)(struct amd_mp2_dev *privdata);
73 int (*init_intr)(struct amd_mp2_dev *privdata);
74 int (*discovery_status)(struct amd_mp2_dev *privdata);
75 void (*suspend)(struct amd_mp2_dev *mp2);
76 void (*resume)(struct amd_mp2_dev *mp2);
77 void (*remove)(void *privdata);
78 int (*get_rep_desc)(int sensor_idx, u8 rep_desc[]);
79 u32 (*get_desc_sz)(int sensor_idx, int descriptor_name);
80 u8 (*get_feat_rep)(int sensor_idx, int report_id, u8 *feature_report);
81 u8 (*get_in_rep)(u8 current_index, int sensor_idx, int report_id,
82 struct amd_input_data *in_data);
83 };
84
85 void amd_sfh_work(struct work_struct *work);
86 void amd_sfh_work_buffer(struct work_struct *work);
87 void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata);
88 int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata);
89 void amd_sfh_clear_intr(struct amd_mp2_dev *privdata);
90 int amd_sfh_irq_init(struct amd_mp2_dev *privdata);
91
amd_get_c2p_val(struct amd_mp2_dev * mp2,u32 idx)92 static inline u64 amd_get_c2p_val(struct amd_mp2_dev *mp2, u32 idx)
93 {
94 return mp2->rver == 1 ? AMD_C2P_MSG_V1(idx) : AMD_C2P_MSG(idx);
95 }
96
amd_get_p2c_val(struct amd_mp2_dev * mp2,u32 idx)97 static inline u64 amd_get_p2c_val(struct amd_mp2_dev *mp2, u32 idx)
98 {
99 return mp2->rver == 1 ? AMD_P2C_MSG_V1(idx) : AMD_P2C_MSG(idx);
100 }
101 #endif
102