1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /*
3 * Copyright (c) 2018, Mellanox Technologies inc. All rights reserved.
4 */
5
6 #include <rdma/ib_user_verbs.h>
7 #include <rdma/ib_verbs.h>
8 #include <rdma/uverbs_types.h>
9 #include <rdma/uverbs_ioctl.h>
10 #include <rdma/mlx5_user_ioctl_cmds.h>
11 #include <rdma/mlx5_user_ioctl_verbs.h>
12 #include <rdma/ib_umem.h>
13 #include <rdma/uverbs_std_types.h>
14 #include <linux/mlx5/driver.h>
15 #include <linux/mlx5/fs.h>
16 #include "mlx5_ib.h"
17 #include "devx.h"
18 #include "qp.h"
19 #include <linux/xarray.h>
20
21 #define UVERBS_MODULE_NAME mlx5_ib
22 #include <rdma/uverbs_named_ioctl.h>
23
24 static void dispatch_event_fd(struct list_head *fd_list, const void *data);
25
26 enum devx_obj_flags {
27 DEVX_OBJ_FLAGS_INDIRECT_MKEY = 1 << 0,
28 DEVX_OBJ_FLAGS_DCT = 1 << 1,
29 DEVX_OBJ_FLAGS_CQ = 1 << 2,
30 };
31
32 struct devx_async_data {
33 struct mlx5_ib_dev *mdev;
34 struct list_head list;
35 struct devx_async_cmd_event_file *ev_file;
36 struct mlx5_async_work cb_work;
37 u16 cmd_out_len;
38 /* must be last field in this structure */
39 struct mlx5_ib_uapi_devx_async_cmd_hdr hdr;
40 };
41
42 struct devx_async_event_data {
43 struct list_head list; /* headed in ev_file->event_list */
44 struct mlx5_ib_uapi_devx_async_event_hdr hdr;
45 };
46
47 /* first level XA value data structure */
48 struct devx_event {
49 struct xarray object_ids; /* second XA level, Key = object id */
50 struct list_head unaffiliated_list;
51 };
52
53 /* second level XA value data structure */
54 struct devx_obj_event {
55 struct rcu_head rcu;
56 struct list_head obj_sub_list;
57 };
58
59 struct devx_event_subscription {
60 struct list_head file_list; /* headed in ev_file->
61 * subscribed_events_list
62 */
63 struct list_head xa_list; /* headed in devx_event->unaffiliated_list or
64 * devx_obj_event->obj_sub_list
65 */
66 struct list_head obj_list; /* headed in devx_object */
67 struct list_head event_list; /* headed in ev_file->event_list or in
68 * temp list via subscription
69 */
70
71 u8 is_cleaned:1;
72 u32 xa_key_level1;
73 u32 xa_key_level2;
74 struct rcu_head rcu;
75 u64 cookie;
76 struct devx_async_event_file *ev_file;
77 struct eventfd_ctx *eventfd;
78 };
79
80 struct devx_async_event_file {
81 struct ib_uobject uobj;
82 /* Head of events that are subscribed to this FD */
83 struct list_head subscribed_events_list;
84 spinlock_t lock;
85 wait_queue_head_t poll_wait;
86 struct list_head event_list;
87 struct mlx5_ib_dev *dev;
88 u8 omit_data:1;
89 u8 is_overflow_err:1;
90 u8 is_destroyed:1;
91 };
92
93 struct devx_umem {
94 struct mlx5_core_dev *mdev;
95 struct ib_umem *umem;
96 u32 dinlen;
97 u32 dinbox[MLX5_ST_SZ_DW(destroy_umem_in)];
98 };
99
100 struct devx_umem_reg_cmd {
101 void *in;
102 u32 inlen;
103 u32 out[MLX5_ST_SZ_DW(create_umem_out)];
104 };
105
106 static struct mlx5_ib_ucontext *
devx_ufile2uctx(const struct uverbs_attr_bundle * attrs)107 devx_ufile2uctx(const struct uverbs_attr_bundle *attrs)
108 {
109 return to_mucontext(ib_uverbs_get_ucontext(attrs));
110 }
111
mlx5_ib_devx_create(struct mlx5_ib_dev * dev,bool is_user)112 int mlx5_ib_devx_create(struct mlx5_ib_dev *dev, bool is_user)
113 {
114 u32 in[MLX5_ST_SZ_DW(create_uctx_in)] = {};
115 u32 out[MLX5_ST_SZ_DW(create_uctx_out)] = {};
116 void *uctx;
117 int err;
118 u16 uid;
119 u32 cap = 0;
120
121 /* 0 means not supported */
122 if (!MLX5_CAP_GEN(dev->mdev, log_max_uctx))
123 return -EINVAL;
124
125 uctx = MLX5_ADDR_OF(create_uctx_in, in, uctx);
126 if (is_user && capable(CAP_NET_RAW) &&
127 (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RAW_TX))
128 cap |= MLX5_UCTX_CAP_RAW_TX;
129 if (is_user && capable(CAP_SYS_RAWIO) &&
130 (MLX5_CAP_GEN(dev->mdev, uctx_cap) &
131 MLX5_UCTX_CAP_INTERNAL_DEV_RES))
132 cap |= MLX5_UCTX_CAP_INTERNAL_DEV_RES;
133
134 MLX5_SET(create_uctx_in, in, opcode, MLX5_CMD_OP_CREATE_UCTX);
135 MLX5_SET(uctx, uctx, cap, cap);
136
137 err = mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
138 if (err)
139 return err;
140
141 uid = MLX5_GET(create_uctx_out, out, uid);
142 return uid;
143 }
144
mlx5_ib_devx_destroy(struct mlx5_ib_dev * dev,u16 uid)145 void mlx5_ib_devx_destroy(struct mlx5_ib_dev *dev, u16 uid)
146 {
147 u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {};
148 u32 out[MLX5_ST_SZ_DW(destroy_uctx_out)] = {};
149
150 MLX5_SET(destroy_uctx_in, in, opcode, MLX5_CMD_OP_DESTROY_UCTX);
151 MLX5_SET(destroy_uctx_in, in, uid, uid);
152
153 mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
154 }
155
is_legacy_unaffiliated_event_num(u16 event_num)156 static bool is_legacy_unaffiliated_event_num(u16 event_num)
157 {
158 switch (event_num) {
159 case MLX5_EVENT_TYPE_PORT_CHANGE:
160 return true;
161 default:
162 return false;
163 }
164 }
165
is_legacy_obj_event_num(u16 event_num)166 static bool is_legacy_obj_event_num(u16 event_num)
167 {
168 switch (event_num) {
169 case MLX5_EVENT_TYPE_PATH_MIG:
170 case MLX5_EVENT_TYPE_COMM_EST:
171 case MLX5_EVENT_TYPE_SQ_DRAINED:
172 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
173 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
174 case MLX5_EVENT_TYPE_CQ_ERROR:
175 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
176 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
177 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
178 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
179 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
180 case MLX5_EVENT_TYPE_DCT_DRAINED:
181 case MLX5_EVENT_TYPE_COMP:
182 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
183 case MLX5_EVENT_TYPE_XRQ_ERROR:
184 return true;
185 default:
186 return false;
187 }
188 }
189
get_legacy_obj_type(u16 opcode)190 static u16 get_legacy_obj_type(u16 opcode)
191 {
192 switch (opcode) {
193 case MLX5_CMD_OP_CREATE_RQ:
194 case MLX5_CMD_OP_CREATE_RMP:
195 return MLX5_EVENT_QUEUE_TYPE_RQ;
196 case MLX5_CMD_OP_CREATE_QP:
197 return MLX5_EVENT_QUEUE_TYPE_QP;
198 case MLX5_CMD_OP_CREATE_SQ:
199 return MLX5_EVENT_QUEUE_TYPE_SQ;
200 case MLX5_CMD_OP_CREATE_DCT:
201 return MLX5_EVENT_QUEUE_TYPE_DCT;
202 default:
203 return 0;
204 }
205 }
206
get_dec_obj_type(struct devx_obj * obj,u16 event_num)207 static u16 get_dec_obj_type(struct devx_obj *obj, u16 event_num)
208 {
209 u16 opcode;
210
211 opcode = (obj->obj_id >> 32) & 0xffff;
212
213 if (is_legacy_obj_event_num(event_num))
214 return get_legacy_obj_type(opcode);
215
216 switch (opcode) {
217 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
218 return (obj->obj_id >> 48);
219 case MLX5_CMD_OP_CREATE_RQ:
220 return MLX5_OBJ_TYPE_RQ;
221 case MLX5_CMD_OP_CREATE_QP:
222 return MLX5_OBJ_TYPE_QP;
223 case MLX5_CMD_OP_CREATE_SQ:
224 return MLX5_OBJ_TYPE_SQ;
225 case MLX5_CMD_OP_CREATE_DCT:
226 return MLX5_OBJ_TYPE_DCT;
227 case MLX5_CMD_OP_CREATE_TIR:
228 return MLX5_OBJ_TYPE_TIR;
229 case MLX5_CMD_OP_CREATE_TIS:
230 return MLX5_OBJ_TYPE_TIS;
231 case MLX5_CMD_OP_CREATE_PSV:
232 return MLX5_OBJ_TYPE_PSV;
233 case MLX5_OBJ_TYPE_MKEY:
234 return MLX5_OBJ_TYPE_MKEY;
235 case MLX5_CMD_OP_CREATE_RMP:
236 return MLX5_OBJ_TYPE_RMP;
237 case MLX5_CMD_OP_CREATE_XRC_SRQ:
238 return MLX5_OBJ_TYPE_XRC_SRQ;
239 case MLX5_CMD_OP_CREATE_XRQ:
240 return MLX5_OBJ_TYPE_XRQ;
241 case MLX5_CMD_OP_CREATE_RQT:
242 return MLX5_OBJ_TYPE_RQT;
243 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
244 return MLX5_OBJ_TYPE_FLOW_COUNTER;
245 case MLX5_CMD_OP_CREATE_CQ:
246 return MLX5_OBJ_TYPE_CQ;
247 default:
248 return 0;
249 }
250 }
251
get_event_obj_type(unsigned long event_type,struct mlx5_eqe * eqe)252 static u16 get_event_obj_type(unsigned long event_type, struct mlx5_eqe *eqe)
253 {
254 switch (event_type) {
255 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
256 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
257 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
258 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
259 case MLX5_EVENT_TYPE_PATH_MIG:
260 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
261 case MLX5_EVENT_TYPE_COMM_EST:
262 case MLX5_EVENT_TYPE_SQ_DRAINED:
263 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
264 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
265 return eqe->data.qp_srq.type;
266 case MLX5_EVENT_TYPE_CQ_ERROR:
267 case MLX5_EVENT_TYPE_XRQ_ERROR:
268 return 0;
269 case MLX5_EVENT_TYPE_DCT_DRAINED:
270 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
271 return MLX5_EVENT_QUEUE_TYPE_DCT;
272 default:
273 return MLX5_GET(affiliated_event_header, &eqe->data, obj_type);
274 }
275 }
276
get_dec_obj_id(u64 obj_id)277 static u32 get_dec_obj_id(u64 obj_id)
278 {
279 return (obj_id & 0xffffffff);
280 }
281
282 /*
283 * As the obj_id in the firmware is not globally unique the object type
284 * must be considered upon checking for a valid object id.
285 * For that the opcode of the creator command is encoded as part of the obj_id.
286 */
get_enc_obj_id(u32 opcode,u32 obj_id)287 static u64 get_enc_obj_id(u32 opcode, u32 obj_id)
288 {
289 return ((u64)opcode << 32) | obj_id;
290 }
291
devx_get_created_obj_id(const void * in,const void * out,u16 opcode)292 static u32 devx_get_created_obj_id(const void *in, const void *out, u16 opcode)
293 {
294 switch (opcode) {
295 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
296 return MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
297 case MLX5_CMD_OP_CREATE_UMEM:
298 return MLX5_GET(create_umem_out, out, umem_id);
299 case MLX5_CMD_OP_CREATE_MKEY:
300 return MLX5_GET(create_mkey_out, out, mkey_index);
301 case MLX5_CMD_OP_CREATE_CQ:
302 return MLX5_GET(create_cq_out, out, cqn);
303 case MLX5_CMD_OP_ALLOC_PD:
304 return MLX5_GET(alloc_pd_out, out, pd);
305 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
306 return MLX5_GET(alloc_transport_domain_out, out,
307 transport_domain);
308 case MLX5_CMD_OP_CREATE_RMP:
309 return MLX5_GET(create_rmp_out, out, rmpn);
310 case MLX5_CMD_OP_CREATE_SQ:
311 return MLX5_GET(create_sq_out, out, sqn);
312 case MLX5_CMD_OP_CREATE_RQ:
313 return MLX5_GET(create_rq_out, out, rqn);
314 case MLX5_CMD_OP_CREATE_RQT:
315 return MLX5_GET(create_rqt_out, out, rqtn);
316 case MLX5_CMD_OP_CREATE_TIR:
317 return MLX5_GET(create_tir_out, out, tirn);
318 case MLX5_CMD_OP_CREATE_TIS:
319 return MLX5_GET(create_tis_out, out, tisn);
320 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
321 return MLX5_GET(alloc_q_counter_out, out, counter_set_id);
322 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
323 return MLX5_GET(create_flow_table_out, out, table_id);
324 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
325 return MLX5_GET(create_flow_group_out, out, group_id);
326 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
327 return MLX5_GET(set_fte_in, in, flow_index);
328 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
329 return MLX5_GET(alloc_flow_counter_out, out, flow_counter_id);
330 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
331 return MLX5_GET(alloc_packet_reformat_context_out, out,
332 packet_reformat_id);
333 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
334 return MLX5_GET(alloc_modify_header_context_out, out,
335 modify_header_id);
336 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
337 return MLX5_GET(create_scheduling_element_out, out,
338 scheduling_element_id);
339 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
340 return MLX5_GET(add_vxlan_udp_dport_in, in, vxlan_udp_port);
341 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
342 return MLX5_GET(set_l2_table_entry_in, in, table_index);
343 case MLX5_CMD_OP_CREATE_QP:
344 return MLX5_GET(create_qp_out, out, qpn);
345 case MLX5_CMD_OP_CREATE_SRQ:
346 return MLX5_GET(create_srq_out, out, srqn);
347 case MLX5_CMD_OP_CREATE_XRC_SRQ:
348 return MLX5_GET(create_xrc_srq_out, out, xrc_srqn);
349 case MLX5_CMD_OP_CREATE_DCT:
350 return MLX5_GET(create_dct_out, out, dctn);
351 case MLX5_CMD_OP_CREATE_XRQ:
352 return MLX5_GET(create_xrq_out, out, xrqn);
353 case MLX5_CMD_OP_ATTACH_TO_MCG:
354 return MLX5_GET(attach_to_mcg_in, in, qpn);
355 case MLX5_CMD_OP_ALLOC_XRCD:
356 return MLX5_GET(alloc_xrcd_out, out, xrcd);
357 case MLX5_CMD_OP_CREATE_PSV:
358 return MLX5_GET(create_psv_out, out, psv0_index);
359 default:
360 /* The entry must match to one of the devx_is_obj_create_cmd */
361 WARN_ON(true);
362 return 0;
363 }
364 }
365
devx_get_obj_id(const void * in)366 static u64 devx_get_obj_id(const void *in)
367 {
368 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
369 u64 obj_id;
370
371 switch (opcode) {
372 case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
373 case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
374 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_GENERAL_OBJECT |
375 MLX5_GET(general_obj_in_cmd_hdr, in,
376 obj_type) << 16,
377 MLX5_GET(general_obj_in_cmd_hdr, in,
378 obj_id));
379 break;
380 case MLX5_CMD_OP_QUERY_MKEY:
381 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_MKEY,
382 MLX5_GET(query_mkey_in, in,
383 mkey_index));
384 break;
385 case MLX5_CMD_OP_QUERY_CQ:
386 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
387 MLX5_GET(query_cq_in, in, cqn));
388 break;
389 case MLX5_CMD_OP_MODIFY_CQ:
390 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
391 MLX5_GET(modify_cq_in, in, cqn));
392 break;
393 case MLX5_CMD_OP_QUERY_SQ:
394 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
395 MLX5_GET(query_sq_in, in, sqn));
396 break;
397 case MLX5_CMD_OP_MODIFY_SQ:
398 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
399 MLX5_GET(modify_sq_in, in, sqn));
400 break;
401 case MLX5_CMD_OP_QUERY_RQ:
402 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
403 MLX5_GET(query_rq_in, in, rqn));
404 break;
405 case MLX5_CMD_OP_MODIFY_RQ:
406 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
407 MLX5_GET(modify_rq_in, in, rqn));
408 break;
409 case MLX5_CMD_OP_QUERY_RMP:
410 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
411 MLX5_GET(query_rmp_in, in, rmpn));
412 break;
413 case MLX5_CMD_OP_MODIFY_RMP:
414 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
415 MLX5_GET(modify_rmp_in, in, rmpn));
416 break;
417 case MLX5_CMD_OP_QUERY_RQT:
418 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
419 MLX5_GET(query_rqt_in, in, rqtn));
420 break;
421 case MLX5_CMD_OP_MODIFY_RQT:
422 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
423 MLX5_GET(modify_rqt_in, in, rqtn));
424 break;
425 case MLX5_CMD_OP_QUERY_TIR:
426 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
427 MLX5_GET(query_tir_in, in, tirn));
428 break;
429 case MLX5_CMD_OP_MODIFY_TIR:
430 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
431 MLX5_GET(modify_tir_in, in, tirn));
432 break;
433 case MLX5_CMD_OP_QUERY_TIS:
434 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
435 MLX5_GET(query_tis_in, in, tisn));
436 break;
437 case MLX5_CMD_OP_MODIFY_TIS:
438 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
439 MLX5_GET(modify_tis_in, in, tisn));
440 break;
441 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
442 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
443 MLX5_GET(query_flow_table_in, in,
444 table_id));
445 break;
446 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
447 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
448 MLX5_GET(modify_flow_table_in, in,
449 table_id));
450 break;
451 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
452 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_GROUP,
453 MLX5_GET(query_flow_group_in, in,
454 group_id));
455 break;
456 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
457 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
458 MLX5_GET(query_fte_in, in,
459 flow_index));
460 break;
461 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
462 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
463 MLX5_GET(set_fte_in, in, flow_index));
464 break;
465 case MLX5_CMD_OP_QUERY_Q_COUNTER:
466 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_Q_COUNTER,
467 MLX5_GET(query_q_counter_in, in,
468 counter_set_id));
469 break;
470 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
471 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_FLOW_COUNTER,
472 MLX5_GET(query_flow_counter_in, in,
473 flow_counter_id));
474 break;
475 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
476 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT,
477 MLX5_GET(query_modify_header_context_in,
478 in, modify_header_id));
479 break;
480 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
481 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
482 MLX5_GET(query_scheduling_element_in,
483 in, scheduling_element_id));
484 break;
485 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
486 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
487 MLX5_GET(modify_scheduling_element_in,
488 in, scheduling_element_id));
489 break;
490 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
491 obj_id = get_enc_obj_id(MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT,
492 MLX5_GET(add_vxlan_udp_dport_in, in,
493 vxlan_udp_port));
494 break;
495 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
496 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
497 MLX5_GET(query_l2_table_entry_in, in,
498 table_index));
499 break;
500 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
501 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
502 MLX5_GET(set_l2_table_entry_in, in,
503 table_index));
504 break;
505 case MLX5_CMD_OP_QUERY_QP:
506 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
507 MLX5_GET(query_qp_in, in, qpn));
508 break;
509 case MLX5_CMD_OP_RST2INIT_QP:
510 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
511 MLX5_GET(rst2init_qp_in, in, qpn));
512 break;
513 case MLX5_CMD_OP_INIT2INIT_QP:
514 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
515 MLX5_GET(init2init_qp_in, in, qpn));
516 break;
517 case MLX5_CMD_OP_INIT2RTR_QP:
518 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
519 MLX5_GET(init2rtr_qp_in, in, qpn));
520 break;
521 case MLX5_CMD_OP_RTR2RTS_QP:
522 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
523 MLX5_GET(rtr2rts_qp_in, in, qpn));
524 break;
525 case MLX5_CMD_OP_RTS2RTS_QP:
526 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
527 MLX5_GET(rts2rts_qp_in, in, qpn));
528 break;
529 case MLX5_CMD_OP_SQERR2RTS_QP:
530 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
531 MLX5_GET(sqerr2rts_qp_in, in, qpn));
532 break;
533 case MLX5_CMD_OP_2ERR_QP:
534 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
535 MLX5_GET(qp_2err_in, in, qpn));
536 break;
537 case MLX5_CMD_OP_2RST_QP:
538 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
539 MLX5_GET(qp_2rst_in, in, qpn));
540 break;
541 case MLX5_CMD_OP_QUERY_DCT:
542 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
543 MLX5_GET(query_dct_in, in, dctn));
544 break;
545 case MLX5_CMD_OP_QUERY_XRQ:
546 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
547 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
548 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
549 MLX5_GET(query_xrq_in, in, xrqn));
550 break;
551 case MLX5_CMD_OP_QUERY_XRC_SRQ:
552 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
553 MLX5_GET(query_xrc_srq_in, in,
554 xrc_srqn));
555 break;
556 case MLX5_CMD_OP_ARM_XRC_SRQ:
557 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
558 MLX5_GET(arm_xrc_srq_in, in, xrc_srqn));
559 break;
560 case MLX5_CMD_OP_QUERY_SRQ:
561 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SRQ,
562 MLX5_GET(query_srq_in, in, srqn));
563 break;
564 case MLX5_CMD_OP_ARM_RQ:
565 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
566 MLX5_GET(arm_rq_in, in, srq_number));
567 break;
568 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
569 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
570 MLX5_GET(drain_dct_in, in, dctn));
571 break;
572 case MLX5_CMD_OP_ARM_XRQ:
573 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
574 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
575 case MLX5_CMD_OP_MODIFY_XRQ:
576 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
577 MLX5_GET(arm_xrq_in, in, xrqn));
578 break;
579 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
580 obj_id = get_enc_obj_id
581 (MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT,
582 MLX5_GET(query_packet_reformat_context_in,
583 in, packet_reformat_id));
584 break;
585 default:
586 obj_id = 0;
587 }
588
589 return obj_id;
590 }
591
devx_is_valid_obj_id(struct uverbs_attr_bundle * attrs,struct ib_uobject * uobj,const void * in)592 static bool devx_is_valid_obj_id(struct uverbs_attr_bundle *attrs,
593 struct ib_uobject *uobj, const void *in)
594 {
595 struct mlx5_ib_dev *dev = mlx5_udata_to_mdev(&attrs->driver_udata);
596 u64 obj_id = devx_get_obj_id(in);
597
598 if (!obj_id)
599 return false;
600
601 switch (uobj_get_object_id(uobj)) {
602 case UVERBS_OBJECT_CQ:
603 return get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
604 to_mcq(uobj->object)->mcq.cqn) ==
605 obj_id;
606
607 case UVERBS_OBJECT_SRQ:
608 {
609 struct mlx5_core_srq *srq = &(to_msrq(uobj->object)->msrq);
610 u16 opcode;
611
612 switch (srq->common.res) {
613 case MLX5_RES_XSRQ:
614 opcode = MLX5_CMD_OP_CREATE_XRC_SRQ;
615 break;
616 case MLX5_RES_XRQ:
617 opcode = MLX5_CMD_OP_CREATE_XRQ;
618 break;
619 default:
620 if (!dev->mdev->issi)
621 opcode = MLX5_CMD_OP_CREATE_SRQ;
622 else
623 opcode = MLX5_CMD_OP_CREATE_RMP;
624 }
625
626 return get_enc_obj_id(opcode,
627 to_msrq(uobj->object)->msrq.srqn) ==
628 obj_id;
629 }
630
631 case UVERBS_OBJECT_QP:
632 {
633 struct mlx5_ib_qp *qp = to_mqp(uobj->object);
634
635 if (qp->type == IB_QPT_RAW_PACKET ||
636 (qp->flags & IB_QP_CREATE_SOURCE_QPN)) {
637 struct mlx5_ib_raw_packet_qp *raw_packet_qp =
638 &qp->raw_packet_qp;
639 struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
640 struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
641
642 return (get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
643 rq->base.mqp.qpn) == obj_id ||
644 get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
645 sq->base.mqp.qpn) == obj_id ||
646 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
647 rq->tirn) == obj_id ||
648 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
649 sq->tisn) == obj_id);
650 }
651
652 if (qp->type == MLX5_IB_QPT_DCT)
653 return get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
654 qp->dct.mdct.mqp.qpn) == obj_id;
655 return get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
656 qp->ibqp.qp_num) == obj_id;
657 }
658
659 case UVERBS_OBJECT_WQ:
660 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
661 to_mrwq(uobj->object)->core_qp.qpn) ==
662 obj_id;
663
664 case UVERBS_OBJECT_RWQ_IND_TBL:
665 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
666 to_mrwq_ind_table(uobj->object)->rqtn) ==
667 obj_id;
668
669 case MLX5_IB_OBJECT_DEVX_OBJ:
670 {
671 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
672 struct devx_obj *devx_uobj = uobj->object;
673
674 if (opcode == MLX5_CMD_OP_QUERY_FLOW_COUNTER &&
675 devx_uobj->flow_counter_bulk_size) {
676 u64 end;
677
678 end = devx_uobj->obj_id +
679 devx_uobj->flow_counter_bulk_size;
680 return devx_uobj->obj_id <= obj_id && end > obj_id;
681 }
682
683 return devx_uobj->obj_id == obj_id;
684 }
685
686 default:
687 return false;
688 }
689 }
690
devx_set_umem_valid(const void * in)691 static void devx_set_umem_valid(const void *in)
692 {
693 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
694
695 switch (opcode) {
696 case MLX5_CMD_OP_CREATE_MKEY:
697 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
698 break;
699 case MLX5_CMD_OP_CREATE_CQ:
700 {
701 void *cqc;
702
703 MLX5_SET(create_cq_in, in, cq_umem_valid, 1);
704 cqc = MLX5_ADDR_OF(create_cq_in, in, cq_context);
705 MLX5_SET(cqc, cqc, dbr_umem_valid, 1);
706 break;
707 }
708 case MLX5_CMD_OP_CREATE_QP:
709 {
710 void *qpc;
711
712 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
713 MLX5_SET(qpc, qpc, dbr_umem_valid, 1);
714 MLX5_SET(create_qp_in, in, wq_umem_valid, 1);
715 break;
716 }
717
718 case MLX5_CMD_OP_CREATE_RQ:
719 {
720 void *rqc, *wq;
721
722 rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
723 wq = MLX5_ADDR_OF(rqc, rqc, wq);
724 MLX5_SET(wq, wq, dbr_umem_valid, 1);
725 MLX5_SET(wq, wq, wq_umem_valid, 1);
726 break;
727 }
728
729 case MLX5_CMD_OP_CREATE_SQ:
730 {
731 void *sqc, *wq;
732
733 sqc = MLX5_ADDR_OF(create_sq_in, in, ctx);
734 wq = MLX5_ADDR_OF(sqc, sqc, wq);
735 MLX5_SET(wq, wq, dbr_umem_valid, 1);
736 MLX5_SET(wq, wq, wq_umem_valid, 1);
737 break;
738 }
739
740 case MLX5_CMD_OP_MODIFY_CQ:
741 MLX5_SET(modify_cq_in, in, cq_umem_valid, 1);
742 break;
743
744 case MLX5_CMD_OP_CREATE_RMP:
745 {
746 void *rmpc, *wq;
747
748 rmpc = MLX5_ADDR_OF(create_rmp_in, in, ctx);
749 wq = MLX5_ADDR_OF(rmpc, rmpc, wq);
750 MLX5_SET(wq, wq, dbr_umem_valid, 1);
751 MLX5_SET(wq, wq, wq_umem_valid, 1);
752 break;
753 }
754
755 case MLX5_CMD_OP_CREATE_XRQ:
756 {
757 void *xrqc, *wq;
758
759 xrqc = MLX5_ADDR_OF(create_xrq_in, in, xrq_context);
760 wq = MLX5_ADDR_OF(xrqc, xrqc, wq);
761 MLX5_SET(wq, wq, dbr_umem_valid, 1);
762 MLX5_SET(wq, wq, wq_umem_valid, 1);
763 break;
764 }
765
766 case MLX5_CMD_OP_CREATE_XRC_SRQ:
767 {
768 void *xrc_srqc;
769
770 MLX5_SET(create_xrc_srq_in, in, xrc_srq_umem_valid, 1);
771 xrc_srqc = MLX5_ADDR_OF(create_xrc_srq_in, in,
772 xrc_srq_context_entry);
773 MLX5_SET(xrc_srqc, xrc_srqc, dbr_umem_valid, 1);
774 break;
775 }
776
777 default:
778 return;
779 }
780 }
781
devx_is_obj_create_cmd(const void * in,u16 * opcode)782 static bool devx_is_obj_create_cmd(const void *in, u16 *opcode)
783 {
784 *opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
785
786 switch (*opcode) {
787 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
788 case MLX5_CMD_OP_CREATE_MKEY:
789 case MLX5_CMD_OP_CREATE_CQ:
790 case MLX5_CMD_OP_ALLOC_PD:
791 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
792 case MLX5_CMD_OP_CREATE_RMP:
793 case MLX5_CMD_OP_CREATE_SQ:
794 case MLX5_CMD_OP_CREATE_RQ:
795 case MLX5_CMD_OP_CREATE_RQT:
796 case MLX5_CMD_OP_CREATE_TIR:
797 case MLX5_CMD_OP_CREATE_TIS:
798 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
799 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
800 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
801 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
802 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
803 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
804 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
805 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
806 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
807 case MLX5_CMD_OP_CREATE_QP:
808 case MLX5_CMD_OP_CREATE_SRQ:
809 case MLX5_CMD_OP_CREATE_XRC_SRQ:
810 case MLX5_CMD_OP_CREATE_DCT:
811 case MLX5_CMD_OP_CREATE_XRQ:
812 case MLX5_CMD_OP_ATTACH_TO_MCG:
813 case MLX5_CMD_OP_ALLOC_XRCD:
814 return true;
815 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
816 {
817 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
818 if (op_mod == 0)
819 return true;
820 return false;
821 }
822 case MLX5_CMD_OP_CREATE_PSV:
823 {
824 u8 num_psv = MLX5_GET(create_psv_in, in, num_psv);
825
826 if (num_psv == 1)
827 return true;
828 return false;
829 }
830 default:
831 return false;
832 }
833 }
834
devx_is_obj_modify_cmd(const void * in)835 static bool devx_is_obj_modify_cmd(const void *in)
836 {
837 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
838
839 switch (opcode) {
840 case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
841 case MLX5_CMD_OP_MODIFY_CQ:
842 case MLX5_CMD_OP_MODIFY_RMP:
843 case MLX5_CMD_OP_MODIFY_SQ:
844 case MLX5_CMD_OP_MODIFY_RQ:
845 case MLX5_CMD_OP_MODIFY_RQT:
846 case MLX5_CMD_OP_MODIFY_TIR:
847 case MLX5_CMD_OP_MODIFY_TIS:
848 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
849 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
850 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
851 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
852 case MLX5_CMD_OP_RST2INIT_QP:
853 case MLX5_CMD_OP_INIT2RTR_QP:
854 case MLX5_CMD_OP_INIT2INIT_QP:
855 case MLX5_CMD_OP_RTR2RTS_QP:
856 case MLX5_CMD_OP_RTS2RTS_QP:
857 case MLX5_CMD_OP_SQERR2RTS_QP:
858 case MLX5_CMD_OP_2ERR_QP:
859 case MLX5_CMD_OP_2RST_QP:
860 case MLX5_CMD_OP_ARM_XRC_SRQ:
861 case MLX5_CMD_OP_ARM_RQ:
862 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
863 case MLX5_CMD_OP_ARM_XRQ:
864 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
865 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
866 case MLX5_CMD_OP_MODIFY_XRQ:
867 return true;
868 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
869 {
870 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
871
872 if (op_mod == 1)
873 return true;
874 return false;
875 }
876 default:
877 return false;
878 }
879 }
880
devx_is_obj_query_cmd(const void * in)881 static bool devx_is_obj_query_cmd(const void *in)
882 {
883 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
884
885 switch (opcode) {
886 case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
887 case MLX5_CMD_OP_QUERY_MKEY:
888 case MLX5_CMD_OP_QUERY_CQ:
889 case MLX5_CMD_OP_QUERY_RMP:
890 case MLX5_CMD_OP_QUERY_SQ:
891 case MLX5_CMD_OP_QUERY_RQ:
892 case MLX5_CMD_OP_QUERY_RQT:
893 case MLX5_CMD_OP_QUERY_TIR:
894 case MLX5_CMD_OP_QUERY_TIS:
895 case MLX5_CMD_OP_QUERY_Q_COUNTER:
896 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
897 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
898 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
899 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
900 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
901 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
902 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
903 case MLX5_CMD_OP_QUERY_QP:
904 case MLX5_CMD_OP_QUERY_SRQ:
905 case MLX5_CMD_OP_QUERY_XRC_SRQ:
906 case MLX5_CMD_OP_QUERY_DCT:
907 case MLX5_CMD_OP_QUERY_XRQ:
908 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
909 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
910 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
911 return true;
912 default:
913 return false;
914 }
915 }
916
devx_is_whitelist_cmd(void * in)917 static bool devx_is_whitelist_cmd(void *in)
918 {
919 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
920
921 switch (opcode) {
922 case MLX5_CMD_OP_QUERY_HCA_CAP:
923 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
924 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
925 case MLX5_CMD_OP_QUERY_ESW_FUNCTIONS:
926 return true;
927 default:
928 return false;
929 }
930 }
931
devx_get_uid(struct mlx5_ib_ucontext * c,void * cmd_in)932 static int devx_get_uid(struct mlx5_ib_ucontext *c, void *cmd_in)
933 {
934 if (devx_is_whitelist_cmd(cmd_in)) {
935 struct mlx5_ib_dev *dev;
936
937 if (c->devx_uid)
938 return c->devx_uid;
939
940 dev = to_mdev(c->ibucontext.device);
941 if (dev->devx_whitelist_uid)
942 return dev->devx_whitelist_uid;
943
944 return -EOPNOTSUPP;
945 }
946
947 if (!c->devx_uid)
948 return -EINVAL;
949
950 return c->devx_uid;
951 }
952
devx_is_general_cmd(void * in,struct mlx5_ib_dev * dev)953 static bool devx_is_general_cmd(void *in, struct mlx5_ib_dev *dev)
954 {
955 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
956
957 /* Pass all cmds for vhca_tunnel as general, tracking is done in FW */
958 if ((MLX5_CAP_GEN_64(dev->mdev, vhca_tunnel_commands) &&
959 MLX5_GET(general_obj_in_cmd_hdr, in, vhca_tunnel_id)) ||
960 (opcode >= MLX5_CMD_OP_GENERAL_START &&
961 opcode < MLX5_CMD_OP_GENERAL_END))
962 return true;
963
964 switch (opcode) {
965 case MLX5_CMD_OP_QUERY_HCA_CAP:
966 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
967 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
968 case MLX5_CMD_OP_QUERY_VPORT_STATE:
969 case MLX5_CMD_OP_QUERY_ADAPTER:
970 case MLX5_CMD_OP_QUERY_ISSI:
971 case MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT:
972 case MLX5_CMD_OP_QUERY_ROCE_ADDRESS:
973 case MLX5_CMD_OP_QUERY_VNIC_ENV:
974 case MLX5_CMD_OP_QUERY_VPORT_COUNTER:
975 case MLX5_CMD_OP_GET_DROPPED_PACKET_LOG:
976 case MLX5_CMD_OP_NOP:
977 case MLX5_CMD_OP_QUERY_CONG_STATUS:
978 case MLX5_CMD_OP_QUERY_CONG_PARAMS:
979 case MLX5_CMD_OP_QUERY_CONG_STATISTICS:
980 case MLX5_CMD_OP_QUERY_LAG:
981 case MLX5_CMD_OP_QUERY_ESW_FUNCTIONS:
982 return true;
983 default:
984 return false;
985 }
986 }
987
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)988 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)(
989 struct uverbs_attr_bundle *attrs)
990 {
991 struct mlx5_ib_ucontext *c;
992 struct mlx5_ib_dev *dev;
993 int user_vector;
994 int dev_eqn;
995 int err;
996
997 if (uverbs_copy_from(&user_vector, attrs,
998 MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC))
999 return -EFAULT;
1000
1001 c = devx_ufile2uctx(attrs);
1002 if (IS_ERR(c))
1003 return PTR_ERR(c);
1004 dev = to_mdev(c->ibucontext.device);
1005
1006 err = mlx5_comp_eqn_get(dev->mdev, user_vector, &dev_eqn);
1007 if (err < 0)
1008 return err;
1009
1010 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
1011 &dev_eqn, sizeof(dev_eqn)))
1012 return -EFAULT;
1013
1014 return 0;
1015 }
1016
1017 /*
1018 *Security note:
1019 * The hardware protection mechanism works like this: Each device object that
1020 * is subject to UAR doorbells (QP/SQ/CQ) gets a UAR ID (called uar_page in
1021 * the device specification manual) upon its creation. Then upon doorbell,
1022 * hardware fetches the object context for which the doorbell was rang, and
1023 * validates that the UAR through which the DB was rang matches the UAR ID
1024 * of the object.
1025 * If no match the doorbell is silently ignored by the hardware. Of course,
1026 * the user cannot ring a doorbell on a UAR that was not mapped to it.
1027 * Now in devx, as the devx kernel does not manipulate the QP/SQ/CQ command
1028 * mailboxes (except tagging them with UID), we expose to the user its UAR
1029 * ID, so it can embed it in these objects in the expected specification
1030 * format. So the only thing the user can do is hurt itself by creating a
1031 * QP/SQ/CQ with a UAR ID other than his, and then in this case other users
1032 * may ring a doorbell on its objects.
1033 * The consequence of that will be that another user can schedule a QP/SQ
1034 * of the buggy user for execution (just insert it to the hardware schedule
1035 * queue or arm its CQ for event generation), no further harm is expected.
1036 */
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_UAR)1037 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_UAR)(
1038 struct uverbs_attr_bundle *attrs)
1039 {
1040 struct mlx5_ib_ucontext *c;
1041 struct mlx5_ib_dev *dev;
1042 u32 user_idx;
1043 s32 dev_idx;
1044
1045 c = devx_ufile2uctx(attrs);
1046 if (IS_ERR(c))
1047 return PTR_ERR(c);
1048 dev = to_mdev(c->ibucontext.device);
1049
1050 if (uverbs_copy_from(&user_idx, attrs,
1051 MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX))
1052 return -EFAULT;
1053
1054 dev_idx = bfregn_to_uar_index(dev, &c->bfregi, user_idx, true);
1055 if (dev_idx < 0)
1056 return dev_idx;
1057
1058 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
1059 &dev_idx, sizeof(dev_idx)))
1060 return -EFAULT;
1061
1062 return 0;
1063 }
1064
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OTHER)1065 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OTHER)(
1066 struct uverbs_attr_bundle *attrs)
1067 {
1068 struct mlx5_ib_ucontext *c;
1069 struct mlx5_ib_dev *dev;
1070 void *cmd_in = uverbs_attr_get_alloced_ptr(
1071 attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN);
1072 int cmd_out_len = uverbs_attr_get_len(attrs,
1073 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT);
1074 void *cmd_out;
1075 int err, err2;
1076 int uid;
1077
1078 c = devx_ufile2uctx(attrs);
1079 if (IS_ERR(c))
1080 return PTR_ERR(c);
1081 dev = to_mdev(c->ibucontext.device);
1082
1083 uid = devx_get_uid(c, cmd_in);
1084 if (uid < 0)
1085 return uid;
1086
1087 /* Only white list of some general HCA commands are allowed for this method. */
1088 if (!devx_is_general_cmd(cmd_in, dev))
1089 return -EINVAL;
1090
1091 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1092 if (IS_ERR(cmd_out))
1093 return PTR_ERR(cmd_out);
1094
1095 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1096 err = mlx5_cmd_do(dev->mdev, cmd_in,
1097 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN),
1098 cmd_out, cmd_out_len);
1099 if (err && err != -EREMOTEIO)
1100 return err;
1101
1102 err2 = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT, cmd_out,
1103 cmd_out_len);
1104
1105 return err2 ?: err;
1106 }
1107
devx_obj_build_destroy_cmd(void * in,void * out,void * din,u32 * dinlen,u32 * obj_id)1108 static void devx_obj_build_destroy_cmd(void *in, void *out, void *din,
1109 u32 *dinlen,
1110 u32 *obj_id)
1111 {
1112 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
1113 u16 uid = MLX5_GET(general_obj_in_cmd_hdr, in, uid);
1114
1115 *obj_id = devx_get_created_obj_id(in, out, opcode);
1116 *dinlen = MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr);
1117 MLX5_SET(general_obj_in_cmd_hdr, din, uid, uid);
1118
1119 switch (opcode) {
1120 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
1121 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_GENERAL_OBJECT);
1122 MLX5_SET(general_obj_in_cmd_hdr, din, obj_id, *obj_id);
1123 MLX5_SET(general_obj_in_cmd_hdr, din, obj_type,
1124 MLX5_GET(general_obj_in_cmd_hdr, in, obj_type));
1125 break;
1126
1127 case MLX5_CMD_OP_CREATE_UMEM:
1128 MLX5_SET(destroy_umem_in, din, opcode,
1129 MLX5_CMD_OP_DESTROY_UMEM);
1130 MLX5_SET(destroy_umem_in, din, umem_id, *obj_id);
1131 break;
1132 case MLX5_CMD_OP_CREATE_MKEY:
1133 MLX5_SET(destroy_mkey_in, din, opcode,
1134 MLX5_CMD_OP_DESTROY_MKEY);
1135 MLX5_SET(destroy_mkey_in, din, mkey_index, *obj_id);
1136 break;
1137 case MLX5_CMD_OP_CREATE_CQ:
1138 MLX5_SET(destroy_cq_in, din, opcode, MLX5_CMD_OP_DESTROY_CQ);
1139 MLX5_SET(destroy_cq_in, din, cqn, *obj_id);
1140 break;
1141 case MLX5_CMD_OP_ALLOC_PD:
1142 MLX5_SET(dealloc_pd_in, din, opcode, MLX5_CMD_OP_DEALLOC_PD);
1143 MLX5_SET(dealloc_pd_in, din, pd, *obj_id);
1144 break;
1145 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
1146 MLX5_SET(dealloc_transport_domain_in, din, opcode,
1147 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN);
1148 MLX5_SET(dealloc_transport_domain_in, din, transport_domain,
1149 *obj_id);
1150 break;
1151 case MLX5_CMD_OP_CREATE_RMP:
1152 MLX5_SET(destroy_rmp_in, din, opcode, MLX5_CMD_OP_DESTROY_RMP);
1153 MLX5_SET(destroy_rmp_in, din, rmpn, *obj_id);
1154 break;
1155 case MLX5_CMD_OP_CREATE_SQ:
1156 MLX5_SET(destroy_sq_in, din, opcode, MLX5_CMD_OP_DESTROY_SQ);
1157 MLX5_SET(destroy_sq_in, din, sqn, *obj_id);
1158 break;
1159 case MLX5_CMD_OP_CREATE_RQ:
1160 MLX5_SET(destroy_rq_in, din, opcode, MLX5_CMD_OP_DESTROY_RQ);
1161 MLX5_SET(destroy_rq_in, din, rqn, *obj_id);
1162 break;
1163 case MLX5_CMD_OP_CREATE_RQT:
1164 MLX5_SET(destroy_rqt_in, din, opcode, MLX5_CMD_OP_DESTROY_RQT);
1165 MLX5_SET(destroy_rqt_in, din, rqtn, *obj_id);
1166 break;
1167 case MLX5_CMD_OP_CREATE_TIR:
1168 MLX5_SET(destroy_tir_in, din, opcode, MLX5_CMD_OP_DESTROY_TIR);
1169 MLX5_SET(destroy_tir_in, din, tirn, *obj_id);
1170 break;
1171 case MLX5_CMD_OP_CREATE_TIS:
1172 MLX5_SET(destroy_tis_in, din, opcode, MLX5_CMD_OP_DESTROY_TIS);
1173 MLX5_SET(destroy_tis_in, din, tisn, *obj_id);
1174 break;
1175 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
1176 MLX5_SET(dealloc_q_counter_in, din, opcode,
1177 MLX5_CMD_OP_DEALLOC_Q_COUNTER);
1178 MLX5_SET(dealloc_q_counter_in, din, counter_set_id, *obj_id);
1179 break;
1180 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
1181 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_table_in);
1182 MLX5_SET(destroy_flow_table_in, din, other_vport,
1183 MLX5_GET(create_flow_table_in, in, other_vport));
1184 MLX5_SET(destroy_flow_table_in, din, vport_number,
1185 MLX5_GET(create_flow_table_in, in, vport_number));
1186 MLX5_SET(destroy_flow_table_in, din, table_type,
1187 MLX5_GET(create_flow_table_in, in, table_type));
1188 MLX5_SET(destroy_flow_table_in, din, table_id, *obj_id);
1189 MLX5_SET(destroy_flow_table_in, din, opcode,
1190 MLX5_CMD_OP_DESTROY_FLOW_TABLE);
1191 break;
1192 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
1193 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_group_in);
1194 MLX5_SET(destroy_flow_group_in, din, other_vport,
1195 MLX5_GET(create_flow_group_in, in, other_vport));
1196 MLX5_SET(destroy_flow_group_in, din, vport_number,
1197 MLX5_GET(create_flow_group_in, in, vport_number));
1198 MLX5_SET(destroy_flow_group_in, din, table_type,
1199 MLX5_GET(create_flow_group_in, in, table_type));
1200 MLX5_SET(destroy_flow_group_in, din, table_id,
1201 MLX5_GET(create_flow_group_in, in, table_id));
1202 MLX5_SET(destroy_flow_group_in, din, group_id, *obj_id);
1203 MLX5_SET(destroy_flow_group_in, din, opcode,
1204 MLX5_CMD_OP_DESTROY_FLOW_GROUP);
1205 break;
1206 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
1207 *dinlen = MLX5_ST_SZ_BYTES(delete_fte_in);
1208 MLX5_SET(delete_fte_in, din, other_vport,
1209 MLX5_GET(set_fte_in, in, other_vport));
1210 MLX5_SET(delete_fte_in, din, vport_number,
1211 MLX5_GET(set_fte_in, in, vport_number));
1212 MLX5_SET(delete_fte_in, din, table_type,
1213 MLX5_GET(set_fte_in, in, table_type));
1214 MLX5_SET(delete_fte_in, din, table_id,
1215 MLX5_GET(set_fte_in, in, table_id));
1216 MLX5_SET(delete_fte_in, din, flow_index, *obj_id);
1217 MLX5_SET(delete_fte_in, din, opcode,
1218 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY);
1219 break;
1220 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
1221 MLX5_SET(dealloc_flow_counter_in, din, opcode,
1222 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER);
1223 MLX5_SET(dealloc_flow_counter_in, din, flow_counter_id,
1224 *obj_id);
1225 break;
1226 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
1227 MLX5_SET(dealloc_packet_reformat_context_in, din, opcode,
1228 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT);
1229 MLX5_SET(dealloc_packet_reformat_context_in, din,
1230 packet_reformat_id, *obj_id);
1231 break;
1232 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
1233 MLX5_SET(dealloc_modify_header_context_in, din, opcode,
1234 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT);
1235 MLX5_SET(dealloc_modify_header_context_in, din,
1236 modify_header_id, *obj_id);
1237 break;
1238 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
1239 *dinlen = MLX5_ST_SZ_BYTES(destroy_scheduling_element_in);
1240 MLX5_SET(destroy_scheduling_element_in, din,
1241 scheduling_hierarchy,
1242 MLX5_GET(create_scheduling_element_in, in,
1243 scheduling_hierarchy));
1244 MLX5_SET(destroy_scheduling_element_in, din,
1245 scheduling_element_id, *obj_id);
1246 MLX5_SET(destroy_scheduling_element_in, din, opcode,
1247 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT);
1248 break;
1249 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
1250 *dinlen = MLX5_ST_SZ_BYTES(delete_vxlan_udp_dport_in);
1251 MLX5_SET(delete_vxlan_udp_dport_in, din, vxlan_udp_port, *obj_id);
1252 MLX5_SET(delete_vxlan_udp_dport_in, din, opcode,
1253 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT);
1254 break;
1255 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
1256 *dinlen = MLX5_ST_SZ_BYTES(delete_l2_table_entry_in);
1257 MLX5_SET(delete_l2_table_entry_in, din, table_index, *obj_id);
1258 MLX5_SET(delete_l2_table_entry_in, din, opcode,
1259 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY);
1260 break;
1261 case MLX5_CMD_OP_CREATE_QP:
1262 MLX5_SET(destroy_qp_in, din, opcode, MLX5_CMD_OP_DESTROY_QP);
1263 MLX5_SET(destroy_qp_in, din, qpn, *obj_id);
1264 break;
1265 case MLX5_CMD_OP_CREATE_SRQ:
1266 MLX5_SET(destroy_srq_in, din, opcode, MLX5_CMD_OP_DESTROY_SRQ);
1267 MLX5_SET(destroy_srq_in, din, srqn, *obj_id);
1268 break;
1269 case MLX5_CMD_OP_CREATE_XRC_SRQ:
1270 MLX5_SET(destroy_xrc_srq_in, din, opcode,
1271 MLX5_CMD_OP_DESTROY_XRC_SRQ);
1272 MLX5_SET(destroy_xrc_srq_in, din, xrc_srqn, *obj_id);
1273 break;
1274 case MLX5_CMD_OP_CREATE_DCT:
1275 MLX5_SET(destroy_dct_in, din, opcode, MLX5_CMD_OP_DESTROY_DCT);
1276 MLX5_SET(destroy_dct_in, din, dctn, *obj_id);
1277 break;
1278 case MLX5_CMD_OP_CREATE_XRQ:
1279 MLX5_SET(destroy_xrq_in, din, opcode, MLX5_CMD_OP_DESTROY_XRQ);
1280 MLX5_SET(destroy_xrq_in, din, xrqn, *obj_id);
1281 break;
1282 case MLX5_CMD_OP_ATTACH_TO_MCG:
1283 *dinlen = MLX5_ST_SZ_BYTES(detach_from_mcg_in);
1284 MLX5_SET(detach_from_mcg_in, din, qpn,
1285 MLX5_GET(attach_to_mcg_in, in, qpn));
1286 memcpy(MLX5_ADDR_OF(detach_from_mcg_in, din, multicast_gid),
1287 MLX5_ADDR_OF(attach_to_mcg_in, in, multicast_gid),
1288 MLX5_FLD_SZ_BYTES(attach_to_mcg_in, multicast_gid));
1289 MLX5_SET(detach_from_mcg_in, din, opcode,
1290 MLX5_CMD_OP_DETACH_FROM_MCG);
1291 MLX5_SET(detach_from_mcg_in, din, qpn, *obj_id);
1292 break;
1293 case MLX5_CMD_OP_ALLOC_XRCD:
1294 MLX5_SET(dealloc_xrcd_in, din, opcode,
1295 MLX5_CMD_OP_DEALLOC_XRCD);
1296 MLX5_SET(dealloc_xrcd_in, din, xrcd, *obj_id);
1297 break;
1298 case MLX5_CMD_OP_CREATE_PSV:
1299 MLX5_SET(destroy_psv_in, din, opcode,
1300 MLX5_CMD_OP_DESTROY_PSV);
1301 MLX5_SET(destroy_psv_in, din, psvn, *obj_id);
1302 break;
1303 default:
1304 /* The entry must match to one of the devx_is_obj_create_cmd */
1305 WARN_ON(true);
1306 break;
1307 }
1308 }
1309
devx_handle_mkey_indirect(struct devx_obj * obj,struct mlx5_ib_dev * dev,void * in,void * out)1310 static int devx_handle_mkey_indirect(struct devx_obj *obj,
1311 struct mlx5_ib_dev *dev,
1312 void *in, void *out)
1313 {
1314 struct mlx5_ib_mkey *mkey = &obj->mkey;
1315 void *mkc;
1316 u8 key;
1317
1318 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1319 key = MLX5_GET(mkc, mkc, mkey_7_0);
1320 mkey->key = mlx5_idx_to_mkey(
1321 MLX5_GET(create_mkey_out, out, mkey_index)) | key;
1322 mkey->type = MLX5_MKEY_INDIRECT_DEVX;
1323 mkey->ndescs = MLX5_GET(mkc, mkc, translations_octword_size);
1324 init_waitqueue_head(&mkey->wait);
1325
1326 return mlx5r_store_odp_mkey(dev, mkey);
1327 }
1328
devx_handle_mkey_create(struct mlx5_ib_dev * dev,struct devx_obj * obj,void * in,int in_len)1329 static int devx_handle_mkey_create(struct mlx5_ib_dev *dev,
1330 struct devx_obj *obj,
1331 void *in, int in_len)
1332 {
1333 int min_len = MLX5_BYTE_OFF(create_mkey_in, memory_key_mkey_entry) +
1334 MLX5_FLD_SZ_BYTES(create_mkey_in,
1335 memory_key_mkey_entry);
1336 void *mkc;
1337 u8 access_mode;
1338
1339 if (in_len < min_len)
1340 return -EINVAL;
1341
1342 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1343
1344 access_mode = MLX5_GET(mkc, mkc, access_mode_1_0);
1345 access_mode |= MLX5_GET(mkc, mkc, access_mode_4_2) << 2;
1346
1347 if (access_mode == MLX5_MKC_ACCESS_MODE_KLMS ||
1348 access_mode == MLX5_MKC_ACCESS_MODE_KSM) {
1349 if (IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING))
1350 obj->flags |= DEVX_OBJ_FLAGS_INDIRECT_MKEY;
1351 return 0;
1352 }
1353
1354 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
1355 return 0;
1356 }
1357
devx_cleanup_subscription(struct mlx5_ib_dev * dev,struct devx_event_subscription * sub)1358 static void devx_cleanup_subscription(struct mlx5_ib_dev *dev,
1359 struct devx_event_subscription *sub)
1360 {
1361 struct devx_event *event;
1362 struct devx_obj_event *xa_val_level2;
1363
1364 if (sub->is_cleaned)
1365 return;
1366
1367 sub->is_cleaned = 1;
1368 list_del_rcu(&sub->xa_list);
1369
1370 if (list_empty(&sub->obj_list))
1371 return;
1372
1373 list_del_rcu(&sub->obj_list);
1374 /* check whether key level 1 for this obj_sub_list is empty */
1375 event = xa_load(&dev->devx_event_table.event_xa,
1376 sub->xa_key_level1);
1377 WARN_ON(!event);
1378
1379 xa_val_level2 = xa_load(&event->object_ids, sub->xa_key_level2);
1380 if (list_empty(&xa_val_level2->obj_sub_list)) {
1381 xa_erase(&event->object_ids,
1382 sub->xa_key_level2);
1383 kfree_rcu(xa_val_level2, rcu);
1384 }
1385 }
1386
devx_obj_cleanup(struct ib_uobject * uobject,enum rdma_remove_reason why,struct uverbs_attr_bundle * attrs)1387 static int devx_obj_cleanup(struct ib_uobject *uobject,
1388 enum rdma_remove_reason why,
1389 struct uverbs_attr_bundle *attrs)
1390 {
1391 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1392 struct mlx5_devx_event_table *devx_event_table;
1393 struct devx_obj *obj = uobject->object;
1394 struct devx_event_subscription *sub_entry, *tmp;
1395 struct mlx5_ib_dev *dev;
1396 int ret;
1397
1398 dev = mlx5_udata_to_mdev(&attrs->driver_udata);
1399 if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY &&
1400 xa_erase(&obj->ib_dev->odp_mkeys,
1401 mlx5_base_mkey(obj->mkey.key)))
1402 /*
1403 * The pagefault_single_data_segment() does commands against
1404 * the mmkey, we must wait for that to stop before freeing the
1405 * mkey, as another allocation could get the same mkey #.
1406 */
1407 mlx5r_deref_wait_odp_mkey(&obj->mkey);
1408
1409 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1410 ret = mlx5_core_destroy_dct(obj->ib_dev, &obj->core_dct);
1411 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1412 ret = mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1413 else
1414 ret = mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox,
1415 obj->dinlen, out, sizeof(out));
1416 if (ret)
1417 return ret;
1418
1419 devx_event_table = &dev->devx_event_table;
1420
1421 mutex_lock(&devx_event_table->event_xa_lock);
1422 list_for_each_entry_safe(sub_entry, tmp, &obj->event_sub, obj_list)
1423 devx_cleanup_subscription(dev, sub_entry);
1424 mutex_unlock(&devx_event_table->event_xa_lock);
1425
1426 kfree(obj);
1427 return ret;
1428 }
1429
devx_cq_comp(struct mlx5_core_cq * mcq,struct mlx5_eqe * eqe)1430 static void devx_cq_comp(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
1431 {
1432 struct devx_obj *obj = container_of(mcq, struct devx_obj, core_cq);
1433 struct mlx5_devx_event_table *table;
1434 struct devx_event *event;
1435 struct devx_obj_event *obj_event;
1436 u32 obj_id = mcq->cqn;
1437
1438 table = &obj->ib_dev->devx_event_table;
1439 rcu_read_lock();
1440 event = xa_load(&table->event_xa, MLX5_EVENT_TYPE_COMP);
1441 if (!event)
1442 goto out;
1443
1444 obj_event = xa_load(&event->object_ids, obj_id);
1445 if (!obj_event)
1446 goto out;
1447
1448 dispatch_event_fd(&obj_event->obj_sub_list, eqe);
1449 out:
1450 rcu_read_unlock();
1451 }
1452
is_apu_cq(struct mlx5_ib_dev * dev,const void * in)1453 static bool is_apu_cq(struct mlx5_ib_dev *dev, const void *in)
1454 {
1455 if (!MLX5_CAP_GEN(dev->mdev, apu) ||
1456 !MLX5_GET(cqc, MLX5_ADDR_OF(create_cq_in, in, cq_context), apu_cq))
1457 return false;
1458
1459 return true;
1460 }
1461
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)1462 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)(
1463 struct uverbs_attr_bundle *attrs)
1464 {
1465 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1466 int cmd_out_len = uverbs_attr_get_len(attrs,
1467 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT);
1468 int cmd_in_len = uverbs_attr_get_len(attrs,
1469 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1470 void *cmd_out;
1471 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1472 attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE);
1473 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1474 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1475 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1476 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1477 struct devx_obj *obj;
1478 u16 obj_type = 0;
1479 int err, err2 = 0;
1480 int uid;
1481 u32 obj_id;
1482 u16 opcode;
1483
1484 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1485 return -EINVAL;
1486
1487 uid = devx_get_uid(c, cmd_in);
1488 if (uid < 0)
1489 return uid;
1490
1491 if (!devx_is_obj_create_cmd(cmd_in, &opcode))
1492 return -EINVAL;
1493
1494 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1495 if (IS_ERR(cmd_out))
1496 return PTR_ERR(cmd_out);
1497
1498 obj = kzalloc(sizeof(struct devx_obj), GFP_KERNEL);
1499 if (!obj)
1500 return -ENOMEM;
1501
1502 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1503 if (opcode == MLX5_CMD_OP_CREATE_MKEY) {
1504 err = devx_handle_mkey_create(dev, obj, cmd_in, cmd_in_len);
1505 if (err)
1506 goto obj_free;
1507 } else {
1508 devx_set_umem_valid(cmd_in);
1509 }
1510
1511 if (opcode == MLX5_CMD_OP_CREATE_DCT) {
1512 obj->flags |= DEVX_OBJ_FLAGS_DCT;
1513 err = mlx5_core_create_dct(dev, &obj->core_dct, cmd_in,
1514 cmd_in_len, cmd_out, cmd_out_len);
1515 } else if (opcode == MLX5_CMD_OP_CREATE_CQ &&
1516 !is_apu_cq(dev, cmd_in)) {
1517 obj->flags |= DEVX_OBJ_FLAGS_CQ;
1518 obj->core_cq.comp = devx_cq_comp;
1519 err = mlx5_create_cq(dev->mdev, &obj->core_cq,
1520 cmd_in, cmd_in_len, cmd_out,
1521 cmd_out_len);
1522 } else {
1523 err = mlx5_cmd_do(dev->mdev, cmd_in, cmd_in_len,
1524 cmd_out, cmd_out_len);
1525 }
1526
1527 if (err == -EREMOTEIO)
1528 err2 = uverbs_copy_to(attrs,
1529 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT,
1530 cmd_out, cmd_out_len);
1531 if (err)
1532 goto obj_free;
1533
1534 if (opcode == MLX5_CMD_OP_ALLOC_FLOW_COUNTER) {
1535 u32 bulk = MLX5_GET(alloc_flow_counter_in,
1536 cmd_in,
1537 flow_counter_bulk_log_size);
1538
1539 if (bulk)
1540 bulk = 1 << bulk;
1541 else
1542 bulk = 128UL * MLX5_GET(alloc_flow_counter_in,
1543 cmd_in,
1544 flow_counter_bulk);
1545 obj->flow_counter_bulk_size = bulk;
1546 }
1547
1548 uobj->object = obj;
1549 INIT_LIST_HEAD(&obj->event_sub);
1550 obj->ib_dev = dev;
1551 devx_obj_build_destroy_cmd(cmd_in, cmd_out, obj->dinbox, &obj->dinlen,
1552 &obj_id);
1553 WARN_ON(obj->dinlen > MLX5_MAX_DESTROY_INBOX_SIZE_DW * sizeof(u32));
1554
1555 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT, cmd_out, cmd_out_len);
1556 if (err)
1557 goto obj_destroy;
1558
1559 if (opcode == MLX5_CMD_OP_CREATE_GENERAL_OBJECT)
1560 obj_type = MLX5_GET(general_obj_in_cmd_hdr, cmd_in, obj_type);
1561 obj->obj_id = get_enc_obj_id(opcode | obj_type << 16, obj_id);
1562
1563 if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) {
1564 err = devx_handle_mkey_indirect(obj, dev, cmd_in, cmd_out);
1565 if (err)
1566 goto obj_destroy;
1567 }
1568 return 0;
1569
1570 obj_destroy:
1571 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1572 mlx5_core_destroy_dct(obj->ib_dev, &obj->core_dct);
1573 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1574 mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1575 else
1576 mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox, obj->dinlen, out,
1577 sizeof(out));
1578 obj_free:
1579 kfree(obj);
1580 return err2 ?: err;
1581 }
1582
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_MODIFY)1583 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_MODIFY)(
1584 struct uverbs_attr_bundle *attrs)
1585 {
1586 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN);
1587 int cmd_out_len = uverbs_attr_get_len(attrs,
1588 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT);
1589 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1590 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE);
1591 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1592 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1593 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1594 void *cmd_out;
1595 int err, err2;
1596 int uid;
1597
1598 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1599 return -EINVAL;
1600
1601 uid = devx_get_uid(c, cmd_in);
1602 if (uid < 0)
1603 return uid;
1604
1605 if (!devx_is_obj_modify_cmd(cmd_in))
1606 return -EINVAL;
1607
1608 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1609 return -EINVAL;
1610
1611 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1612 if (IS_ERR(cmd_out))
1613 return PTR_ERR(cmd_out);
1614
1615 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1616 devx_set_umem_valid(cmd_in);
1617
1618 err = mlx5_cmd_do(mdev->mdev, cmd_in,
1619 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN),
1620 cmd_out, cmd_out_len);
1621 if (err && err != -EREMOTEIO)
1622 return err;
1623
1624 err2 = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
1625 cmd_out, cmd_out_len);
1626
1627 return err2 ?: err;
1628 }
1629
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_QUERY)1630 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_QUERY)(
1631 struct uverbs_attr_bundle *attrs)
1632 {
1633 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN);
1634 int cmd_out_len = uverbs_attr_get_len(attrs,
1635 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT);
1636 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1637 MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE);
1638 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1639 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1640 void *cmd_out;
1641 int err, err2;
1642 int uid;
1643 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1644
1645 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1646 return -EINVAL;
1647
1648 uid = devx_get_uid(c, cmd_in);
1649 if (uid < 0)
1650 return uid;
1651
1652 if (!devx_is_obj_query_cmd(cmd_in))
1653 return -EINVAL;
1654
1655 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1656 return -EINVAL;
1657
1658 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1659 if (IS_ERR(cmd_out))
1660 return PTR_ERR(cmd_out);
1661
1662 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1663 err = mlx5_cmd_do(mdev->mdev, cmd_in,
1664 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN),
1665 cmd_out, cmd_out_len);
1666 if (err && err != -EREMOTEIO)
1667 return err;
1668
1669 err2 = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
1670 cmd_out, cmd_out_len);
1671
1672 return err2 ?: err;
1673 }
1674
1675 struct devx_async_event_queue {
1676 spinlock_t lock;
1677 wait_queue_head_t poll_wait;
1678 struct list_head event_list;
1679 atomic_t bytes_in_use;
1680 u8 is_destroyed:1;
1681 };
1682
1683 struct devx_async_cmd_event_file {
1684 struct ib_uobject uobj;
1685 struct devx_async_event_queue ev_queue;
1686 struct mlx5_async_ctx async_ctx;
1687 };
1688
devx_init_event_queue(struct devx_async_event_queue * ev_queue)1689 static void devx_init_event_queue(struct devx_async_event_queue *ev_queue)
1690 {
1691 spin_lock_init(&ev_queue->lock);
1692 INIT_LIST_HEAD(&ev_queue->event_list);
1693 init_waitqueue_head(&ev_queue->poll_wait);
1694 atomic_set(&ev_queue->bytes_in_use, 0);
1695 ev_queue->is_destroyed = 0;
1696 }
1697
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC)1698 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC)(
1699 struct uverbs_attr_bundle *attrs)
1700 {
1701 struct devx_async_cmd_event_file *ev_file;
1702
1703 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1704 attrs, MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE);
1705 struct mlx5_ib_dev *mdev = mlx5_udata_to_mdev(&attrs->driver_udata);
1706
1707 ev_file = container_of(uobj, struct devx_async_cmd_event_file,
1708 uobj);
1709 devx_init_event_queue(&ev_file->ev_queue);
1710 mlx5_cmd_init_async_ctx(mdev->mdev, &ev_file->async_ctx);
1711 return 0;
1712 }
1713
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC)1714 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC)(
1715 struct uverbs_attr_bundle *attrs)
1716 {
1717 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1718 attrs, MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE);
1719 struct devx_async_event_file *ev_file;
1720 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1721 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1722 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1723 u32 flags;
1724 int err;
1725
1726 err = uverbs_get_flags32(&flags, attrs,
1727 MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
1728 MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA);
1729
1730 if (err)
1731 return err;
1732
1733 ev_file = container_of(uobj, struct devx_async_event_file,
1734 uobj);
1735 spin_lock_init(&ev_file->lock);
1736 INIT_LIST_HEAD(&ev_file->event_list);
1737 init_waitqueue_head(&ev_file->poll_wait);
1738 if (flags & MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA)
1739 ev_file->omit_data = 1;
1740 INIT_LIST_HEAD(&ev_file->subscribed_events_list);
1741 ev_file->dev = dev;
1742 get_device(&dev->ib_dev.dev);
1743 return 0;
1744 }
1745
devx_query_callback(int status,struct mlx5_async_work * context)1746 static void devx_query_callback(int status, struct mlx5_async_work *context)
1747 {
1748 struct devx_async_data *async_data =
1749 container_of(context, struct devx_async_data, cb_work);
1750 struct devx_async_cmd_event_file *ev_file = async_data->ev_file;
1751 struct devx_async_event_queue *ev_queue = &ev_file->ev_queue;
1752 unsigned long flags;
1753
1754 /*
1755 * Note that if the struct devx_async_cmd_event_file uobj begins to be
1756 * destroyed it will block at mlx5_cmd_cleanup_async_ctx() until this
1757 * routine returns, ensuring that it always remains valid here.
1758 */
1759 spin_lock_irqsave(&ev_queue->lock, flags);
1760 list_add_tail(&async_data->list, &ev_queue->event_list);
1761 spin_unlock_irqrestore(&ev_queue->lock, flags);
1762
1763 wake_up_interruptible(&ev_queue->poll_wait);
1764 }
1765
1766 #define MAX_ASYNC_BYTES_IN_USE (1024 * 1024) /* 1MB */
1767
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY)1768 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY)(
1769 struct uverbs_attr_bundle *attrs)
1770 {
1771 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs,
1772 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN);
1773 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1774 attrs,
1775 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_HANDLE);
1776 u16 cmd_out_len;
1777 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1778 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1779 struct ib_uobject *fd_uobj;
1780 int err;
1781 int uid;
1782 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1783 struct devx_async_cmd_event_file *ev_file;
1784 struct devx_async_data *async_data;
1785
1786 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1787 return -EINVAL;
1788
1789 uid = devx_get_uid(c, cmd_in);
1790 if (uid < 0)
1791 return uid;
1792
1793 if (!devx_is_obj_query_cmd(cmd_in))
1794 return -EINVAL;
1795
1796 err = uverbs_get_const(&cmd_out_len, attrs,
1797 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN);
1798 if (err)
1799 return err;
1800
1801 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1802 return -EINVAL;
1803
1804 fd_uobj = uverbs_attr_get_uobject(attrs,
1805 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD);
1806 if (IS_ERR(fd_uobj))
1807 return PTR_ERR(fd_uobj);
1808
1809 ev_file = container_of(fd_uobj, struct devx_async_cmd_event_file,
1810 uobj);
1811
1812 if (atomic_add_return(cmd_out_len, &ev_file->ev_queue.bytes_in_use) >
1813 MAX_ASYNC_BYTES_IN_USE) {
1814 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1815 return -EAGAIN;
1816 }
1817
1818 async_data = kvzalloc(struct_size(async_data, hdr.out_data,
1819 cmd_out_len), GFP_KERNEL);
1820 if (!async_data) {
1821 err = -ENOMEM;
1822 goto sub_bytes;
1823 }
1824
1825 err = uverbs_copy_from(&async_data->hdr.wr_id, attrs,
1826 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID);
1827 if (err)
1828 goto free_async;
1829
1830 async_data->cmd_out_len = cmd_out_len;
1831 async_data->mdev = mdev;
1832 async_data->ev_file = ev_file;
1833
1834 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1835 err = mlx5_cmd_exec_cb(&ev_file->async_ctx, cmd_in,
1836 uverbs_attr_get_len(attrs,
1837 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN),
1838 async_data->hdr.out_data,
1839 async_data->cmd_out_len,
1840 devx_query_callback, &async_data->cb_work);
1841
1842 if (err)
1843 goto free_async;
1844
1845 return 0;
1846
1847 free_async:
1848 kvfree(async_data);
1849 sub_bytes:
1850 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1851 return err;
1852 }
1853
1854 static void
subscribe_event_xa_dealloc(struct mlx5_devx_event_table * devx_event_table,u32 key_level1,bool is_level2,u32 key_level2)1855 subscribe_event_xa_dealloc(struct mlx5_devx_event_table *devx_event_table,
1856 u32 key_level1,
1857 bool is_level2,
1858 u32 key_level2)
1859 {
1860 struct devx_event *event;
1861 struct devx_obj_event *xa_val_level2;
1862
1863 /* Level 1 is valid for future use, no need to free */
1864 if (!is_level2)
1865 return;
1866
1867 event = xa_load(&devx_event_table->event_xa, key_level1);
1868 WARN_ON(!event);
1869
1870 xa_val_level2 = xa_load(&event->object_ids,
1871 key_level2);
1872 if (list_empty(&xa_val_level2->obj_sub_list)) {
1873 xa_erase(&event->object_ids,
1874 key_level2);
1875 kfree_rcu(xa_val_level2, rcu);
1876 }
1877 }
1878
1879 static int
subscribe_event_xa_alloc(struct mlx5_devx_event_table * devx_event_table,u32 key_level1,bool is_level2,u32 key_level2)1880 subscribe_event_xa_alloc(struct mlx5_devx_event_table *devx_event_table,
1881 u32 key_level1,
1882 bool is_level2,
1883 u32 key_level2)
1884 {
1885 struct devx_obj_event *obj_event;
1886 struct devx_event *event;
1887 int err;
1888
1889 event = xa_load(&devx_event_table->event_xa, key_level1);
1890 if (!event) {
1891 event = kzalloc(sizeof(*event), GFP_KERNEL);
1892 if (!event)
1893 return -ENOMEM;
1894
1895 INIT_LIST_HEAD(&event->unaffiliated_list);
1896 xa_init(&event->object_ids);
1897
1898 err = xa_insert(&devx_event_table->event_xa,
1899 key_level1,
1900 event,
1901 GFP_KERNEL);
1902 if (err) {
1903 kfree(event);
1904 return err;
1905 }
1906 }
1907
1908 if (!is_level2)
1909 return 0;
1910
1911 obj_event = xa_load(&event->object_ids, key_level2);
1912 if (!obj_event) {
1913 obj_event = kzalloc(sizeof(*obj_event), GFP_KERNEL);
1914 if (!obj_event)
1915 /* Level1 is valid for future use, no need to free */
1916 return -ENOMEM;
1917
1918 INIT_LIST_HEAD(&obj_event->obj_sub_list);
1919 err = xa_insert(&event->object_ids,
1920 key_level2,
1921 obj_event,
1922 GFP_KERNEL);
1923 if (err) {
1924 kfree(obj_event);
1925 return err;
1926 }
1927 }
1928
1929 return 0;
1930 }
1931
is_valid_events_legacy(int num_events,u16 * event_type_num_list,struct devx_obj * obj)1932 static bool is_valid_events_legacy(int num_events, u16 *event_type_num_list,
1933 struct devx_obj *obj)
1934 {
1935 int i;
1936
1937 for (i = 0; i < num_events; i++) {
1938 if (obj) {
1939 if (!is_legacy_obj_event_num(event_type_num_list[i]))
1940 return false;
1941 } else if (!is_legacy_unaffiliated_event_num(
1942 event_type_num_list[i])) {
1943 return false;
1944 }
1945 }
1946
1947 return true;
1948 }
1949
1950 #define MAX_SUPP_EVENT_NUM 255
is_valid_events(struct mlx5_core_dev * dev,int num_events,u16 * event_type_num_list,struct devx_obj * obj)1951 static bool is_valid_events(struct mlx5_core_dev *dev,
1952 int num_events, u16 *event_type_num_list,
1953 struct devx_obj *obj)
1954 {
1955 __be64 *aff_events;
1956 __be64 *unaff_events;
1957 int mask_entry;
1958 int mask_bit;
1959 int i;
1960
1961 if (MLX5_CAP_GEN(dev, event_cap)) {
1962 aff_events = MLX5_CAP_DEV_EVENT(dev,
1963 user_affiliated_events);
1964 unaff_events = MLX5_CAP_DEV_EVENT(dev,
1965 user_unaffiliated_events);
1966 } else {
1967 return is_valid_events_legacy(num_events, event_type_num_list,
1968 obj);
1969 }
1970
1971 for (i = 0; i < num_events; i++) {
1972 if (event_type_num_list[i] > MAX_SUPP_EVENT_NUM)
1973 return false;
1974
1975 mask_entry = event_type_num_list[i] / 64;
1976 mask_bit = event_type_num_list[i] % 64;
1977
1978 if (obj) {
1979 /* CQ completion */
1980 if (event_type_num_list[i] == 0)
1981 continue;
1982
1983 if (!(be64_to_cpu(aff_events[mask_entry]) &
1984 (1ull << mask_bit)))
1985 return false;
1986
1987 continue;
1988 }
1989
1990 if (!(be64_to_cpu(unaff_events[mask_entry]) &
1991 (1ull << mask_bit)))
1992 return false;
1993 }
1994
1995 return true;
1996 }
1997
1998 #define MAX_NUM_EVENTS 16
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)1999 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)(
2000 struct uverbs_attr_bundle *attrs)
2001 {
2002 struct ib_uobject *devx_uobj = uverbs_attr_get_uobject(
2003 attrs,
2004 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE);
2005 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
2006 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
2007 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
2008 struct ib_uobject *fd_uobj;
2009 struct devx_obj *obj = NULL;
2010 struct devx_async_event_file *ev_file;
2011 struct mlx5_devx_event_table *devx_event_table = &dev->devx_event_table;
2012 u16 *event_type_num_list;
2013 struct devx_event_subscription *event_sub, *tmp_sub;
2014 struct list_head sub_list;
2015 int redirect_fd;
2016 bool use_eventfd = false;
2017 int num_events;
2018 u16 obj_type = 0;
2019 u64 cookie = 0;
2020 u32 obj_id = 0;
2021 int err;
2022 int i;
2023
2024 if (!c->devx_uid)
2025 return -EINVAL;
2026
2027 if (!IS_ERR(devx_uobj)) {
2028 obj = (struct devx_obj *)devx_uobj->object;
2029 if (obj)
2030 obj_id = get_dec_obj_id(obj->obj_id);
2031 }
2032
2033 fd_uobj = uverbs_attr_get_uobject(attrs,
2034 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE);
2035 if (IS_ERR(fd_uobj))
2036 return PTR_ERR(fd_uobj);
2037
2038 ev_file = container_of(fd_uobj, struct devx_async_event_file,
2039 uobj);
2040
2041 if (uverbs_attr_is_valid(attrs,
2042 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM)) {
2043 err = uverbs_copy_from(&redirect_fd, attrs,
2044 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM);
2045 if (err)
2046 return err;
2047
2048 use_eventfd = true;
2049 }
2050
2051 if (uverbs_attr_is_valid(attrs,
2052 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE)) {
2053 if (use_eventfd)
2054 return -EINVAL;
2055
2056 err = uverbs_copy_from(&cookie, attrs,
2057 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE);
2058 if (err)
2059 return err;
2060 }
2061
2062 num_events = uverbs_attr_ptr_get_array_size(
2063 attrs, MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
2064 sizeof(u16));
2065
2066 if (num_events < 0)
2067 return num_events;
2068
2069 if (num_events > MAX_NUM_EVENTS)
2070 return -EINVAL;
2071
2072 event_type_num_list = uverbs_attr_get_alloced_ptr(attrs,
2073 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST);
2074
2075 if (!is_valid_events(dev->mdev, num_events, event_type_num_list, obj))
2076 return -EINVAL;
2077
2078 INIT_LIST_HEAD(&sub_list);
2079
2080 /* Protect from concurrent subscriptions to same XA entries to allow
2081 * both to succeed
2082 */
2083 mutex_lock(&devx_event_table->event_xa_lock);
2084 for (i = 0; i < num_events; i++) {
2085 u32 key_level1;
2086
2087 if (obj)
2088 obj_type = get_dec_obj_type(obj,
2089 event_type_num_list[i]);
2090 key_level1 = event_type_num_list[i] | obj_type << 16;
2091
2092 err = subscribe_event_xa_alloc(devx_event_table,
2093 key_level1,
2094 obj,
2095 obj_id);
2096 if (err)
2097 goto err;
2098
2099 event_sub = kzalloc(sizeof(*event_sub), GFP_KERNEL);
2100 if (!event_sub) {
2101 err = -ENOMEM;
2102 goto err;
2103 }
2104
2105 list_add_tail(&event_sub->event_list, &sub_list);
2106 uverbs_uobject_get(&ev_file->uobj);
2107 if (use_eventfd) {
2108 event_sub->eventfd =
2109 eventfd_ctx_fdget(redirect_fd);
2110
2111 if (IS_ERR(event_sub->eventfd)) {
2112 err = PTR_ERR(event_sub->eventfd);
2113 event_sub->eventfd = NULL;
2114 goto err;
2115 }
2116 }
2117
2118 event_sub->cookie = cookie;
2119 event_sub->ev_file = ev_file;
2120 /* May be needed upon cleanup the devx object/subscription */
2121 event_sub->xa_key_level1 = key_level1;
2122 event_sub->xa_key_level2 = obj_id;
2123 INIT_LIST_HEAD(&event_sub->obj_list);
2124 }
2125
2126 /* Once all the allocations and the XA data insertions were done we
2127 * can go ahead and add all the subscriptions to the relevant lists
2128 * without concern of a failure.
2129 */
2130 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2131 struct devx_event *event;
2132 struct devx_obj_event *obj_event;
2133
2134 list_del_init(&event_sub->event_list);
2135
2136 spin_lock_irq(&ev_file->lock);
2137 list_add_tail_rcu(&event_sub->file_list,
2138 &ev_file->subscribed_events_list);
2139 spin_unlock_irq(&ev_file->lock);
2140
2141 event = xa_load(&devx_event_table->event_xa,
2142 event_sub->xa_key_level1);
2143 WARN_ON(!event);
2144
2145 if (!obj) {
2146 list_add_tail_rcu(&event_sub->xa_list,
2147 &event->unaffiliated_list);
2148 continue;
2149 }
2150
2151 obj_event = xa_load(&event->object_ids, obj_id);
2152 WARN_ON(!obj_event);
2153 list_add_tail_rcu(&event_sub->xa_list,
2154 &obj_event->obj_sub_list);
2155 list_add_tail_rcu(&event_sub->obj_list,
2156 &obj->event_sub);
2157 }
2158
2159 mutex_unlock(&devx_event_table->event_xa_lock);
2160 return 0;
2161
2162 err:
2163 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2164 list_del(&event_sub->event_list);
2165
2166 subscribe_event_xa_dealloc(devx_event_table,
2167 event_sub->xa_key_level1,
2168 obj,
2169 obj_id);
2170
2171 if (event_sub->eventfd)
2172 eventfd_ctx_put(event_sub->eventfd);
2173 uverbs_uobject_put(&event_sub->ev_file->uobj);
2174 kfree(event_sub);
2175 }
2176
2177 mutex_unlock(&devx_event_table->event_xa_lock);
2178 return err;
2179 }
2180
devx_umem_get(struct mlx5_ib_dev * dev,struct ib_ucontext * ucontext,struct uverbs_attr_bundle * attrs,struct devx_umem * obj,u32 access_flags)2181 static int devx_umem_get(struct mlx5_ib_dev *dev, struct ib_ucontext *ucontext,
2182 struct uverbs_attr_bundle *attrs,
2183 struct devx_umem *obj, u32 access_flags)
2184 {
2185 u64 addr;
2186 size_t size;
2187 int err;
2188
2189 if (uverbs_copy_from(&addr, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR) ||
2190 uverbs_copy_from(&size, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_LEN))
2191 return -EFAULT;
2192
2193 err = ib_check_mr_access(&dev->ib_dev, access_flags);
2194 if (err)
2195 return err;
2196
2197 if (uverbs_attr_is_valid(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_DMABUF_FD)) {
2198 struct ib_umem_dmabuf *umem_dmabuf;
2199 int dmabuf_fd;
2200
2201 err = uverbs_get_raw_fd(&dmabuf_fd, attrs,
2202 MLX5_IB_ATTR_DEVX_UMEM_REG_DMABUF_FD);
2203 if (err)
2204 return -EFAULT;
2205
2206 umem_dmabuf = ib_umem_dmabuf_get_pinned(
2207 &dev->ib_dev, addr, size, dmabuf_fd, access_flags);
2208 if (IS_ERR(umem_dmabuf))
2209 return PTR_ERR(umem_dmabuf);
2210 obj->umem = &umem_dmabuf->umem;
2211 } else {
2212 obj->umem = ib_umem_get(&dev->ib_dev, addr, size, access_flags);
2213 if (IS_ERR(obj->umem))
2214 return PTR_ERR(obj->umem);
2215 }
2216 return 0;
2217 }
2218
devx_umem_find_best_pgsize(struct ib_umem * umem,unsigned long pgsz_bitmap)2219 static unsigned int devx_umem_find_best_pgsize(struct ib_umem *umem,
2220 unsigned long pgsz_bitmap)
2221 {
2222 unsigned long page_size;
2223
2224 /* Don't bother checking larger page sizes as offset must be zero and
2225 * total DEVX umem length must be equal to total umem length.
2226 */
2227 pgsz_bitmap &= GENMASK_ULL(max_t(u64, order_base_2(umem->length),
2228 PAGE_SHIFT),
2229 MLX5_ADAPTER_PAGE_SHIFT);
2230 if (!pgsz_bitmap)
2231 return 0;
2232
2233 page_size = ib_umem_find_best_pgoff(umem, pgsz_bitmap, U64_MAX);
2234 if (!page_size)
2235 return 0;
2236
2237 /* If the page_size is less than the CPU page size then we can use the
2238 * offset and create a umem which is a subset of the page list.
2239 * For larger page sizes we can't be sure the DMA list reflects the
2240 * VA so we must ensure that the umem extent is exactly equal to the
2241 * page list. Reduce the page size until one of these cases is true.
2242 */
2243 while ((ib_umem_dma_offset(umem, page_size) != 0 ||
2244 (umem->length % page_size) != 0) &&
2245 page_size > PAGE_SIZE)
2246 page_size /= 2;
2247
2248 return page_size;
2249 }
2250
devx_umem_reg_cmd_alloc(struct mlx5_ib_dev * dev,struct uverbs_attr_bundle * attrs,struct devx_umem * obj,struct devx_umem_reg_cmd * cmd,int access)2251 static int devx_umem_reg_cmd_alloc(struct mlx5_ib_dev *dev,
2252 struct uverbs_attr_bundle *attrs,
2253 struct devx_umem *obj,
2254 struct devx_umem_reg_cmd *cmd,
2255 int access)
2256 {
2257 unsigned long pgsz_bitmap;
2258 unsigned int page_size;
2259 __be64 *mtt;
2260 void *umem;
2261 int ret;
2262
2263 /*
2264 * If the user does not pass in pgsz_bitmap then the user promises not
2265 * to use umem_offset!=0 in any commands that allocate on top of the
2266 * umem.
2267 *
2268 * If the user wants to use a umem_offset then it must pass in
2269 * pgsz_bitmap which guides the maximum page size and thus maximum
2270 * object alignment inside the umem. See the PRM.
2271 *
2272 * Users are not allowed to use IOVA here, mkeys are not supported on
2273 * umem.
2274 */
2275 ret = uverbs_get_const_default(&pgsz_bitmap, attrs,
2276 MLX5_IB_ATTR_DEVX_UMEM_REG_PGSZ_BITMAP,
2277 GENMASK_ULL(63,
2278 min(PAGE_SHIFT, MLX5_ADAPTER_PAGE_SHIFT)));
2279 if (ret)
2280 return ret;
2281
2282 page_size = devx_umem_find_best_pgsize(obj->umem, pgsz_bitmap);
2283 if (!page_size)
2284 return -EINVAL;
2285
2286 cmd->inlen = MLX5_ST_SZ_BYTES(create_umem_in) +
2287 (MLX5_ST_SZ_BYTES(mtt) *
2288 ib_umem_num_dma_blocks(obj->umem, page_size));
2289 cmd->in = uverbs_zalloc(attrs, cmd->inlen);
2290 if (IS_ERR(cmd->in))
2291 return PTR_ERR(cmd->in);
2292
2293 umem = MLX5_ADDR_OF(create_umem_in, cmd->in, umem);
2294 mtt = (__be64 *)MLX5_ADDR_OF(umem, umem, mtt);
2295
2296 MLX5_SET(create_umem_in, cmd->in, opcode, MLX5_CMD_OP_CREATE_UMEM);
2297 MLX5_SET64(umem, umem, num_of_mtt,
2298 ib_umem_num_dma_blocks(obj->umem, page_size));
2299 MLX5_SET(umem, umem, log_page_size,
2300 order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);
2301 MLX5_SET(umem, umem, page_offset,
2302 ib_umem_dma_offset(obj->umem, page_size));
2303
2304 if (mlx5_umem_needs_ats(dev, obj->umem, access))
2305 MLX5_SET(umem, umem, ats, 1);
2306
2307 mlx5_ib_populate_pas(obj->umem, page_size, mtt,
2308 (obj->umem->writable ? MLX5_IB_MTT_WRITE : 0) |
2309 MLX5_IB_MTT_READ);
2310 return 0;
2311 }
2312
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)2313 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)(
2314 struct uverbs_attr_bundle *attrs)
2315 {
2316 struct devx_umem_reg_cmd cmd;
2317 struct devx_umem *obj;
2318 struct ib_uobject *uobj = uverbs_attr_get_uobject(
2319 attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2320 u32 obj_id;
2321 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
2322 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
2323 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
2324 int access_flags;
2325 int err;
2326
2327 if (!c->devx_uid)
2328 return -EINVAL;
2329
2330 err = uverbs_get_flags32(&access_flags, attrs,
2331 MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2332 IB_ACCESS_LOCAL_WRITE |
2333 IB_ACCESS_REMOTE_WRITE |
2334 IB_ACCESS_REMOTE_READ |
2335 IB_ACCESS_RELAXED_ORDERING);
2336 if (err)
2337 return err;
2338
2339 obj = kzalloc(sizeof(struct devx_umem), GFP_KERNEL);
2340 if (!obj)
2341 return -ENOMEM;
2342
2343 err = devx_umem_get(dev, &c->ibucontext, attrs, obj, access_flags);
2344 if (err)
2345 goto err_obj_free;
2346
2347 err = devx_umem_reg_cmd_alloc(dev, attrs, obj, &cmd, access_flags);
2348 if (err)
2349 goto err_umem_release;
2350
2351 MLX5_SET(create_umem_in, cmd.in, uid, c->devx_uid);
2352 err = mlx5_cmd_exec(dev->mdev, cmd.in, cmd.inlen, cmd.out,
2353 sizeof(cmd.out));
2354 if (err)
2355 goto err_umem_release;
2356
2357 obj->mdev = dev->mdev;
2358 uobj->object = obj;
2359 devx_obj_build_destroy_cmd(cmd.in, cmd.out, obj->dinbox, &obj->dinlen, &obj_id);
2360 uverbs_finalize_uobj_create(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2361
2362 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID, &obj_id,
2363 sizeof(obj_id));
2364 return err;
2365
2366 err_umem_release:
2367 ib_umem_release(obj->umem);
2368 err_obj_free:
2369 kfree(obj);
2370 return err;
2371 }
2372
devx_umem_cleanup(struct ib_uobject * uobject,enum rdma_remove_reason why,struct uverbs_attr_bundle * attrs)2373 static int devx_umem_cleanup(struct ib_uobject *uobject,
2374 enum rdma_remove_reason why,
2375 struct uverbs_attr_bundle *attrs)
2376 {
2377 struct devx_umem *obj = uobject->object;
2378 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
2379 int err;
2380
2381 err = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out));
2382 if (err)
2383 return err;
2384
2385 ib_umem_release(obj->umem);
2386 kfree(obj);
2387 return 0;
2388 }
2389
is_unaffiliated_event(struct mlx5_core_dev * dev,unsigned long event_type)2390 static bool is_unaffiliated_event(struct mlx5_core_dev *dev,
2391 unsigned long event_type)
2392 {
2393 __be64 *unaff_events;
2394 int mask_entry;
2395 int mask_bit;
2396
2397 if (!MLX5_CAP_GEN(dev, event_cap))
2398 return is_legacy_unaffiliated_event_num(event_type);
2399
2400 unaff_events = MLX5_CAP_DEV_EVENT(dev,
2401 user_unaffiliated_events);
2402 WARN_ON(event_type > MAX_SUPP_EVENT_NUM);
2403
2404 mask_entry = event_type / 64;
2405 mask_bit = event_type % 64;
2406
2407 if (!(be64_to_cpu(unaff_events[mask_entry]) & (1ull << mask_bit)))
2408 return false;
2409
2410 return true;
2411 }
2412
devx_get_obj_id_from_event(unsigned long event_type,void * data)2413 static u32 devx_get_obj_id_from_event(unsigned long event_type, void *data)
2414 {
2415 struct mlx5_eqe *eqe = data;
2416 u32 obj_id = 0;
2417
2418 switch (event_type) {
2419 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
2420 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
2421 case MLX5_EVENT_TYPE_PATH_MIG:
2422 case MLX5_EVENT_TYPE_COMM_EST:
2423 case MLX5_EVENT_TYPE_SQ_DRAINED:
2424 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
2425 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
2426 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
2427 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
2428 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
2429 obj_id = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff;
2430 break;
2431 case MLX5_EVENT_TYPE_XRQ_ERROR:
2432 obj_id = be32_to_cpu(eqe->data.xrq_err.type_xrqn) & 0xffffff;
2433 break;
2434 case MLX5_EVENT_TYPE_DCT_DRAINED:
2435 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
2436 obj_id = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff;
2437 break;
2438 case MLX5_EVENT_TYPE_CQ_ERROR:
2439 obj_id = be32_to_cpu(eqe->data.cq_err.cqn) & 0xffffff;
2440 break;
2441 default:
2442 obj_id = MLX5_GET(affiliated_event_header, &eqe->data, obj_id);
2443 break;
2444 }
2445
2446 return obj_id;
2447 }
2448
deliver_event(struct devx_event_subscription * event_sub,const void * data)2449 static int deliver_event(struct devx_event_subscription *event_sub,
2450 const void *data)
2451 {
2452 struct devx_async_event_file *ev_file;
2453 struct devx_async_event_data *event_data;
2454 unsigned long flags;
2455
2456 ev_file = event_sub->ev_file;
2457
2458 if (ev_file->omit_data) {
2459 spin_lock_irqsave(&ev_file->lock, flags);
2460 if (!list_empty(&event_sub->event_list) ||
2461 ev_file->is_destroyed) {
2462 spin_unlock_irqrestore(&ev_file->lock, flags);
2463 return 0;
2464 }
2465
2466 list_add_tail(&event_sub->event_list, &ev_file->event_list);
2467 spin_unlock_irqrestore(&ev_file->lock, flags);
2468 wake_up_interruptible(&ev_file->poll_wait);
2469 return 0;
2470 }
2471
2472 event_data = kzalloc(sizeof(*event_data) + sizeof(struct mlx5_eqe),
2473 GFP_ATOMIC);
2474 if (!event_data) {
2475 spin_lock_irqsave(&ev_file->lock, flags);
2476 ev_file->is_overflow_err = 1;
2477 spin_unlock_irqrestore(&ev_file->lock, flags);
2478 return -ENOMEM;
2479 }
2480
2481 event_data->hdr.cookie = event_sub->cookie;
2482 memcpy(event_data->hdr.out_data, data, sizeof(struct mlx5_eqe));
2483
2484 spin_lock_irqsave(&ev_file->lock, flags);
2485 if (!ev_file->is_destroyed)
2486 list_add_tail(&event_data->list, &ev_file->event_list);
2487 else
2488 kfree(event_data);
2489 spin_unlock_irqrestore(&ev_file->lock, flags);
2490 wake_up_interruptible(&ev_file->poll_wait);
2491
2492 return 0;
2493 }
2494
dispatch_event_fd(struct list_head * fd_list,const void * data)2495 static void dispatch_event_fd(struct list_head *fd_list,
2496 const void *data)
2497 {
2498 struct devx_event_subscription *item;
2499
2500 list_for_each_entry_rcu(item, fd_list, xa_list) {
2501 if (item->eventfd)
2502 eventfd_signal(item->eventfd);
2503 else
2504 deliver_event(item, data);
2505 }
2506 }
2507
devx_event_notifier(struct notifier_block * nb,unsigned long event_type,void * data)2508 static int devx_event_notifier(struct notifier_block *nb,
2509 unsigned long event_type, void *data)
2510 {
2511 struct mlx5_devx_event_table *table;
2512 struct mlx5_ib_dev *dev;
2513 struct devx_event *event;
2514 struct devx_obj_event *obj_event;
2515 u16 obj_type = 0;
2516 bool is_unaffiliated;
2517 u32 obj_id;
2518
2519 /* Explicit filtering to kernel events which may occur frequently */
2520 if (event_type == MLX5_EVENT_TYPE_CMD ||
2521 event_type == MLX5_EVENT_TYPE_PAGE_REQUEST)
2522 return NOTIFY_OK;
2523
2524 table = container_of(nb, struct mlx5_devx_event_table, devx_nb.nb);
2525 dev = container_of(table, struct mlx5_ib_dev, devx_event_table);
2526 is_unaffiliated = is_unaffiliated_event(dev->mdev, event_type);
2527
2528 if (!is_unaffiliated)
2529 obj_type = get_event_obj_type(event_type, data);
2530
2531 rcu_read_lock();
2532 event = xa_load(&table->event_xa, event_type | (obj_type << 16));
2533 if (!event) {
2534 rcu_read_unlock();
2535 return NOTIFY_DONE;
2536 }
2537
2538 if (is_unaffiliated) {
2539 dispatch_event_fd(&event->unaffiliated_list, data);
2540 rcu_read_unlock();
2541 return NOTIFY_OK;
2542 }
2543
2544 obj_id = devx_get_obj_id_from_event(event_type, data);
2545 obj_event = xa_load(&event->object_ids, obj_id);
2546 if (!obj_event) {
2547 rcu_read_unlock();
2548 return NOTIFY_DONE;
2549 }
2550
2551 dispatch_event_fd(&obj_event->obj_sub_list, data);
2552
2553 rcu_read_unlock();
2554 return NOTIFY_OK;
2555 }
2556
mlx5_ib_devx_init(struct mlx5_ib_dev * dev)2557 int mlx5_ib_devx_init(struct mlx5_ib_dev *dev)
2558 {
2559 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2560 int uid;
2561
2562 uid = mlx5_ib_devx_create(dev, false);
2563 if (uid > 0) {
2564 dev->devx_whitelist_uid = uid;
2565 xa_init(&table->event_xa);
2566 mutex_init(&table->event_xa_lock);
2567 MLX5_NB_INIT(&table->devx_nb, devx_event_notifier, NOTIFY_ANY);
2568 mlx5_eq_notifier_register(dev->mdev, &table->devx_nb);
2569 }
2570
2571 return 0;
2572 }
2573
mlx5_ib_devx_cleanup(struct mlx5_ib_dev * dev)2574 void mlx5_ib_devx_cleanup(struct mlx5_ib_dev *dev)
2575 {
2576 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2577 struct devx_event_subscription *sub, *tmp;
2578 struct devx_event *event;
2579 void *entry;
2580 unsigned long id;
2581
2582 if (dev->devx_whitelist_uid) {
2583 mlx5_eq_notifier_unregister(dev->mdev, &table->devx_nb);
2584 mutex_lock(&dev->devx_event_table.event_xa_lock);
2585 xa_for_each(&table->event_xa, id, entry) {
2586 event = entry;
2587 list_for_each_entry_safe(
2588 sub, tmp, &event->unaffiliated_list, xa_list)
2589 devx_cleanup_subscription(dev, sub);
2590 kfree(entry);
2591 }
2592 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2593 xa_destroy(&table->event_xa);
2594
2595 mlx5_ib_devx_destroy(dev, dev->devx_whitelist_uid);
2596 }
2597 }
2598
devx_async_cmd_event_read(struct file * filp,char __user * buf,size_t count,loff_t * pos)2599 static ssize_t devx_async_cmd_event_read(struct file *filp, char __user *buf,
2600 size_t count, loff_t *pos)
2601 {
2602 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2603 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2604 struct devx_async_data *event;
2605 int ret = 0;
2606 size_t eventsz;
2607
2608 spin_lock_irq(&ev_queue->lock);
2609
2610 while (list_empty(&ev_queue->event_list)) {
2611 spin_unlock_irq(&ev_queue->lock);
2612
2613 if (filp->f_flags & O_NONBLOCK)
2614 return -EAGAIN;
2615
2616 if (wait_event_interruptible(
2617 ev_queue->poll_wait,
2618 (!list_empty(&ev_queue->event_list) ||
2619 ev_queue->is_destroyed))) {
2620 return -ERESTARTSYS;
2621 }
2622
2623 spin_lock_irq(&ev_queue->lock);
2624 if (ev_queue->is_destroyed) {
2625 spin_unlock_irq(&ev_queue->lock);
2626 return -EIO;
2627 }
2628 }
2629
2630 event = list_entry(ev_queue->event_list.next,
2631 struct devx_async_data, list);
2632 eventsz = event->cmd_out_len +
2633 sizeof(struct mlx5_ib_uapi_devx_async_cmd_hdr);
2634
2635 if (eventsz > count) {
2636 spin_unlock_irq(&ev_queue->lock);
2637 return -ENOSPC;
2638 }
2639
2640 list_del(ev_queue->event_list.next);
2641 spin_unlock_irq(&ev_queue->lock);
2642
2643 if (copy_to_user(buf, &event->hdr, eventsz))
2644 ret = -EFAULT;
2645 else
2646 ret = eventsz;
2647
2648 atomic_sub(event->cmd_out_len, &ev_queue->bytes_in_use);
2649 kvfree(event);
2650 return ret;
2651 }
2652
devx_async_cmd_event_poll(struct file * filp,struct poll_table_struct * wait)2653 static __poll_t devx_async_cmd_event_poll(struct file *filp,
2654 struct poll_table_struct *wait)
2655 {
2656 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2657 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2658 __poll_t pollflags = 0;
2659
2660 poll_wait(filp, &ev_queue->poll_wait, wait);
2661
2662 spin_lock_irq(&ev_queue->lock);
2663 if (ev_queue->is_destroyed)
2664 pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2665 else if (!list_empty(&ev_queue->event_list))
2666 pollflags = EPOLLIN | EPOLLRDNORM;
2667 spin_unlock_irq(&ev_queue->lock);
2668
2669 return pollflags;
2670 }
2671
2672 static const struct file_operations devx_async_cmd_event_fops = {
2673 .owner = THIS_MODULE,
2674 .read = devx_async_cmd_event_read,
2675 .poll = devx_async_cmd_event_poll,
2676 .release = uverbs_uobject_fd_release,
2677 };
2678
devx_async_event_read(struct file * filp,char __user * buf,size_t count,loff_t * pos)2679 static ssize_t devx_async_event_read(struct file *filp, char __user *buf,
2680 size_t count, loff_t *pos)
2681 {
2682 struct devx_async_event_file *ev_file = filp->private_data;
2683 struct devx_event_subscription *event_sub;
2684 struct devx_async_event_data *event;
2685 int ret = 0;
2686 size_t eventsz;
2687 bool omit_data;
2688 void *event_data;
2689
2690 omit_data = ev_file->omit_data;
2691
2692 spin_lock_irq(&ev_file->lock);
2693
2694 if (ev_file->is_overflow_err) {
2695 ev_file->is_overflow_err = 0;
2696 spin_unlock_irq(&ev_file->lock);
2697 return -EOVERFLOW;
2698 }
2699
2700
2701 while (list_empty(&ev_file->event_list)) {
2702 spin_unlock_irq(&ev_file->lock);
2703
2704 if (filp->f_flags & O_NONBLOCK)
2705 return -EAGAIN;
2706
2707 if (wait_event_interruptible(ev_file->poll_wait,
2708 (!list_empty(&ev_file->event_list) ||
2709 ev_file->is_destroyed))) {
2710 return -ERESTARTSYS;
2711 }
2712
2713 spin_lock_irq(&ev_file->lock);
2714 if (ev_file->is_destroyed) {
2715 spin_unlock_irq(&ev_file->lock);
2716 return -EIO;
2717 }
2718 }
2719
2720 if (omit_data) {
2721 event_sub = list_first_entry(&ev_file->event_list,
2722 struct devx_event_subscription,
2723 event_list);
2724 eventsz = sizeof(event_sub->cookie);
2725 event_data = &event_sub->cookie;
2726 } else {
2727 event = list_first_entry(&ev_file->event_list,
2728 struct devx_async_event_data, list);
2729 eventsz = sizeof(struct mlx5_eqe) +
2730 sizeof(struct mlx5_ib_uapi_devx_async_event_hdr);
2731 event_data = &event->hdr;
2732 }
2733
2734 if (eventsz > count) {
2735 spin_unlock_irq(&ev_file->lock);
2736 return -EINVAL;
2737 }
2738
2739 if (omit_data)
2740 list_del_init(&event_sub->event_list);
2741 else
2742 list_del(&event->list);
2743
2744 spin_unlock_irq(&ev_file->lock);
2745
2746 if (copy_to_user(buf, event_data, eventsz))
2747 /* This points to an application issue, not a kernel concern */
2748 ret = -EFAULT;
2749 else
2750 ret = eventsz;
2751
2752 if (!omit_data)
2753 kfree(event);
2754 return ret;
2755 }
2756
devx_async_event_poll(struct file * filp,struct poll_table_struct * wait)2757 static __poll_t devx_async_event_poll(struct file *filp,
2758 struct poll_table_struct *wait)
2759 {
2760 struct devx_async_event_file *ev_file = filp->private_data;
2761 __poll_t pollflags = 0;
2762
2763 poll_wait(filp, &ev_file->poll_wait, wait);
2764
2765 spin_lock_irq(&ev_file->lock);
2766 if (ev_file->is_destroyed)
2767 pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2768 else if (!list_empty(&ev_file->event_list))
2769 pollflags = EPOLLIN | EPOLLRDNORM;
2770 spin_unlock_irq(&ev_file->lock);
2771
2772 return pollflags;
2773 }
2774
devx_free_subscription(struct rcu_head * rcu)2775 static void devx_free_subscription(struct rcu_head *rcu)
2776 {
2777 struct devx_event_subscription *event_sub =
2778 container_of(rcu, struct devx_event_subscription, rcu);
2779
2780 if (event_sub->eventfd)
2781 eventfd_ctx_put(event_sub->eventfd);
2782 uverbs_uobject_put(&event_sub->ev_file->uobj);
2783 kfree(event_sub);
2784 }
2785
2786 static const struct file_operations devx_async_event_fops = {
2787 .owner = THIS_MODULE,
2788 .read = devx_async_event_read,
2789 .poll = devx_async_event_poll,
2790 .release = uverbs_uobject_fd_release,
2791 };
2792
devx_async_cmd_event_destroy_uobj(struct ib_uobject * uobj,enum rdma_remove_reason why)2793 static void devx_async_cmd_event_destroy_uobj(struct ib_uobject *uobj,
2794 enum rdma_remove_reason why)
2795 {
2796 struct devx_async_cmd_event_file *comp_ev_file =
2797 container_of(uobj, struct devx_async_cmd_event_file,
2798 uobj);
2799 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2800 struct devx_async_data *entry, *tmp;
2801
2802 spin_lock_irq(&ev_queue->lock);
2803 ev_queue->is_destroyed = 1;
2804 spin_unlock_irq(&ev_queue->lock);
2805 wake_up_interruptible(&ev_queue->poll_wait);
2806
2807 mlx5_cmd_cleanup_async_ctx(&comp_ev_file->async_ctx);
2808
2809 spin_lock_irq(&comp_ev_file->ev_queue.lock);
2810 list_for_each_entry_safe(entry, tmp,
2811 &comp_ev_file->ev_queue.event_list, list) {
2812 list_del(&entry->list);
2813 kvfree(entry);
2814 }
2815 spin_unlock_irq(&comp_ev_file->ev_queue.lock);
2816 };
2817
devx_async_event_destroy_uobj(struct ib_uobject * uobj,enum rdma_remove_reason why)2818 static void devx_async_event_destroy_uobj(struct ib_uobject *uobj,
2819 enum rdma_remove_reason why)
2820 {
2821 struct devx_async_event_file *ev_file =
2822 container_of(uobj, struct devx_async_event_file,
2823 uobj);
2824 struct devx_event_subscription *event_sub, *event_sub_tmp;
2825 struct mlx5_ib_dev *dev = ev_file->dev;
2826
2827 spin_lock_irq(&ev_file->lock);
2828 ev_file->is_destroyed = 1;
2829
2830 /* free the pending events allocation */
2831 if (ev_file->omit_data) {
2832 struct devx_event_subscription *event_sub, *tmp;
2833
2834 list_for_each_entry_safe(event_sub, tmp, &ev_file->event_list,
2835 event_list)
2836 list_del_init(&event_sub->event_list);
2837
2838 } else {
2839 struct devx_async_event_data *entry, *tmp;
2840
2841 list_for_each_entry_safe(entry, tmp, &ev_file->event_list,
2842 list) {
2843 list_del(&entry->list);
2844 kfree(entry);
2845 }
2846 }
2847
2848 spin_unlock_irq(&ev_file->lock);
2849 wake_up_interruptible(&ev_file->poll_wait);
2850
2851 mutex_lock(&dev->devx_event_table.event_xa_lock);
2852 /* delete the subscriptions which are related to this FD */
2853 list_for_each_entry_safe(event_sub, event_sub_tmp,
2854 &ev_file->subscribed_events_list, file_list) {
2855 devx_cleanup_subscription(dev, event_sub);
2856 list_del_rcu(&event_sub->file_list);
2857 /* subscription may not be used by the read API any more */
2858 call_rcu(&event_sub->rcu, devx_free_subscription);
2859 }
2860 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2861
2862 put_device(&dev->ib_dev.dev);
2863 };
2864
2865 DECLARE_UVERBS_NAMED_METHOD(
2866 MLX5_IB_METHOD_DEVX_UMEM_REG,
2867 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE,
2868 MLX5_IB_OBJECT_DEVX_UMEM,
2869 UVERBS_ACCESS_NEW,
2870 UA_MANDATORY),
2871 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR,
2872 UVERBS_ATTR_TYPE(u64),
2873 UA_MANDATORY),
2874 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_LEN,
2875 UVERBS_ATTR_TYPE(u64),
2876 UA_MANDATORY),
2877 UVERBS_ATTR_RAW_FD(MLX5_IB_ATTR_DEVX_UMEM_REG_DMABUF_FD,
2878 UA_OPTIONAL),
2879 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2880 enum ib_access_flags),
2881 UVERBS_ATTR_CONST_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_PGSZ_BITMAP,
2882 u64),
2883 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID,
2884 UVERBS_ATTR_TYPE(u32),
2885 UA_MANDATORY));
2886
2887 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2888 MLX5_IB_METHOD_DEVX_UMEM_DEREG,
2889 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_DEREG_HANDLE,
2890 MLX5_IB_OBJECT_DEVX_UMEM,
2891 UVERBS_ACCESS_DESTROY,
2892 UA_MANDATORY));
2893
2894 DECLARE_UVERBS_NAMED_METHOD(
2895 MLX5_IB_METHOD_DEVX_QUERY_EQN,
2896 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC,
2897 UVERBS_ATTR_TYPE(u32),
2898 UA_MANDATORY),
2899 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
2900 UVERBS_ATTR_TYPE(u32),
2901 UA_MANDATORY));
2902
2903 DECLARE_UVERBS_NAMED_METHOD(
2904 MLX5_IB_METHOD_DEVX_QUERY_UAR,
2905 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX,
2906 UVERBS_ATTR_TYPE(u32),
2907 UA_MANDATORY),
2908 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
2909 UVERBS_ATTR_TYPE(u32),
2910 UA_MANDATORY));
2911
2912 DECLARE_UVERBS_NAMED_METHOD(
2913 MLX5_IB_METHOD_DEVX_OTHER,
2914 UVERBS_ATTR_PTR_IN(
2915 MLX5_IB_ATTR_DEVX_OTHER_CMD_IN,
2916 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2917 UA_MANDATORY,
2918 UA_ALLOC_AND_COPY),
2919 UVERBS_ATTR_PTR_OUT(
2920 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT,
2921 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2922 UA_MANDATORY));
2923
2924 DECLARE_UVERBS_NAMED_METHOD(
2925 MLX5_IB_METHOD_DEVX_OBJ_CREATE,
2926 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE,
2927 MLX5_IB_OBJECT_DEVX_OBJ,
2928 UVERBS_ACCESS_NEW,
2929 UA_MANDATORY),
2930 UVERBS_ATTR_PTR_IN(
2931 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN,
2932 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2933 UA_MANDATORY,
2934 UA_ALLOC_AND_COPY),
2935 UVERBS_ATTR_PTR_OUT(
2936 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT,
2937 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2938 UA_MANDATORY));
2939
2940 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2941 MLX5_IB_METHOD_DEVX_OBJ_DESTROY,
2942 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_DESTROY_HANDLE,
2943 MLX5_IB_OBJECT_DEVX_OBJ,
2944 UVERBS_ACCESS_DESTROY,
2945 UA_MANDATORY));
2946
2947 DECLARE_UVERBS_NAMED_METHOD(
2948 MLX5_IB_METHOD_DEVX_OBJ_MODIFY,
2949 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE,
2950 UVERBS_IDR_ANY_OBJECT,
2951 UVERBS_ACCESS_READ,
2952 UA_MANDATORY),
2953 UVERBS_ATTR_PTR_IN(
2954 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN,
2955 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2956 UA_MANDATORY,
2957 UA_ALLOC_AND_COPY),
2958 UVERBS_ATTR_PTR_OUT(
2959 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
2960 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2961 UA_MANDATORY));
2962
2963 DECLARE_UVERBS_NAMED_METHOD(
2964 MLX5_IB_METHOD_DEVX_OBJ_QUERY,
2965 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2966 UVERBS_IDR_ANY_OBJECT,
2967 UVERBS_ACCESS_READ,
2968 UA_MANDATORY),
2969 UVERBS_ATTR_PTR_IN(
2970 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2971 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2972 UA_MANDATORY,
2973 UA_ALLOC_AND_COPY),
2974 UVERBS_ATTR_PTR_OUT(
2975 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
2976 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2977 UA_MANDATORY));
2978
2979 DECLARE_UVERBS_NAMED_METHOD(
2980 MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY,
2981 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2982 UVERBS_IDR_ANY_OBJECT,
2983 UVERBS_ACCESS_READ,
2984 UA_MANDATORY),
2985 UVERBS_ATTR_PTR_IN(
2986 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2987 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2988 UA_MANDATORY,
2989 UA_ALLOC_AND_COPY),
2990 UVERBS_ATTR_CONST_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN,
2991 u16, UA_MANDATORY),
2992 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD,
2993 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2994 UVERBS_ACCESS_READ,
2995 UA_MANDATORY),
2996 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID,
2997 UVERBS_ATTR_TYPE(u64),
2998 UA_MANDATORY));
2999
3000 DECLARE_UVERBS_NAMED_METHOD(
3001 MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT,
3002 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE,
3003 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3004 UVERBS_ACCESS_READ,
3005 UA_MANDATORY),
3006 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE,
3007 MLX5_IB_OBJECT_DEVX_OBJ,
3008 UVERBS_ACCESS_READ,
3009 UA_OPTIONAL),
3010 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
3011 UVERBS_ATTR_MIN_SIZE(sizeof(u16)),
3012 UA_MANDATORY,
3013 UA_ALLOC_AND_COPY),
3014 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE,
3015 UVERBS_ATTR_TYPE(u64),
3016 UA_OPTIONAL),
3017 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM,
3018 UVERBS_ATTR_TYPE(u32),
3019 UA_OPTIONAL));
3020
3021 DECLARE_UVERBS_GLOBAL_METHODS(MLX5_IB_OBJECT_DEVX,
3022 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OTHER),
3023 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_UAR),
3024 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_EQN),
3025 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT));
3026
3027 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_OBJ,
3028 UVERBS_TYPE_ALLOC_IDR(devx_obj_cleanup),
3029 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_CREATE),
3030 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_DESTROY),
3031 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_MODIFY),
3032 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_QUERY),
3033 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY));
3034
3035 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_UMEM,
3036 UVERBS_TYPE_ALLOC_IDR(devx_umem_cleanup),
3037 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_REG),
3038 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_DEREG));
3039
3040
3041 DECLARE_UVERBS_NAMED_METHOD(
3042 MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC,
3043 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE,
3044 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
3045 UVERBS_ACCESS_NEW,
3046 UA_MANDATORY));
3047
3048 DECLARE_UVERBS_NAMED_OBJECT(
3049 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
3050 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_cmd_event_file),
3051 devx_async_cmd_event_destroy_uobj,
3052 &devx_async_cmd_event_fops, "[devx_async_cmd]",
3053 O_RDONLY),
3054 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC));
3055
3056 DECLARE_UVERBS_NAMED_METHOD(
3057 MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC,
3058 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE,
3059 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3060 UVERBS_ACCESS_NEW,
3061 UA_MANDATORY),
3062 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
3063 enum mlx5_ib_uapi_devx_create_event_channel_flags,
3064 UA_MANDATORY));
3065
3066 DECLARE_UVERBS_NAMED_OBJECT(
3067 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3068 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_event_file),
3069 devx_async_event_destroy_uobj,
3070 &devx_async_event_fops, "[devx_async_event]",
3071 O_RDONLY),
3072 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC));
3073
devx_is_supported(struct ib_device * device)3074 static bool devx_is_supported(struct ib_device *device)
3075 {
3076 struct mlx5_ib_dev *dev = to_mdev(device);
3077
3078 return MLX5_CAP_GEN(dev->mdev, log_max_uctx);
3079 }
3080
3081 const struct uapi_definition mlx5_ib_devx_defs[] = {
3082 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3083 MLX5_IB_OBJECT_DEVX,
3084 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3085 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3086 MLX5_IB_OBJECT_DEVX_OBJ,
3087 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3088 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3089 MLX5_IB_OBJECT_DEVX_UMEM,
3090 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3091 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3092 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
3093 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3094 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3095 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3096 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3097 {},
3098 };
3099