1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2019 Intel Corporation.
3
4 #include <linux/unaligned.h>
5 #include <linux/acpi.h>
6 #include <linux/clk.h>
7 #include <linux/delay.h>
8 #include <linux/gpio/consumer.h>
9 #include <linux/i2c.h>
10 #include <linux/module.h>
11 #include <linux/pm_runtime.h>
12 #include <linux/regulator/consumer.h>
13 #include <media/v4l2-ctrls.h>
14 #include <media/v4l2-device.h>
15 #include <media/v4l2-fwnode.h>
16
17 #define HI556_REG_VALUE_08BIT 1
18 #define HI556_REG_VALUE_16BIT 2
19 #define HI556_REG_VALUE_24BIT 3
20
21 #define HI556_LINK_FREQ_437MHZ 437000000ULL
22 #define HI556_MCLK 19200000
23 #define HI556_DATA_LANES 2
24 #define HI556_RGB_DEPTH 10
25
26 #define HI556_REG_CHIP_ID 0x0f16
27 #define HI556_CHIP_ID 0x0556
28
29 #define HI556_REG_MODE_SELECT 0x0a00
30 #define HI556_MODE_STANDBY 0x0000
31 #define HI556_MODE_STREAMING 0x0100
32
33 /* vertical-timings from sensor */
34 #define HI556_REG_FLL 0x0006
35 #define HI556_FLL_30FPS 0x0814
36 #define HI556_FLL_30FPS_MIN 0x0814
37 #define HI556_FLL_MAX 0x7fff
38
39 /* horizontal-timings from sensor */
40 #define HI556_REG_LLP 0x0008
41
42 /* Exposure controls from sensor */
43 #define HI556_REG_EXPOSURE 0x0074
44 #define HI556_EXPOSURE_MIN 6
45 #define HI556_EXPOSURE_MAX_MARGIN 2
46 #define HI556_EXPOSURE_STEP 1
47
48 /* Analog gain controls from sensor */
49 #define HI556_REG_ANALOG_GAIN 0x0077
50 #define HI556_ANAL_GAIN_MIN 0
51 #define HI556_ANAL_GAIN_MAX 240
52 #define HI556_ANAL_GAIN_STEP 1
53
54 /* Digital gain controls from sensor */
55 #define HI556_REG_MWB_GR_GAIN 0x0078
56 #define HI556_REG_MWB_GB_GAIN 0x007a
57 #define HI556_REG_MWB_R_GAIN 0x007c
58 #define HI556_REG_MWB_B_GAIN 0x007e
59 #define HI556_DGTL_GAIN_MIN 0
60 #define HI556_DGTL_GAIN_MAX 2048
61 #define HI556_DGTL_GAIN_STEP 1
62 #define HI556_DGTL_GAIN_DEFAULT 256
63
64 /* Test Pattern Control */
65 #define HI556_REG_ISP 0X0a05
66 #define HI556_REG_ISP_TPG_EN 0x01
67 #define HI556_REG_TEST_PATTERN 0x0201
68
69 /* HI556 native and active pixel array size. */
70 #define HI556_NATIVE_WIDTH 2592U
71 #define HI556_NATIVE_HEIGHT 1944U
72 #define HI556_PIXEL_ARRAY_LEFT 0U
73 #define HI556_PIXEL_ARRAY_TOP 0U
74 #define HI556_PIXEL_ARRAY_WIDTH 2592U
75 #define HI556_PIXEL_ARRAY_HEIGHT 1944U
76
77 enum {
78 HI556_LINK_FREQ_437MHZ_INDEX,
79 };
80
81 struct hi556_reg {
82 u16 address;
83 u16 val;
84 };
85
86 struct hi556_reg_list {
87 u32 num_of_regs;
88 const struct hi556_reg *regs;
89 };
90
91 struct hi556_link_freq_config {
92 const struct hi556_reg_list reg_list;
93 };
94
95 struct hi556_mode {
96 /* Frame width in pixels */
97 u32 width;
98
99 /* Frame height in pixels */
100 u32 height;
101
102 /* Analog crop rectangle. */
103 struct v4l2_rect crop;
104
105 /* Horizontal timining size */
106 u32 llp;
107
108 /* Default vertical timining size */
109 u32 fll_def;
110
111 /* Min vertical timining size */
112 u32 fll_min;
113
114 /* Link frequency needed for this resolution */
115 u32 link_freq_index;
116
117 /* Sensor register settings for this resolution */
118 const struct hi556_reg_list reg_list;
119 };
120
121 #define to_hi556(_sd) container_of(_sd, struct hi556, sd)
122
123 //SENSOR_INITIALIZATION
124 static const struct hi556_reg mipi_data_rate_874mbps[] = {
125 {0x0e00, 0x0102},
126 {0x0e02, 0x0102},
127 {0x0e0c, 0x0100},
128 {0x2000, 0x7400},
129 {0x2002, 0x001c},
130 {0x2004, 0x0242},
131 {0x2006, 0x0942},
132 {0x2008, 0x7007},
133 {0x200a, 0x0fd9},
134 {0x200c, 0x0259},
135 {0x200e, 0x7008},
136 {0x2010, 0x160e},
137 {0x2012, 0x0047},
138 {0x2014, 0x2118},
139 {0x2016, 0x0041},
140 {0x2018, 0x00d8},
141 {0x201a, 0x0145},
142 {0x201c, 0x0006},
143 {0x201e, 0x0181},
144 {0x2020, 0x13cc},
145 {0x2022, 0x2057},
146 {0x2024, 0x7001},
147 {0x2026, 0x0fca},
148 {0x2028, 0x00cb},
149 {0x202a, 0x009f},
150 {0x202c, 0x7002},
151 {0x202e, 0x13cc},
152 {0x2030, 0x019b},
153 {0x2032, 0x014d},
154 {0x2034, 0x2987},
155 {0x2036, 0x2766},
156 {0x2038, 0x0020},
157 {0x203a, 0x2060},
158 {0x203c, 0x0e5d},
159 {0x203e, 0x181d},
160 {0x2040, 0x2066},
161 {0x2042, 0x20c4},
162 {0x2044, 0x5000},
163 {0x2046, 0x0005},
164 {0x2048, 0x0000},
165 {0x204a, 0x01db},
166 {0x204c, 0x025a},
167 {0x204e, 0x00c0},
168 {0x2050, 0x0005},
169 {0x2052, 0x0006},
170 {0x2054, 0x0ad9},
171 {0x2056, 0x0259},
172 {0x2058, 0x0618},
173 {0x205a, 0x0258},
174 {0x205c, 0x2266},
175 {0x205e, 0x20c8},
176 {0x2060, 0x2060},
177 {0x2062, 0x707b},
178 {0x2064, 0x0fdd},
179 {0x2066, 0x81b8},
180 {0x2068, 0x5040},
181 {0x206a, 0x0020},
182 {0x206c, 0x5060},
183 {0x206e, 0x3143},
184 {0x2070, 0x5081},
185 {0x2072, 0x025c},
186 {0x2074, 0x7800},
187 {0x2076, 0x7400},
188 {0x2078, 0x001c},
189 {0x207a, 0x0242},
190 {0x207c, 0x0942},
191 {0x207e, 0x0bd9},
192 {0x2080, 0x0259},
193 {0x2082, 0x7008},
194 {0x2084, 0x160e},
195 {0x2086, 0x0047},
196 {0x2088, 0x2118},
197 {0x208a, 0x0041},
198 {0x208c, 0x00d8},
199 {0x208e, 0x0145},
200 {0x2090, 0x0006},
201 {0x2092, 0x0181},
202 {0x2094, 0x13cc},
203 {0x2096, 0x2057},
204 {0x2098, 0x7001},
205 {0x209a, 0x0fca},
206 {0x209c, 0x00cb},
207 {0x209e, 0x009f},
208 {0x20a0, 0x7002},
209 {0x20a2, 0x13cc},
210 {0x20a4, 0x019b},
211 {0x20a6, 0x014d},
212 {0x20a8, 0x2987},
213 {0x20aa, 0x2766},
214 {0x20ac, 0x0020},
215 {0x20ae, 0x2060},
216 {0x20b0, 0x0e5d},
217 {0x20b2, 0x181d},
218 {0x20b4, 0x2066},
219 {0x20b6, 0x20c4},
220 {0x20b8, 0x50a0},
221 {0x20ba, 0x0005},
222 {0x20bc, 0x0000},
223 {0x20be, 0x01db},
224 {0x20c0, 0x025a},
225 {0x20c2, 0x00c0},
226 {0x20c4, 0x0005},
227 {0x20c6, 0x0006},
228 {0x20c8, 0x0ad9},
229 {0x20ca, 0x0259},
230 {0x20cc, 0x0618},
231 {0x20ce, 0x0258},
232 {0x20d0, 0x2266},
233 {0x20d2, 0x20c8},
234 {0x20d4, 0x2060},
235 {0x20d6, 0x707b},
236 {0x20d8, 0x0fdd},
237 {0x20da, 0x86b8},
238 {0x20dc, 0x50e0},
239 {0x20de, 0x0020},
240 {0x20e0, 0x5100},
241 {0x20e2, 0x3143},
242 {0x20e4, 0x5121},
243 {0x20e6, 0x7800},
244 {0x20e8, 0x3140},
245 {0x20ea, 0x01c4},
246 {0x20ec, 0x01c1},
247 {0x20ee, 0x01c0},
248 {0x20f0, 0x01c4},
249 {0x20f2, 0x2700},
250 {0x20f4, 0x3d40},
251 {0x20f6, 0x7800},
252 {0x20f8, 0xffff},
253 {0x27fe, 0xe000},
254 {0x3000, 0x60f8},
255 {0x3002, 0x187f},
256 {0x3004, 0x7060},
257 {0x3006, 0x0114},
258 {0x3008, 0x60b0},
259 {0x300a, 0x1473},
260 {0x300c, 0x0013},
261 {0x300e, 0x140f},
262 {0x3010, 0x0040},
263 {0x3012, 0x100f},
264 {0x3014, 0x60f8},
265 {0x3016, 0x187f},
266 {0x3018, 0x7060},
267 {0x301a, 0x0114},
268 {0x301c, 0x60b0},
269 {0x301e, 0x1473},
270 {0x3020, 0x0013},
271 {0x3022, 0x140f},
272 {0x3024, 0x0040},
273 {0x3026, 0x000f},
274
275 {0x0b00, 0x0000},
276 {0x0b02, 0x0045},
277 {0x0b04, 0xb405},
278 {0x0b06, 0xc403},
279 {0x0b08, 0x0081},
280 {0x0b0a, 0x8252},
281 {0x0b0c, 0xf814},
282 {0x0b0e, 0xc618},
283 {0x0b10, 0xa828},
284 {0x0b12, 0x004c},
285 {0x0b14, 0x4068},
286 {0x0b16, 0x0000},
287 {0x0f30, 0x5b15},
288 {0x0f32, 0x7067},
289 {0x0954, 0x0009},
290 {0x0956, 0x0000},
291 {0x0958, 0xbb80},
292 {0x095a, 0x5140},
293 {0x0c00, 0x1110},
294 {0x0c02, 0x0011},
295 {0x0c04, 0x0000},
296 {0x0c06, 0x0200},
297 {0x0c10, 0x0040},
298 {0x0c12, 0x0040},
299 {0x0c14, 0x0040},
300 {0x0c16, 0x0040},
301 {0x0a10, 0x4000},
302 {0x3068, 0xf800},
303 {0x306a, 0xf876},
304 {0x006c, 0x0000},
305 {0x005e, 0x0200},
306 {0x000e, 0x0100},
307 {0x0e0a, 0x0001},
308 {0x004a, 0x0100},
309 {0x004c, 0x0000},
310 {0x004e, 0x0100},
311 {0x000c, 0x0022},
312 {0x0008, 0x0b00},
313 {0x005a, 0x0202},
314 {0x0012, 0x000e},
315 {0x0018, 0x0a33},
316 {0x0022, 0x0008},
317 {0x0028, 0x0017},
318 {0x0024, 0x0028},
319 {0x002a, 0x002d},
320 {0x0026, 0x0030},
321 {0x002c, 0x07c9},
322 {0x002e, 0x1111},
323 {0x0030, 0x1111},
324 {0x0032, 0x1111},
325 {0x0006, 0x07bc},
326 {0x0a22, 0x0000},
327 {0x0a12, 0x0a20},
328 {0x0a14, 0x0798},
329 {0x003e, 0x0000},
330 {0x0074, 0x080e},
331 {0x0070, 0x0407},
332 {0x0002, 0x0000},
333 {0x0a02, 0x0100},
334 {0x0a24, 0x0100},
335 {0x0046, 0x0000},
336 {0x0076, 0x0000},
337 {0x0060, 0x0000},
338 {0x0062, 0x0530},
339 {0x0064, 0x0500},
340 {0x0066, 0x0530},
341 {0x0068, 0x0500},
342 {0x0122, 0x0300},
343 {0x015a, 0xff08},
344 {0x0804, 0x0300},
345 {0x0806, 0x0100},
346 {0x005c, 0x0102},
347 {0x0a1a, 0x0800},
348 };
349
350 static const struct hi556_reg mode_2592x1944_regs[] = {
351 {0x0a00, 0x0000},
352 {0x0b0a, 0x8252},
353 {0x0f30, 0x5b15},
354 {0x0f32, 0x7067},
355 {0x004a, 0x0100},
356 {0x004c, 0x0000},
357 {0x004e, 0x0100},
358 {0x000c, 0x0022},
359 {0x0008, 0x0b00},
360 {0x005a, 0x0202},
361 {0x0012, 0x000e},
362 {0x0018, 0x0a33},
363 {0x0022, 0x0008},
364 {0x0028, 0x0017},
365 {0x0024, 0x0028},
366 {0x002a, 0x002d},
367 {0x0026, 0x0030},
368 {0x002c, 0x07c9},
369 {0x002e, 0x1111},
370 {0x0030, 0x1111},
371 {0x0032, 0x1111},
372 {0x0006, 0x0814},
373 {0x0a22, 0x0000},
374 {0x0a12, 0x0a20},
375 {0x0a14, 0x0798},
376 {0x003e, 0x0000},
377 {0x0074, 0x0812},
378 {0x0070, 0x0409},
379 {0x0804, 0x0300},
380 {0x0806, 0x0100},
381 {0x0a04, 0x014a},
382 {0x090c, 0x0fdc},
383 {0x090e, 0x002d},
384
385 {0x0902, 0x4319},
386 {0x0914, 0xc10a},
387 {0x0916, 0x071f},
388 {0x0918, 0x0408},
389 {0x091a, 0x0c0d},
390 {0x091c, 0x0f09},
391 {0x091e, 0x0a00},
392 {0x0958, 0xbb80},
393 };
394
395 static const struct hi556_reg mode_2592x1444_regs[] = {
396 {0x0a00, 0x0000},
397 {0x0b0a, 0x8252},
398 {0x0f30, 0xe545},
399 {0x0f32, 0x7067},
400 {0x004a, 0x0100},
401 {0x004c, 0x0000},
402 {0x000c, 0x0022},
403 {0x0008, 0x0b00},
404 {0x005a, 0x0202},
405 {0x0012, 0x000e},
406 {0x0018, 0x0a33},
407 {0x0022, 0x0008},
408 {0x0028, 0x0017},
409 {0x0024, 0x0122},
410 {0x002a, 0x0127},
411 {0x0026, 0x012a},
412 {0x002c, 0x06cf},
413 {0x002e, 0x1111},
414 {0x0030, 0x1111},
415 {0x0032, 0x1111},
416 {0x0006, 0x0821},
417 {0x0a22, 0x0000},
418 {0x0a12, 0x0a20},
419 {0x0a14, 0x05a4},
420 {0x003e, 0x0000},
421 {0x0074, 0x081f},
422 {0x0070, 0x040f},
423 {0x0804, 0x0300},
424 {0x0806, 0x0100},
425 {0x0a04, 0x014a},
426 {0x090c, 0x0fdc},
427 {0x090e, 0x002d},
428 {0x0902, 0x4319},
429 {0x0914, 0xc10a},
430 {0x0916, 0x071f},
431 {0x0918, 0x0408},
432 {0x091a, 0x0c0d},
433 {0x091c, 0x0f09},
434 {0x091e, 0x0a00},
435 {0x0958, 0xbb80},
436 };
437
438 static const struct hi556_reg mode_1296x972_regs[] = {
439 {0x0a00, 0x0000},
440 {0x0b0a, 0x8259},
441 {0x0f30, 0x5b15},
442 {0x0f32, 0x7167},
443 {0x004a, 0x0100},
444 {0x004c, 0x0000},
445 {0x004e, 0x0100},
446 {0x000c, 0x0122},
447 {0x0008, 0x0b00},
448 {0x005a, 0x0404},
449 {0x0012, 0x000c},
450 {0x0018, 0x0a33},
451 {0x0022, 0x0008},
452 {0x0028, 0x0017},
453 {0x0024, 0x0022},
454 {0x002a, 0x002b},
455 {0x0026, 0x0030},
456 {0x002c, 0x07c9},
457 {0x002e, 0x3311},
458 {0x0030, 0x3311},
459 {0x0032, 0x3311},
460 {0x0006, 0x0814},
461 {0x0a22, 0x0000},
462 {0x0a12, 0x0510},
463 {0x0a14, 0x03cc},
464 {0x003e, 0x0000},
465 {0x0074, 0x0812},
466 {0x0070, 0x0409},
467 {0x0804, 0x0308},
468 {0x0806, 0x0100},
469 {0x0a04, 0x016a},
470 {0x090e, 0x0010},
471 {0x090c, 0x09c0},
472
473 {0x0902, 0x4319},
474 {0x0914, 0xc106},
475 {0x0916, 0x040e},
476 {0x0918, 0x0304},
477 {0x091a, 0x0708},
478 {0x091c, 0x0e06},
479 {0x091e, 0x0300},
480 {0x0958, 0xbb80},
481 };
482
483 static const struct hi556_reg mode_1296x722_regs[] = {
484 {0x0a00, 0x0000},
485 {0x0b0a, 0x8259},
486 {0x0f30, 0x5b15},
487 {0x0f32, 0x7167},
488 {0x004a, 0x0100},
489 {0x004c, 0x0000},
490 {0x004e, 0x0100},
491 {0x000c, 0x0122},
492 {0x0008, 0x0b00},
493 {0x005a, 0x0404},
494 {0x0012, 0x000c},
495 {0x0018, 0x0a33},
496 {0x0022, 0x0008},
497 {0x0028, 0x0017},
498 {0x0024, 0x0022},
499 {0x002a, 0x002b},
500 {0x0026, 0x012a},
501 {0x002c, 0x06cf},
502 {0x002e, 0x3311},
503 {0x0030, 0x3311},
504 {0x0032, 0x3311},
505 {0x0006, 0x0814},
506 {0x0a22, 0x0000},
507 {0x0a12, 0x0510},
508 {0x0a14, 0x02d2},
509 {0x003e, 0x0000},
510 {0x0074, 0x0812},
511 {0x0070, 0x0409},
512 {0x0804, 0x0308},
513 {0x0806, 0x0100},
514 {0x0a04, 0x016a},
515 {0x090c, 0x09c0},
516 {0x090e, 0x0010},
517 {0x0902, 0x4319},
518 {0x0914, 0xc106},
519 {0x0916, 0x040e},
520 {0x0918, 0x0304},
521 {0x091a, 0x0708},
522 {0x091c, 0x0e06},
523 {0x091e, 0x0300},
524 {0x0958, 0xbb80},
525 };
526
527 static const char * const hi556_test_pattern_menu[] = {
528 "Disabled",
529 "Solid Colour",
530 "100% Colour Bars",
531 "Fade To Grey Colour Bars",
532 "PN9",
533 "Gradient Horizontal",
534 "Gradient Vertical",
535 "Check Board",
536 "Slant Pattern",
537 };
538
539 static const s64 link_freq_menu_items[] = {
540 HI556_LINK_FREQ_437MHZ,
541 };
542
543 static const struct hi556_link_freq_config link_freq_configs[] = {
544 [HI556_LINK_FREQ_437MHZ_INDEX] = {
545 .reg_list = {
546 .num_of_regs = ARRAY_SIZE(mipi_data_rate_874mbps),
547 .regs = mipi_data_rate_874mbps,
548 }
549 }
550 };
551
552 static const struct hi556_mode supported_modes[] = {
553 {
554 .width = HI556_PIXEL_ARRAY_WIDTH,
555 .height = HI556_PIXEL_ARRAY_HEIGHT,
556 .crop = {
557 .left = HI556_PIXEL_ARRAY_LEFT,
558 .top = HI556_PIXEL_ARRAY_TOP,
559 .width = HI556_PIXEL_ARRAY_WIDTH,
560 .height = HI556_PIXEL_ARRAY_HEIGHT
561 },
562 .fll_def = HI556_FLL_30FPS,
563 .fll_min = HI556_FLL_30FPS_MIN,
564 .llp = 0x0b00,
565 .reg_list = {
566 .num_of_regs = ARRAY_SIZE(mode_2592x1944_regs),
567 .regs = mode_2592x1944_regs,
568 },
569 .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX,
570 },
571 {
572 .width = HI556_PIXEL_ARRAY_WIDTH,
573 .height = 1444,
574 .crop = {
575 .left = HI556_PIXEL_ARRAY_LEFT,
576 .top = 250,
577 .width = HI556_PIXEL_ARRAY_WIDTH,
578 .height = 1444
579 },
580 .fll_def = 0x821,
581 .fll_min = 0x821,
582 .llp = 0x0b00,
583 .reg_list = {
584 .num_of_regs = ARRAY_SIZE(mode_2592x1444_regs),
585 .regs = mode_2592x1444_regs,
586 },
587 .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX,
588 },
589 {
590 .width = 1296,
591 .height = 972,
592 .crop = {
593 .left = HI556_PIXEL_ARRAY_LEFT,
594 .top = HI556_PIXEL_ARRAY_TOP,
595 .width = HI556_PIXEL_ARRAY_WIDTH,
596 .height = HI556_PIXEL_ARRAY_HEIGHT
597 },
598 .fll_def = HI556_FLL_30FPS,
599 .fll_min = HI556_FLL_30FPS_MIN,
600 .llp = 0x0b00,
601 .reg_list = {
602 .num_of_regs = ARRAY_SIZE(mode_1296x972_regs),
603 .regs = mode_1296x972_regs,
604 },
605 .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX,
606 },
607 {
608 .width = 1296,
609 .height = 722,
610 .crop = {
611 .left = HI556_PIXEL_ARRAY_LEFT,
612 .top = 250,
613 .width = HI556_PIXEL_ARRAY_WIDTH,
614 .height = 1444
615 },
616 .fll_def = HI556_FLL_30FPS,
617 .fll_min = HI556_FLL_30FPS_MIN,
618 .llp = 0x0b00,
619 .reg_list = {
620 .num_of_regs = ARRAY_SIZE(mode_1296x722_regs),
621 .regs = mode_1296x722_regs,
622 },
623 .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX,
624 },
625 };
626
627 struct hi556 {
628 struct v4l2_subdev sd;
629 struct media_pad pad;
630 struct v4l2_ctrl_handler ctrl_handler;
631
632 /* V4L2 Controls */
633 struct v4l2_ctrl *link_freq;
634 struct v4l2_ctrl *pixel_rate;
635 struct v4l2_ctrl *vblank;
636 struct v4l2_ctrl *hblank;
637 struct v4l2_ctrl *exposure;
638
639 /* GPIOs, clocks, etc. */
640 struct gpio_desc *reset_gpio;
641 struct clk *clk;
642 struct regulator *avdd;
643
644 /* Current mode */
645 const struct hi556_mode *cur_mode;
646
647 /* To serialize asynchronus callbacks */
648 struct mutex mutex;
649
650 /* True if the device has been identified */
651 bool identified;
652 };
653
to_pixel_rate(u32 f_index)654 static u64 to_pixel_rate(u32 f_index)
655 {
656 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * HI556_DATA_LANES;
657
658 do_div(pixel_rate, HI556_RGB_DEPTH);
659
660 return pixel_rate;
661 }
662
hi556_read_reg(struct hi556 * hi556,u16 reg,u16 len,u32 * val)663 static int hi556_read_reg(struct hi556 *hi556, u16 reg, u16 len, u32 *val)
664 {
665 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
666 struct i2c_msg msgs[2];
667 u8 addr_buf[2];
668 u8 data_buf[4] = {0};
669 int ret;
670
671 if (len > 4)
672 return -EINVAL;
673
674 put_unaligned_be16(reg, addr_buf);
675 msgs[0].addr = client->addr;
676 msgs[0].flags = 0;
677 msgs[0].len = sizeof(addr_buf);
678 msgs[0].buf = addr_buf;
679 msgs[1].addr = client->addr;
680 msgs[1].flags = I2C_M_RD;
681 msgs[1].len = len;
682 msgs[1].buf = &data_buf[4 - len];
683
684 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
685 if (ret != ARRAY_SIZE(msgs))
686 return -EIO;
687
688 *val = get_unaligned_be32(data_buf);
689
690 return 0;
691 }
692
hi556_write_reg(struct hi556 * hi556,u16 reg,u16 len,u32 val)693 static int hi556_write_reg(struct hi556 *hi556, u16 reg, u16 len, u32 val)
694 {
695 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
696 u8 buf[6];
697
698 if (len > 4)
699 return -EINVAL;
700
701 put_unaligned_be16(reg, buf);
702 put_unaligned_be32(val << 8 * (4 - len), buf + 2);
703 if (i2c_master_send(client, buf, len + 2) != len + 2)
704 return -EIO;
705
706 return 0;
707 }
708
hi556_write_reg_list(struct hi556 * hi556,const struct hi556_reg_list * r_list)709 static int hi556_write_reg_list(struct hi556 *hi556,
710 const struct hi556_reg_list *r_list)
711 {
712 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
713 unsigned int i;
714 int ret;
715
716 for (i = 0; i < r_list->num_of_regs; i++) {
717 ret = hi556_write_reg(hi556, r_list->regs[i].address,
718 HI556_REG_VALUE_16BIT,
719 r_list->regs[i].val);
720 if (ret) {
721 dev_err_ratelimited(&client->dev,
722 "failed to write reg 0x%4.4x. error = %d",
723 r_list->regs[i].address, ret);
724 return ret;
725 }
726 }
727
728 return 0;
729 }
730
hi556_update_digital_gain(struct hi556 * hi556,u32 d_gain)731 static int hi556_update_digital_gain(struct hi556 *hi556, u32 d_gain)
732 {
733 int ret;
734
735 ret = hi556_write_reg(hi556, HI556_REG_MWB_GR_GAIN,
736 HI556_REG_VALUE_16BIT, d_gain);
737 if (ret)
738 return ret;
739
740 ret = hi556_write_reg(hi556, HI556_REG_MWB_GB_GAIN,
741 HI556_REG_VALUE_16BIT, d_gain);
742 if (ret)
743 return ret;
744
745 ret = hi556_write_reg(hi556, HI556_REG_MWB_R_GAIN,
746 HI556_REG_VALUE_16BIT, d_gain);
747 if (ret)
748 return ret;
749
750 return hi556_write_reg(hi556, HI556_REG_MWB_B_GAIN,
751 HI556_REG_VALUE_16BIT, d_gain);
752 }
753
hi556_test_pattern(struct hi556 * hi556,u32 pattern)754 static int hi556_test_pattern(struct hi556 *hi556, u32 pattern)
755 {
756 int ret;
757 u32 val;
758
759 ret = hi556_read_reg(hi556, HI556_REG_ISP,
760 HI556_REG_VALUE_08BIT, &val);
761 if (ret)
762 return ret;
763
764 val = pattern ? (val | HI556_REG_ISP_TPG_EN) :
765 (val & ~HI556_REG_ISP_TPG_EN);
766
767 ret = hi556_write_reg(hi556, HI556_REG_ISP,
768 HI556_REG_VALUE_08BIT, val);
769 if (ret)
770 return ret;
771
772 val = pattern ? BIT(pattern - 1) : 0;
773
774 return hi556_write_reg(hi556, HI556_REG_TEST_PATTERN,
775 HI556_REG_VALUE_08BIT, val);
776 }
777
hi556_set_ctrl(struct v4l2_ctrl * ctrl)778 static int hi556_set_ctrl(struct v4l2_ctrl *ctrl)
779 {
780 struct hi556 *hi556 = container_of(ctrl->handler,
781 struct hi556, ctrl_handler);
782 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
783 s64 exposure_max;
784 int ret = 0;
785
786 /* Propagate change of current control to all related controls */
787 if (ctrl->id == V4L2_CID_VBLANK) {
788 /* Update max exposure while meeting expected vblanking */
789 exposure_max = hi556->cur_mode->height + ctrl->val -
790 HI556_EXPOSURE_MAX_MARGIN;
791 __v4l2_ctrl_modify_range(hi556->exposure,
792 hi556->exposure->minimum,
793 exposure_max, hi556->exposure->step,
794 exposure_max);
795 }
796
797 /* V4L2 controls values will be applied only when power is already up */
798 if (!pm_runtime_get_if_in_use(&client->dev))
799 return 0;
800
801 switch (ctrl->id) {
802 case V4L2_CID_ANALOGUE_GAIN:
803 ret = hi556_write_reg(hi556, HI556_REG_ANALOG_GAIN,
804 HI556_REG_VALUE_16BIT, ctrl->val);
805 break;
806
807 case V4L2_CID_DIGITAL_GAIN:
808 ret = hi556_update_digital_gain(hi556, ctrl->val);
809 break;
810
811 case V4L2_CID_EXPOSURE:
812 ret = hi556_write_reg(hi556, HI556_REG_EXPOSURE,
813 HI556_REG_VALUE_16BIT, ctrl->val);
814 break;
815
816 case V4L2_CID_VBLANK:
817 /* Update FLL that meets expected vertical blanking */
818 ret = hi556_write_reg(hi556, HI556_REG_FLL,
819 HI556_REG_VALUE_16BIT,
820 hi556->cur_mode->height + ctrl->val);
821 break;
822
823 case V4L2_CID_TEST_PATTERN:
824 ret = hi556_test_pattern(hi556, ctrl->val);
825 break;
826
827 default:
828 ret = -EINVAL;
829 break;
830 }
831
832 pm_runtime_put(&client->dev);
833
834 return ret;
835 }
836
837 static const struct v4l2_ctrl_ops hi556_ctrl_ops = {
838 .s_ctrl = hi556_set_ctrl,
839 };
840
hi556_init_controls(struct hi556 * hi556)841 static int hi556_init_controls(struct hi556 *hi556)
842 {
843 struct v4l2_ctrl_handler *ctrl_hdlr;
844 s64 exposure_max, h_blank;
845 int ret;
846
847 ctrl_hdlr = &hi556->ctrl_handler;
848 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
849 if (ret)
850 return ret;
851
852 ctrl_hdlr->lock = &hi556->mutex;
853 hi556->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &hi556_ctrl_ops,
854 V4L2_CID_LINK_FREQ,
855 ARRAY_SIZE(link_freq_menu_items) - 1,
856 0, link_freq_menu_items);
857 if (hi556->link_freq)
858 hi556->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
859
860 hi556->pixel_rate = v4l2_ctrl_new_std
861 (ctrl_hdlr, &hi556_ctrl_ops,
862 V4L2_CID_PIXEL_RATE, 0,
863 to_pixel_rate(HI556_LINK_FREQ_437MHZ_INDEX),
864 1,
865 to_pixel_rate(HI556_LINK_FREQ_437MHZ_INDEX));
866 hi556->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
867 V4L2_CID_VBLANK,
868 hi556->cur_mode->fll_min -
869 hi556->cur_mode->height,
870 HI556_FLL_MAX -
871 hi556->cur_mode->height, 1,
872 hi556->cur_mode->fll_def -
873 hi556->cur_mode->height);
874
875 h_blank = hi556->cur_mode->llp - hi556->cur_mode->width;
876
877 hi556->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
878 V4L2_CID_HBLANK, h_blank, h_blank, 1,
879 h_blank);
880 if (hi556->hblank)
881 hi556->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
882
883 v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
884 HI556_ANAL_GAIN_MIN, HI556_ANAL_GAIN_MAX,
885 HI556_ANAL_GAIN_STEP, HI556_ANAL_GAIN_MIN);
886 v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
887 HI556_DGTL_GAIN_MIN, HI556_DGTL_GAIN_MAX,
888 HI556_DGTL_GAIN_STEP, HI556_DGTL_GAIN_DEFAULT);
889 exposure_max = hi556->cur_mode->fll_def - HI556_EXPOSURE_MAX_MARGIN;
890 hi556->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
891 V4L2_CID_EXPOSURE,
892 HI556_EXPOSURE_MIN, exposure_max,
893 HI556_EXPOSURE_STEP,
894 exposure_max);
895 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &hi556_ctrl_ops,
896 V4L2_CID_TEST_PATTERN,
897 ARRAY_SIZE(hi556_test_pattern_menu) - 1,
898 0, 0, hi556_test_pattern_menu);
899 if (ctrl_hdlr->error)
900 return ctrl_hdlr->error;
901
902 hi556->sd.ctrl_handler = ctrl_hdlr;
903
904 return 0;
905 }
906
hi556_assign_pad_format(const struct hi556_mode * mode,struct v4l2_mbus_framefmt * fmt)907 static void hi556_assign_pad_format(const struct hi556_mode *mode,
908 struct v4l2_mbus_framefmt *fmt)
909 {
910 fmt->width = mode->width;
911 fmt->height = mode->height;
912 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
913 fmt->field = V4L2_FIELD_NONE;
914 }
915
hi556_identify_module(struct hi556 * hi556)916 static int hi556_identify_module(struct hi556 *hi556)
917 {
918 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
919 int ret;
920 u32 val;
921
922 if (hi556->identified)
923 return 0;
924
925 ret = hi556_read_reg(hi556, HI556_REG_CHIP_ID,
926 HI556_REG_VALUE_16BIT, &val);
927 if (ret)
928 return ret;
929
930 if (val != HI556_CHIP_ID) {
931 dev_err(&client->dev, "chip id mismatch: %x!=%x",
932 HI556_CHIP_ID, val);
933 return -ENXIO;
934 }
935
936 hi556->identified = true;
937
938 return 0;
939 }
940
941 static const struct v4l2_rect *
__hi556_get_pad_crop(struct hi556 * hi556,struct v4l2_subdev_state * sd_state,unsigned int pad,enum v4l2_subdev_format_whence which)942 __hi556_get_pad_crop(struct hi556 *hi556,
943 struct v4l2_subdev_state *sd_state,
944 unsigned int pad, enum v4l2_subdev_format_whence which)
945 {
946 switch (which) {
947 case V4L2_SUBDEV_FORMAT_TRY:
948 return v4l2_subdev_state_get_crop(sd_state, pad);
949 case V4L2_SUBDEV_FORMAT_ACTIVE:
950 return &hi556->cur_mode->crop;
951 }
952
953 return NULL;
954 }
955
hi556_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_selection * sel)956 static int hi556_get_selection(struct v4l2_subdev *sd,
957 struct v4l2_subdev_state *sd_state,
958 struct v4l2_subdev_selection *sel)
959 {
960 switch (sel->target) {
961 case V4L2_SEL_TGT_CROP: {
962 struct hi556 *hi556 = to_hi556(sd);
963
964 mutex_lock(&hi556->mutex);
965 sel->r = *__hi556_get_pad_crop(hi556, sd_state, sel->pad,
966 sel->which);
967 mutex_unlock(&hi556->mutex);
968
969 return 0;
970 }
971
972 case V4L2_SEL_TGT_NATIVE_SIZE:
973 sel->r.top = 0;
974 sel->r.left = 0;
975 sel->r.width = HI556_NATIVE_WIDTH;
976 sel->r.height = HI556_NATIVE_HEIGHT;
977
978 return 0;
979
980 case V4L2_SEL_TGT_CROP_DEFAULT:
981 case V4L2_SEL_TGT_CROP_BOUNDS:
982 sel->r.top = HI556_PIXEL_ARRAY_TOP;
983 sel->r.left = HI556_PIXEL_ARRAY_LEFT;
984 sel->r.width = HI556_PIXEL_ARRAY_WIDTH;
985 sel->r.height = HI556_PIXEL_ARRAY_HEIGHT;
986
987 return 0;
988 }
989
990 return -EINVAL;
991 }
992
hi556_start_streaming(struct hi556 * hi556)993 static int hi556_start_streaming(struct hi556 *hi556)
994 {
995 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
996 const struct hi556_reg_list *reg_list;
997 int link_freq_index, ret;
998
999 ret = hi556_identify_module(hi556);
1000 if (ret)
1001 return ret;
1002
1003 link_freq_index = hi556->cur_mode->link_freq_index;
1004 reg_list = &link_freq_configs[link_freq_index].reg_list;
1005 ret = hi556_write_reg_list(hi556, reg_list);
1006 if (ret) {
1007 dev_err(&client->dev, "failed to set plls");
1008 return ret;
1009 }
1010
1011 reg_list = &hi556->cur_mode->reg_list;
1012 ret = hi556_write_reg_list(hi556, reg_list);
1013 if (ret) {
1014 dev_err(&client->dev, "failed to set mode");
1015 return ret;
1016 }
1017
1018 ret = __v4l2_ctrl_handler_setup(hi556->sd.ctrl_handler);
1019 if (ret)
1020 return ret;
1021
1022 ret = hi556_write_reg(hi556, HI556_REG_MODE_SELECT,
1023 HI556_REG_VALUE_16BIT, HI556_MODE_STREAMING);
1024
1025 if (ret) {
1026 dev_err(&client->dev, "failed to set stream");
1027 return ret;
1028 }
1029
1030 return 0;
1031 }
1032
hi556_stop_streaming(struct hi556 * hi556)1033 static void hi556_stop_streaming(struct hi556 *hi556)
1034 {
1035 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
1036
1037 if (hi556_write_reg(hi556, HI556_REG_MODE_SELECT,
1038 HI556_REG_VALUE_16BIT, HI556_MODE_STANDBY))
1039 dev_err(&client->dev, "failed to set stream");
1040 }
1041
hi556_set_stream(struct v4l2_subdev * sd,int enable)1042 static int hi556_set_stream(struct v4l2_subdev *sd, int enable)
1043 {
1044 struct hi556 *hi556 = to_hi556(sd);
1045 struct i2c_client *client = v4l2_get_subdevdata(sd);
1046 int ret = 0;
1047
1048 mutex_lock(&hi556->mutex);
1049 if (enable) {
1050 ret = pm_runtime_resume_and_get(&client->dev);
1051 if (ret < 0) {
1052 mutex_unlock(&hi556->mutex);
1053 return ret;
1054 }
1055
1056 ret = hi556_start_streaming(hi556);
1057 if (ret) {
1058 enable = 0;
1059 hi556_stop_streaming(hi556);
1060 pm_runtime_put(&client->dev);
1061 }
1062 } else {
1063 hi556_stop_streaming(hi556);
1064 pm_runtime_put(&client->dev);
1065 }
1066
1067 mutex_unlock(&hi556->mutex);
1068
1069 return ret;
1070 }
1071
hi556_set_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)1072 static int hi556_set_format(struct v4l2_subdev *sd,
1073 struct v4l2_subdev_state *sd_state,
1074 struct v4l2_subdev_format *fmt)
1075 {
1076 struct hi556 *hi556 = to_hi556(sd);
1077 const struct hi556_mode *mode;
1078 s32 vblank_def, h_blank;
1079
1080 mode = v4l2_find_nearest_size(supported_modes,
1081 ARRAY_SIZE(supported_modes), width,
1082 height, fmt->format.width,
1083 fmt->format.height);
1084
1085 mutex_lock(&hi556->mutex);
1086 hi556_assign_pad_format(mode, &fmt->format);
1087 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1088 *v4l2_subdev_state_get_format(sd_state, fmt->pad) = fmt->format;
1089 } else {
1090 hi556->cur_mode = mode;
1091 __v4l2_ctrl_s_ctrl(hi556->link_freq, mode->link_freq_index);
1092 __v4l2_ctrl_s_ctrl_int64(hi556->pixel_rate,
1093 to_pixel_rate(mode->link_freq_index));
1094
1095 /* Update limits and set FPS to default */
1096 vblank_def = mode->fll_def - mode->height;
1097 __v4l2_ctrl_modify_range(hi556->vblank,
1098 mode->fll_min - mode->height,
1099 HI556_FLL_MAX - mode->height, 1,
1100 vblank_def);
1101 __v4l2_ctrl_s_ctrl(hi556->vblank, vblank_def);
1102
1103 h_blank = hi556->cur_mode->llp - hi556->cur_mode->width;
1104
1105 __v4l2_ctrl_modify_range(hi556->hblank, h_blank, h_blank, 1,
1106 h_blank);
1107 }
1108
1109 mutex_unlock(&hi556->mutex);
1110
1111 return 0;
1112 }
1113
hi556_get_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)1114 static int hi556_get_format(struct v4l2_subdev *sd,
1115 struct v4l2_subdev_state *sd_state,
1116 struct v4l2_subdev_format *fmt)
1117 {
1118 struct hi556 *hi556 = to_hi556(sd);
1119
1120 mutex_lock(&hi556->mutex);
1121 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
1122 fmt->format = *v4l2_subdev_state_get_format(sd_state,
1123 fmt->pad);
1124 else
1125 hi556_assign_pad_format(hi556->cur_mode, &fmt->format);
1126
1127 mutex_unlock(&hi556->mutex);
1128
1129 return 0;
1130 }
1131
hi556_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)1132 static int hi556_enum_mbus_code(struct v4l2_subdev *sd,
1133 struct v4l2_subdev_state *sd_state,
1134 struct v4l2_subdev_mbus_code_enum *code)
1135 {
1136 if (code->index > 0)
1137 return -EINVAL;
1138
1139 code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1140
1141 return 0;
1142 }
1143
hi556_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_size_enum * fse)1144 static int hi556_enum_frame_size(struct v4l2_subdev *sd,
1145 struct v4l2_subdev_state *sd_state,
1146 struct v4l2_subdev_frame_size_enum *fse)
1147 {
1148 if (fse->index >= ARRAY_SIZE(supported_modes))
1149 return -EINVAL;
1150
1151 if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
1152 return -EINVAL;
1153
1154 fse->min_width = supported_modes[fse->index].width;
1155 fse->max_width = fse->min_width;
1156 fse->min_height = supported_modes[fse->index].height;
1157 fse->max_height = fse->min_height;
1158
1159 return 0;
1160 }
1161
hi556_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1162 static int hi556_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1163 {
1164 struct hi556 *hi556 = to_hi556(sd);
1165 struct v4l2_rect *try_crop;
1166
1167 mutex_lock(&hi556->mutex);
1168 hi556_assign_pad_format(&supported_modes[0],
1169 v4l2_subdev_state_get_format(fh->state, 0));
1170
1171 /* Initialize try_crop rectangle. */
1172 try_crop = v4l2_subdev_state_get_crop(fh->state, 0);
1173 try_crop->top = HI556_PIXEL_ARRAY_TOP;
1174 try_crop->left = HI556_PIXEL_ARRAY_LEFT;
1175 try_crop->width = HI556_PIXEL_ARRAY_WIDTH;
1176 try_crop->height = HI556_PIXEL_ARRAY_HEIGHT;
1177
1178 mutex_unlock(&hi556->mutex);
1179
1180 return 0;
1181 }
1182
1183 static const struct v4l2_subdev_video_ops hi556_video_ops = {
1184 .s_stream = hi556_set_stream,
1185 };
1186
1187 static const struct v4l2_subdev_pad_ops hi556_pad_ops = {
1188 .set_fmt = hi556_set_format,
1189 .get_fmt = hi556_get_format,
1190 .get_selection = hi556_get_selection,
1191 .enum_mbus_code = hi556_enum_mbus_code,
1192 .enum_frame_size = hi556_enum_frame_size,
1193 };
1194
1195 static const struct v4l2_subdev_ops hi556_subdev_ops = {
1196 .video = &hi556_video_ops,
1197 .pad = &hi556_pad_ops,
1198 };
1199
1200 static const struct media_entity_operations hi556_subdev_entity_ops = {
1201 .link_validate = v4l2_subdev_link_validate,
1202 };
1203
1204 static const struct v4l2_subdev_internal_ops hi556_internal_ops = {
1205 .open = hi556_open,
1206 };
1207
hi556_check_hwcfg(struct device * dev)1208 static int hi556_check_hwcfg(struct device *dev)
1209 {
1210 struct fwnode_handle *ep;
1211 struct fwnode_handle *fwnode = dev_fwnode(dev);
1212 struct v4l2_fwnode_endpoint bus_cfg = {
1213 .bus_type = V4L2_MBUS_CSI2_DPHY
1214 };
1215 u32 mclk;
1216 int ret = 0;
1217 unsigned int i, j;
1218
1219 /*
1220 * Sometimes the fwnode graph is initialized by the bridge driver,
1221 * wait for this.
1222 */
1223 ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
1224 if (!ep)
1225 return -EPROBE_DEFER;
1226
1227 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
1228 fwnode_handle_put(ep);
1229 if (ret)
1230 return ret;
1231
1232 ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
1233 if (ret) {
1234 dev_err(dev, "can't get clock frequency");
1235 goto check_hwcfg_error;
1236 }
1237
1238 if (mclk != HI556_MCLK) {
1239 dev_err(dev, "external clock %d is not supported", mclk);
1240 ret = -EINVAL;
1241 goto check_hwcfg_error;
1242 }
1243
1244 if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2) {
1245 dev_err(dev, "number of CSI2 data lanes %d is not supported",
1246 bus_cfg.bus.mipi_csi2.num_data_lanes);
1247 ret = -EINVAL;
1248 goto check_hwcfg_error;
1249 }
1250
1251 if (!bus_cfg.nr_of_link_frequencies) {
1252 dev_err(dev, "no link frequencies defined");
1253 ret = -EINVAL;
1254 goto check_hwcfg_error;
1255 }
1256
1257 for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
1258 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
1259 if (link_freq_menu_items[i] ==
1260 bus_cfg.link_frequencies[j])
1261 break;
1262 }
1263
1264 if (j == bus_cfg.nr_of_link_frequencies) {
1265 dev_err(dev, "no link frequency %lld supported",
1266 link_freq_menu_items[i]);
1267 ret = -EINVAL;
1268 goto check_hwcfg_error;
1269 }
1270 }
1271
1272 check_hwcfg_error:
1273 v4l2_fwnode_endpoint_free(&bus_cfg);
1274
1275 return ret;
1276 }
1277
hi556_remove(struct i2c_client * client)1278 static void hi556_remove(struct i2c_client *client)
1279 {
1280 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1281 struct hi556 *hi556 = to_hi556(sd);
1282
1283 v4l2_async_unregister_subdev(sd);
1284 media_entity_cleanup(&sd->entity);
1285 v4l2_ctrl_handler_free(sd->ctrl_handler);
1286 pm_runtime_disable(&client->dev);
1287 mutex_destroy(&hi556->mutex);
1288 }
1289
hi556_suspend(struct device * dev)1290 static int hi556_suspend(struct device *dev)
1291 {
1292 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1293 struct hi556 *hi556 = to_hi556(sd);
1294 int ret;
1295
1296 gpiod_set_value_cansleep(hi556->reset_gpio, 1);
1297
1298 ret = regulator_disable(hi556->avdd);
1299 if (ret) {
1300 dev_err(dev, "failed to disable avdd: %d\n", ret);
1301 gpiod_set_value_cansleep(hi556->reset_gpio, 0);
1302 return ret;
1303 }
1304
1305 clk_disable_unprepare(hi556->clk);
1306 return 0;
1307 }
1308
hi556_resume(struct device * dev)1309 static int hi556_resume(struct device *dev)
1310 {
1311 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1312 struct hi556 *hi556 = to_hi556(sd);
1313 int ret;
1314
1315 ret = clk_prepare_enable(hi556->clk);
1316 if (ret)
1317 return ret;
1318
1319 ret = regulator_enable(hi556->avdd);
1320 if (ret) {
1321 dev_err(dev, "failed to enable avdd: %d\n", ret);
1322 clk_disable_unprepare(hi556->clk);
1323 return ret;
1324 }
1325
1326 if (hi556->reset_gpio) {
1327 /* Assert reset for at least 2ms on back to back off-on */
1328 usleep_range(2000, 2200);
1329 gpiod_set_value_cansleep(hi556->reset_gpio, 0);
1330 }
1331
1332 usleep_range(5000, 5500);
1333 return 0;
1334 }
1335
hi556_probe(struct i2c_client * client)1336 static int hi556_probe(struct i2c_client *client)
1337 {
1338 struct hi556 *hi556;
1339 bool full_power;
1340 int ret;
1341
1342 ret = hi556_check_hwcfg(&client->dev);
1343 if (ret) {
1344 dev_err(&client->dev, "failed to check HW configuration: %d",
1345 ret);
1346 return ret;
1347 }
1348
1349 hi556 = devm_kzalloc(&client->dev, sizeof(*hi556), GFP_KERNEL);
1350 if (!hi556)
1351 return -ENOMEM;
1352
1353 v4l2_i2c_subdev_init(&hi556->sd, client, &hi556_subdev_ops);
1354
1355 hi556->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
1356 GPIOD_OUT_HIGH);
1357 if (IS_ERR(hi556->reset_gpio))
1358 return dev_err_probe(&client->dev, PTR_ERR(hi556->reset_gpio),
1359 "failed to get reset GPIO\n");
1360
1361 hi556->clk = devm_clk_get_optional(&client->dev, "clk");
1362 if (IS_ERR(hi556->clk))
1363 return dev_err_probe(&client->dev, PTR_ERR(hi556->clk),
1364 "failed to get clock\n");
1365
1366 /* The regulator core will provide a "dummy" regulator if necessary */
1367 hi556->avdd = devm_regulator_get(&client->dev, "avdd");
1368 if (IS_ERR(hi556->avdd))
1369 return dev_err_probe(&client->dev, PTR_ERR(hi556->avdd),
1370 "failed to get avdd regulator\n");
1371
1372 full_power = acpi_dev_state_d0(&client->dev);
1373 if (full_power) {
1374 /* Ensure non ACPI managed resources are enabled */
1375 ret = hi556_resume(&client->dev);
1376 if (ret)
1377 return dev_err_probe(&client->dev, ret,
1378 "failed to power on sensor\n");
1379
1380 ret = hi556_identify_module(hi556);
1381 if (ret) {
1382 dev_err(&client->dev, "failed to find sensor: %d", ret);
1383 goto probe_error_power_off;
1384 }
1385 }
1386
1387 mutex_init(&hi556->mutex);
1388 hi556->cur_mode = &supported_modes[0];
1389 ret = hi556_init_controls(hi556);
1390 if (ret) {
1391 dev_err(&client->dev, "failed to init controls: %d", ret);
1392 goto probe_error_v4l2_ctrl_handler_free;
1393 }
1394
1395 hi556->sd.internal_ops = &hi556_internal_ops;
1396 hi556->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1397 hi556->sd.entity.ops = &hi556_subdev_entity_ops;
1398 hi556->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1399 hi556->pad.flags = MEDIA_PAD_FL_SOURCE;
1400 ret = media_entity_pads_init(&hi556->sd.entity, 1, &hi556->pad);
1401 if (ret) {
1402 dev_err(&client->dev, "failed to init entity pads: %d", ret);
1403 goto probe_error_v4l2_ctrl_handler_free;
1404 }
1405
1406 ret = v4l2_async_register_subdev_sensor(&hi556->sd);
1407 if (ret < 0) {
1408 dev_err(&client->dev, "failed to register V4L2 subdev: %d",
1409 ret);
1410 goto probe_error_media_entity_cleanup;
1411 }
1412
1413 /* Set the device's state to active if it's in D0 state. */
1414 if (full_power)
1415 pm_runtime_set_active(&client->dev);
1416 pm_runtime_enable(&client->dev);
1417 pm_runtime_idle(&client->dev);
1418
1419 return 0;
1420
1421 probe_error_media_entity_cleanup:
1422 media_entity_cleanup(&hi556->sd.entity);
1423
1424 probe_error_v4l2_ctrl_handler_free:
1425 v4l2_ctrl_handler_free(hi556->sd.ctrl_handler);
1426 mutex_destroy(&hi556->mutex);
1427
1428 probe_error_power_off:
1429 if (full_power)
1430 hi556_suspend(&client->dev);
1431
1432 return ret;
1433 }
1434
1435 static DEFINE_RUNTIME_DEV_PM_OPS(hi556_pm_ops, hi556_suspend, hi556_resume,
1436 NULL);
1437
1438 #ifdef CONFIG_ACPI
1439 static const struct acpi_device_id hi556_acpi_ids[] = {
1440 {"INT3537"},
1441 {}
1442 };
1443
1444 MODULE_DEVICE_TABLE(acpi, hi556_acpi_ids);
1445 #endif
1446
1447 static struct i2c_driver hi556_i2c_driver = {
1448 .driver = {
1449 .name = "hi556",
1450 .acpi_match_table = ACPI_PTR(hi556_acpi_ids),
1451 .pm = pm_sleep_ptr(&hi556_pm_ops),
1452 },
1453 .probe = hi556_probe,
1454 .remove = hi556_remove,
1455 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
1456 };
1457
1458 module_i2c_driver(hi556_i2c_driver);
1459
1460 MODULE_AUTHOR("Shawn Tu");
1461 MODULE_DESCRIPTION("Hynix HI556 sensor driver");
1462 MODULE_LICENSE("GPL v2");
1463