1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2017 Linaro Ltd.
5 */
6 #include <linux/init.h>
7 #include <linux/interconnect.h>
8 #include <linux/io.h>
9 #include <linux/ioctl.h>
10 #include <linux/delay.h>
11 #include <linux/devcoredump.h>
12 #include <linux/list.h>
13 #include <linux/module.h>
14 #include <linux/of.h>
15 #include <linux/of_platform.h>
16 #include <linux/platform_device.h>
17 #include <linux/slab.h>
18 #include <linux/types.h>
19 #include <linux/pm_domain.h>
20 #include <linux/pm_runtime.h>
21 #include <media/videobuf2-v4l2.h>
22 #include <media/v4l2-mem2mem.h>
23 #include <media/v4l2-ioctl.h>
24
25 #include "core.h"
26 #include "firmware.h"
27 #include "pm_helpers.h"
28 #include "hfi_venus_io.h"
29
venus_coredump(struct venus_core * core)30 static void venus_coredump(struct venus_core *core)
31 {
32 struct device *dev;
33 phys_addr_t mem_phys;
34 size_t mem_size;
35 void *mem_va;
36 void *data;
37
38 dev = core->dev;
39 mem_phys = core->fw.mem_phys;
40 mem_size = core->fw.mem_size;
41
42 mem_va = memremap(mem_phys, mem_size, MEMREMAP_WC);
43 if (!mem_va)
44 return;
45
46 data = vmalloc(mem_size);
47 if (!data) {
48 memunmap(mem_va);
49 return;
50 }
51
52 memcpy(data, mem_va, mem_size);
53 memunmap(mem_va);
54 dev_coredumpv(dev, data, mem_size, GFP_KERNEL);
55 }
56
venus_event_notify(struct venus_core * core,u32 event)57 static void venus_event_notify(struct venus_core *core, u32 event)
58 {
59 struct venus_inst *inst;
60
61 switch (event) {
62 case EVT_SYS_WATCHDOG_TIMEOUT:
63 case EVT_SYS_ERROR:
64 break;
65 default:
66 return;
67 }
68
69 mutex_lock(&core->lock);
70 set_bit(0, &core->sys_error);
71 set_bit(0, &core->dump_core);
72 list_for_each_entry(inst, &core->instances, list)
73 inst->ops->event_notify(inst, EVT_SESSION_ERROR, NULL);
74 mutex_unlock(&core->lock);
75
76 disable_irq_nosync(core->irq);
77 schedule_delayed_work(&core->work, msecs_to_jiffies(10));
78 }
79
80 static const struct hfi_core_ops venus_core_ops = {
81 .event_notify = venus_event_notify,
82 };
83
84 #define RPM_WAIT_FOR_IDLE_MAX_ATTEMPTS 10
85
venus_sys_error_handler(struct work_struct * work)86 static void venus_sys_error_handler(struct work_struct *work)
87 {
88 struct venus_core *core =
89 container_of(work, struct venus_core, work.work);
90 int ret, i, max_attempts = RPM_WAIT_FOR_IDLE_MAX_ATTEMPTS;
91 const char *err_msg = "";
92 bool failed = false;
93
94 ret = pm_runtime_get_sync(core->dev);
95 if (ret < 0) {
96 err_msg = "resume runtime PM";
97 max_attempts = 0;
98 failed = true;
99 }
100
101 core->ops->core_deinit(core);
102 core->state = CORE_UNINIT;
103
104 for (i = 0; i < max_attempts; i++) {
105 if (!pm_runtime_active(core->dev_dec) && !pm_runtime_active(core->dev_enc))
106 break;
107 msleep(10);
108 }
109
110 mutex_lock(&core->lock);
111
112 venus_shutdown(core);
113
114 if (test_bit(0, &core->dump_core)) {
115 venus_coredump(core);
116 clear_bit(0, &core->dump_core);
117 }
118
119 pm_runtime_put_sync(core->dev);
120
121 for (i = 0; i < max_attempts; i++) {
122 if (!core->pmdomains ||
123 !pm_runtime_active(core->pmdomains->pd_devs[0]))
124 break;
125 usleep_range(1000, 1500);
126 }
127
128 hfi_reinit(core);
129
130 ret = pm_runtime_get_sync(core->dev);
131 if (ret < 0) {
132 err_msg = "resume runtime PM";
133 failed = true;
134 }
135
136 ret = venus_boot(core);
137 if (ret && !failed) {
138 err_msg = "boot Venus";
139 failed = true;
140 }
141
142 ret = hfi_core_resume(core, true);
143 if (ret && !failed) {
144 err_msg = "resume HFI";
145 failed = true;
146 }
147
148 enable_irq(core->irq);
149
150 mutex_unlock(&core->lock);
151
152 ret = hfi_core_init(core);
153 if (ret && !failed) {
154 err_msg = "init HFI";
155 failed = true;
156 }
157
158 pm_runtime_put_sync(core->dev);
159
160 if (failed) {
161 disable_irq_nosync(core->irq);
162 dev_warn_ratelimited(core->dev,
163 "System error has occurred, recovery failed to %s\n",
164 err_msg);
165 schedule_delayed_work(&core->work, msecs_to_jiffies(10));
166 return;
167 }
168
169 dev_warn(core->dev, "system error has occurred (recovered)\n");
170
171 mutex_lock(&core->lock);
172 clear_bit(0, &core->sys_error);
173 wake_up_all(&core->sys_err_done);
174 mutex_unlock(&core->lock);
175 }
176
to_v4l2_codec_type(u32 codec)177 static u32 to_v4l2_codec_type(u32 codec)
178 {
179 switch (codec) {
180 case HFI_VIDEO_CODEC_H264:
181 return V4L2_PIX_FMT_H264;
182 case HFI_VIDEO_CODEC_H263:
183 return V4L2_PIX_FMT_H263;
184 case HFI_VIDEO_CODEC_MPEG1:
185 return V4L2_PIX_FMT_MPEG1;
186 case HFI_VIDEO_CODEC_MPEG2:
187 return V4L2_PIX_FMT_MPEG2;
188 case HFI_VIDEO_CODEC_MPEG4:
189 return V4L2_PIX_FMT_MPEG4;
190 case HFI_VIDEO_CODEC_VC1:
191 return V4L2_PIX_FMT_VC1_ANNEX_G;
192 case HFI_VIDEO_CODEC_VP8:
193 return V4L2_PIX_FMT_VP8;
194 case HFI_VIDEO_CODEC_VP9:
195 return V4L2_PIX_FMT_VP9;
196 case HFI_VIDEO_CODEC_DIVX:
197 case HFI_VIDEO_CODEC_DIVX_311:
198 return V4L2_PIX_FMT_XVID;
199 default:
200 return 0;
201 }
202 }
203
venus_enumerate_codecs(struct venus_core * core,u32 type)204 static int venus_enumerate_codecs(struct venus_core *core, u32 type)
205 {
206 const struct hfi_inst_ops dummy_ops = {};
207 struct venus_inst *inst;
208 u32 codec, codecs;
209 unsigned int i;
210 int ret;
211
212 if (core->res->hfi_version != HFI_VERSION_1XX)
213 return 0;
214
215 inst = kzalloc(sizeof(*inst), GFP_KERNEL);
216 if (!inst)
217 return -ENOMEM;
218
219 mutex_init(&inst->lock);
220 inst->core = core;
221 inst->session_type = type;
222 if (type == VIDC_SESSION_TYPE_DEC)
223 codecs = core->dec_codecs;
224 else
225 codecs = core->enc_codecs;
226
227 ret = hfi_session_create(inst, &dummy_ops);
228 if (ret)
229 goto err;
230
231 for (i = 0; i < MAX_CODEC_NUM; i++) {
232 codec = (1UL << i) & codecs;
233 if (!codec)
234 continue;
235
236 ret = hfi_session_init(inst, to_v4l2_codec_type(codec));
237 if (ret)
238 goto done;
239
240 ret = hfi_session_deinit(inst);
241 if (ret)
242 goto done;
243 }
244
245 done:
246 hfi_session_destroy(inst);
247 err:
248 mutex_destroy(&inst->lock);
249 kfree(inst);
250
251 return ret;
252 }
253
venus_assign_register_offsets(struct venus_core * core)254 static void venus_assign_register_offsets(struct venus_core *core)
255 {
256 if (IS_IRIS2(core) || IS_IRIS2_1(core)) {
257 core->vbif_base = core->base + VBIF_BASE;
258 core->cpu_base = core->base + CPU_BASE_V6;
259 core->cpu_cs_base = core->base + CPU_CS_BASE_V6;
260 core->cpu_ic_base = core->base + CPU_IC_BASE_V6;
261 core->wrapper_base = core->base + WRAPPER_BASE_V6;
262 core->wrapper_tz_base = core->base + WRAPPER_TZ_BASE_V6;
263 core->aon_base = core->base + AON_BASE_V6;
264 } else {
265 core->vbif_base = core->base + VBIF_BASE;
266 core->cpu_base = core->base + CPU_BASE;
267 core->cpu_cs_base = core->base + CPU_CS_BASE;
268 core->cpu_ic_base = core->base + CPU_IC_BASE;
269 core->wrapper_base = core->base + WRAPPER_BASE;
270 core->wrapper_tz_base = NULL;
271 core->aon_base = NULL;
272 }
273 }
274
venus_isr_thread(int irq,void * dev_id)275 static irqreturn_t venus_isr_thread(int irq, void *dev_id)
276 {
277 struct venus_core *core = dev_id;
278 irqreturn_t ret;
279
280 ret = hfi_isr_thread(irq, dev_id);
281
282 if (ret == IRQ_HANDLED && venus_fault_inject_ssr())
283 hfi_core_trigger_ssr(core, HFI_TEST_SSR_SW_ERR_FATAL);
284
285 return ret;
286 }
287
venus_probe(struct platform_device * pdev)288 static int venus_probe(struct platform_device *pdev)
289 {
290 struct device *dev = &pdev->dev;
291 struct venus_core *core;
292 int ret;
293
294 core = devm_kzalloc(dev, sizeof(*core), GFP_KERNEL);
295 if (!core)
296 return -ENOMEM;
297
298 core->dev = dev;
299
300 core->base = devm_platform_ioremap_resource(pdev, 0);
301 if (IS_ERR(core->base))
302 return PTR_ERR(core->base);
303
304 core->video_path = devm_of_icc_get(dev, "video-mem");
305 if (IS_ERR(core->video_path))
306 return PTR_ERR(core->video_path);
307
308 core->cpucfg_path = devm_of_icc_get(dev, "cpu-cfg");
309 if (IS_ERR(core->cpucfg_path))
310 return PTR_ERR(core->cpucfg_path);
311
312 core->irq = platform_get_irq(pdev, 0);
313 if (core->irq < 0)
314 return core->irq;
315
316 core->res = of_device_get_match_data(dev);
317 if (!core->res)
318 return -ENODEV;
319
320 mutex_init(&core->pm_lock);
321
322 core->pm_ops = venus_pm_get(core->res->hfi_version);
323 if (!core->pm_ops)
324 return -ENODEV;
325
326 if (core->pm_ops->core_get) {
327 ret = core->pm_ops->core_get(core);
328 if (ret)
329 return ret;
330 }
331
332 ret = dma_set_mask_and_coherent(dev, core->res->dma_mask);
333 if (ret)
334 goto err_core_put;
335
336 dma_set_max_seg_size(dev, UINT_MAX);
337
338 INIT_LIST_HEAD(&core->instances);
339 mutex_init(&core->lock);
340 INIT_DELAYED_WORK(&core->work, venus_sys_error_handler);
341 init_waitqueue_head(&core->sys_err_done);
342
343 ret = hfi_create(core, &venus_core_ops);
344 if (ret)
345 goto err_core_put;
346
347 ret = devm_request_threaded_irq(dev, core->irq, hfi_isr, venus_isr_thread,
348 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
349 "venus", core);
350 if (ret)
351 goto err_core_put;
352
353 venus_assign_register_offsets(core);
354
355 ret = v4l2_device_register(dev, &core->v4l2_dev);
356 if (ret)
357 goto err_hfi_destroy;
358
359 platform_set_drvdata(pdev, core);
360
361 pm_runtime_enable(dev);
362
363 ret = pm_runtime_get_sync(dev);
364 if (ret < 0)
365 goto err_runtime_disable;
366
367 ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
368 if (ret)
369 goto err_runtime_disable;
370
371 ret = venus_firmware_init(core);
372 if (ret)
373 goto err_of_depopulate;
374
375 ret = venus_boot(core);
376 if (ret)
377 goto err_firmware_deinit;
378
379 ret = hfi_core_resume(core, true);
380 if (ret)
381 goto err_venus_shutdown;
382
383 ret = hfi_core_init(core);
384 if (ret)
385 goto err_venus_shutdown;
386
387 ret = venus_enumerate_codecs(core, VIDC_SESSION_TYPE_DEC);
388 if (ret)
389 goto err_core_deinit;
390
391 ret = venus_enumerate_codecs(core, VIDC_SESSION_TYPE_ENC);
392 if (ret)
393 goto err_core_deinit;
394
395 ret = pm_runtime_put_sync(dev);
396 if (ret) {
397 pm_runtime_get_noresume(dev);
398 goto err_core_deinit;
399 }
400
401 venus_dbgfs_init(core);
402
403 return 0;
404
405 err_core_deinit:
406 hfi_core_deinit(core, false);
407 err_venus_shutdown:
408 venus_shutdown(core);
409 err_firmware_deinit:
410 venus_firmware_deinit(core);
411 err_of_depopulate:
412 of_platform_depopulate(dev);
413 err_runtime_disable:
414 pm_runtime_put_noidle(dev);
415 pm_runtime_disable(dev);
416 pm_runtime_set_suspended(dev);
417 v4l2_device_unregister(&core->v4l2_dev);
418 err_hfi_destroy:
419 hfi_destroy(core);
420 err_core_put:
421 if (core->pm_ops->core_put)
422 core->pm_ops->core_put(core);
423 return ret;
424 }
425
venus_remove(struct platform_device * pdev)426 static void venus_remove(struct platform_device *pdev)
427 {
428 struct venus_core *core = platform_get_drvdata(pdev);
429 const struct venus_pm_ops *pm_ops = core->pm_ops;
430 struct device *dev = core->dev;
431 int ret;
432
433 cancel_delayed_work_sync(&core->work);
434 ret = pm_runtime_get_sync(dev);
435 WARN_ON(ret < 0);
436
437 ret = hfi_core_deinit(core, true);
438 WARN_ON(ret);
439
440 venus_shutdown(core);
441 of_platform_depopulate(dev);
442
443 venus_firmware_deinit(core);
444
445 pm_runtime_put_sync(dev);
446 pm_runtime_disable(dev);
447
448 if (pm_ops->core_put)
449 pm_ops->core_put(core);
450
451 v4l2_device_unregister(&core->v4l2_dev);
452
453 hfi_destroy(core);
454
455 mutex_destroy(&core->pm_lock);
456 mutex_destroy(&core->lock);
457 venus_dbgfs_deinit(core);
458 }
459
venus_core_shutdown(struct platform_device * pdev)460 static void venus_core_shutdown(struct platform_device *pdev)
461 {
462 struct venus_core *core = platform_get_drvdata(pdev);
463
464 pm_runtime_get_sync(core->dev);
465 venus_shutdown(core);
466 venus_firmware_deinit(core);
467 pm_runtime_put_sync(core->dev);
468 }
469
venus_runtime_suspend(struct device * dev)470 static __maybe_unused int venus_runtime_suspend(struct device *dev)
471 {
472 struct venus_core *core = dev_get_drvdata(dev);
473 const struct venus_pm_ops *pm_ops = core->pm_ops;
474 int ret;
475
476 ret = hfi_core_suspend(core);
477 if (ret)
478 return ret;
479
480 if (pm_ops->core_power) {
481 ret = pm_ops->core_power(core, POWER_OFF);
482 if (ret)
483 return ret;
484 }
485
486 ret = icc_set_bw(core->cpucfg_path, 0, 0);
487 if (ret)
488 goto err_cpucfg_path;
489
490 ret = icc_set_bw(core->video_path, 0, 0);
491 if (ret)
492 goto err_video_path;
493
494 return ret;
495
496 err_video_path:
497 icc_set_bw(core->cpucfg_path, kbps_to_icc(1000), 0);
498 err_cpucfg_path:
499 if (pm_ops->core_power)
500 pm_ops->core_power(core, POWER_ON);
501
502 return ret;
503 }
504
venus_runtime_resume(struct device * dev)505 static __maybe_unused int venus_runtime_resume(struct device *dev)
506 {
507 struct venus_core *core = dev_get_drvdata(dev);
508 const struct venus_pm_ops *pm_ops = core->pm_ops;
509 int ret;
510
511 ret = icc_set_bw(core->video_path, kbps_to_icc(20000), 0);
512 if (ret)
513 return ret;
514
515 ret = icc_set_bw(core->cpucfg_path, kbps_to_icc(1000), 0);
516 if (ret)
517 return ret;
518
519 if (pm_ops->core_power) {
520 ret = pm_ops->core_power(core, POWER_ON);
521 if (ret)
522 return ret;
523 }
524
525 return hfi_core_resume(core, false);
526 }
527
528 static const struct dev_pm_ops venus_pm_ops = {
529 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
530 pm_runtime_force_resume)
531 SET_RUNTIME_PM_OPS(venus_runtime_suspend, venus_runtime_resume, NULL)
532 };
533
534 static const struct freq_tbl msm8916_freq_table[] = {
535 { 352800, 228570000 }, /* 1920x1088 @ 30 + 1280x720 @ 30 */
536 { 244800, 160000000 }, /* 1920x1088 @ 30 */
537 { 108000, 100000000 }, /* 1280x720 @ 30 */
538 };
539
540 static const struct reg_val msm8916_reg_preset[] = {
541 { 0xe0020, 0x05555556 },
542 { 0xe0024, 0x05555556 },
543 { 0x80124, 0x00000003 },
544 };
545
546 static const struct venus_resources msm8916_res = {
547 .freq_tbl = msm8916_freq_table,
548 .freq_tbl_size = ARRAY_SIZE(msm8916_freq_table),
549 .reg_tbl = msm8916_reg_preset,
550 .reg_tbl_size = ARRAY_SIZE(msm8916_reg_preset),
551 .clks = { "core", "iface", "bus", },
552 .clks_num = 3,
553 .max_load = 352800, /* 720p@30 + 1080p@30 */
554 .hfi_version = HFI_VERSION_1XX,
555 .vmem_id = VIDC_RESOURCE_NONE,
556 .vmem_size = 0,
557 .vmem_addr = 0,
558 .dma_mask = 0xddc00000 - 1,
559 .fwname = "qcom/venus-1.8/venus.mbn",
560 };
561
562 static const struct freq_tbl msm8996_freq_table[] = {
563 { 1944000, 520000000 }, /* 4k UHD @ 60 (decode only) */
564 { 972000, 520000000 }, /* 4k UHD @ 30 */
565 { 489600, 346666667 }, /* 1080p @ 60 */
566 { 244800, 150000000 }, /* 1080p @ 30 */
567 { 108000, 75000000 }, /* 720p @ 30 */
568 };
569
570 static const struct reg_val msm8996_reg_preset[] = {
571 { 0x80010, 0xffffffff },
572 { 0x80018, 0x00001556 },
573 { 0x8001C, 0x00001556 },
574 };
575
576 static const struct venus_resources msm8996_res = {
577 .freq_tbl = msm8996_freq_table,
578 .freq_tbl_size = ARRAY_SIZE(msm8996_freq_table),
579 .reg_tbl = msm8996_reg_preset,
580 .reg_tbl_size = ARRAY_SIZE(msm8996_reg_preset),
581 .clks = {"core", "iface", "bus", "mbus" },
582 .clks_num = 4,
583 .vcodec0_clks = { "core" },
584 .vcodec1_clks = { "core" },
585 .vcodec_clks_num = 1,
586 .max_load = 2563200,
587 .hfi_version = HFI_VERSION_3XX,
588 .vmem_id = VIDC_RESOURCE_NONE,
589 .vmem_size = 0,
590 .vmem_addr = 0,
591 .dma_mask = 0xddc00000 - 1,
592 .fwname = "qcom/venus-4.2/venus.mbn",
593 };
594
595 static const struct freq_tbl msm8998_freq_table[] = {
596 { 1728000, 533000000 }, /* 4k UHD @ 60 (decode only) */
597 { 1036800, 444000000 }, /* 2k @ 120 */
598 { 829440, 355200000 }, /* 4k @ 44 */
599 { 489600, 269330000 },/* 4k @ 30 */
600 { 108000, 200000000 }, /* 1080p @ 60 */
601 };
602
603 static const struct reg_val msm8998_reg_preset[] = {
604 { 0x80124, 0x00000003 },
605 { 0x80550, 0x01111111 },
606 { 0x80560, 0x01111111 },
607 { 0x80568, 0x01111111 },
608 { 0x80570, 0x01111111 },
609 { 0x80580, 0x01111111 },
610 { 0x80588, 0x01111111 },
611 { 0xe2010, 0x00000000 },
612 };
613
614 static const struct venus_resources msm8998_res = {
615 .freq_tbl = msm8998_freq_table,
616 .freq_tbl_size = ARRAY_SIZE(msm8998_freq_table),
617 .reg_tbl = msm8998_reg_preset,
618 .reg_tbl_size = ARRAY_SIZE(msm8998_reg_preset),
619 .clks = { "core", "iface", "bus", "mbus" },
620 .clks_num = 4,
621 .vcodec0_clks = { "core" },
622 .vcodec1_clks = { "core" },
623 .vcodec_clks_num = 1,
624 .max_load = 2563200,
625 .hfi_version = HFI_VERSION_3XX,
626 .vmem_id = VIDC_RESOURCE_NONE,
627 .vmem_size = 0,
628 .vmem_addr = 0,
629 .dma_mask = 0xddc00000 - 1,
630 .fwname = "qcom/venus-4.4/venus.mbn",
631 };
632
633 static const struct freq_tbl sdm660_freq_table[] = {
634 { 979200, 518400000 },
635 { 489600, 441600000 },
636 { 432000, 404000000 },
637 { 244800, 320000000 },
638 { 216000, 269330000 },
639 { 108000, 133330000 },
640 };
641
642 static const struct reg_val sdm660_reg_preset[] = {
643 { 0x80010, 0x001f001f },
644 { 0x80018, 0x00000156 },
645 { 0x8001c, 0x00000156 },
646 };
647
648 static const struct bw_tbl sdm660_bw_table_enc[] = {
649 { 979200, 1044000, 0, 2446336, 0 }, /* 4k UHD @ 30 */
650 { 864000, 887000, 0, 2108416, 0 }, /* 720p @ 240 */
651 { 489600, 666000, 0, 1207296, 0 }, /* 1080p @ 60 */
652 { 432000, 578000, 0, 1058816, 0 }, /* 720p @ 120 */
653 { 244800, 346000, 0, 616448, 0 }, /* 1080p @ 30 */
654 { 216000, 293000, 0, 534528, 0 }, /* 720p @ 60 */
655 { 108000, 151000, 0, 271360, 0 }, /* 720p @ 30 */
656 };
657
658 static const struct bw_tbl sdm660_bw_table_dec[] = {
659 { 979200, 2365000, 0, 1892000, 0 }, /* 4k UHD @ 30 */
660 { 864000, 1978000, 0, 1554000, 0 }, /* 720p @ 240 */
661 { 489600, 1133000, 0, 895000, 0 }, /* 1080p @ 60 */
662 { 432000, 994000, 0, 781000, 0 }, /* 720p @ 120 */
663 { 244800, 580000, 0, 460000, 0 }, /* 1080p @ 30 */
664 { 216000, 501000, 0, 301000, 0 }, /* 720p @ 60 */
665 { 108000, 255000, 0, 202000, 0 }, /* 720p @ 30 */
666 };
667
668 static const struct venus_resources sdm660_res = {
669 .freq_tbl = sdm660_freq_table,
670 .freq_tbl_size = ARRAY_SIZE(sdm660_freq_table),
671 .reg_tbl = sdm660_reg_preset,
672 .reg_tbl_size = ARRAY_SIZE(sdm660_reg_preset),
673 .bw_tbl_enc = sdm660_bw_table_enc,
674 .bw_tbl_enc_size = ARRAY_SIZE(sdm660_bw_table_enc),
675 .bw_tbl_dec = sdm660_bw_table_dec,
676 .bw_tbl_dec_size = ARRAY_SIZE(sdm660_bw_table_dec),
677 .clks = {"core", "iface", "bus", "bus_throttle" },
678 .clks_num = 4,
679 .vcodec0_clks = { "vcodec0_core" },
680 .vcodec1_clks = { "vcodec0_core" },
681 .vcodec_clks_num = 1,
682 .vcodec_num = 1,
683 .max_load = 1036800,
684 .hfi_version = HFI_VERSION_3XX,
685 .vmem_id = VIDC_RESOURCE_NONE,
686 .vmem_size = 0,
687 .vmem_addr = 0,
688 .cp_start = 0,
689 .cp_size = 0x79000000,
690 .cp_nonpixel_start = 0x1000000,
691 .cp_nonpixel_size = 0x28000000,
692 .dma_mask = 0xd9000000 - 1,
693 .fwname = "qcom/venus-4.4/venus.mdt",
694 };
695
696 static const struct freq_tbl sdm845_freq_table[] = {
697 { 3110400, 533000000 }, /* 4096x2160@90 */
698 { 2073600, 444000000 }, /* 4096x2160@60 */
699 { 1944000, 404000000 }, /* 3840x2160@60 */
700 { 972000, 330000000 }, /* 3840x2160@30 */
701 { 489600, 200000000 }, /* 1920x1080@60 */
702 { 244800, 100000000 }, /* 1920x1080@30 */
703 };
704
705 static const struct bw_tbl sdm845_bw_table_enc[] = {
706 { 1944000, 1612000, 0, 2416000, 0 }, /* 3840x2160@60 */
707 { 972000, 951000, 0, 1434000, 0 }, /* 3840x2160@30 */
708 { 489600, 723000, 0, 973000, 0 }, /* 1920x1080@60 */
709 { 244800, 370000, 0, 495000, 0 }, /* 1920x1080@30 */
710 };
711
712 static const struct bw_tbl sdm845_bw_table_dec[] = {
713 { 2073600, 3929000, 0, 5551000, 0 }, /* 4096x2160@60 */
714 { 1036800, 1987000, 0, 2797000, 0 }, /* 4096x2160@30 */
715 { 489600, 1040000, 0, 1298000, 0 }, /* 1920x1080@60 */
716 { 244800, 530000, 0, 659000, 0 }, /* 1920x1080@30 */
717 };
718
719 static const struct venus_resources sdm845_res = {
720 .freq_tbl = sdm845_freq_table,
721 .freq_tbl_size = ARRAY_SIZE(sdm845_freq_table),
722 .bw_tbl_enc = sdm845_bw_table_enc,
723 .bw_tbl_enc_size = ARRAY_SIZE(sdm845_bw_table_enc),
724 .bw_tbl_dec = sdm845_bw_table_dec,
725 .bw_tbl_dec_size = ARRAY_SIZE(sdm845_bw_table_dec),
726 .clks = {"core", "iface", "bus" },
727 .clks_num = 3,
728 .vcodec0_clks = { "core", "bus" },
729 .vcodec1_clks = { "core", "bus" },
730 .vcodec_clks_num = 2,
731 .max_load = 3110400, /* 4096x2160@90 */
732 .hfi_version = HFI_VERSION_4XX,
733 .vpu_version = VPU_VERSION_AR50,
734 .vmem_id = VIDC_RESOURCE_NONE,
735 .vmem_size = 0,
736 .vmem_addr = 0,
737 .dma_mask = 0xe0000000 - 1,
738 .fwname = "qcom/venus-5.2/venus.mbn",
739 };
740
741 static const struct venus_resources sdm845_res_v2 = {
742 .freq_tbl = sdm845_freq_table,
743 .freq_tbl_size = ARRAY_SIZE(sdm845_freq_table),
744 .bw_tbl_enc = sdm845_bw_table_enc,
745 .bw_tbl_enc_size = ARRAY_SIZE(sdm845_bw_table_enc),
746 .bw_tbl_dec = sdm845_bw_table_dec,
747 .bw_tbl_dec_size = ARRAY_SIZE(sdm845_bw_table_dec),
748 .clks = {"core", "iface", "bus" },
749 .clks_num = 3,
750 .vcodec0_clks = { "vcodec0_core", "vcodec0_bus" },
751 .vcodec1_clks = { "vcodec1_core", "vcodec1_bus" },
752 .vcodec_clks_num = 2,
753 .vcodec_pmdomains = (const char *[]) { "venus", "vcodec0", "vcodec1" },
754 .vcodec_pmdomains_num = 3,
755 .opp_pmdomain = (const char *[]) { "cx", NULL },
756 .vcodec_num = 2,
757 .max_load = 3110400, /* 4096x2160@90 */
758 .hfi_version = HFI_VERSION_4XX,
759 .vpu_version = VPU_VERSION_AR50,
760 .vmem_id = VIDC_RESOURCE_NONE,
761 .vmem_size = 0,
762 .vmem_addr = 0,
763 .dma_mask = 0xe0000000 - 1,
764 .cp_start = 0,
765 .cp_size = 0x70800000,
766 .cp_nonpixel_start = 0x1000000,
767 .cp_nonpixel_size = 0x24800000,
768 .fwname = "qcom/venus-5.2/venus.mbn",
769 };
770
771 static const struct freq_tbl sc7180_freq_table[] = {
772 { 0, 500000000 },
773 { 0, 434000000 },
774 { 0, 340000000 },
775 { 0, 270000000 },
776 { 0, 150000000 },
777 };
778
779 static const struct bw_tbl sc7180_bw_table_enc[] = {
780 { 972000, 750000, 0, 0, 0 }, /* 3840x2160@30 */
781 { 489600, 451000, 0, 0, 0 }, /* 1920x1080@60 */
782 { 244800, 234000, 0, 0, 0 }, /* 1920x1080@30 */
783 };
784
785 static const struct bw_tbl sc7180_bw_table_dec[] = {
786 { 1036800, 1386000, 0, 1875000, 0 }, /* 4096x2160@30 */
787 { 489600, 865000, 0, 1146000, 0 }, /* 1920x1080@60 */
788 { 244800, 530000, 0, 583000, 0 }, /* 1920x1080@30 */
789 };
790
791 static const struct venus_resources sc7180_res = {
792 .freq_tbl = sc7180_freq_table,
793 .freq_tbl_size = ARRAY_SIZE(sc7180_freq_table),
794 .bw_tbl_enc = sc7180_bw_table_enc,
795 .bw_tbl_enc_size = ARRAY_SIZE(sc7180_bw_table_enc),
796 .bw_tbl_dec = sc7180_bw_table_dec,
797 .bw_tbl_dec_size = ARRAY_SIZE(sc7180_bw_table_dec),
798 .clks = {"core", "iface", "bus" },
799 .clks_num = 3,
800 .vcodec0_clks = { "vcodec0_core", "vcodec0_bus" },
801 .vcodec_clks_num = 2,
802 .vcodec_pmdomains = (const char *[]) { "venus", "vcodec0" },
803 .vcodec_pmdomains_num = 2,
804 .opp_pmdomain = (const char *[]) { "cx", NULL },
805 .vcodec_num = 1,
806 .hfi_version = HFI_VERSION_4XX,
807 .vpu_version = VPU_VERSION_AR50,
808 .vmem_id = VIDC_RESOURCE_NONE,
809 .vmem_size = 0,
810 .vmem_addr = 0,
811 .dma_mask = 0xe0000000 - 1,
812 .cp_start = 0,
813 .cp_size = 0x70800000,
814 .cp_nonpixel_start = 0x1000000,
815 .cp_nonpixel_size = 0x24800000,
816 .fwname = "qcom/venus-5.4/venus.mbn",
817 };
818
819 static const struct freq_tbl sm8250_freq_table[] = {
820 { 0, 444000000 },
821 { 0, 366000000 },
822 { 0, 338000000 },
823 { 0, 240000000 },
824 };
825
826 static const struct bw_tbl sm8250_bw_table_enc[] = {
827 { 1944000, 1954000, 0, 3711000, 0 }, /* 3840x2160@60 */
828 { 972000, 996000, 0, 1905000, 0 }, /* 3840x2160@30 */
829 { 489600, 645000, 0, 977000, 0 }, /* 1920x1080@60 */
830 { 244800, 332000, 0, 498000, 0 }, /* 1920x1080@30 */
831 };
832
833 static const struct bw_tbl sm8250_bw_table_dec[] = {
834 { 2073600, 2403000, 0, 4113000, 0 }, /* 4096x2160@60 */
835 { 1036800, 1224000, 0, 2079000, 0 }, /* 4096x2160@30 */
836 { 489600, 812000, 0, 998000, 0 }, /* 1920x1080@60 */
837 { 244800, 416000, 0, 509000, 0 }, /* 1920x1080@30 */
838 };
839
840 static const struct reg_val sm8250_reg_preset[] = {
841 { 0xb0088, 0 },
842 };
843
844 static const struct venus_resources sm8250_res = {
845 .freq_tbl = sm8250_freq_table,
846 .freq_tbl_size = ARRAY_SIZE(sm8250_freq_table),
847 .reg_tbl = sm8250_reg_preset,
848 .reg_tbl_size = ARRAY_SIZE(sm8250_reg_preset),
849 .bw_tbl_enc = sm8250_bw_table_enc,
850 .bw_tbl_enc_size = ARRAY_SIZE(sm8250_bw_table_enc),
851 .bw_tbl_dec = sm8250_bw_table_dec,
852 .bw_tbl_dec_size = ARRAY_SIZE(sm8250_bw_table_dec),
853 .clks = {"core", "iface"},
854 .clks_num = 2,
855 .resets = { "bus", "core" },
856 .resets_num = 2,
857 .vcodec0_clks = { "vcodec0_core" },
858 .vcodec_clks_num = 1,
859 .vcodec_pmdomains = (const char *[]) { "venus", "vcodec0" },
860 .vcodec_pmdomains_num = 2,
861 .opp_pmdomain = (const char *[]) { "mx", NULL },
862 .vcodec_num = 1,
863 .max_load = 7833600,
864 .hfi_version = HFI_VERSION_6XX,
865 .vpu_version = VPU_VERSION_IRIS2,
866 .num_vpp_pipes = 4,
867 .vmem_id = VIDC_RESOURCE_NONE,
868 .vmem_size = 0,
869 .vmem_addr = 0,
870 .dma_mask = 0xe0000000 - 1,
871 .fwname = "qcom/vpu-1.0/venus.mbn",
872 };
873
874 static const struct freq_tbl sc7280_freq_table[] = {
875 { 0, 460000000 },
876 { 0, 424000000 },
877 { 0, 335000000 },
878 { 0, 240000000 },
879 { 0, 133333333 },
880 };
881
882 static const struct bw_tbl sc7280_bw_table_enc[] = {
883 { 1944000, 1896000, 0, 3657000, 0 }, /* 3840x2160@60 */
884 { 972000, 968000, 0, 1848000, 0 }, /* 3840x2160@30 */
885 { 489600, 618000, 0, 941000, 0 }, /* 1920x1080@60 */
886 { 244800, 318000, 0, 480000, 0 }, /* 1920x1080@30 */
887 };
888
889 static const struct bw_tbl sc7280_bw_table_dec[] = {
890 { 2073600, 2128000, 0, 3831000, 0 }, /* 4096x2160@60 */
891 { 1036800, 1085000, 0, 1937000, 0 }, /* 4096x2160@30 */
892 { 489600, 779000, 0, 998000, 0 }, /* 1920x1080@60 */
893 { 244800, 400000, 0, 509000, 0 }, /* 1920x1080@30 */
894 };
895
896 static const struct reg_val sm7280_reg_preset[] = {
897 { 0xb0088, 0 },
898 };
899
900 static const struct hfi_ubwc_config sc7280_ubwc_config = {
901 0, 0, {1, 1, 1, 0, 0, 0}, 8, 32, 14, 0, 0, {0, 0}
902 };
903
904 static const struct venus_resources sc7280_res = {
905 .freq_tbl = sc7280_freq_table,
906 .freq_tbl_size = ARRAY_SIZE(sc7280_freq_table),
907 .reg_tbl = sm7280_reg_preset,
908 .reg_tbl_size = ARRAY_SIZE(sm7280_reg_preset),
909 .bw_tbl_enc = sc7280_bw_table_enc,
910 .bw_tbl_enc_size = ARRAY_SIZE(sc7280_bw_table_enc),
911 .bw_tbl_dec = sc7280_bw_table_dec,
912 .bw_tbl_dec_size = ARRAY_SIZE(sc7280_bw_table_dec),
913 .ubwc_conf = &sc7280_ubwc_config,
914 .clks = {"core", "bus", "iface"},
915 .clks_num = 3,
916 .vcodec0_clks = {"vcodec_core", "vcodec_bus"},
917 .vcodec_clks_num = 2,
918 .vcodec_pmdomains = (const char *[]) { "venus", "vcodec0" },
919 .vcodec_pmdomains_num = 2,
920 .opp_pmdomain = (const char *[]) { "cx", NULL },
921 .vcodec_num = 1,
922 .hfi_version = HFI_VERSION_6XX,
923 .vpu_version = VPU_VERSION_IRIS2_1,
924 .num_vpp_pipes = 1,
925 .vmem_id = VIDC_RESOURCE_NONE,
926 .vmem_size = 0,
927 .vmem_addr = 0,
928 .dma_mask = 0xe0000000 - 1,
929 .cp_start = 0,
930 .cp_size = 0x25800000,
931 .cp_nonpixel_start = 0x1000000,
932 .cp_nonpixel_size = 0x24800000,
933 .fwname = "qcom/vpu-2.0/venus.mbn",
934 };
935
936 static const struct of_device_id venus_dt_match[] = {
937 { .compatible = "qcom,msm8916-venus", .data = &msm8916_res, },
938 { .compatible = "qcom,msm8996-venus", .data = &msm8996_res, },
939 { .compatible = "qcom,msm8998-venus", .data = &msm8998_res, },
940 { .compatible = "qcom,sdm660-venus", .data = &sdm660_res, },
941 { .compatible = "qcom,sdm845-venus", .data = &sdm845_res, },
942 { .compatible = "qcom,sdm845-venus-v2", .data = &sdm845_res_v2, },
943 { .compatible = "qcom,sc7180-venus", .data = &sc7180_res, },
944 { .compatible = "qcom,sc7280-venus", .data = &sc7280_res, },
945 { .compatible = "qcom,sm8250-venus", .data = &sm8250_res, },
946 { }
947 };
948 MODULE_DEVICE_TABLE(of, venus_dt_match);
949
950 static struct platform_driver qcom_venus_driver = {
951 .probe = venus_probe,
952 .remove_new = venus_remove,
953 .driver = {
954 .name = "qcom-venus",
955 .of_match_table = venus_dt_match,
956 .pm = &venus_pm_ops,
957 },
958 .shutdown = venus_core_shutdown,
959 };
960 module_platform_driver(qcom_venus_driver);
961
962 MODULE_ALIAS("platform:qcom-venus");
963 MODULE_DESCRIPTION("Qualcomm Venus video encoder and decoder driver");
964 MODULE_LICENSE("GPL v2");
965