1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * MFD core driver for the X-Powers' Power Management ICs
4 *
5 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
6 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
7 * as well as configurable GPIOs.
8 *
9 * This file contains the interface independent core functions.
10 *
11 * Copyright (C) 2014 Carlo Caione
12 *
13 * Author: Carlo Caione <carlo@caione.org>
14 */
15
16 #include <linux/acpi.h>
17 #include <linux/bitops.h>
18 #include <linux/delay.h>
19 #include <linux/err.h>
20 #include <linux/interrupt.h>
21 #include <linux/kernel.h>
22 #include <linux/mfd/axp20x.h>
23 #include <linux/mfd/core.h>
24 #include <linux/module.h>
25 #include <linux/of.h>
26 #include <linux/property.h>
27 #include <linux/reboot.h>
28 #include <linux/regmap.h>
29 #include <linux/regulator/consumer.h>
30
31 #define AXP20X_OFF BIT(7)
32
33 #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0
34 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4)
35
36 static const char * const axp20x_model_names[] = {
37 "AXP152",
38 "AXP192",
39 "AXP202",
40 "AXP209",
41 "AXP221",
42 "AXP223",
43 "AXP288",
44 "AXP313a",
45 "AXP717",
46 "AXP803",
47 "AXP806",
48 "AXP809",
49 "AXP813",
50 "AXP15060",
51 };
52
53 static const struct regmap_range axp152_writeable_ranges[] = {
54 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
55 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
56 };
57
58 static const struct regmap_range axp152_volatile_ranges[] = {
59 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
60 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
61 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
62 };
63
64 static const struct regmap_access_table axp152_writeable_table = {
65 .yes_ranges = axp152_writeable_ranges,
66 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
67 };
68
69 static const struct regmap_access_table axp152_volatile_table = {
70 .yes_ranges = axp152_volatile_ranges,
71 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
72 };
73
74 static const struct regmap_range axp20x_writeable_ranges[] = {
75 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
76 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
77 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
78 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
79 };
80
81 static const struct regmap_range axp20x_volatile_ranges[] = {
82 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
83 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
84 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
85 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
86 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
87 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
88 };
89
90 static const struct regmap_access_table axp20x_writeable_table = {
91 .yes_ranges = axp20x_writeable_ranges,
92 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges),
93 };
94
95 static const struct regmap_access_table axp20x_volatile_table = {
96 .yes_ranges = axp20x_volatile_ranges,
97 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
98 };
99
100 static const struct regmap_range axp192_writeable_ranges[] = {
101 regmap_reg_range(AXP192_DATACACHE(0), AXP192_DATACACHE(5)),
102 regmap_reg_range(AXP192_PWR_OUT_CTRL, AXP192_IRQ5_STATE),
103 regmap_reg_range(AXP20X_DCDC_MODE, AXP192_N_RSTO_CTRL),
104 regmap_reg_range(AXP20X_CC_CTRL, AXP20X_CC_CTRL),
105 };
106
107 static const struct regmap_range axp192_volatile_ranges[] = {
108 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP192_USB_OTG_STATUS),
109 regmap_reg_range(AXP192_IRQ1_STATE, AXP192_IRQ4_STATE),
110 regmap_reg_range(AXP192_IRQ5_STATE, AXP192_IRQ5_STATE),
111 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
112 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
113 regmap_reg_range(AXP192_GPIO2_0_STATE, AXP192_GPIO2_0_STATE),
114 regmap_reg_range(AXP192_GPIO4_3_STATE, AXP192_GPIO4_3_STATE),
115 regmap_reg_range(AXP192_N_RSTO_CTRL, AXP192_N_RSTO_CTRL),
116 regmap_reg_range(AXP20X_CHRG_CC_31_24, AXP20X_CC_CTRL),
117 };
118
119 static const struct regmap_access_table axp192_writeable_table = {
120 .yes_ranges = axp192_writeable_ranges,
121 .n_yes_ranges = ARRAY_SIZE(axp192_writeable_ranges),
122 };
123
124 static const struct regmap_access_table axp192_volatile_table = {
125 .yes_ranges = axp192_volatile_ranges,
126 .n_yes_ranges = ARRAY_SIZE(axp192_volatile_ranges),
127 };
128
129 /* AXP22x ranges are shared with the AXP809, as they cover the same range */
130 static const struct regmap_range axp22x_writeable_ranges[] = {
131 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
132 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3),
133 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
134 };
135
136 static const struct regmap_range axp22x_volatile_ranges[] = {
137 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
138 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
139 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
140 regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L),
141 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
142 };
143
144 static const struct regmap_access_table axp22x_writeable_table = {
145 .yes_ranges = axp22x_writeable_ranges,
146 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
147 };
148
149 static const struct regmap_access_table axp22x_volatile_table = {
150 .yes_ranges = axp22x_volatile_ranges,
151 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
152 };
153
154 /* AXP288 ranges are shared with the AXP803, as they cover the same range */
155 static const struct regmap_range axp288_writeable_ranges[] = {
156 regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON),
157 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
158 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
159 };
160
161 static const struct regmap_range axp288_volatile_ranges[] = {
162 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON),
163 regmap_reg_range(AXP22X_PWR_OUT_CTRL1, AXP22X_ALDO3_V_OUT),
164 regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL),
165 regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT),
166 regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL),
167 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
168 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
169 regmap_reg_range(AXP20X_GPIO1_CTRL, AXP22X_GPIO_STATE),
170 regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L),
171 regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG),
172 };
173
174 static const struct regmap_access_table axp288_writeable_table = {
175 .yes_ranges = axp288_writeable_ranges,
176 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges),
177 };
178
179 static const struct regmap_access_table axp288_volatile_table = {
180 .yes_ranges = axp288_volatile_ranges,
181 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
182 };
183
184 static const struct regmap_range axp806_writeable_ranges[] = {
185 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)),
186 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL),
187 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN),
188 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
189 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
190 };
191
192 static const struct regmap_range axp313a_writeable_ranges[] = {
193 regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE),
194 };
195
196 static const struct regmap_range axp313a_volatile_ranges[] = {
197 regmap_reg_range(AXP313A_SHUTDOWN_CTRL, AXP313A_SHUTDOWN_CTRL),
198 regmap_reg_range(AXP313A_IRQ_STATE, AXP313A_IRQ_STATE),
199 };
200
201 static const struct regmap_access_table axp313a_writeable_table = {
202 .yes_ranges = axp313a_writeable_ranges,
203 .n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges),
204 };
205
206 static const struct regmap_access_table axp313a_volatile_table = {
207 .yes_ranges = axp313a_volatile_ranges,
208 .n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges),
209 };
210
211 static const struct regmap_range axp717_writeable_ranges[] = {
212 regmap_reg_range(AXP717_PMU_FAULT, AXP717_MODULE_EN_CONTROL_1),
213 regmap_reg_range(AXP717_MIN_SYS_V_CONTROL, AXP717_BOOST_CONTROL),
214 regmap_reg_range(AXP717_VSYS_V_POWEROFF, AXP717_VSYS_V_POWEROFF),
215 regmap_reg_range(AXP717_IRQ0_EN, AXP717_IRQ4_EN),
216 regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE),
217 regmap_reg_range(AXP717_TS_PIN_CFG, AXP717_TS_PIN_CFG),
218 regmap_reg_range(AXP717_ICC_CHG_SET, AXP717_CV_CHG_SET),
219 regmap_reg_range(AXP717_DCDC_OUTPUT_CONTROL, AXP717_CPUSLDO_CONTROL),
220 regmap_reg_range(AXP717_ADC_CH_EN_CONTROL, AXP717_ADC_CH_EN_CONTROL),
221 regmap_reg_range(AXP717_ADC_DATA_SEL, AXP717_ADC_DATA_SEL),
222 };
223
224 static const struct regmap_range axp717_volatile_ranges[] = {
225 regmap_reg_range(AXP717_ON_INDICATE, AXP717_PMU_FAULT),
226 regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE),
227 regmap_reg_range(AXP717_BATT_PERCENT_DATA, AXP717_BATT_PERCENT_DATA),
228 regmap_reg_range(AXP717_BATT_V_H, AXP717_BATT_CHRG_I_L),
229 regmap_reg_range(AXP717_ADC_DATA_H, AXP717_ADC_DATA_L),
230 };
231
232 static const struct regmap_access_table axp717_writeable_table = {
233 .yes_ranges = axp717_writeable_ranges,
234 .n_yes_ranges = ARRAY_SIZE(axp717_writeable_ranges),
235 };
236
237 static const struct regmap_access_table axp717_volatile_table = {
238 .yes_ranges = axp717_volatile_ranges,
239 .n_yes_ranges = ARRAY_SIZE(axp717_volatile_ranges),
240 };
241
242 static const struct regmap_range axp806_volatile_ranges[] = {
243 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
244 };
245
246 static const struct regmap_access_table axp806_writeable_table = {
247 .yes_ranges = axp806_writeable_ranges,
248 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges),
249 };
250
251 static const struct regmap_access_table axp806_volatile_table = {
252 .yes_ranges = axp806_volatile_ranges,
253 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges),
254 };
255
256 static const struct regmap_range axp15060_writeable_ranges[] = {
257 regmap_reg_range(AXP15060_PWR_OUT_CTRL1, AXP15060_DCDC_MODE_CTRL2),
258 regmap_reg_range(AXP15060_OUTPUT_MONITOR_DISCHARGE, AXP15060_CPUSLDO_V_CTRL),
259 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
260 regmap_reg_range(AXP15060_PEK_KEY, AXP15060_PEK_KEY),
261 regmap_reg_range(AXP15060_IRQ1_EN, AXP15060_IRQ2_EN),
262 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
263 };
264
265 static const struct regmap_range axp15060_volatile_ranges[] = {
266 regmap_reg_range(AXP15060_STARTUP_SRC, AXP15060_STARTUP_SRC),
267 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
268 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
269 };
270
271 static const struct regmap_access_table axp15060_writeable_table = {
272 .yes_ranges = axp15060_writeable_ranges,
273 .n_yes_ranges = ARRAY_SIZE(axp15060_writeable_ranges),
274 };
275
276 static const struct regmap_access_table axp15060_volatile_table = {
277 .yes_ranges = axp15060_volatile_ranges,
278 .n_yes_ranges = ARRAY_SIZE(axp15060_volatile_ranges),
279 };
280
281 static const struct resource axp152_pek_resources[] = {
282 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
283 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
284 };
285
286 static const struct resource axp192_ac_power_supply_resources[] = {
287 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
288 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
289 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
290 };
291
292 static const struct resource axp192_usb_power_supply_resources[] = {
293 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
294 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
295 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_VALID, "VBUS_VALID"),
296 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
297 };
298
299 static const struct resource axp20x_ac_power_supply_resources[] = {
300 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
301 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
302 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
303 };
304
305 static const struct resource axp20x_pek_resources[] = {
306 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
307 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
308 };
309
310 static const struct resource axp20x_usb_power_supply_resources[] = {
311 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
312 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
313 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
314 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
315 };
316
317 static const struct resource axp22x_usb_power_supply_resources[] = {
318 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
319 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
320 };
321
322 static const struct resource axp717_usb_power_supply_resources[] = {
323 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_OVER_V, "VBUS_OVER_V"),
324 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
325 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
326 };
327
328 /* AXP803 and AXP813/AXP818 share the same interrupts */
329 static const struct resource axp803_usb_power_supply_resources[] = {
330 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
331 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
332 };
333
334 static const struct resource axp22x_pek_resources[] = {
335 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
336 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
337 };
338
339 static const struct resource axp288_power_button_resources[] = {
340 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"),
341 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"),
342 };
343
344 static const struct resource axp288_fuel_gauge_resources[] = {
345 DEFINE_RES_IRQ(AXP288_IRQ_QWBTU),
346 DEFINE_RES_IRQ(AXP288_IRQ_WBTU),
347 DEFINE_RES_IRQ(AXP288_IRQ_QWBTO),
348 DEFINE_RES_IRQ(AXP288_IRQ_WBTO),
349 DEFINE_RES_IRQ(AXP288_IRQ_WL2),
350 DEFINE_RES_IRQ(AXP288_IRQ_WL1),
351 };
352
353 static const struct resource axp313a_pek_resources[] = {
354 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
355 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
356 };
357
358 static const struct resource axp717_pek_resources[] = {
359 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
360 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
361 };
362
363 static const struct resource axp803_pek_resources[] = {
364 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
365 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
366 };
367
368 static const struct resource axp806_pek_resources[] = {
369 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"),
370 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"),
371 };
372
373 static const struct resource axp809_pek_resources[] = {
374 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
375 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
376 };
377
378 static const struct resource axp15060_pek_resources[] = {
379 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
380 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
381 };
382
383 static const struct regmap_config axp152_regmap_config = {
384 .reg_bits = 8,
385 .val_bits = 8,
386 .wr_table = &axp152_writeable_table,
387 .volatile_table = &axp152_volatile_table,
388 .max_register = AXP152_PWM1_DUTY_CYCLE,
389 .cache_type = REGCACHE_MAPLE,
390 };
391
392 static const struct regmap_config axp192_regmap_config = {
393 .reg_bits = 8,
394 .val_bits = 8,
395 .wr_table = &axp192_writeable_table,
396 .volatile_table = &axp192_volatile_table,
397 .max_register = AXP20X_CC_CTRL,
398 .cache_type = REGCACHE_MAPLE,
399 };
400
401 static const struct regmap_config axp20x_regmap_config = {
402 .reg_bits = 8,
403 .val_bits = 8,
404 .wr_table = &axp20x_writeable_table,
405 .volatile_table = &axp20x_volatile_table,
406 .max_register = AXP20X_OCV(AXP20X_OCV_MAX),
407 .cache_type = REGCACHE_MAPLE,
408 };
409
410 static const struct regmap_config axp22x_regmap_config = {
411 .reg_bits = 8,
412 .val_bits = 8,
413 .wr_table = &axp22x_writeable_table,
414 .volatile_table = &axp22x_volatile_table,
415 .max_register = AXP22X_BATLOW_THRES1,
416 .cache_type = REGCACHE_MAPLE,
417 };
418
419 static const struct regmap_config axp288_regmap_config = {
420 .reg_bits = 8,
421 .val_bits = 8,
422 .wr_table = &axp288_writeable_table,
423 .volatile_table = &axp288_volatile_table,
424 .max_register = AXP288_FG_TUNE5,
425 .cache_type = REGCACHE_MAPLE,
426 };
427
428 static const struct regmap_config axp313a_regmap_config = {
429 .reg_bits = 8,
430 .val_bits = 8,
431 .wr_table = &axp313a_writeable_table,
432 .volatile_table = &axp313a_volatile_table,
433 .max_register = AXP313A_IRQ_STATE,
434 .cache_type = REGCACHE_MAPLE,
435 };
436
437 static const struct regmap_config axp717_regmap_config = {
438 .reg_bits = 8,
439 .val_bits = 8,
440 .wr_table = &axp717_writeable_table,
441 .volatile_table = &axp717_volatile_table,
442 .max_register = AXP717_ADC_DATA_L,
443 .cache_type = REGCACHE_MAPLE,
444 };
445
446 static const struct regmap_config axp806_regmap_config = {
447 .reg_bits = 8,
448 .val_bits = 8,
449 .wr_table = &axp806_writeable_table,
450 .volatile_table = &axp806_volatile_table,
451 .max_register = AXP806_REG_ADDR_EXT,
452 .cache_type = REGCACHE_MAPLE,
453 };
454
455 static const struct regmap_config axp15060_regmap_config = {
456 .reg_bits = 8,
457 .val_bits = 8,
458 .wr_table = &axp15060_writeable_table,
459 .volatile_table = &axp15060_volatile_table,
460 .max_register = AXP15060_IRQ2_STATE,
461 .cache_type = REGCACHE_MAPLE,
462 };
463
464 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
465 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
466
467 static const struct regmap_irq axp152_regmap_irqs[] = {
468 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
469 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
470 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
471 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
472 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
473 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
474 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
475 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
476 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
477 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
478 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
479 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
480 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
481 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
482 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
483 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
484 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
485 };
486
487 static const struct regmap_irq axp192_regmap_irqs[] = {
488 INIT_REGMAP_IRQ(AXP192, ACIN_OVER_V, 0, 7),
489 INIT_REGMAP_IRQ(AXP192, ACIN_PLUGIN, 0, 6),
490 INIT_REGMAP_IRQ(AXP192, ACIN_REMOVAL, 0, 5),
491 INIT_REGMAP_IRQ(AXP192, VBUS_OVER_V, 0, 4),
492 INIT_REGMAP_IRQ(AXP192, VBUS_PLUGIN, 0, 3),
493 INIT_REGMAP_IRQ(AXP192, VBUS_REMOVAL, 0, 2),
494 INIT_REGMAP_IRQ(AXP192, VBUS_V_LOW, 0, 1),
495 INIT_REGMAP_IRQ(AXP192, BATT_PLUGIN, 1, 7),
496 INIT_REGMAP_IRQ(AXP192, BATT_REMOVAL, 1, 6),
497 INIT_REGMAP_IRQ(AXP192, BATT_ENT_ACT_MODE, 1, 5),
498 INIT_REGMAP_IRQ(AXP192, BATT_EXIT_ACT_MODE, 1, 4),
499 INIT_REGMAP_IRQ(AXP192, CHARG, 1, 3),
500 INIT_REGMAP_IRQ(AXP192, CHARG_DONE, 1, 2),
501 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_HIGH, 1, 1),
502 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_LOW, 1, 0),
503 INIT_REGMAP_IRQ(AXP192, DIE_TEMP_HIGH, 2, 7),
504 INIT_REGMAP_IRQ(AXP192, CHARG_I_LOW, 2, 6),
505 INIT_REGMAP_IRQ(AXP192, DCDC1_V_LONG, 2, 5),
506 INIT_REGMAP_IRQ(AXP192, DCDC2_V_LONG, 2, 4),
507 INIT_REGMAP_IRQ(AXP192, DCDC3_V_LONG, 2, 3),
508 INIT_REGMAP_IRQ(AXP192, PEK_SHORT, 2, 1),
509 INIT_REGMAP_IRQ(AXP192, PEK_LONG, 2, 0),
510 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_ON, 3, 7),
511 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_OFF, 3, 6),
512 INIT_REGMAP_IRQ(AXP192, VBUS_VALID, 3, 5),
513 INIT_REGMAP_IRQ(AXP192, VBUS_NOT_VALID, 3, 4),
514 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_VALID, 3, 3),
515 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_END, 3, 2),
516 INIT_REGMAP_IRQ(AXP192, LOW_PWR_LVL, 3, 0),
517 INIT_REGMAP_IRQ(AXP192, TIMER, 4, 7),
518 INIT_REGMAP_IRQ(AXP192, GPIO2_INPUT, 4, 2),
519 INIT_REGMAP_IRQ(AXP192, GPIO1_INPUT, 4, 1),
520 INIT_REGMAP_IRQ(AXP192, GPIO0_INPUT, 4, 0),
521 };
522
523 static const struct regmap_irq axp20x_regmap_irqs[] = {
524 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
525 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
526 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5),
527 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4),
528 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3),
529 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2),
530 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1),
531 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7),
532 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6),
533 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5),
534 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4),
535 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3),
536 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2),
537 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1),
538 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0),
539 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7),
540 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6),
541 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5),
542 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4),
543 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3),
544 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1),
545 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0),
546 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7),
547 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6),
548 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5),
549 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4),
550 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3),
551 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2),
552 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1),
553 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0),
554 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7),
555 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6),
556 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5),
557 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3),
558 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2),
559 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1),
560 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
561 };
562
563 static const struct regmap_irq axp22x_regmap_irqs[] = {
564 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
565 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
566 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
567 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
568 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
569 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
570 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
571 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
572 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
573 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
574 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
575 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
576 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
577 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
578 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
579 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
580 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
581 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
582 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
583 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
584 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
585 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
586 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
587 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
588 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
589 };
590
591 /* some IRQs are compatible with axp20x models */
592 static const struct regmap_irq axp288_regmap_irqs[] = {
593 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
594 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
595 INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
596 INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5),
597 INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6),
598 INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7),
599
600 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
601 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
602 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
603 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
604 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
605 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
606
607 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
608 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
609 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
610 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
611 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
612 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
613 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
614 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7),
615
616 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0),
617 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1),
618 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2),
619 INIT_REGMAP_IRQ(AXP288, OT, 3, 7),
620
621 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0),
622 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1),
623 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2),
624 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3),
625 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
626 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
627 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
628 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
629
630 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
631 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
632 };
633
634 static const struct regmap_irq axp313a_regmap_irqs[] = {
635 INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE, 0, 7),
636 INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE, 0, 6),
637 INIT_REGMAP_IRQ(AXP313A, PEK_SHORT, 0, 5),
638 INIT_REGMAP_IRQ(AXP313A, PEK_LONG, 0, 4),
639 INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW, 0, 3),
640 INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW, 0, 2),
641 INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH, 0, 0),
642 };
643
644 static const struct regmap_irq axp717_regmap_irqs[] = {
645 INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL2, 0, 7),
646 INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL1, 0, 6),
647 INIT_REGMAP_IRQ(AXP717, GAUGE_NEW_SOC, 0, 4),
648 INIT_REGMAP_IRQ(AXP717, BOOST_OVER_V, 0, 2),
649 INIT_REGMAP_IRQ(AXP717, VBUS_OVER_V, 0, 1),
650 INIT_REGMAP_IRQ(AXP717, VBUS_FAULT, 0, 0),
651 INIT_REGMAP_IRQ(AXP717, VBUS_PLUGIN, 1, 7),
652 INIT_REGMAP_IRQ(AXP717, VBUS_REMOVAL, 1, 6),
653 INIT_REGMAP_IRQ(AXP717, BATT_PLUGIN, 1, 5),
654 INIT_REGMAP_IRQ(AXP717, BATT_REMOVAL, 1, 4),
655 INIT_REGMAP_IRQ(AXP717, PEK_SHORT, 1, 3),
656 INIT_REGMAP_IRQ(AXP717, PEK_LONG, 1, 2),
657 INIT_REGMAP_IRQ(AXP717, PEK_FAL_EDGE, 1, 1),
658 INIT_REGMAP_IRQ(AXP717, PEK_RIS_EDGE, 1, 0),
659 INIT_REGMAP_IRQ(AXP717, WDOG_EXPIRE, 2, 7),
660 INIT_REGMAP_IRQ(AXP717, LDO_OVER_CURR, 2, 6),
661 INIT_REGMAP_IRQ(AXP717, BATT_OVER_CURR, 2, 5),
662 INIT_REGMAP_IRQ(AXP717, CHARG_DONE, 2, 4),
663 INIT_REGMAP_IRQ(AXP717, CHARG, 2, 3),
664 INIT_REGMAP_IRQ(AXP717, DIE_TEMP_HIGH, 2, 2),
665 INIT_REGMAP_IRQ(AXP717, CHARG_TIMER, 2, 1),
666 INIT_REGMAP_IRQ(AXP717, BATT_OVER_V, 2, 0),
667 INIT_REGMAP_IRQ(AXP717, BC_USB_DONE, 3, 7),
668 INIT_REGMAP_IRQ(AXP717, BC_USB_CHNG, 3, 6),
669 INIT_REGMAP_IRQ(AXP717, BATT_QUIT_TEMP_HIGH, 3, 4),
670 INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_HIGH, 3, 3),
671 INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_LOW, 3, 2),
672 INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_HIGH, 3, 1),
673 INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_LOW, 3, 0),
674 INIT_REGMAP_IRQ(AXP717, TYPEC_REMOVE, 4, 6),
675 INIT_REGMAP_IRQ(AXP717, TYPEC_PLUGIN, 4, 5),
676 };
677
678 static const struct regmap_irq axp803_regmap_irqs[] = {
679 INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7),
680 INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6),
681 INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5),
682 INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4),
683 INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3),
684 INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2),
685 INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7),
686 INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6),
687 INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5),
688 INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4),
689 INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3),
690 INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2),
691 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7),
692 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6),
693 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5),
694 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4),
695 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3),
696 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2),
697 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1),
698 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0),
699 INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7),
700 INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2),
701 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1),
702 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0),
703 INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7),
704 INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6),
705 INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5),
706 INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4),
707 INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3),
708 INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2),
709 INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1),
710 INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0),
711 INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1),
712 INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0),
713 };
714
715 static const struct regmap_irq axp806_regmap_irqs[] = {
716 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0),
717 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1),
718 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3),
719 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4),
720 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5),
721 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6),
722 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7),
723 INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0),
724 INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1),
725 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4),
726 INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5),
727 INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6),
728 };
729
730 static const struct regmap_irq axp809_regmap_irqs[] = {
731 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7),
732 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6),
733 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5),
734 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4),
735 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3),
736 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2),
737 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1),
738 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7),
739 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6),
740 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5),
741 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4),
742 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3),
743 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2),
744 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7),
745 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6),
746 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5),
747 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4),
748 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3),
749 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2),
750 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1),
751 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0),
752 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7),
753 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1),
754 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0),
755 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7),
756 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6),
757 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5),
758 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4),
759 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3),
760 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2),
761 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1),
762 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
763 };
764
765 static const struct regmap_irq axp15060_regmap_irqs[] = {
766 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV1, 0, 0),
767 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV2, 0, 1),
768 INIT_REGMAP_IRQ(AXP15060, DCDC1_V_LOW, 0, 2),
769 INIT_REGMAP_IRQ(AXP15060, DCDC2_V_LOW, 0, 3),
770 INIT_REGMAP_IRQ(AXP15060, DCDC3_V_LOW, 0, 4),
771 INIT_REGMAP_IRQ(AXP15060, DCDC4_V_LOW, 0, 5),
772 INIT_REGMAP_IRQ(AXP15060, DCDC5_V_LOW, 0, 6),
773 INIT_REGMAP_IRQ(AXP15060, DCDC6_V_LOW, 0, 7),
774 INIT_REGMAP_IRQ(AXP15060, PEK_LONG, 1, 0),
775 INIT_REGMAP_IRQ(AXP15060, PEK_SHORT, 1, 1),
776 INIT_REGMAP_IRQ(AXP15060, GPIO1_INPUT, 1, 2),
777 INIT_REGMAP_IRQ(AXP15060, PEK_FAL_EDGE, 1, 3),
778 INIT_REGMAP_IRQ(AXP15060, PEK_RIS_EDGE, 1, 4),
779 INIT_REGMAP_IRQ(AXP15060, GPIO2_INPUT, 1, 5),
780 };
781
782 static const struct regmap_irq_chip axp152_regmap_irq_chip = {
783 .name = "axp152_irq_chip",
784 .status_base = AXP152_IRQ1_STATE,
785 .ack_base = AXP152_IRQ1_STATE,
786 .unmask_base = AXP152_IRQ1_EN,
787 .init_ack_masked = true,
788 .irqs = axp152_regmap_irqs,
789 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
790 .num_regs = 3,
791 };
792
axp192_get_irq_reg(struct regmap_irq_chip_data * data,unsigned int base,int index)793 static unsigned int axp192_get_irq_reg(struct regmap_irq_chip_data *data,
794 unsigned int base, int index)
795 {
796 /* linear mapping for IRQ1 to IRQ4 */
797 if (index < 4)
798 return base + index;
799
800 /* handle IRQ5 separately */
801 if (base == AXP192_IRQ1_EN)
802 return AXP192_IRQ5_EN;
803
804 return AXP192_IRQ5_STATE;
805 }
806
807 static const struct regmap_irq_chip axp192_regmap_irq_chip = {
808 .name = "axp192_irq_chip",
809 .status_base = AXP192_IRQ1_STATE,
810 .ack_base = AXP192_IRQ1_STATE,
811 .unmask_base = AXP192_IRQ1_EN,
812 .init_ack_masked = true,
813 .irqs = axp192_regmap_irqs,
814 .num_irqs = ARRAY_SIZE(axp192_regmap_irqs),
815 .num_regs = 5,
816 .get_irq_reg = axp192_get_irq_reg,
817 };
818
819 static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
820 .name = "axp20x_irq_chip",
821 .status_base = AXP20X_IRQ1_STATE,
822 .ack_base = AXP20X_IRQ1_STATE,
823 .unmask_base = AXP20X_IRQ1_EN,
824 .init_ack_masked = true,
825 .irqs = axp20x_regmap_irqs,
826 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
827 .num_regs = 5,
828
829 };
830
831 static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
832 .name = "axp22x_irq_chip",
833 .status_base = AXP20X_IRQ1_STATE,
834 .ack_base = AXP20X_IRQ1_STATE,
835 .unmask_base = AXP20X_IRQ1_EN,
836 .init_ack_masked = true,
837 .irqs = axp22x_regmap_irqs,
838 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
839 .num_regs = 5,
840 };
841
842 static const struct regmap_irq_chip axp288_regmap_irq_chip = {
843 .name = "axp288_irq_chip",
844 .status_base = AXP20X_IRQ1_STATE,
845 .ack_base = AXP20X_IRQ1_STATE,
846 .unmask_base = AXP20X_IRQ1_EN,
847 .init_ack_masked = true,
848 .irqs = axp288_regmap_irqs,
849 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
850 .num_regs = 6,
851
852 };
853
854 static const struct regmap_irq_chip axp313a_regmap_irq_chip = {
855 .name = "axp313a_irq_chip",
856 .status_base = AXP313A_IRQ_STATE,
857 .ack_base = AXP313A_IRQ_STATE,
858 .unmask_base = AXP313A_IRQ_EN,
859 .init_ack_masked = true,
860 .irqs = axp313a_regmap_irqs,
861 .num_irqs = ARRAY_SIZE(axp313a_regmap_irqs),
862 .num_regs = 1,
863 };
864
865 static const struct regmap_irq_chip axp717_regmap_irq_chip = {
866 .name = "axp717_irq_chip",
867 .status_base = AXP717_IRQ0_STATE,
868 .ack_base = AXP717_IRQ0_STATE,
869 .unmask_base = AXP717_IRQ0_EN,
870 .init_ack_masked = true,
871 .irqs = axp717_regmap_irqs,
872 .num_irqs = ARRAY_SIZE(axp717_regmap_irqs),
873 .num_regs = 5,
874 };
875
876 static const struct regmap_irq_chip axp803_regmap_irq_chip = {
877 .name = "axp803",
878 .status_base = AXP20X_IRQ1_STATE,
879 .ack_base = AXP20X_IRQ1_STATE,
880 .unmask_base = AXP20X_IRQ1_EN,
881 .init_ack_masked = true,
882 .irqs = axp803_regmap_irqs,
883 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs),
884 .num_regs = 6,
885 };
886
887 static const struct regmap_irq_chip axp806_regmap_irq_chip = {
888 .name = "axp806",
889 .status_base = AXP20X_IRQ1_STATE,
890 .ack_base = AXP20X_IRQ1_STATE,
891 .unmask_base = AXP20X_IRQ1_EN,
892 .init_ack_masked = true,
893 .irqs = axp806_regmap_irqs,
894 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs),
895 .num_regs = 2,
896 };
897
898 static const struct regmap_irq_chip axp809_regmap_irq_chip = {
899 .name = "axp809",
900 .status_base = AXP20X_IRQ1_STATE,
901 .ack_base = AXP20X_IRQ1_STATE,
902 .unmask_base = AXP20X_IRQ1_EN,
903 .init_ack_masked = true,
904 .irqs = axp809_regmap_irqs,
905 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs),
906 .num_regs = 5,
907 };
908
909 static const struct regmap_irq_chip axp15060_regmap_irq_chip = {
910 .name = "axp15060",
911 .status_base = AXP15060_IRQ1_STATE,
912 .ack_base = AXP15060_IRQ1_STATE,
913 .unmask_base = AXP15060_IRQ1_EN,
914 .init_ack_masked = true,
915 .irqs = axp15060_regmap_irqs,
916 .num_irqs = ARRAY_SIZE(axp15060_regmap_irqs),
917 .num_regs = 2,
918 };
919
920 static const struct mfd_cell axp192_cells[] = {
921 {
922 .name = "axp192-adc",
923 .of_compatible = "x-powers,axp192-adc",
924 }, {
925 .name = "axp20x-battery-power-supply",
926 .of_compatible = "x-powers,axp192-battery-power-supply",
927 }, {
928 .name = "axp20x-ac-power-supply",
929 .of_compatible = "x-powers,axp202-ac-power-supply",
930 .num_resources = ARRAY_SIZE(axp192_ac_power_supply_resources),
931 .resources = axp192_ac_power_supply_resources,
932 }, {
933 .name = "axp20x-usb-power-supply",
934 .of_compatible = "x-powers,axp192-usb-power-supply",
935 .num_resources = ARRAY_SIZE(axp192_usb_power_supply_resources),
936 .resources = axp192_usb_power_supply_resources,
937 },
938 { .name = "axp20x-regulator" },
939 };
940
941 static const struct mfd_cell axp20x_cells[] = {
942 {
943 .name = "axp20x-gpio",
944 .of_compatible = "x-powers,axp209-gpio",
945 }, {
946 .name = "axp20x-pek",
947 .num_resources = ARRAY_SIZE(axp20x_pek_resources),
948 .resources = axp20x_pek_resources,
949 }, {
950 .name = "axp20x-regulator",
951 }, {
952 .name = "axp20x-adc",
953 .of_compatible = "x-powers,axp209-adc",
954 }, {
955 .name = "axp20x-battery-power-supply",
956 .of_compatible = "x-powers,axp209-battery-power-supply",
957 }, {
958 .name = "axp20x-ac-power-supply",
959 .of_compatible = "x-powers,axp202-ac-power-supply",
960 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
961 .resources = axp20x_ac_power_supply_resources,
962 }, {
963 .name = "axp20x-usb-power-supply",
964 .of_compatible = "x-powers,axp202-usb-power-supply",
965 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources),
966 .resources = axp20x_usb_power_supply_resources,
967 },
968 };
969
970 static const struct mfd_cell axp221_cells[] = {
971 {
972 .name = "axp20x-gpio",
973 .of_compatible = "x-powers,axp221-gpio",
974 }, {
975 .name = "axp221-pek",
976 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
977 .resources = axp22x_pek_resources,
978 }, {
979 .name = "axp20x-regulator",
980 }, {
981 .name = "axp22x-adc",
982 .of_compatible = "x-powers,axp221-adc",
983 }, {
984 .name = "axp20x-ac-power-supply",
985 .of_compatible = "x-powers,axp221-ac-power-supply",
986 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
987 .resources = axp20x_ac_power_supply_resources,
988 }, {
989 .name = "axp20x-battery-power-supply",
990 .of_compatible = "x-powers,axp221-battery-power-supply",
991 }, {
992 .name = "axp20x-usb-power-supply",
993 .of_compatible = "x-powers,axp221-usb-power-supply",
994 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
995 .resources = axp22x_usb_power_supply_resources,
996 },
997 };
998
999 static const struct mfd_cell axp223_cells[] = {
1000 {
1001 .name = "axp20x-gpio",
1002 .of_compatible = "x-powers,axp221-gpio",
1003 }, {
1004 .name = "axp221-pek",
1005 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
1006 .resources = axp22x_pek_resources,
1007 }, {
1008 .name = "axp22x-adc",
1009 .of_compatible = "x-powers,axp221-adc",
1010 }, {
1011 .name = "axp20x-battery-power-supply",
1012 .of_compatible = "x-powers,axp221-battery-power-supply",
1013 }, {
1014 .name = "axp20x-regulator",
1015 }, {
1016 .name = "axp20x-ac-power-supply",
1017 .of_compatible = "x-powers,axp221-ac-power-supply",
1018 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
1019 .resources = axp20x_ac_power_supply_resources,
1020 }, {
1021 .name = "axp20x-usb-power-supply",
1022 .of_compatible = "x-powers,axp223-usb-power-supply",
1023 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
1024 .resources = axp22x_usb_power_supply_resources,
1025 },
1026 };
1027
1028 static const struct mfd_cell axp152_cells[] = {
1029 {
1030 .name = "axp20x-pek",
1031 .num_resources = ARRAY_SIZE(axp152_pek_resources),
1032 .resources = axp152_pek_resources,
1033 },
1034 };
1035
1036 static struct mfd_cell axp313a_cells[] = {
1037 /* AXP323 is sometimes paired with AXP717 as sub-PMIC */
1038 MFD_CELL_BASIC("axp20x-regulator", NULL, NULL, 0, 1),
1039 MFD_CELL_RES("axp313a-pek", axp313a_pek_resources),
1040 };
1041
1042 static struct mfd_cell axp717_cells[] = {
1043 MFD_CELL_NAME("axp20x-regulator"),
1044 MFD_CELL_RES("axp20x-pek", axp717_pek_resources),
1045 MFD_CELL_OF("axp717-adc",
1046 NULL, NULL, 0, 0, "x-powers,axp717-adc"),
1047 MFD_CELL_OF("axp20x-usb-power-supply",
1048 axp717_usb_power_supply_resources, NULL, 0, 0,
1049 "x-powers,axp717-usb-power-supply"),
1050 MFD_CELL_OF("axp20x-battery-power-supply",
1051 NULL, NULL, 0, 0, "x-powers,axp717-battery-power-supply"),
1052 };
1053
1054 static const struct resource axp288_adc_resources[] = {
1055 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
1056 };
1057
1058 static const struct resource axp288_extcon_resources[] = {
1059 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL),
1060 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE),
1061 DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG),
1062 DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG),
1063 };
1064
1065 static const struct resource axp288_charger_resources[] = {
1066 DEFINE_RES_IRQ(AXP288_IRQ_OV),
1067 DEFINE_RES_IRQ(AXP288_IRQ_DONE),
1068 DEFINE_RES_IRQ(AXP288_IRQ_CHARGING),
1069 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT),
1070 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER),
1071 DEFINE_RES_IRQ(AXP288_IRQ_QCBTU),
1072 DEFINE_RES_IRQ(AXP288_IRQ_CBTU),
1073 DEFINE_RES_IRQ(AXP288_IRQ_QCBTO),
1074 DEFINE_RES_IRQ(AXP288_IRQ_CBTO),
1075 };
1076
1077 static const char * const axp288_fuel_gauge_suppliers[] = { "axp288_charger" };
1078
1079 static const struct property_entry axp288_fuel_gauge_properties[] = {
1080 PROPERTY_ENTRY_STRING_ARRAY("supplied-from", axp288_fuel_gauge_suppliers),
1081 { }
1082 };
1083
1084 static const struct software_node axp288_fuel_gauge_sw_node = {
1085 .name = "axp288_fuel_gauge",
1086 .properties = axp288_fuel_gauge_properties,
1087 };
1088
1089 static const struct mfd_cell axp288_cells[] = {
1090 {
1091 .name = "axp288_adc",
1092 .num_resources = ARRAY_SIZE(axp288_adc_resources),
1093 .resources = axp288_adc_resources,
1094 }, {
1095 .name = "axp288_extcon",
1096 .num_resources = ARRAY_SIZE(axp288_extcon_resources),
1097 .resources = axp288_extcon_resources,
1098 }, {
1099 .name = "axp288_charger",
1100 .num_resources = ARRAY_SIZE(axp288_charger_resources),
1101 .resources = axp288_charger_resources,
1102 }, {
1103 .name = "axp288_fuel_gauge",
1104 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
1105 .resources = axp288_fuel_gauge_resources,
1106 .swnode = &axp288_fuel_gauge_sw_node,
1107 }, {
1108 .name = "axp221-pek",
1109 .num_resources = ARRAY_SIZE(axp288_power_button_resources),
1110 .resources = axp288_power_button_resources,
1111 }, {
1112 .name = "axp288_pmic_acpi",
1113 },
1114 };
1115
1116 static const struct mfd_cell axp803_cells[] = {
1117 {
1118 .name = "axp221-pek",
1119 .num_resources = ARRAY_SIZE(axp803_pek_resources),
1120 .resources = axp803_pek_resources,
1121 }, {
1122 .name = "axp20x-gpio",
1123 .of_compatible = "x-powers,axp813-gpio",
1124 }, {
1125 .name = "axp813-adc",
1126 .of_compatible = "x-powers,axp813-adc",
1127 }, {
1128 .name = "axp20x-battery-power-supply",
1129 .of_compatible = "x-powers,axp813-battery-power-supply",
1130 }, {
1131 .name = "axp20x-ac-power-supply",
1132 .of_compatible = "x-powers,axp813-ac-power-supply",
1133 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
1134 .resources = axp20x_ac_power_supply_resources,
1135 }, {
1136 .name = "axp20x-usb-power-supply",
1137 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources),
1138 .resources = axp803_usb_power_supply_resources,
1139 .of_compatible = "x-powers,axp813-usb-power-supply",
1140 },
1141 { .name = "axp20x-regulator" },
1142 };
1143
1144 static const struct mfd_cell axp806_self_working_cells[] = {
1145 {
1146 .name = "axp221-pek",
1147 .num_resources = ARRAY_SIZE(axp806_pek_resources),
1148 .resources = axp806_pek_resources,
1149 },
1150 { .name = "axp20x-regulator" },
1151 };
1152
1153 static const struct mfd_cell axp806_cells[] = {
1154 {
1155 .id = 2,
1156 .name = "axp20x-regulator",
1157 },
1158 };
1159
1160 static const struct mfd_cell axp809_cells[] = {
1161 {
1162 .name = "axp20x-gpio",
1163 .of_compatible = "x-powers,axp221-gpio",
1164 }, {
1165 .name = "axp221-pek",
1166 .num_resources = ARRAY_SIZE(axp809_pek_resources),
1167 .resources = axp809_pek_resources,
1168 }, {
1169 .id = 1,
1170 .name = "axp20x-regulator",
1171 },
1172 };
1173
1174 static const struct mfd_cell axp813_cells[] = {
1175 {
1176 .name = "axp221-pek",
1177 .num_resources = ARRAY_SIZE(axp803_pek_resources),
1178 .resources = axp803_pek_resources,
1179 }, {
1180 .name = "axp20x-regulator",
1181 }, {
1182 .name = "axp20x-gpio",
1183 .of_compatible = "x-powers,axp813-gpio",
1184 }, {
1185 .name = "axp813-adc",
1186 .of_compatible = "x-powers,axp813-adc",
1187 }, {
1188 .name = "axp20x-battery-power-supply",
1189 .of_compatible = "x-powers,axp813-battery-power-supply",
1190 }, {
1191 .name = "axp20x-ac-power-supply",
1192 .of_compatible = "x-powers,axp813-ac-power-supply",
1193 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
1194 .resources = axp20x_ac_power_supply_resources,
1195 }, {
1196 .name = "axp20x-usb-power-supply",
1197 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources),
1198 .resources = axp803_usb_power_supply_resources,
1199 .of_compatible = "x-powers,axp813-usb-power-supply",
1200 },
1201 };
1202
1203 static const struct mfd_cell axp15060_cells[] = {
1204 {
1205 .name = "axp221-pek",
1206 .num_resources = ARRAY_SIZE(axp15060_pek_resources),
1207 .resources = axp15060_pek_resources,
1208 }, {
1209 .name = "axp20x-regulator",
1210 },
1211 };
1212
1213 /* For boards that don't have IRQ line connected to SOC. */
1214 static const struct mfd_cell axp_regulator_only_cells[] = {
1215 {
1216 .name = "axp20x-regulator",
1217 },
1218 };
1219
axp20x_power_off(struct sys_off_data * data)1220 static int axp20x_power_off(struct sys_off_data *data)
1221 {
1222 struct axp20x_dev *axp20x = data->cb_data;
1223 unsigned int shutdown_reg;
1224
1225 switch (axp20x->variant) {
1226 case AXP313A_ID:
1227 shutdown_reg = AXP313A_SHUTDOWN_CTRL;
1228 break;
1229 default:
1230 shutdown_reg = AXP20X_OFF_CTRL;
1231 break;
1232 }
1233
1234 regmap_write(axp20x->regmap, shutdown_reg, AXP20X_OFF);
1235
1236 /* Give capacitors etc. time to drain to avoid kernel panic msg. */
1237 mdelay(500);
1238
1239 return NOTIFY_DONE;
1240 }
1241
axp20x_match_device(struct axp20x_dev * axp20x)1242 int axp20x_match_device(struct axp20x_dev *axp20x)
1243 {
1244 struct device *dev = axp20x->dev;
1245 const struct mfd_cell *cells_no_irq = NULL;
1246 int nr_cells_no_irq = 0;
1247
1248 axp20x->variant = (long)device_get_match_data(dev);
1249 switch (axp20x->variant) {
1250 case AXP152_ID:
1251 axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
1252 axp20x->cells = axp152_cells;
1253 axp20x->regmap_cfg = &axp152_regmap_config;
1254 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
1255 break;
1256 case AXP192_ID:
1257 axp20x->nr_cells = ARRAY_SIZE(axp192_cells);
1258 axp20x->cells = axp192_cells;
1259 axp20x->regmap_cfg = &axp192_regmap_config;
1260 axp20x->regmap_irq_chip = &axp192_regmap_irq_chip;
1261 break;
1262 case AXP202_ID:
1263 case AXP209_ID:
1264 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
1265 axp20x->cells = axp20x_cells;
1266 axp20x->regmap_cfg = &axp20x_regmap_config;
1267 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
1268 break;
1269 case AXP221_ID:
1270 axp20x->nr_cells = ARRAY_SIZE(axp221_cells);
1271 axp20x->cells = axp221_cells;
1272 axp20x->regmap_cfg = &axp22x_regmap_config;
1273 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
1274 break;
1275 case AXP223_ID:
1276 axp20x->nr_cells = ARRAY_SIZE(axp223_cells);
1277 axp20x->cells = axp223_cells;
1278 axp20x->regmap_cfg = &axp22x_regmap_config;
1279 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
1280 break;
1281 case AXP288_ID:
1282 axp20x->cells = axp288_cells;
1283 axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
1284 axp20x->regmap_cfg = &axp288_regmap_config;
1285 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
1286 axp20x->irq_flags = IRQF_TRIGGER_LOW;
1287 break;
1288 case AXP313A_ID:
1289 axp20x->nr_cells = ARRAY_SIZE(axp313a_cells);
1290 axp20x->cells = axp313a_cells;
1291 axp20x->regmap_cfg = &axp313a_regmap_config;
1292 axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip;
1293 break;
1294 case AXP717_ID:
1295 axp20x->nr_cells = ARRAY_SIZE(axp717_cells);
1296 axp20x->cells = axp717_cells;
1297 axp20x->regmap_cfg = &axp717_regmap_config;
1298 axp20x->regmap_irq_chip = &axp717_regmap_irq_chip;
1299 break;
1300 case AXP803_ID:
1301 axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
1302 axp20x->cells = axp803_cells;
1303 axp20x->regmap_cfg = &axp288_regmap_config;
1304 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
1305 break;
1306 case AXP806_ID:
1307 /*
1308 * Don't register the power key part if in slave mode or
1309 * if there is no interrupt line.
1310 */
1311 if (of_property_read_bool(axp20x->dev->of_node,
1312 "x-powers,self-working-mode")) {
1313 axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells);
1314 axp20x->cells = axp806_self_working_cells;
1315 } else {
1316 axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
1317 axp20x->cells = axp806_cells;
1318 }
1319 nr_cells_no_irq = ARRAY_SIZE(axp806_cells);
1320 cells_no_irq = axp806_cells;
1321 axp20x->regmap_cfg = &axp806_regmap_config;
1322 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
1323 break;
1324 case AXP809_ID:
1325 axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
1326 axp20x->cells = axp809_cells;
1327 axp20x->regmap_cfg = &axp22x_regmap_config;
1328 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
1329 break;
1330 case AXP813_ID:
1331 axp20x->nr_cells = ARRAY_SIZE(axp813_cells);
1332 axp20x->cells = axp813_cells;
1333 axp20x->regmap_cfg = &axp288_regmap_config;
1334 /*
1335 * The IRQ table given in the datasheet is incorrect.
1336 * In IRQ enable/status registers 1, there are separate
1337 * IRQs for ACIN and VBUS, instead of bits [7:5] being
1338 * the same as bits [4:2]. So it shares the same IRQs
1339 * as the AXP803, rather than the AXP288.
1340 */
1341 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
1342 break;
1343 case AXP15060_ID:
1344 axp20x->nr_cells = ARRAY_SIZE(axp15060_cells);
1345 axp20x->cells = axp15060_cells;
1346 axp20x->regmap_cfg = &axp15060_regmap_config;
1347 axp20x->regmap_irq_chip = &axp15060_regmap_irq_chip;
1348 break;
1349 default:
1350 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
1351 return -EINVAL;
1352 }
1353
1354 /*
1355 * Use an alternative cell array when no interrupt line is connected,
1356 * since IRQs are required by some drivers.
1357 * The default is the safe "regulator-only", as this works fine without
1358 * an interrupt specified.
1359 */
1360 if (axp20x->irq <= 0) {
1361 if (cells_no_irq) {
1362 axp20x->nr_cells = nr_cells_no_irq;
1363 axp20x->cells = cells_no_irq;
1364 } else {
1365 axp20x->nr_cells = ARRAY_SIZE(axp_regulator_only_cells);
1366 axp20x->cells = axp_regulator_only_cells;
1367 }
1368 }
1369
1370 dev_info(dev, "AXP20x variant %s found\n",
1371 axp20x_model_names[axp20x->variant]);
1372
1373 return 0;
1374 }
1375 EXPORT_SYMBOL(axp20x_match_device);
1376
axp20x_device_probe(struct axp20x_dev * axp20x)1377 int axp20x_device_probe(struct axp20x_dev *axp20x)
1378 {
1379 int ret;
1380
1381 /*
1382 * The AXP806 supports either master/standalone or slave mode.
1383 * Slave mode allows sharing the serial bus, even with multiple
1384 * AXP806 which all have the same hardware address.
1385 *
1386 * This is done with extra "serial interface address extension",
1387 * or AXP806_BUS_ADDR_EXT, and "register address extension", or
1388 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with
1389 * 1 bit customizable at the factory, and 1 bit depending on the
1390 * state of an external pin. The latter is writable. The device
1391 * will only respond to operations to its other registers when
1392 * the these device addressing bits (in the upper 4 bits of the
1393 * registers) match.
1394 *
1395 * By default we support an AXP806 chained to an AXP809 in slave
1396 * mode. Boards which use an AXP806 in master mode can set the
1397 * property "x-powers,master-mode" to override the default.
1398 */
1399 if (axp20x->variant == AXP806_ID) {
1400 if (of_property_read_bool(axp20x->dev->of_node,
1401 "x-powers,master-mode") ||
1402 of_property_read_bool(axp20x->dev->of_node,
1403 "x-powers,self-working-mode"))
1404 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
1405 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE);
1406 else
1407 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
1408 AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE);
1409 }
1410
1411 /* Only if there is an interrupt line connected towards the CPU. */
1412 if (axp20x->irq > 0) {
1413 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
1414 IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags,
1415 -1, axp20x->regmap_irq_chip,
1416 &axp20x->regmap_irqc);
1417 if (ret) {
1418 dev_err(axp20x->dev, "failed to add irq chip: %d\n",
1419 ret);
1420 return ret;
1421 }
1422 }
1423
1424 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
1425 axp20x->nr_cells, NULL, 0, NULL);
1426
1427 if (ret) {
1428 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
1429 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
1430 return ret;
1431 }
1432
1433 if (axp20x->variant != AXP288_ID)
1434 devm_register_sys_off_handler(axp20x->dev,
1435 SYS_OFF_MODE_POWER_OFF,
1436 SYS_OFF_PRIO_DEFAULT,
1437 axp20x_power_off, axp20x);
1438
1439 dev_info(axp20x->dev, "AXP20X driver loaded\n");
1440
1441 return 0;
1442 }
1443 EXPORT_SYMBOL(axp20x_device_probe);
1444
axp20x_device_remove(struct axp20x_dev * axp20x)1445 void axp20x_device_remove(struct axp20x_dev *axp20x)
1446 {
1447 mfd_remove_devices(axp20x->dev);
1448 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
1449 }
1450 EXPORT_SYMBOL(axp20x_device_remove);
1451
1452 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
1453 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
1454 MODULE_LICENSE("GPL");
1455