1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2017 exceet electronics GmbH
4 *
5 * Authors:
6 * Frieder Schrempf <frieder.schrempf@exceet.de>
7 * Boris Brezillon <boris.brezillon@bootlin.com>
8 */
9
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/mtd/spinand.h>
13
14 #define SPINAND_MFR_WINBOND 0xEF
15
16 #define WINBOND_CFG_BUF_READ BIT(3)
17
18 #define W25N04KV_STATUS_ECC_5_8_BITFLIPS (3 << 4)
19
20 static SPINAND_OP_VARIANTS(read_cache_variants,
21 SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
22 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
23 SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
24 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
25 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
26 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
27
28 static SPINAND_OP_VARIANTS(write_cache_variants,
29 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
30 SPINAND_PROG_LOAD(true, 0, NULL, 0));
31
32 static SPINAND_OP_VARIANTS(update_cache_variants,
33 SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
34 SPINAND_PROG_LOAD(false, 0, NULL, 0));
35
w25m02gv_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)36 static int w25m02gv_ooblayout_ecc(struct mtd_info *mtd, int section,
37 struct mtd_oob_region *region)
38 {
39 if (section > 3)
40 return -ERANGE;
41
42 region->offset = (16 * section) + 8;
43 region->length = 8;
44
45 return 0;
46 }
47
w25m02gv_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)48 static int w25m02gv_ooblayout_free(struct mtd_info *mtd, int section,
49 struct mtd_oob_region *region)
50 {
51 if (section > 3)
52 return -ERANGE;
53
54 region->offset = (16 * section) + 2;
55 region->length = 6;
56
57 return 0;
58 }
59
60 static const struct mtd_ooblayout_ops w25m02gv_ooblayout = {
61 .ecc = w25m02gv_ooblayout_ecc,
62 .free = w25m02gv_ooblayout_free,
63 };
64
w25m02gv_select_target(struct spinand_device * spinand,unsigned int target)65 static int w25m02gv_select_target(struct spinand_device *spinand,
66 unsigned int target)
67 {
68 struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0xc2, 1),
69 SPI_MEM_OP_NO_ADDR,
70 SPI_MEM_OP_NO_DUMMY,
71 SPI_MEM_OP_DATA_OUT(1,
72 spinand->scratchbuf,
73 1));
74
75 *spinand->scratchbuf = target;
76 return spi_mem_exec_op(spinand->spimem, &op);
77 }
78
w25n01kv_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)79 static int w25n01kv_ooblayout_ecc(struct mtd_info *mtd, int section,
80 struct mtd_oob_region *region)
81 {
82 if (section > 3)
83 return -ERANGE;
84
85 region->offset = 64 + (8 * section);
86 region->length = 7;
87
88 return 0;
89 }
90
w25n02kv_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)91 static int w25n02kv_ooblayout_ecc(struct mtd_info *mtd, int section,
92 struct mtd_oob_region *region)
93 {
94 if (section > 3)
95 return -ERANGE;
96
97 region->offset = 64 + (16 * section);
98 region->length = 13;
99
100 return 0;
101 }
102
w25n02kv_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)103 static int w25n02kv_ooblayout_free(struct mtd_info *mtd, int section,
104 struct mtd_oob_region *region)
105 {
106 if (section > 3)
107 return -ERANGE;
108
109 region->offset = (16 * section) + 2;
110 region->length = 14;
111
112 return 0;
113 }
114
115 static const struct mtd_ooblayout_ops w25n01kv_ooblayout = {
116 .ecc = w25n01kv_ooblayout_ecc,
117 .free = w25n02kv_ooblayout_free,
118 };
119
120 static const struct mtd_ooblayout_ops w25n02kv_ooblayout = {
121 .ecc = w25n02kv_ooblayout_ecc,
122 .free = w25n02kv_ooblayout_free,
123 };
124
w25n01jw_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)125 static int w25n01jw_ooblayout_ecc(struct mtd_info *mtd, int section,
126 struct mtd_oob_region *region)
127 {
128 if (section > 3)
129 return -ERANGE;
130
131 region->offset = (16 * section) + 12;
132 region->length = 4;
133
134 return 0;
135 }
136
w25n01jw_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)137 static int w25n01jw_ooblayout_free(struct mtd_info *mtd, int section,
138 struct mtd_oob_region *region)
139 {
140 if (section > 3)
141 return -ERANGE;
142
143 region->offset = (16 * section);
144 region->length = 12;
145
146 /* Extract BBM */
147 if (!section) {
148 region->offset += 2;
149 region->length -= 2;
150 }
151
152 return 0;
153 }
154
155 static const struct mtd_ooblayout_ops w25n01jw_ooblayout = {
156 .ecc = w25n01jw_ooblayout_ecc,
157 .free = w25n01jw_ooblayout_free,
158 };
159
w25n02kv_ecc_get_status(struct spinand_device * spinand,u8 status)160 static int w25n02kv_ecc_get_status(struct spinand_device *spinand,
161 u8 status)
162 {
163 struct nand_device *nand = spinand_to_nand(spinand);
164 u8 mbf = 0;
165 struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, spinand->scratchbuf);
166
167 switch (status & STATUS_ECC_MASK) {
168 case STATUS_ECC_NO_BITFLIPS:
169 return 0;
170
171 case STATUS_ECC_UNCOR_ERROR:
172 return -EBADMSG;
173
174 case STATUS_ECC_HAS_BITFLIPS:
175 case W25N04KV_STATUS_ECC_5_8_BITFLIPS:
176 /*
177 * Let's try to retrieve the real maximum number of bitflips
178 * in order to avoid forcing the wear-leveling layer to move
179 * data around if it's not necessary.
180 */
181 if (spi_mem_exec_op(spinand->spimem, &op))
182 return nanddev_get_ecc_conf(nand)->strength;
183
184 mbf = *(spinand->scratchbuf) >> 4;
185
186 if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength || !mbf))
187 return nanddev_get_ecc_conf(nand)->strength;
188
189 return mbf;
190
191 default:
192 break;
193 }
194
195 return -EINVAL;
196 }
197
198 static const struct spinand_info winbond_spinand_table[] = {
199 SPINAND_INFO("W25M02GV",
200 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xab, 0x21),
201 NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 2),
202 NAND_ECCREQ(1, 512),
203 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
204 &write_cache_variants,
205 &update_cache_variants),
206 0,
207 SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
208 SPINAND_SELECT_TARGET(w25m02gv_select_target)),
209 SPINAND_INFO("W25N01GV",
210 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x21),
211 NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
212 NAND_ECCREQ(1, 512),
213 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
214 &write_cache_variants,
215 &update_cache_variants),
216 0,
217 SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
218 SPINAND_INFO("W25N01KV",
219 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xae, 0x21),
220 NAND_MEMORG(1, 2048, 96, 64, 1024, 20, 1, 1, 1),
221 NAND_ECCREQ(4, 512),
222 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
223 &write_cache_variants,
224 &update_cache_variants),
225 0,
226 SPINAND_ECCINFO(&w25n01kv_ooblayout, w25n02kv_ecc_get_status)),
227 SPINAND_INFO("W25N02KV",
228 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x22),
229 NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
230 NAND_ECCREQ(8, 512),
231 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
232 &write_cache_variants,
233 &update_cache_variants),
234 0,
235 SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
236 SPINAND_INFO("W25N01JW",
237 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbc, 0x21),
238 NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
239 NAND_ECCREQ(1, 512),
240 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
241 &write_cache_variants,
242 &update_cache_variants),
243 0,
244 SPINAND_ECCINFO(&w25n01jw_ooblayout, NULL)),
245 SPINAND_INFO("W25N02JWZEIF",
246 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbf, 0x22),
247 NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 2, 1),
248 NAND_ECCREQ(1, 512),
249 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
250 &write_cache_variants,
251 &update_cache_variants),
252 0,
253 SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
254 SPINAND_INFO("W25N512GW",
255 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x20),
256 NAND_MEMORG(1, 2048, 64, 64, 512, 10, 1, 1, 1),
257 NAND_ECCREQ(1, 512),
258 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
259 &write_cache_variants,
260 &update_cache_variants),
261 0,
262 SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
263 SPINAND_INFO("W25N02KWZEIR",
264 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x22),
265 NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
266 NAND_ECCREQ(8, 512),
267 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
268 &write_cache_variants,
269 &update_cache_variants),
270 0,
271 SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
272 SPINAND_INFO("W25N01GWZEIG",
273 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x21),
274 NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
275 NAND_ECCREQ(1, 512),
276 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
277 &write_cache_variants,
278 &update_cache_variants),
279 0,
280 SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
281 SPINAND_INFO("W25N04KV",
282 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x23),
283 NAND_MEMORG(1, 2048, 128, 64, 4096, 40, 2, 1, 1),
284 NAND_ECCREQ(8, 512),
285 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
286 &write_cache_variants,
287 &update_cache_variants),
288 0,
289 SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
290 };
291
winbond_spinand_init(struct spinand_device * spinand)292 static int winbond_spinand_init(struct spinand_device *spinand)
293 {
294 struct nand_device *nand = spinand_to_nand(spinand);
295 unsigned int i;
296
297 /*
298 * Make sure all dies are in buffer read mode and not continuous read
299 * mode.
300 */
301 for (i = 0; i < nand->memorg.ntargets; i++) {
302 spinand_select_target(spinand, i);
303 spinand_upd_cfg(spinand, WINBOND_CFG_BUF_READ,
304 WINBOND_CFG_BUF_READ);
305 }
306
307 return 0;
308 }
309
310 static const struct spinand_manufacturer_ops winbond_spinand_manuf_ops = {
311 .init = winbond_spinand_init,
312 };
313
314 const struct spinand_manufacturer winbond_spinand_manufacturer = {
315 .id = SPINAND_MFR_WINBOND,
316 .name = "Winbond",
317 .chips = winbond_spinand_table,
318 .nchips = ARRAY_SIZE(winbond_spinand_table),
319 .ops = &winbond_spinand_manuf_ops,
320 };
321