1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2023 Advanced Micro Devices, Inc */
3
4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
5
6 #include <linux/pci.h>
7
8 #include <linux/pds/pds_common.h>
9
10 #include "core.h"
11
12 MODULE_DESCRIPTION(PDSC_DRV_DESCRIPTION);
13 MODULE_AUTHOR("Advanced Micro Devices, Inc");
14 MODULE_LICENSE("GPL");
15
16 /* Supported devices */
17 static const struct pci_device_id pdsc_id_table[] = {
18 { PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_CORE_PF) },
19 { PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_VDPA_VF) },
20 { 0, } /* end of table */
21 };
22 MODULE_DEVICE_TABLE(pci, pdsc_id_table);
23
pdsc_wdtimer_cb(struct timer_list * t)24 static void pdsc_wdtimer_cb(struct timer_list *t)
25 {
26 struct pdsc *pdsc = from_timer(pdsc, t, wdtimer);
27
28 dev_dbg(pdsc->dev, "%s: jiffies %ld\n", __func__, jiffies);
29 mod_timer(&pdsc->wdtimer,
30 round_jiffies(jiffies + pdsc->wdtimer_period));
31
32 queue_work(pdsc->wq, &pdsc->health_work);
33 }
34
pdsc_unmap_bars(struct pdsc * pdsc)35 static void pdsc_unmap_bars(struct pdsc *pdsc)
36 {
37 struct pdsc_dev_bar *bars = pdsc->bars;
38 unsigned int i;
39
40 pdsc->info_regs = NULL;
41 pdsc->cmd_regs = NULL;
42 pdsc->intr_status = NULL;
43 pdsc->intr_ctrl = NULL;
44
45 for (i = 0; i < PDS_CORE_BARS_MAX; i++) {
46 if (bars[i].vaddr)
47 pci_iounmap(pdsc->pdev, bars[i].vaddr);
48 bars[i].vaddr = NULL;
49 }
50 }
51
pdsc_map_bars(struct pdsc * pdsc)52 static int pdsc_map_bars(struct pdsc *pdsc)
53 {
54 struct pdsc_dev_bar *bar = pdsc->bars;
55 struct pci_dev *pdev = pdsc->pdev;
56 struct device *dev = pdsc->dev;
57 struct pdsc_dev_bar *bars;
58 unsigned int i, j;
59 int num_bars = 0;
60 int err;
61 u32 sig;
62
63 bars = pdsc->bars;
64
65 /* Since the PCI interface in the hardware is configurable,
66 * we need to poke into all the bars to find the set we're
67 * expecting.
68 */
69 for (i = 0, j = 0; i < PDS_CORE_BARS_MAX; i++) {
70 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
71 continue;
72
73 bars[j].len = pci_resource_len(pdev, i);
74 bars[j].bus_addr = pci_resource_start(pdev, i);
75 bars[j].res_index = i;
76
77 /* only map the whole bar 0 */
78 if (j > 0) {
79 bars[j].vaddr = NULL;
80 } else {
81 bars[j].vaddr = pci_iomap(pdev, i, bars[j].len);
82 if (!bars[j].vaddr) {
83 dev_err(dev, "Cannot map BAR %d, aborting\n", i);
84 return -ENODEV;
85 }
86 }
87
88 j++;
89 }
90 num_bars = j;
91
92 /* BAR0: dev_cmd and interrupts */
93 if (num_bars < 1) {
94 dev_err(dev, "No bars found\n");
95 err = -EFAULT;
96 goto err_out;
97 }
98
99 if (bar->len < PDS_CORE_BAR0_SIZE) {
100 dev_err(dev, "Resource bar size %lu too small\n", bar->len);
101 err = -EFAULT;
102 goto err_out;
103 }
104
105 pdsc->info_regs = bar->vaddr + PDS_CORE_BAR0_DEV_INFO_REGS_OFFSET;
106 pdsc->cmd_regs = bar->vaddr + PDS_CORE_BAR0_DEV_CMD_REGS_OFFSET;
107 pdsc->intr_status = bar->vaddr + PDS_CORE_BAR0_INTR_STATUS_OFFSET;
108 pdsc->intr_ctrl = bar->vaddr + PDS_CORE_BAR0_INTR_CTRL_OFFSET;
109
110 sig = ioread32(&pdsc->info_regs->signature);
111 if (sig != PDS_CORE_DEV_INFO_SIGNATURE) {
112 dev_err(dev, "Incompatible firmware signature %x", sig);
113 err = -EFAULT;
114 goto err_out;
115 }
116
117 /* BAR1: doorbells */
118 bar++;
119 if (num_bars < 2) {
120 dev_err(dev, "Doorbell bar missing\n");
121 err = -EFAULT;
122 goto err_out;
123 }
124
125 pdsc->db_pages = bar->vaddr;
126 pdsc->phy_db_pages = bar->bus_addr;
127
128 return 0;
129
130 err_out:
131 pdsc_unmap_bars(pdsc);
132 return err;
133 }
134
pdsc_map_dbpage(struct pdsc * pdsc,int page_num)135 void __iomem *pdsc_map_dbpage(struct pdsc *pdsc, int page_num)
136 {
137 return pci_iomap_range(pdsc->pdev,
138 pdsc->bars[PDS_CORE_PCI_BAR_DBELL].res_index,
139 (u64)page_num << PAGE_SHIFT, PAGE_SIZE);
140 }
141
pdsc_sriov_configure(struct pci_dev * pdev,int num_vfs)142 static int pdsc_sriov_configure(struct pci_dev *pdev, int num_vfs)
143 {
144 struct pdsc *pdsc = pci_get_drvdata(pdev);
145 struct device *dev = pdsc->dev;
146 int ret = 0;
147
148 if (num_vfs > 0) {
149 pdsc->vfs = kcalloc(num_vfs, sizeof(struct pdsc_vf),
150 GFP_KERNEL);
151 if (!pdsc->vfs)
152 return -ENOMEM;
153 pdsc->num_vfs = num_vfs;
154
155 ret = pci_enable_sriov(pdev, num_vfs);
156 if (ret) {
157 dev_err(dev, "Cannot enable SRIOV: %pe\n",
158 ERR_PTR(ret));
159 goto no_vfs;
160 }
161
162 return num_vfs;
163 }
164
165 no_vfs:
166 pci_disable_sriov(pdev);
167
168 kfree(pdsc->vfs);
169 pdsc->vfs = NULL;
170 pdsc->num_vfs = 0;
171
172 return ret;
173 }
174
pdsc_init_vf(struct pdsc * vf)175 static int pdsc_init_vf(struct pdsc *vf)
176 {
177 struct devlink *dl;
178 struct pdsc *pf;
179 int err;
180
181 pf = pdsc_get_pf_struct(vf->pdev);
182 if (IS_ERR_OR_NULL(pf))
183 return PTR_ERR(pf) ?: -1;
184
185 vf->vf_id = pci_iov_vf_id(vf->pdev);
186
187 dl = priv_to_devlink(vf);
188 devl_lock(dl);
189 devl_register(dl);
190 devl_unlock(dl);
191
192 pf->vfs[vf->vf_id].vf = vf;
193 err = pdsc_auxbus_dev_add(vf, pf, PDS_DEV_TYPE_VDPA,
194 &pf->vfs[vf->vf_id].padev);
195 if (err) {
196 devl_lock(dl);
197 devl_unregister(dl);
198 devl_unlock(dl);
199 }
200
201 return err;
202 }
203
204 static const struct devlink_health_reporter_ops pdsc_fw_reporter_ops = {
205 .name = "fw",
206 .diagnose = pdsc_fw_reporter_diagnose,
207 };
208
209 static const struct devlink_param pdsc_dl_params[] = {
210 DEVLINK_PARAM_GENERIC(ENABLE_VNET,
211 BIT(DEVLINK_PARAM_CMODE_RUNTIME),
212 pdsc_dl_enable_get,
213 pdsc_dl_enable_set,
214 pdsc_dl_enable_validate),
215 };
216
217 #define PDSC_WQ_NAME_LEN 24
218
pdsc_init_pf(struct pdsc * pdsc)219 static int pdsc_init_pf(struct pdsc *pdsc)
220 {
221 struct devlink_health_reporter *hr;
222 char wq_name[PDSC_WQ_NAME_LEN];
223 struct devlink *dl;
224 int err;
225
226 pcie_print_link_status(pdsc->pdev);
227
228 err = pci_request_regions(pdsc->pdev, PDS_CORE_DRV_NAME);
229 if (err) {
230 dev_err(pdsc->dev, "Cannot request PCI regions: %pe\n",
231 ERR_PTR(err));
232 return err;
233 }
234
235 err = pdsc_map_bars(pdsc);
236 if (err)
237 goto err_out_release_regions;
238
239 /* General workqueue and timer, but don't start timer yet */
240 snprintf(wq_name, sizeof(wq_name), "%s.%d", PDS_CORE_DRV_NAME, pdsc->uid);
241 pdsc->wq = create_singlethread_workqueue(wq_name);
242 INIT_WORK(&pdsc->health_work, pdsc_health_thread);
243 INIT_WORK(&pdsc->pci_reset_work, pdsc_pci_reset_thread);
244 timer_setup(&pdsc->wdtimer, pdsc_wdtimer_cb, 0);
245 pdsc->wdtimer_period = PDSC_WATCHDOG_SECS * HZ;
246
247 mutex_init(&pdsc->devcmd_lock);
248 mutex_init(&pdsc->config_lock);
249 spin_lock_init(&pdsc->adminq_lock);
250
251 mutex_lock(&pdsc->config_lock);
252 set_bit(PDSC_S_FW_DEAD, &pdsc->state);
253
254 err = pdsc_setup(pdsc, PDSC_SETUP_INIT);
255 if (err) {
256 mutex_unlock(&pdsc->config_lock);
257 goto err_out_unmap_bars;
258 }
259
260 err = pdsc_start(pdsc);
261 if (err) {
262 mutex_unlock(&pdsc->config_lock);
263 goto err_out_teardown;
264 }
265
266 mutex_unlock(&pdsc->config_lock);
267
268 dl = priv_to_devlink(pdsc);
269 devl_lock(dl);
270 err = devl_params_register(dl, pdsc_dl_params,
271 ARRAY_SIZE(pdsc_dl_params));
272 if (err) {
273 devl_unlock(dl);
274 dev_warn(pdsc->dev, "Failed to register devlink params: %pe\n",
275 ERR_PTR(err));
276 goto err_out_stop;
277 }
278
279 hr = devl_health_reporter_create(dl, &pdsc_fw_reporter_ops, 0, pdsc);
280 if (IS_ERR(hr)) {
281 devl_unlock(dl);
282 dev_warn(pdsc->dev, "Failed to create fw reporter: %pe\n", hr);
283 err = PTR_ERR(hr);
284 goto err_out_unreg_params;
285 }
286 pdsc->fw_reporter = hr;
287
288 devl_register(dl);
289 devl_unlock(dl);
290
291 /* Lastly, start the health check timer */
292 mod_timer(&pdsc->wdtimer, round_jiffies(jiffies + pdsc->wdtimer_period));
293
294 return 0;
295
296 err_out_unreg_params:
297 devlink_params_unregister(dl, pdsc_dl_params,
298 ARRAY_SIZE(pdsc_dl_params));
299 err_out_stop:
300 pdsc_stop(pdsc);
301 err_out_teardown:
302 pdsc_teardown(pdsc, PDSC_TEARDOWN_REMOVING);
303 err_out_unmap_bars:
304 timer_shutdown_sync(&pdsc->wdtimer);
305 if (pdsc->wq)
306 destroy_workqueue(pdsc->wq);
307 mutex_destroy(&pdsc->config_lock);
308 mutex_destroy(&pdsc->devcmd_lock);
309 pci_free_irq_vectors(pdsc->pdev);
310 pdsc_unmap_bars(pdsc);
311 err_out_release_regions:
312 pci_release_regions(pdsc->pdev);
313
314 return err;
315 }
316
317 static const struct devlink_ops pdsc_dl_ops = {
318 .info_get = pdsc_dl_info_get,
319 .flash_update = pdsc_dl_flash_update,
320 };
321
322 static const struct devlink_ops pdsc_dl_vf_ops = {
323 };
324
325 static DEFINE_IDA(pdsc_ida);
326
pdsc_probe(struct pci_dev * pdev,const struct pci_device_id * ent)327 static int pdsc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
328 {
329 struct device *dev = &pdev->dev;
330 const struct devlink_ops *ops;
331 struct devlink *dl;
332 struct pdsc *pdsc;
333 bool is_pf;
334 int err;
335
336 is_pf = !pdev->is_virtfn;
337 ops = is_pf ? &pdsc_dl_ops : &pdsc_dl_vf_ops;
338 dl = devlink_alloc(ops, sizeof(struct pdsc), dev);
339 if (!dl)
340 return -ENOMEM;
341 pdsc = devlink_priv(dl);
342
343 pdsc->pdev = pdev;
344 pdsc->dev = &pdev->dev;
345 set_bit(PDSC_S_INITING_DRIVER, &pdsc->state);
346 pci_set_drvdata(pdev, pdsc);
347 pdsc_debugfs_add_dev(pdsc);
348
349 err = ida_alloc(&pdsc_ida, GFP_KERNEL);
350 if (err < 0) {
351 dev_err(pdsc->dev, "%s: id alloc failed: %pe\n",
352 __func__, ERR_PTR(err));
353 goto err_out_free_devlink;
354 }
355 pdsc->uid = err;
356
357 /* Query system for DMA addressing limitation for the device. */
358 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(PDS_CORE_ADDR_LEN));
359 if (err) {
360 dev_err(dev, "Unable to obtain 64-bit DMA for consistent allocations, aborting: %pe\n",
361 ERR_PTR(err));
362 goto err_out_free_ida;
363 }
364
365 err = pci_enable_device(pdev);
366 if (err) {
367 dev_err(dev, "Cannot enable PCI device: %pe\n", ERR_PTR(err));
368 goto err_out_free_ida;
369 }
370 pci_set_master(pdev);
371
372 if (is_pf)
373 err = pdsc_init_pf(pdsc);
374 else
375 err = pdsc_init_vf(pdsc);
376 if (err) {
377 dev_err(dev, "Cannot init device: %pe\n", ERR_PTR(err));
378 goto err_out_disable_device;
379 }
380
381 clear_bit(PDSC_S_INITING_DRIVER, &pdsc->state);
382 return 0;
383
384 err_out_disable_device:
385 pci_disable_device(pdev);
386 err_out_free_ida:
387 ida_free(&pdsc_ida, pdsc->uid);
388 err_out_free_devlink:
389 pdsc_debugfs_del_dev(pdsc);
390 devlink_free(dl);
391
392 return err;
393 }
394
pdsc_remove(struct pci_dev * pdev)395 static void pdsc_remove(struct pci_dev *pdev)
396 {
397 struct pdsc *pdsc = pci_get_drvdata(pdev);
398 struct devlink *dl;
399
400 /* Unhook the registrations first to be sure there
401 * are no requests while we're stopping.
402 */
403 dl = priv_to_devlink(pdsc);
404 devl_lock(dl);
405 devl_unregister(dl);
406 if (!pdev->is_virtfn) {
407 if (pdsc->fw_reporter) {
408 devl_health_reporter_destroy(pdsc->fw_reporter);
409 pdsc->fw_reporter = NULL;
410 }
411 devl_params_unregister(dl, pdsc_dl_params,
412 ARRAY_SIZE(pdsc_dl_params));
413 }
414 devl_unlock(dl);
415
416 if (pdev->is_virtfn) {
417 struct pdsc *pf;
418
419 pf = pdsc_get_pf_struct(pdsc->pdev);
420 if (!IS_ERR(pf)) {
421 pdsc_auxbus_dev_del(pdsc, pf, &pf->vfs[pdsc->vf_id].padev);
422 pf->vfs[pdsc->vf_id].vf = NULL;
423 }
424 } else {
425 /* Remove the VFs and their aux_bus connections before other
426 * cleanup so that the clients can use the AdminQ to cleanly
427 * shut themselves down.
428 */
429 pdsc_sriov_configure(pdev, 0);
430
431 timer_shutdown_sync(&pdsc->wdtimer);
432 if (pdsc->wq)
433 destroy_workqueue(pdsc->wq);
434
435 mutex_lock(&pdsc->config_lock);
436 set_bit(PDSC_S_STOPPING_DRIVER, &pdsc->state);
437
438 pdsc_stop(pdsc);
439 pdsc_teardown(pdsc, PDSC_TEARDOWN_REMOVING);
440 mutex_unlock(&pdsc->config_lock);
441 mutex_destroy(&pdsc->config_lock);
442 mutex_destroy(&pdsc->devcmd_lock);
443
444 pdsc_unmap_bars(pdsc);
445 pci_release_regions(pdev);
446 }
447
448 pci_disable_device(pdev);
449
450 ida_free(&pdsc_ida, pdsc->uid);
451 pdsc_debugfs_del_dev(pdsc);
452 devlink_free(dl);
453 }
454
pdsc_stop_health_thread(struct pdsc * pdsc)455 static void pdsc_stop_health_thread(struct pdsc *pdsc)
456 {
457 if (pdsc->pdev->is_virtfn)
458 return;
459
460 timer_shutdown_sync(&pdsc->wdtimer);
461 if (pdsc->health_work.func)
462 cancel_work_sync(&pdsc->health_work);
463 }
464
pdsc_restart_health_thread(struct pdsc * pdsc)465 static void pdsc_restart_health_thread(struct pdsc *pdsc)
466 {
467 if (pdsc->pdev->is_virtfn)
468 return;
469
470 timer_setup(&pdsc->wdtimer, pdsc_wdtimer_cb, 0);
471 mod_timer(&pdsc->wdtimer, jiffies + 1);
472 }
473
pdsc_reset_prepare(struct pci_dev * pdev)474 static void pdsc_reset_prepare(struct pci_dev *pdev)
475 {
476 struct pdsc *pdsc = pci_get_drvdata(pdev);
477
478 pdsc_stop_health_thread(pdsc);
479 pdsc_fw_down(pdsc);
480
481 if (pdev->is_virtfn) {
482 struct pdsc *pf;
483
484 pf = pdsc_get_pf_struct(pdsc->pdev);
485 if (!IS_ERR(pf))
486 pdsc_auxbus_dev_del(pdsc, pf,
487 &pf->vfs[pdsc->vf_id].padev);
488 }
489
490 pdsc_unmap_bars(pdsc);
491 pci_release_regions(pdev);
492 if (pci_is_enabled(pdev))
493 pci_disable_device(pdev);
494 }
495
pdsc_reset_done(struct pci_dev * pdev)496 static void pdsc_reset_done(struct pci_dev *pdev)
497 {
498 struct pdsc *pdsc = pci_get_drvdata(pdev);
499 struct device *dev = pdsc->dev;
500 int err;
501
502 err = pci_enable_device(pdev);
503 if (err) {
504 dev_err(dev, "Cannot enable PCI device: %pe\n", ERR_PTR(err));
505 return;
506 }
507 pci_set_master(pdev);
508
509 if (!pdev->is_virtfn) {
510 pcie_print_link_status(pdsc->pdev);
511
512 err = pci_request_regions(pdsc->pdev, PDS_CORE_DRV_NAME);
513 if (err) {
514 dev_err(pdsc->dev, "Cannot request PCI regions: %pe\n",
515 ERR_PTR(err));
516 return;
517 }
518
519 err = pdsc_map_bars(pdsc);
520 if (err)
521 return;
522 }
523
524 pdsc_fw_up(pdsc);
525 pdsc_restart_health_thread(pdsc);
526
527 if (pdev->is_virtfn) {
528 struct pdsc *pf;
529
530 pf = pdsc_get_pf_struct(pdsc->pdev);
531 if (!IS_ERR(pf))
532 pdsc_auxbus_dev_add(pdsc, pf, PDS_DEV_TYPE_VDPA,
533 &pf->vfs[pdsc->vf_id].padev);
534 }
535 }
536
pdsc_pci_error_detected(struct pci_dev * pdev,pci_channel_state_t error)537 static pci_ers_result_t pdsc_pci_error_detected(struct pci_dev *pdev,
538 pci_channel_state_t error)
539 {
540 if (error == pci_channel_io_frozen) {
541 pdsc_reset_prepare(pdev);
542 return PCI_ERS_RESULT_NEED_RESET;
543 }
544
545 return PCI_ERS_RESULT_NONE;
546 }
547
pdsc_pci_error_resume(struct pci_dev * pdev)548 static void pdsc_pci_error_resume(struct pci_dev *pdev)
549 {
550 struct pdsc *pdsc = pci_get_drvdata(pdev);
551
552 if (test_bit(PDSC_S_FW_DEAD, &pdsc->state))
553 pci_reset_function_locked(pdev);
554 }
555
556 static const struct pci_error_handlers pdsc_err_handler = {
557 /* FLR handling */
558 .reset_prepare = pdsc_reset_prepare,
559 .reset_done = pdsc_reset_done,
560
561 /* AER handling */
562 .error_detected = pdsc_pci_error_detected,
563 .resume = pdsc_pci_error_resume,
564 };
565
566 static struct pci_driver pdsc_driver = {
567 .name = PDS_CORE_DRV_NAME,
568 .id_table = pdsc_id_table,
569 .probe = pdsc_probe,
570 .remove = pdsc_remove,
571 .sriov_configure = pdsc_sriov_configure,
572 .err_handler = &pdsc_err_handler,
573 };
574
pdsc_get_pf_struct(struct pci_dev * vf_pdev)575 void *pdsc_get_pf_struct(struct pci_dev *vf_pdev)
576 {
577 return pci_iov_get_pf_drvdata(vf_pdev, &pdsc_driver);
578 }
579 EXPORT_SYMBOL_GPL(pdsc_get_pf_struct);
580
pdsc_init_module(void)581 static int __init pdsc_init_module(void)
582 {
583 if (strcmp(KBUILD_MODNAME, PDS_CORE_DRV_NAME))
584 return -EINVAL;
585
586 pdsc_debugfs_create();
587 return pci_register_driver(&pdsc_driver);
588 }
589
pdsc_cleanup_module(void)590 static void __exit pdsc_cleanup_module(void)
591 {
592 pci_unregister_driver(&pdsc_driver);
593 pdsc_debugfs_destroy();
594 }
595
596 module_init(pdsc_init_module);
597 module_exit(pdsc_cleanup_module);
598