1 // SPDX-License-Identifier: GPL-2.0
2 /* Ethernet device driver for Cortina Systems Gemini SoC
3 * Also known as the StorLink SL3512 and SL3516 (SL351x) or Lepus
4 * Net Engine and Gigabit Ethernet MAC (GMAC)
5 * This hardware contains a TCP Offload Engine (TOE) but currently the
6 * driver does not make use of it.
7 *
8 * Authors:
9 * Linus Walleij <linus.walleij@linaro.org>
10 * Tobias Waldvogel <tobias.waldvogel@gmail.com> (OpenWRT)
11 * Michał Mirosław <mirq-linux@rere.qmqm.pl>
12 * Paulius Zaleckas <paulius.zaleckas@gmail.com>
13 * Giuseppe De Robertis <Giuseppe.DeRobertis@ba.infn.it>
14 * Gary Chen & Ch Hsu Storlink Semiconductor
15 */
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/spinlock.h>
21 #include <linux/slab.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/cache.h>
24 #include <linux/interrupt.h>
25 #include <linux/reset.h>
26 #include <linux/clk.h>
27 #include <linux/of.h>
28 #include <linux/of_mdio.h>
29 #include <linux/of_net.h>
30 #include <linux/of_platform.h>
31 #include <linux/etherdevice.h>
32 #include <linux/if_vlan.h>
33 #include <linux/skbuff.h>
34 #include <linux/phy.h>
35 #include <linux/crc32.h>
36 #include <linux/ethtool.h>
37 #include <linux/tcp.h>
38 #include <linux/u64_stats_sync.h>
39
40 #include <linux/in.h>
41 #include <linux/ip.h>
42 #include <linux/ipv6.h>
43
44 #include "gemini.h"
45
46 #define DRV_NAME "gmac-gemini"
47
48 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
49 static int debug = -1;
50 module_param(debug, int, 0);
51 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
52
53 #define HSIZE_8 0x00
54 #define HSIZE_16 0x01
55 #define HSIZE_32 0x02
56
57 #define HBURST_SINGLE 0x00
58 #define HBURST_INCR 0x01
59 #define HBURST_INCR4 0x02
60 #define HBURST_INCR8 0x03
61
62 #define HPROT_DATA_CACHE BIT(0)
63 #define HPROT_PRIVILIGED BIT(1)
64 #define HPROT_BUFFERABLE BIT(2)
65 #define HPROT_CACHABLE BIT(3)
66
67 #define DEFAULT_RX_COALESCE_NSECS 0
68 #define DEFAULT_GMAC_RXQ_ORDER 9
69 #define DEFAULT_GMAC_TXQ_ORDER 8
70 #define DEFAULT_RX_BUF_ORDER 11
71 #define TX_MAX_FRAGS 16
72 #define TX_QUEUE_NUM 1 /* max: 6 */
73 #define RX_MAX_ALLOC_ORDER 2
74
75 #define GMAC0_IRQ0_2 (GMAC0_TXDERR_INT_BIT | GMAC0_TXPERR_INT_BIT | \
76 GMAC0_RXDERR_INT_BIT | GMAC0_RXPERR_INT_BIT)
77 #define GMAC0_IRQ0_TXQ0_INTS (GMAC0_SWTQ00_EOF_INT_BIT | \
78 GMAC0_SWTQ00_FIN_INT_BIT)
79 #define GMAC0_IRQ4_8 (GMAC0_MIB_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT)
80
81 #define GMAC_OFFLOAD_FEATURES (NETIF_F_SG | NETIF_F_IP_CSUM | \
82 NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | \
83 NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6)
84
85 /**
86 * struct gmac_queue_page - page buffer per-page info
87 * @page: the page struct
88 * @mapping: the dma address handle
89 */
90 struct gmac_queue_page {
91 struct page *page;
92 dma_addr_t mapping;
93 };
94
95 struct gmac_txq {
96 struct gmac_txdesc *ring;
97 struct sk_buff **skb;
98 unsigned int cptr;
99 unsigned int noirq_packets;
100 };
101
102 struct gemini_ethernet;
103
104 struct gemini_ethernet_port {
105 u8 id; /* 0 or 1 */
106
107 struct gemini_ethernet *geth;
108 struct net_device *netdev;
109 struct device *dev;
110 void __iomem *dma_base;
111 void __iomem *gmac_base;
112 struct clk *pclk;
113 struct reset_control *reset;
114 int irq;
115 __le32 mac_addr[3];
116
117 void __iomem *rxq_rwptr;
118 struct gmac_rxdesc *rxq_ring;
119 unsigned int rxq_order;
120
121 struct napi_struct napi;
122 struct hrtimer rx_coalesce_timer;
123 unsigned int rx_coalesce_nsecs;
124 unsigned int freeq_refill;
125 struct gmac_txq txq[TX_QUEUE_NUM];
126 unsigned int txq_order;
127 unsigned int irq_every_tx_packets;
128
129 dma_addr_t rxq_dma_base;
130 dma_addr_t txq_dma_base;
131
132 unsigned int msg_enable;
133 spinlock_t config_lock; /* Locks config register */
134
135 struct u64_stats_sync tx_stats_syncp;
136 struct u64_stats_sync rx_stats_syncp;
137 struct u64_stats_sync ir_stats_syncp;
138
139 struct rtnl_link_stats64 stats;
140 u64 hw_stats[RX_STATS_NUM];
141 u64 rx_stats[RX_STATUS_NUM];
142 u64 rx_csum_stats[RX_CHKSUM_NUM];
143 u64 rx_napi_exits;
144 u64 tx_frag_stats[TX_MAX_FRAGS];
145 u64 tx_frags_linearized;
146 u64 tx_hw_csummed;
147 };
148
149 struct gemini_ethernet {
150 struct device *dev;
151 void __iomem *base;
152 struct gemini_ethernet_port *port0;
153 struct gemini_ethernet_port *port1;
154 bool initialized;
155
156 spinlock_t irq_lock; /* Locks IRQ-related registers */
157 unsigned int freeq_order;
158 unsigned int freeq_frag_order;
159 struct gmac_rxdesc *freeq_ring;
160 dma_addr_t freeq_dma_base;
161 struct gmac_queue_page *freeq_pages;
162 unsigned int num_freeq_pages;
163 spinlock_t freeq_lock; /* Locks queue from reentrance */
164 };
165
166 #define GMAC_STATS_NUM ( \
167 RX_STATS_NUM + RX_STATUS_NUM + RX_CHKSUM_NUM + 1 + \
168 TX_MAX_FRAGS + 2)
169
170 static const char gmac_stats_strings[GMAC_STATS_NUM][ETH_GSTRING_LEN] = {
171 "GMAC_IN_DISCARDS",
172 "GMAC_IN_ERRORS",
173 "GMAC_IN_MCAST",
174 "GMAC_IN_BCAST",
175 "GMAC_IN_MAC1",
176 "GMAC_IN_MAC2",
177 "RX_STATUS_GOOD_FRAME",
178 "RX_STATUS_TOO_LONG_GOOD_CRC",
179 "RX_STATUS_RUNT_FRAME",
180 "RX_STATUS_SFD_NOT_FOUND",
181 "RX_STATUS_CRC_ERROR",
182 "RX_STATUS_TOO_LONG_BAD_CRC",
183 "RX_STATUS_ALIGNMENT_ERROR",
184 "RX_STATUS_TOO_LONG_BAD_ALIGN",
185 "RX_STATUS_RX_ERR",
186 "RX_STATUS_DA_FILTERED",
187 "RX_STATUS_BUFFER_FULL",
188 "RX_STATUS_11",
189 "RX_STATUS_12",
190 "RX_STATUS_13",
191 "RX_STATUS_14",
192 "RX_STATUS_15",
193 "RX_CHKSUM_IP_UDP_TCP_OK",
194 "RX_CHKSUM_IP_OK_ONLY",
195 "RX_CHKSUM_NONE",
196 "RX_CHKSUM_3",
197 "RX_CHKSUM_IP_ERR_UNKNOWN",
198 "RX_CHKSUM_IP_ERR",
199 "RX_CHKSUM_TCP_UDP_ERR",
200 "RX_CHKSUM_7",
201 "RX_NAPI_EXITS",
202 "TX_FRAGS[1]",
203 "TX_FRAGS[2]",
204 "TX_FRAGS[3]",
205 "TX_FRAGS[4]",
206 "TX_FRAGS[5]",
207 "TX_FRAGS[6]",
208 "TX_FRAGS[7]",
209 "TX_FRAGS[8]",
210 "TX_FRAGS[9]",
211 "TX_FRAGS[10]",
212 "TX_FRAGS[11]",
213 "TX_FRAGS[12]",
214 "TX_FRAGS[13]",
215 "TX_FRAGS[14]",
216 "TX_FRAGS[15]",
217 "TX_FRAGS[16+]",
218 "TX_FRAGS_LINEARIZED",
219 "TX_HW_CSUMMED",
220 };
221
222 static void gmac_dump_dma_state(struct net_device *netdev);
223
gmac_update_config0_reg(struct net_device * netdev,u32 val,u32 vmask)224 static void gmac_update_config0_reg(struct net_device *netdev,
225 u32 val, u32 vmask)
226 {
227 struct gemini_ethernet_port *port = netdev_priv(netdev);
228 unsigned long flags;
229 u32 reg;
230
231 spin_lock_irqsave(&port->config_lock, flags);
232
233 reg = readl(port->gmac_base + GMAC_CONFIG0);
234 reg = (reg & ~vmask) | val;
235 writel(reg, port->gmac_base + GMAC_CONFIG0);
236
237 spin_unlock_irqrestore(&port->config_lock, flags);
238 }
239
gmac_enable_tx_rx(struct net_device * netdev)240 static void gmac_enable_tx_rx(struct net_device *netdev)
241 {
242 struct gemini_ethernet_port *port = netdev_priv(netdev);
243 unsigned long flags;
244 u32 reg;
245
246 spin_lock_irqsave(&port->config_lock, flags);
247
248 reg = readl(port->gmac_base + GMAC_CONFIG0);
249 reg &= ~CONFIG0_TX_RX_DISABLE;
250 writel(reg, port->gmac_base + GMAC_CONFIG0);
251
252 spin_unlock_irqrestore(&port->config_lock, flags);
253 }
254
gmac_disable_tx_rx(struct net_device * netdev)255 static void gmac_disable_tx_rx(struct net_device *netdev)
256 {
257 struct gemini_ethernet_port *port = netdev_priv(netdev);
258 unsigned long flags;
259 u32 val;
260
261 spin_lock_irqsave(&port->config_lock, flags);
262
263 val = readl(port->gmac_base + GMAC_CONFIG0);
264 val |= CONFIG0_TX_RX_DISABLE;
265 writel(val, port->gmac_base + GMAC_CONFIG0);
266
267 spin_unlock_irqrestore(&port->config_lock, flags);
268
269 mdelay(10); /* let GMAC consume packet */
270 }
271
gmac_set_flow_control(struct net_device * netdev,bool tx,bool rx)272 static void gmac_set_flow_control(struct net_device *netdev, bool tx, bool rx)
273 {
274 struct gemini_ethernet_port *port = netdev_priv(netdev);
275 unsigned long flags;
276 u32 val;
277
278 spin_lock_irqsave(&port->config_lock, flags);
279
280 val = readl(port->gmac_base + GMAC_CONFIG0);
281 val &= ~CONFIG0_FLOW_CTL;
282 if (tx)
283 val |= CONFIG0_FLOW_TX;
284 if (rx)
285 val |= CONFIG0_FLOW_RX;
286 writel(val, port->gmac_base + GMAC_CONFIG0);
287
288 spin_unlock_irqrestore(&port->config_lock, flags);
289 }
290
gmac_adjust_link(struct net_device * netdev)291 static void gmac_adjust_link(struct net_device *netdev)
292 {
293 struct gemini_ethernet_port *port = netdev_priv(netdev);
294 struct phy_device *phydev = netdev->phydev;
295 union gmac_status status, old_status;
296 bool pause_tx = false;
297 bool pause_rx = false;
298
299 status.bits32 = readl(port->gmac_base + GMAC_STATUS);
300 old_status.bits32 = status.bits32;
301 status.bits.link = phydev->link;
302 status.bits.duplex = phydev->duplex;
303
304 switch (phydev->speed) {
305 case 1000:
306 status.bits.speed = GMAC_SPEED_1000;
307 if (phy_interface_mode_is_rgmii(phydev->interface))
308 status.bits.mii_rmii = GMAC_PHY_RGMII_1000;
309 netdev_dbg(netdev, "connect %s to RGMII @ 1Gbit\n",
310 phydev_name(phydev));
311 break;
312 case 100:
313 status.bits.speed = GMAC_SPEED_100;
314 if (phy_interface_mode_is_rgmii(phydev->interface))
315 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
316 netdev_dbg(netdev, "connect %s to RGMII @ 100 Mbit\n",
317 phydev_name(phydev));
318 break;
319 case 10:
320 status.bits.speed = GMAC_SPEED_10;
321 if (phy_interface_mode_is_rgmii(phydev->interface))
322 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
323 netdev_dbg(netdev, "connect %s to RGMII @ 10 Mbit\n",
324 phydev_name(phydev));
325 break;
326 default:
327 netdev_warn(netdev, "Unsupported PHY speed (%d) on %s\n",
328 phydev->speed, phydev_name(phydev));
329 }
330
331 if (phydev->duplex == DUPLEX_FULL) {
332 phy_get_pause(phydev, &pause_tx, &pause_rx);
333 netdev_dbg(netdev, "set negotiated pause params pause TX = %s, pause RX = %s\n",
334 pause_tx ? "ON" : "OFF", pause_rx ? "ON" : "OFF");
335 }
336
337 gmac_set_flow_control(netdev, pause_tx, pause_rx);
338
339 if (old_status.bits32 == status.bits32)
340 return;
341
342 if (netif_msg_link(port)) {
343 phy_print_status(phydev);
344 netdev_info(netdev, "link flow control: %s\n",
345 phydev->pause
346 ? (phydev->asym_pause ? "tx" : "both")
347 : (phydev->asym_pause ? "rx" : "none")
348 );
349 }
350
351 gmac_disable_tx_rx(netdev);
352 writel(status.bits32, port->gmac_base + GMAC_STATUS);
353 gmac_enable_tx_rx(netdev);
354 }
355
gmac_setup_phy(struct net_device * netdev)356 static int gmac_setup_phy(struct net_device *netdev)
357 {
358 struct gemini_ethernet_port *port = netdev_priv(netdev);
359 union gmac_status status = { .bits32 = 0 };
360 struct device *dev = port->dev;
361 struct phy_device *phy;
362
363 phy = of_phy_get_and_connect(netdev,
364 dev->of_node,
365 gmac_adjust_link);
366 if (!phy)
367 return -ENODEV;
368 netdev->phydev = phy;
369
370 phy_set_max_speed(phy, SPEED_1000);
371 phy_support_asym_pause(phy);
372
373 /* set PHY interface type */
374 switch (phy->interface) {
375 case PHY_INTERFACE_MODE_MII:
376 netdev_dbg(netdev,
377 "MII: set GMAC0 to GMII mode, GMAC1 disabled\n");
378 status.bits.mii_rmii = GMAC_PHY_MII;
379 break;
380 case PHY_INTERFACE_MODE_GMII:
381 netdev_dbg(netdev,
382 "GMII: set GMAC0 to GMII mode, GMAC1 disabled\n");
383 status.bits.mii_rmii = GMAC_PHY_GMII;
384 break;
385 case PHY_INTERFACE_MODE_RGMII:
386 case PHY_INTERFACE_MODE_RGMII_ID:
387 case PHY_INTERFACE_MODE_RGMII_TXID:
388 case PHY_INTERFACE_MODE_RGMII_RXID:
389 netdev_dbg(netdev,
390 "RGMII: set GMAC0 and GMAC1 to MII/RGMII mode\n");
391 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
392 break;
393 default:
394 netdev_err(netdev, "Unsupported MII interface\n");
395 phy_disconnect(phy);
396 netdev->phydev = NULL;
397 return -EINVAL;
398 }
399 writel(status.bits32, port->gmac_base + GMAC_STATUS);
400
401 if (netif_msg_link(port))
402 phy_attached_info(phy);
403
404 return 0;
405 }
406
407 /* The maximum frame length is not logically enumerated in the
408 * hardware, so we do a table lookup to find the applicable max
409 * frame length.
410 */
411 struct gmac_max_framelen {
412 unsigned int max_l3_len;
413 u8 val;
414 };
415
416 static const struct gmac_max_framelen gmac_maxlens[] = {
417 {
418 .max_l3_len = 1518,
419 .val = CONFIG0_MAXLEN_1518,
420 },
421 {
422 .max_l3_len = 1522,
423 .val = CONFIG0_MAXLEN_1522,
424 },
425 {
426 .max_l3_len = 1536,
427 .val = CONFIG0_MAXLEN_1536,
428 },
429 {
430 .max_l3_len = 1548,
431 .val = CONFIG0_MAXLEN_1548,
432 },
433 {
434 .max_l3_len = 9212,
435 .val = CONFIG0_MAXLEN_9k,
436 },
437 {
438 .max_l3_len = 10236,
439 .val = CONFIG0_MAXLEN_10k,
440 },
441 };
442
gmac_pick_rx_max_len(unsigned int max_l3_len)443 static int gmac_pick_rx_max_len(unsigned int max_l3_len)
444 {
445 const struct gmac_max_framelen *maxlen;
446 int maxtot;
447 int i;
448
449 maxtot = max_l3_len + ETH_HLEN + VLAN_HLEN;
450
451 for (i = 0; i < ARRAY_SIZE(gmac_maxlens); i++) {
452 maxlen = &gmac_maxlens[i];
453 if (maxtot <= maxlen->max_l3_len)
454 return maxlen->val;
455 }
456
457 return -1;
458 }
459
gmac_init(struct net_device * netdev)460 static int gmac_init(struct net_device *netdev)
461 {
462 struct gemini_ethernet_port *port = netdev_priv(netdev);
463 union gmac_config0 config0 = { .bits = {
464 .dis_tx = 1,
465 .dis_rx = 1,
466 .ipv4_rx_chksum = 1,
467 .ipv6_rx_chksum = 1,
468 .rx_err_detect = 1,
469 .rgmm_edge = 1,
470 .port0_chk_hwq = 1,
471 .port1_chk_hwq = 1,
472 .port0_chk_toeq = 1,
473 .port1_chk_toeq = 1,
474 .port0_chk_classq = 1,
475 .port1_chk_classq = 1,
476 } };
477 union gmac_ahb_weight ahb_weight = { .bits = {
478 .rx_weight = 1,
479 .tx_weight = 1,
480 .hash_weight = 1,
481 .pre_req = 0x1f,
482 .tq_dv_threshold = 0,
483 } };
484 union gmac_tx_wcr0 hw_weigh = { .bits = {
485 .hw_tq3 = 1,
486 .hw_tq2 = 1,
487 .hw_tq1 = 1,
488 .hw_tq0 = 1,
489 } };
490 union gmac_tx_wcr1 sw_weigh = { .bits = {
491 .sw_tq5 = 1,
492 .sw_tq4 = 1,
493 .sw_tq3 = 1,
494 .sw_tq2 = 1,
495 .sw_tq1 = 1,
496 .sw_tq0 = 1,
497 } };
498 union gmac_config1 config1 = { .bits = {
499 .set_threshold = 16,
500 .rel_threshold = 24,
501 } };
502 union gmac_config2 config2 = { .bits = {
503 .set_threshold = 16,
504 .rel_threshold = 32,
505 } };
506 union gmac_config3 config3 = { .bits = {
507 .set_threshold = 0,
508 .rel_threshold = 0,
509 } };
510 union gmac_config0 tmp;
511
512 config0.bits.max_len = gmac_pick_rx_max_len(netdev->mtu);
513 tmp.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
514 config0.bits.reserved = tmp.bits.reserved;
515 writel(config0.bits32, port->gmac_base + GMAC_CONFIG0);
516 writel(config1.bits32, port->gmac_base + GMAC_CONFIG1);
517 writel(config2.bits32, port->gmac_base + GMAC_CONFIG2);
518 writel(config3.bits32, port->gmac_base + GMAC_CONFIG3);
519
520 readl(port->dma_base + GMAC_AHB_WEIGHT_REG);
521 writel(ahb_weight.bits32, port->dma_base + GMAC_AHB_WEIGHT_REG);
522
523 writel(hw_weigh.bits32,
524 port->dma_base + GMAC_TX_WEIGHTING_CTRL_0_REG);
525 writel(sw_weigh.bits32,
526 port->dma_base + GMAC_TX_WEIGHTING_CTRL_1_REG);
527
528 port->rxq_order = DEFAULT_GMAC_RXQ_ORDER;
529 port->txq_order = DEFAULT_GMAC_TXQ_ORDER;
530 port->rx_coalesce_nsecs = DEFAULT_RX_COALESCE_NSECS;
531
532 /* Mark every quarter of the queue a packet for interrupt
533 * in order to be able to wake up the queue if it was stopped
534 */
535 port->irq_every_tx_packets = 1 << (port->txq_order - 2);
536
537 return 0;
538 }
539
gmac_setup_txqs(struct net_device * netdev)540 static int gmac_setup_txqs(struct net_device *netdev)
541 {
542 struct gemini_ethernet_port *port = netdev_priv(netdev);
543 unsigned int n_txq = netdev->num_tx_queues;
544 struct gemini_ethernet *geth = port->geth;
545 size_t entries = 1 << port->txq_order;
546 struct gmac_txq *txq = port->txq;
547 struct gmac_txdesc *desc_ring;
548 size_t len = n_txq * entries;
549 struct sk_buff **skb_tab;
550 void __iomem *rwptr_reg;
551 unsigned int r;
552 int i;
553
554 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
555
556 skb_tab = kcalloc(len, sizeof(*skb_tab), GFP_KERNEL);
557 if (!skb_tab)
558 return -ENOMEM;
559
560 desc_ring = dma_alloc_coherent(geth->dev, len * sizeof(*desc_ring),
561 &port->txq_dma_base, GFP_KERNEL);
562
563 if (!desc_ring) {
564 kfree(skb_tab);
565 return -ENOMEM;
566 }
567
568 if (port->txq_dma_base & ~DMA_Q_BASE_MASK) {
569 dev_warn(geth->dev, "TX queue base is not aligned\n");
570 dma_free_coherent(geth->dev, len * sizeof(*desc_ring),
571 desc_ring, port->txq_dma_base);
572 kfree(skb_tab);
573 return -ENOMEM;
574 }
575
576 writel(port->txq_dma_base | port->txq_order,
577 port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG);
578
579 for (i = 0; i < n_txq; i++) {
580 txq->ring = desc_ring;
581 txq->skb = skb_tab;
582 txq->noirq_packets = 0;
583
584 r = readw(rwptr_reg);
585 rwptr_reg += 2;
586 writew(r, rwptr_reg);
587 rwptr_reg += 2;
588 txq->cptr = r;
589
590 txq++;
591 desc_ring += entries;
592 skb_tab += entries;
593 }
594
595 return 0;
596 }
597
gmac_clean_txq(struct net_device * netdev,struct gmac_txq * txq,unsigned int r)598 static void gmac_clean_txq(struct net_device *netdev, struct gmac_txq *txq,
599 unsigned int r)
600 {
601 struct gemini_ethernet_port *port = netdev_priv(netdev);
602 unsigned int m = (1 << port->txq_order) - 1;
603 struct gemini_ethernet *geth = port->geth;
604 unsigned int c = txq->cptr;
605 union gmac_txdesc_0 word0;
606 union gmac_txdesc_1 word1;
607 unsigned int hwchksum = 0;
608 unsigned long bytes = 0;
609 struct gmac_txdesc *txd;
610 unsigned short nfrags;
611 unsigned int errs = 0;
612 unsigned int pkts = 0;
613 unsigned int word3;
614 dma_addr_t mapping;
615
616 if (c == r)
617 return;
618
619 while (c != r) {
620 txd = txq->ring + c;
621 word0 = txd->word0;
622 word1 = txd->word1;
623 mapping = txd->word2.buf_adr;
624 word3 = txd->word3.bits32;
625
626 dma_unmap_single(geth->dev, mapping,
627 word0.bits.buffer_size, DMA_TO_DEVICE);
628
629 if (word3 & EOF_BIT)
630 dev_kfree_skb(txq->skb[c]);
631
632 c++;
633 c &= m;
634
635 if (!(word3 & SOF_BIT))
636 continue;
637
638 if (!word0.bits.status_tx_ok) {
639 errs++;
640 continue;
641 }
642
643 pkts++;
644 bytes += txd->word1.bits.byte_count;
645
646 if (word1.bits32 & TSS_CHECKUM_ENABLE)
647 hwchksum++;
648
649 nfrags = word0.bits.desc_count - 1;
650 if (nfrags) {
651 if (nfrags >= TX_MAX_FRAGS)
652 nfrags = TX_MAX_FRAGS - 1;
653
654 u64_stats_update_begin(&port->tx_stats_syncp);
655 port->tx_frag_stats[nfrags]++;
656 u64_stats_update_end(&port->tx_stats_syncp);
657 }
658 }
659
660 u64_stats_update_begin(&port->ir_stats_syncp);
661 port->stats.tx_errors += errs;
662 port->stats.tx_packets += pkts;
663 port->stats.tx_bytes += bytes;
664 port->tx_hw_csummed += hwchksum;
665 u64_stats_update_end(&port->ir_stats_syncp);
666
667 txq->cptr = c;
668 }
669
gmac_cleanup_txqs(struct net_device * netdev)670 static void gmac_cleanup_txqs(struct net_device *netdev)
671 {
672 struct gemini_ethernet_port *port = netdev_priv(netdev);
673 unsigned int n_txq = netdev->num_tx_queues;
674 struct gemini_ethernet *geth = port->geth;
675 void __iomem *rwptr_reg;
676 unsigned int r, i;
677
678 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
679
680 for (i = 0; i < n_txq; i++) {
681 r = readw(rwptr_reg);
682 rwptr_reg += 2;
683 writew(r, rwptr_reg);
684 rwptr_reg += 2;
685
686 gmac_clean_txq(netdev, port->txq + i, r);
687 }
688 writel(0, port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG);
689
690 kfree(port->txq->skb);
691 dma_free_coherent(geth->dev,
692 n_txq * sizeof(*port->txq->ring) << port->txq_order,
693 port->txq->ring, port->txq_dma_base);
694 }
695
gmac_setup_rxq(struct net_device * netdev)696 static int gmac_setup_rxq(struct net_device *netdev)
697 {
698 struct gemini_ethernet_port *port = netdev_priv(netdev);
699 struct gemini_ethernet *geth = port->geth;
700 struct nontoe_qhdr __iomem *qhdr;
701
702 qhdr = geth->base + TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id);
703 port->rxq_rwptr = &qhdr->word1;
704
705 /* Remap a slew of memory to use for the RX queue */
706 port->rxq_ring = dma_alloc_coherent(geth->dev,
707 sizeof(*port->rxq_ring) << port->rxq_order,
708 &port->rxq_dma_base, GFP_KERNEL);
709 if (!port->rxq_ring)
710 return -ENOMEM;
711 if (port->rxq_dma_base & ~NONTOE_QHDR0_BASE_MASK) {
712 dev_warn(geth->dev, "RX queue base is not aligned\n");
713 return -ENOMEM;
714 }
715
716 writel(port->rxq_dma_base | port->rxq_order, &qhdr->word0);
717 writel(0, port->rxq_rwptr);
718 return 0;
719 }
720
721 static struct gmac_queue_page *
gmac_get_queue_page(struct gemini_ethernet * geth,struct gemini_ethernet_port * port,dma_addr_t addr)722 gmac_get_queue_page(struct gemini_ethernet *geth,
723 struct gemini_ethernet_port *port,
724 dma_addr_t addr)
725 {
726 struct gmac_queue_page *gpage;
727 dma_addr_t mapping;
728 int i;
729
730 /* Only look for even pages */
731 mapping = addr & PAGE_MASK;
732
733 if (!geth->freeq_pages) {
734 dev_err(geth->dev, "try to get page with no page list\n");
735 return NULL;
736 }
737
738 /* Look up a ring buffer page from virtual mapping */
739 for (i = 0; i < geth->num_freeq_pages; i++) {
740 gpage = &geth->freeq_pages[i];
741 if (gpage->mapping == mapping)
742 return gpage;
743 }
744
745 return NULL;
746 }
747
gmac_cleanup_rxq(struct net_device * netdev)748 static void gmac_cleanup_rxq(struct net_device *netdev)
749 {
750 struct gemini_ethernet_port *port = netdev_priv(netdev);
751 struct gemini_ethernet *geth = port->geth;
752 struct gmac_rxdesc *rxd = port->rxq_ring;
753 static struct gmac_queue_page *gpage;
754 struct nontoe_qhdr __iomem *qhdr;
755 void __iomem *dma_reg;
756 void __iomem *ptr_reg;
757 dma_addr_t mapping;
758 union dma_rwptr rw;
759 unsigned int r, w;
760
761 qhdr = geth->base +
762 TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id);
763 dma_reg = &qhdr->word0;
764 ptr_reg = &qhdr->word1;
765
766 rw.bits32 = readl(ptr_reg);
767 r = rw.bits.rptr;
768 w = rw.bits.wptr;
769 writew(r, ptr_reg + 2);
770
771 writel(0, dma_reg);
772
773 /* Loop from read pointer to write pointer of the RX queue
774 * and free up all pages by the queue.
775 */
776 while (r != w) {
777 mapping = rxd[r].word2.buf_adr;
778 r++;
779 r &= ((1 << port->rxq_order) - 1);
780
781 if (!mapping)
782 continue;
783
784 /* Freeq pointers are one page off */
785 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE);
786 if (!gpage) {
787 dev_err(geth->dev, "could not find page\n");
788 continue;
789 }
790 /* Release the RX queue reference to the page */
791 put_page(gpage->page);
792 }
793
794 dma_free_coherent(geth->dev, sizeof(*port->rxq_ring) << port->rxq_order,
795 port->rxq_ring, port->rxq_dma_base);
796 }
797
geth_freeq_alloc_map_page(struct gemini_ethernet * geth,int pn)798 static struct page *geth_freeq_alloc_map_page(struct gemini_ethernet *geth,
799 int pn)
800 {
801 struct gmac_rxdesc *freeq_entry;
802 struct gmac_queue_page *gpage;
803 unsigned int fpp_order;
804 unsigned int frag_len;
805 dma_addr_t mapping;
806 struct page *page;
807 int i;
808
809 /* First allocate and DMA map a single page */
810 page = alloc_page(GFP_ATOMIC);
811 if (!page)
812 return NULL;
813
814 mapping = dma_map_single(geth->dev, page_address(page),
815 PAGE_SIZE, DMA_FROM_DEVICE);
816 if (dma_mapping_error(geth->dev, mapping)) {
817 put_page(page);
818 return NULL;
819 }
820
821 /* The assign the page mapping (physical address) to the buffer address
822 * in the hardware queue. PAGE_SHIFT on ARM is 12 (1 page is 4096 bytes,
823 * 4k), and the default RX frag order is 11 (fragments are up 20 2048
824 * bytes, 2k) so fpp_order (fragments per page order) is default 1. Thus
825 * each page normally needs two entries in the queue.
826 */
827 frag_len = 1 << geth->freeq_frag_order; /* Usually 2048 */
828 fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
829 freeq_entry = geth->freeq_ring + (pn << fpp_order);
830 dev_dbg(geth->dev, "allocate page %d fragment length %d fragments per page %d, freeq entry %p\n",
831 pn, frag_len, (1 << fpp_order), freeq_entry);
832 for (i = (1 << fpp_order); i > 0; i--) {
833 freeq_entry->word2.buf_adr = mapping;
834 freeq_entry++;
835 mapping += frag_len;
836 }
837
838 /* If the freeq entry already has a page mapped, then unmap it. */
839 gpage = &geth->freeq_pages[pn];
840 if (gpage->page) {
841 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
842 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
843 /* This should be the last reference to the page so it gets
844 * released
845 */
846 put_page(gpage->page);
847 }
848
849 /* Then put our new mapping into the page table */
850 dev_dbg(geth->dev, "page %d, DMA addr: %08x, page %p\n",
851 pn, (unsigned int)mapping, page);
852 gpage->mapping = mapping;
853 gpage->page = page;
854
855 return page;
856 }
857
858 /**
859 * geth_fill_freeq() - Fill the freeq with empty fragments to use
860 * @geth: the ethernet adapter
861 * @refill: whether to reset the queue by filling in all freeq entries or
862 * just refill it, usually the interrupt to refill the queue happens when
863 * the queue is half empty.
864 */
geth_fill_freeq(struct gemini_ethernet * geth,bool refill)865 static unsigned int geth_fill_freeq(struct gemini_ethernet *geth, bool refill)
866 {
867 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
868 unsigned int count = 0;
869 unsigned int pn, epn;
870 unsigned long flags;
871 union dma_rwptr rw;
872 unsigned int m_pn;
873
874 /* Mask for page */
875 m_pn = (1 << (geth->freeq_order - fpp_order)) - 1;
876
877 spin_lock_irqsave(&geth->freeq_lock, flags);
878
879 rw.bits32 = readl(geth->base + GLOBAL_SWFQ_RWPTR_REG);
880 pn = (refill ? rw.bits.wptr : rw.bits.rptr) >> fpp_order;
881 epn = (rw.bits.rptr >> fpp_order) - 1;
882 epn &= m_pn;
883
884 /* Loop over the freeq ring buffer entries */
885 while (pn != epn) {
886 struct gmac_queue_page *gpage;
887 struct page *page;
888
889 gpage = &geth->freeq_pages[pn];
890 page = gpage->page;
891
892 dev_dbg(geth->dev, "fill entry %d page ref count %d add %d refs\n",
893 pn, page_ref_count(page), 1 << fpp_order);
894
895 if (page_ref_count(page) > 1) {
896 unsigned int fl = (pn - epn) & m_pn;
897
898 if (fl > 64 >> fpp_order)
899 break;
900
901 page = geth_freeq_alloc_map_page(geth, pn);
902 if (!page)
903 break;
904 }
905
906 /* Add one reference per fragment in the page */
907 page_ref_add(page, 1 << fpp_order);
908 count += 1 << fpp_order;
909 pn++;
910 pn &= m_pn;
911 }
912
913 writew(pn << fpp_order, geth->base + GLOBAL_SWFQ_RWPTR_REG + 2);
914
915 spin_unlock_irqrestore(&geth->freeq_lock, flags);
916
917 return count;
918 }
919
geth_setup_freeq(struct gemini_ethernet * geth)920 static int geth_setup_freeq(struct gemini_ethernet *geth)
921 {
922 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
923 unsigned int frag_len = 1 << geth->freeq_frag_order;
924 unsigned int len = 1 << geth->freeq_order;
925 unsigned int pages = len >> fpp_order;
926 union queue_threshold qt;
927 union dma_skb_size skbsz;
928 unsigned int filled;
929 unsigned int pn;
930
931 geth->freeq_ring = dma_alloc_coherent(geth->dev,
932 sizeof(*geth->freeq_ring) << geth->freeq_order,
933 &geth->freeq_dma_base, GFP_KERNEL);
934 if (!geth->freeq_ring)
935 return -ENOMEM;
936 if (geth->freeq_dma_base & ~DMA_Q_BASE_MASK) {
937 dev_warn(geth->dev, "queue ring base is not aligned\n");
938 goto err_freeq;
939 }
940
941 /* Allocate a mapping to page look-up index */
942 geth->freeq_pages = kcalloc(pages, sizeof(*geth->freeq_pages),
943 GFP_KERNEL);
944 if (!geth->freeq_pages)
945 goto err_freeq;
946 geth->num_freeq_pages = pages;
947
948 dev_info(geth->dev, "allocate %d pages for queue\n", pages);
949 for (pn = 0; pn < pages; pn++)
950 if (!geth_freeq_alloc_map_page(geth, pn))
951 goto err_freeq_alloc;
952
953 filled = geth_fill_freeq(geth, false);
954 if (!filled)
955 goto err_freeq_alloc;
956
957 qt.bits32 = readl(geth->base + GLOBAL_QUEUE_THRESHOLD_REG);
958 qt.bits.swfq_empty = 32;
959 writel(qt.bits32, geth->base + GLOBAL_QUEUE_THRESHOLD_REG);
960
961 skbsz.bits.sw_skb_size = 1 << geth->freeq_frag_order;
962 writel(skbsz.bits32, geth->base + GLOBAL_DMA_SKB_SIZE_REG);
963 writel(geth->freeq_dma_base | geth->freeq_order,
964 geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
965
966 return 0;
967
968 err_freeq_alloc:
969 while (pn > 0) {
970 struct gmac_queue_page *gpage;
971 dma_addr_t mapping;
972
973 --pn;
974 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
975 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
976 gpage = &geth->freeq_pages[pn];
977 put_page(gpage->page);
978 }
979
980 kfree(geth->freeq_pages);
981 err_freeq:
982 dma_free_coherent(geth->dev,
983 sizeof(*geth->freeq_ring) << geth->freeq_order,
984 geth->freeq_ring, geth->freeq_dma_base);
985 geth->freeq_ring = NULL;
986 return -ENOMEM;
987 }
988
989 /**
990 * geth_cleanup_freeq() - cleanup the DMA mappings and free the queue
991 * @geth: the Gemini global ethernet state
992 */
geth_cleanup_freeq(struct gemini_ethernet * geth)993 static void geth_cleanup_freeq(struct gemini_ethernet *geth)
994 {
995 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
996 unsigned int frag_len = 1 << geth->freeq_frag_order;
997 unsigned int len = 1 << geth->freeq_order;
998 unsigned int pages = len >> fpp_order;
999 unsigned int pn;
1000
1001 writew(readw(geth->base + GLOBAL_SWFQ_RWPTR_REG),
1002 geth->base + GLOBAL_SWFQ_RWPTR_REG + 2);
1003 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
1004
1005 for (pn = 0; pn < pages; pn++) {
1006 struct gmac_queue_page *gpage;
1007 dma_addr_t mapping;
1008
1009 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
1010 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
1011
1012 gpage = &geth->freeq_pages[pn];
1013 while (page_ref_count(gpage->page) > 0)
1014 put_page(gpage->page);
1015 }
1016
1017 kfree(geth->freeq_pages);
1018
1019 dma_free_coherent(geth->dev,
1020 sizeof(*geth->freeq_ring) << geth->freeq_order,
1021 geth->freeq_ring, geth->freeq_dma_base);
1022 }
1023
1024 /**
1025 * geth_resize_freeq() - resize the software queue depth
1026 * @port: the port requesting the change
1027 *
1028 * This gets called at least once during probe() so the device queue gets
1029 * "resized" from the hardware defaults. Since both ports/net devices share
1030 * the same hardware queue, some synchronization between the ports is
1031 * needed.
1032 */
geth_resize_freeq(struct gemini_ethernet_port * port)1033 static int geth_resize_freeq(struct gemini_ethernet_port *port)
1034 {
1035 struct gemini_ethernet *geth = port->geth;
1036 struct net_device *netdev = port->netdev;
1037 struct gemini_ethernet_port *other_port;
1038 struct net_device *other_netdev;
1039 unsigned int new_size = 0;
1040 unsigned int new_order;
1041 unsigned long flags;
1042 u32 en;
1043 int ret;
1044
1045 if (netdev->dev_id == 0)
1046 other_netdev = geth->port1->netdev;
1047 else
1048 other_netdev = geth->port0->netdev;
1049
1050 if (other_netdev && netif_running(other_netdev))
1051 return -EBUSY;
1052
1053 new_size = 1 << (port->rxq_order + 1);
1054 netdev_dbg(netdev, "port %d size: %d order %d\n",
1055 netdev->dev_id,
1056 new_size,
1057 port->rxq_order);
1058 if (other_netdev) {
1059 other_port = netdev_priv(other_netdev);
1060 new_size += 1 << (other_port->rxq_order + 1);
1061 netdev_dbg(other_netdev, "port %d size: %d order %d\n",
1062 other_netdev->dev_id,
1063 (1 << (other_port->rxq_order + 1)),
1064 other_port->rxq_order);
1065 }
1066
1067 new_order = min(15, ilog2(new_size - 1) + 1);
1068 dev_dbg(geth->dev, "set shared queue to size %d order %d\n",
1069 new_size, new_order);
1070 if (geth->freeq_order == new_order)
1071 return 0;
1072
1073 spin_lock_irqsave(&geth->irq_lock, flags);
1074
1075 /* Disable the software queue IRQs */
1076 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1077 en &= ~SWFQ_EMPTY_INT_BIT;
1078 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1079 spin_unlock_irqrestore(&geth->irq_lock, flags);
1080
1081 /* Drop the old queue */
1082 if (geth->freeq_ring)
1083 geth_cleanup_freeq(geth);
1084
1085 /* Allocate a new queue with the desired order */
1086 geth->freeq_order = new_order;
1087 ret = geth_setup_freeq(geth);
1088
1089 /* Restart the interrupts - NOTE if this is the first resize
1090 * after probe(), this is where the interrupts get turned on
1091 * in the first place.
1092 */
1093 spin_lock_irqsave(&geth->irq_lock, flags);
1094 en |= SWFQ_EMPTY_INT_BIT;
1095 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1096 spin_unlock_irqrestore(&geth->irq_lock, flags);
1097
1098 return ret;
1099 }
1100
gmac_tx_irq_enable(struct net_device * netdev,unsigned int txq,int en)1101 static void gmac_tx_irq_enable(struct net_device *netdev,
1102 unsigned int txq, int en)
1103 {
1104 struct gemini_ethernet_port *port = netdev_priv(netdev);
1105 struct gemini_ethernet *geth = port->geth;
1106 unsigned long flags;
1107 u32 val, mask;
1108
1109 netdev_dbg(netdev, "%s device %d\n", __func__, netdev->dev_id);
1110
1111 spin_lock_irqsave(&geth->irq_lock, flags);
1112
1113 mask = GMAC0_IRQ0_TXQ0_INTS << (6 * netdev->dev_id + txq);
1114
1115 if (en)
1116 writel(mask, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
1117
1118 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1119 val = en ? val | mask : val & ~mask;
1120 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1121
1122 spin_unlock_irqrestore(&geth->irq_lock, flags);
1123 }
1124
gmac_tx_irq(struct net_device * netdev,unsigned int txq_num)1125 static void gmac_tx_irq(struct net_device *netdev, unsigned int txq_num)
1126 {
1127 struct netdev_queue *ntxq = netdev_get_tx_queue(netdev, txq_num);
1128
1129 gmac_tx_irq_enable(netdev, txq_num, 0);
1130 netif_tx_wake_queue(ntxq);
1131 }
1132
gmac_map_tx_bufs(struct net_device * netdev,struct sk_buff * skb,struct gmac_txq * txq,unsigned short * desc)1133 static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb,
1134 struct gmac_txq *txq, unsigned short *desc)
1135 {
1136 struct gemini_ethernet_port *port = netdev_priv(netdev);
1137 struct skb_shared_info *skb_si = skb_shinfo(skb);
1138 unsigned short m = (1 << port->txq_order) - 1;
1139 short frag, last_frag = skb_si->nr_frags - 1;
1140 struct gemini_ethernet *geth = port->geth;
1141 unsigned int word1, word3, buflen;
1142 unsigned short w = *desc;
1143 struct gmac_txdesc *txd;
1144 skb_frag_t *skb_frag;
1145 dma_addr_t mapping;
1146 bool tcp = false;
1147 void *buffer;
1148 u16 mss;
1149 int ret;
1150
1151 word1 = skb->len;
1152 word3 = SOF_BIT;
1153
1154 /* Determine if we are doing TCP */
1155 if (skb->protocol == htons(ETH_P_IP))
1156 tcp = (ip_hdr(skb)->protocol == IPPROTO_TCP);
1157 else
1158 /* IPv6 */
1159 tcp = (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP);
1160
1161 mss = skb_shinfo(skb)->gso_size;
1162 if (mss) {
1163 /* This means we are dealing with TCP and skb->len is the
1164 * sum total of all the segments. The TSO will deal with
1165 * chopping this up for us.
1166 */
1167 /* The accelerator needs the full frame size here */
1168 mss += skb_tcp_all_headers(skb);
1169 netdev_dbg(netdev, "segment offloading mss = %04x len=%04x\n",
1170 mss, skb->len);
1171 word1 |= TSS_MTU_ENABLE_BIT;
1172 word3 |= mss;
1173 } else if (tcp) {
1174 /* Even if we are not using TSO, use the hardware offloader
1175 * for transferring the TCP frame: this hardware has partial
1176 * TCP awareness (called TOE - TCP Offload Engine) and will
1177 * according to the datasheet put packets belonging to the
1178 * same TCP connection in the same queue for the TOE/TSO
1179 * engine to process. The engine will deal with chopping
1180 * up frames that exceed ETH_DATA_LEN which the
1181 * checksumming engine cannot handle (see below) into
1182 * manageable chunks. It flawlessly deals with quite big
1183 * frames and frames containing custom DSA EtherTypes.
1184 */
1185 mss = netdev->mtu + skb_tcp_all_headers(skb);
1186 mss = min(mss, skb->len);
1187 netdev_dbg(netdev, "TOE/TSO len %04x mtu %04x mss %04x\n",
1188 skb->len, netdev->mtu, mss);
1189 word1 |= TSS_MTU_ENABLE_BIT;
1190 word3 |= mss;
1191 } else if (skb->len >= ETH_FRAME_LEN) {
1192 /* Hardware offloaded checksumming isn't working on non-TCP frames
1193 * bigger than 1514 bytes. A hypothesis about this is that the
1194 * checksum buffer is only 1518 bytes, so when the frames get
1195 * bigger they get truncated, or the last few bytes get
1196 * overwritten by the FCS.
1197 *
1198 * Just use software checksumming and bypass on bigger frames.
1199 */
1200 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1201 ret = skb_checksum_help(skb);
1202 if (ret)
1203 return ret;
1204 }
1205 word1 |= TSS_BYPASS_BIT;
1206 }
1207
1208 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1209 /* We do not switch off the checksumming on non TCP/UDP
1210 * frames: as is shown from tests, the checksumming engine
1211 * is smart enough to see that a frame is not actually TCP
1212 * or UDP and then just pass it through without any changes
1213 * to the frame.
1214 */
1215 if (skb->protocol == htons(ETH_P_IP))
1216 word1 |= TSS_IP_CHKSUM_BIT;
1217 else
1218 word1 |= TSS_IPV6_ENABLE_BIT;
1219
1220 word1 |= tcp ? TSS_TCP_CHKSUM_BIT : TSS_UDP_CHKSUM_BIT;
1221 }
1222
1223 frag = -1;
1224 while (frag <= last_frag) {
1225 if (frag == -1) {
1226 buffer = skb->data;
1227 buflen = skb_headlen(skb);
1228 } else {
1229 skb_frag = skb_si->frags + frag;
1230 buffer = skb_frag_address(skb_frag);
1231 buflen = skb_frag_size(skb_frag);
1232 }
1233
1234 if (frag == last_frag) {
1235 word3 |= EOF_BIT;
1236 txq->skb[w] = skb;
1237 }
1238
1239 mapping = dma_map_single(geth->dev, buffer, buflen,
1240 DMA_TO_DEVICE);
1241 if (dma_mapping_error(geth->dev, mapping))
1242 goto map_error;
1243
1244 txd = txq->ring + w;
1245 txd->word0.bits32 = buflen;
1246 txd->word1.bits32 = word1;
1247 txd->word2.buf_adr = mapping;
1248 txd->word3.bits32 = word3;
1249
1250 word3 &= MTU_SIZE_BIT_MASK;
1251 w++;
1252 w &= m;
1253 frag++;
1254 }
1255
1256 *desc = w;
1257 return 0;
1258
1259 map_error:
1260 while (w != *desc) {
1261 w--;
1262 w &= m;
1263
1264 dma_unmap_page(geth->dev, txq->ring[w].word2.buf_adr,
1265 txq->ring[w].word0.bits.buffer_size,
1266 DMA_TO_DEVICE);
1267 }
1268 return -ENOMEM;
1269 }
1270
gmac_start_xmit(struct sk_buff * skb,struct net_device * netdev)1271 static netdev_tx_t gmac_start_xmit(struct sk_buff *skb,
1272 struct net_device *netdev)
1273 {
1274 struct gemini_ethernet_port *port = netdev_priv(netdev);
1275 unsigned short m = (1 << port->txq_order) - 1;
1276 struct netdev_queue *ntxq;
1277 unsigned short r, w, d;
1278 void __iomem *ptr_reg;
1279 struct gmac_txq *txq;
1280 int txq_num, nfrags;
1281 union dma_rwptr rw;
1282
1283 if (skb->len >= 0x10000)
1284 goto out_drop_free;
1285
1286 txq_num = skb_get_queue_mapping(skb);
1287 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE_PTR_REG(txq_num);
1288 txq = &port->txq[txq_num];
1289 ntxq = netdev_get_tx_queue(netdev, txq_num);
1290 nfrags = skb_shinfo(skb)->nr_frags;
1291
1292 rw.bits32 = readl(ptr_reg);
1293 r = rw.bits.rptr;
1294 w = rw.bits.wptr;
1295
1296 d = txq->cptr - w - 1;
1297 d &= m;
1298
1299 if (d < nfrags + 2) {
1300 gmac_clean_txq(netdev, txq, r);
1301 d = txq->cptr - w - 1;
1302 d &= m;
1303
1304 if (d < nfrags + 2) {
1305 netif_tx_stop_queue(ntxq);
1306
1307 d = txq->cptr + nfrags + 16;
1308 d &= m;
1309 txq->ring[d].word3.bits.eofie = 1;
1310 gmac_tx_irq_enable(netdev, txq_num, 1);
1311
1312 u64_stats_update_begin(&port->tx_stats_syncp);
1313 netdev->stats.tx_fifo_errors++;
1314 u64_stats_update_end(&port->tx_stats_syncp);
1315 return NETDEV_TX_BUSY;
1316 }
1317 }
1318
1319 if (gmac_map_tx_bufs(netdev, skb, txq, &w)) {
1320 if (skb_linearize(skb))
1321 goto out_drop;
1322
1323 u64_stats_update_begin(&port->tx_stats_syncp);
1324 port->tx_frags_linearized++;
1325 u64_stats_update_end(&port->tx_stats_syncp);
1326
1327 if (gmac_map_tx_bufs(netdev, skb, txq, &w))
1328 goto out_drop_free;
1329 }
1330
1331 writew(w, ptr_reg + 2);
1332
1333 gmac_clean_txq(netdev, txq, r);
1334 return NETDEV_TX_OK;
1335
1336 out_drop_free:
1337 dev_kfree_skb(skb);
1338 out_drop:
1339 u64_stats_update_begin(&port->tx_stats_syncp);
1340 port->stats.tx_dropped++;
1341 u64_stats_update_end(&port->tx_stats_syncp);
1342 return NETDEV_TX_OK;
1343 }
1344
gmac_tx_timeout(struct net_device * netdev,unsigned int txqueue)1345 static void gmac_tx_timeout(struct net_device *netdev, unsigned int txqueue)
1346 {
1347 netdev_err(netdev, "Tx timeout\n");
1348 gmac_dump_dma_state(netdev);
1349 }
1350
gmac_enable_irq(struct net_device * netdev,int enable)1351 static void gmac_enable_irq(struct net_device *netdev, int enable)
1352 {
1353 struct gemini_ethernet_port *port = netdev_priv(netdev);
1354 struct gemini_ethernet *geth = port->geth;
1355 unsigned long flags;
1356 u32 val, mask;
1357
1358 netdev_dbg(netdev, "%s device %d %s\n", __func__,
1359 netdev->dev_id, enable ? "enable" : "disable");
1360 spin_lock_irqsave(&geth->irq_lock, flags);
1361
1362 mask = GMAC0_IRQ0_2 << (netdev->dev_id * 2);
1363 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1364 val = enable ? (val | mask) : (val & ~mask);
1365 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1366
1367 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id;
1368 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1369 val = enable ? (val | mask) : (val & ~mask);
1370 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1371
1372 mask = GMAC0_IRQ4_8 << (netdev->dev_id * 8);
1373 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1374 val = enable ? (val | mask) : (val & ~mask);
1375 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1376
1377 spin_unlock_irqrestore(&geth->irq_lock, flags);
1378 }
1379
gmac_enable_rx_irq(struct net_device * netdev,int enable)1380 static void gmac_enable_rx_irq(struct net_device *netdev, int enable)
1381 {
1382 struct gemini_ethernet_port *port = netdev_priv(netdev);
1383 struct gemini_ethernet *geth = port->geth;
1384 unsigned long flags;
1385 u32 val, mask;
1386
1387 netdev_dbg(netdev, "%s device %d %s\n", __func__, netdev->dev_id,
1388 enable ? "enable" : "disable");
1389 spin_lock_irqsave(&geth->irq_lock, flags);
1390 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id;
1391
1392 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1393 val = enable ? (val | mask) : (val & ~mask);
1394 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1395
1396 spin_unlock_irqrestore(&geth->irq_lock, flags);
1397 }
1398
gmac_skb_if_good_frame(struct gemini_ethernet_port * port,union gmac_rxdesc_0 word0,unsigned int frame_len)1399 static struct sk_buff *gmac_skb_if_good_frame(struct gemini_ethernet_port *port,
1400 union gmac_rxdesc_0 word0,
1401 unsigned int frame_len)
1402 {
1403 unsigned int rx_csum = word0.bits.chksum_status;
1404 unsigned int rx_status = word0.bits.status;
1405 struct sk_buff *skb = NULL;
1406
1407 port->rx_stats[rx_status]++;
1408 port->rx_csum_stats[rx_csum]++;
1409
1410 if (word0.bits.derr || word0.bits.perr ||
1411 rx_status || frame_len < ETH_ZLEN ||
1412 rx_csum >= RX_CHKSUM_IP_ERR_UNKNOWN) {
1413 port->stats.rx_errors++;
1414
1415 if (frame_len < ETH_ZLEN || RX_ERROR_LENGTH(rx_status))
1416 port->stats.rx_length_errors++;
1417 if (RX_ERROR_OVER(rx_status))
1418 port->stats.rx_over_errors++;
1419 if (RX_ERROR_CRC(rx_status))
1420 port->stats.rx_crc_errors++;
1421 if (RX_ERROR_FRAME(rx_status))
1422 port->stats.rx_frame_errors++;
1423 return NULL;
1424 }
1425
1426 skb = napi_get_frags(&port->napi);
1427 if (!skb)
1428 goto update_exit;
1429
1430 if (rx_csum == RX_CHKSUM_IP_UDP_TCP_OK)
1431 skb->ip_summed = CHECKSUM_UNNECESSARY;
1432
1433 update_exit:
1434 port->stats.rx_bytes += frame_len;
1435 port->stats.rx_packets++;
1436 return skb;
1437 }
1438
gmac_rx(struct net_device * netdev,unsigned int budget)1439 static unsigned int gmac_rx(struct net_device *netdev, unsigned int budget)
1440 {
1441 struct gemini_ethernet_port *port = netdev_priv(netdev);
1442 unsigned short m = (1 << port->rxq_order) - 1;
1443 struct gemini_ethernet *geth = port->geth;
1444 void __iomem *ptr_reg = port->rxq_rwptr;
1445 unsigned int frame_len, frag_len;
1446 struct gmac_rxdesc *rx = NULL;
1447 struct gmac_queue_page *gpage;
1448 static struct sk_buff *skb;
1449 union gmac_rxdesc_0 word0;
1450 union gmac_rxdesc_1 word1;
1451 union gmac_rxdesc_3 word3;
1452 struct page *page = NULL;
1453 unsigned int page_offs;
1454 unsigned long flags;
1455 unsigned short r, w;
1456 union dma_rwptr rw;
1457 dma_addr_t mapping;
1458 int frag_nr = 0;
1459
1460 spin_lock_irqsave(&geth->irq_lock, flags);
1461 rw.bits32 = readl(ptr_reg);
1462 /* Reset interrupt as all packages until here are taken into account */
1463 writel(DEFAULT_Q0_INT_BIT << netdev->dev_id,
1464 geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
1465 spin_unlock_irqrestore(&geth->irq_lock, flags);
1466
1467 r = rw.bits.rptr;
1468 w = rw.bits.wptr;
1469
1470 while (budget && w != r) {
1471 rx = port->rxq_ring + r;
1472 word0 = rx->word0;
1473 word1 = rx->word1;
1474 mapping = rx->word2.buf_adr;
1475 word3 = rx->word3;
1476
1477 r++;
1478 r &= m;
1479
1480 frag_len = word0.bits.buffer_size;
1481 frame_len = word1.bits.byte_count;
1482 page_offs = mapping & ~PAGE_MASK;
1483
1484 if (!mapping) {
1485 netdev_err(netdev,
1486 "rxq[%u]: HW BUG: zero DMA desc\n", r);
1487 goto err_drop;
1488 }
1489
1490 /* Freeq pointers are one page off */
1491 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE);
1492 if (!gpage) {
1493 dev_err(geth->dev, "could not find mapping\n");
1494 continue;
1495 }
1496 page = gpage->page;
1497
1498 if (word3.bits32 & SOF_BIT) {
1499 if (skb) {
1500 napi_free_frags(&port->napi);
1501 port->stats.rx_dropped++;
1502 }
1503
1504 skb = gmac_skb_if_good_frame(port, word0, frame_len);
1505 if (!skb)
1506 goto err_drop;
1507
1508 page_offs += NET_IP_ALIGN;
1509 frag_len -= NET_IP_ALIGN;
1510 frag_nr = 0;
1511
1512 } else if (!skb) {
1513 put_page(page);
1514 continue;
1515 }
1516
1517 if (word3.bits32 & EOF_BIT)
1518 frag_len = frame_len - skb->len;
1519
1520 /* append page frag to skb */
1521 if (frag_nr == MAX_SKB_FRAGS)
1522 goto err_drop;
1523
1524 if (frag_len == 0)
1525 netdev_err(netdev, "Received fragment with len = 0\n");
1526
1527 skb_fill_page_desc(skb, frag_nr, page, page_offs, frag_len);
1528 skb->len += frag_len;
1529 skb->data_len += frag_len;
1530 skb->truesize += frag_len;
1531 frag_nr++;
1532
1533 if (word3.bits32 & EOF_BIT) {
1534 napi_gro_frags(&port->napi);
1535 skb = NULL;
1536 --budget;
1537 }
1538 continue;
1539
1540 err_drop:
1541 if (skb) {
1542 napi_free_frags(&port->napi);
1543 skb = NULL;
1544 }
1545
1546 if (mapping)
1547 put_page(page);
1548
1549 port->stats.rx_dropped++;
1550 }
1551
1552 writew(r, ptr_reg);
1553 return budget;
1554 }
1555
gmac_napi_poll(struct napi_struct * napi,int budget)1556 static int gmac_napi_poll(struct napi_struct *napi, int budget)
1557 {
1558 struct gemini_ethernet_port *port = netdev_priv(napi->dev);
1559 struct gemini_ethernet *geth = port->geth;
1560 unsigned int freeq_threshold;
1561 unsigned int received;
1562
1563 freeq_threshold = 1 << (geth->freeq_order - 1);
1564 u64_stats_update_begin(&port->rx_stats_syncp);
1565
1566 received = gmac_rx(napi->dev, budget);
1567 if (received < budget) {
1568 napi_gro_flush(napi, false);
1569 napi_complete_done(napi, received);
1570 gmac_enable_rx_irq(napi->dev, 1);
1571 ++port->rx_napi_exits;
1572 }
1573
1574 port->freeq_refill += (budget - received);
1575 if (port->freeq_refill > freeq_threshold) {
1576 port->freeq_refill -= freeq_threshold;
1577 geth_fill_freeq(geth, true);
1578 }
1579
1580 u64_stats_update_end(&port->rx_stats_syncp);
1581 return received;
1582 }
1583
gmac_dump_dma_state(struct net_device * netdev)1584 static void gmac_dump_dma_state(struct net_device *netdev)
1585 {
1586 struct gemini_ethernet_port *port = netdev_priv(netdev);
1587 struct gemini_ethernet *geth = port->geth;
1588 void __iomem *ptr_reg;
1589 u32 reg[5];
1590
1591 /* Interrupt status */
1592 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
1593 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
1594 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_2_REG);
1595 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_3_REG);
1596 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1597 netdev_err(netdev, "IRQ status: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
1598 reg[0], reg[1], reg[2], reg[3], reg[4]);
1599
1600 /* Interrupt enable */
1601 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1602 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1603 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG);
1604 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG);
1605 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1606 netdev_err(netdev, "IRQ enable: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
1607 reg[0], reg[1], reg[2], reg[3], reg[4]);
1608
1609 /* RX DMA status */
1610 reg[0] = readl(port->dma_base + GMAC_DMA_RX_FIRST_DESC_REG);
1611 reg[1] = readl(port->dma_base + GMAC_DMA_RX_CURR_DESC_REG);
1612 reg[2] = GET_RPTR(port->rxq_rwptr);
1613 reg[3] = GET_WPTR(port->rxq_rwptr);
1614 netdev_err(netdev, "RX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n",
1615 reg[0], reg[1], reg[2], reg[3]);
1616
1617 reg[0] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD0_REG);
1618 reg[1] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD1_REG);
1619 reg[2] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD2_REG);
1620 reg[3] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD3_REG);
1621 netdev_err(netdev, "RX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n",
1622 reg[0], reg[1], reg[2], reg[3]);
1623
1624 /* TX DMA status */
1625 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
1626
1627 reg[0] = readl(port->dma_base + GMAC_DMA_TX_FIRST_DESC_REG);
1628 reg[1] = readl(port->dma_base + GMAC_DMA_TX_CURR_DESC_REG);
1629 reg[2] = GET_RPTR(ptr_reg);
1630 reg[3] = GET_WPTR(ptr_reg);
1631 netdev_err(netdev, "TX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n",
1632 reg[0], reg[1], reg[2], reg[3]);
1633
1634 reg[0] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD0_REG);
1635 reg[1] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD1_REG);
1636 reg[2] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD2_REG);
1637 reg[3] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD3_REG);
1638 netdev_err(netdev, "TX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n",
1639 reg[0], reg[1], reg[2], reg[3]);
1640
1641 /* FREE queues status */
1642 ptr_reg = geth->base + GLOBAL_SWFQ_RWPTR_REG;
1643
1644 reg[0] = GET_RPTR(ptr_reg);
1645 reg[1] = GET_WPTR(ptr_reg);
1646
1647 ptr_reg = geth->base + GLOBAL_HWFQ_RWPTR_REG;
1648
1649 reg[2] = GET_RPTR(ptr_reg);
1650 reg[3] = GET_WPTR(ptr_reg);
1651 netdev_err(netdev, "FQ SW ptr: %u %u, HW ptr: %u %u\n",
1652 reg[0], reg[1], reg[2], reg[3]);
1653 }
1654
gmac_update_hw_stats(struct net_device * netdev)1655 static void gmac_update_hw_stats(struct net_device *netdev)
1656 {
1657 struct gemini_ethernet_port *port = netdev_priv(netdev);
1658 unsigned int rx_discards, rx_mcast, rx_bcast;
1659 struct gemini_ethernet *geth = port->geth;
1660 unsigned long flags;
1661
1662 spin_lock_irqsave(&geth->irq_lock, flags);
1663 u64_stats_update_begin(&port->ir_stats_syncp);
1664
1665 rx_discards = readl(port->gmac_base + GMAC_IN_DISCARDS);
1666 port->hw_stats[0] += rx_discards;
1667 port->hw_stats[1] += readl(port->gmac_base + GMAC_IN_ERRORS);
1668 rx_mcast = readl(port->gmac_base + GMAC_IN_MCAST);
1669 port->hw_stats[2] += rx_mcast;
1670 rx_bcast = readl(port->gmac_base + GMAC_IN_BCAST);
1671 port->hw_stats[3] += rx_bcast;
1672 port->hw_stats[4] += readl(port->gmac_base + GMAC_IN_MAC1);
1673 port->hw_stats[5] += readl(port->gmac_base + GMAC_IN_MAC2);
1674
1675 port->stats.rx_missed_errors += rx_discards;
1676 port->stats.multicast += rx_mcast;
1677 port->stats.multicast += rx_bcast;
1678
1679 writel(GMAC0_MIB_INT_BIT << (netdev->dev_id * 8),
1680 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1681
1682 u64_stats_update_end(&port->ir_stats_syncp);
1683 spin_unlock_irqrestore(&geth->irq_lock, flags);
1684 }
1685
1686 /**
1687 * gmac_get_intr_flags() - get interrupt status flags for a port from
1688 * @netdev: the net device for the port to get flags from
1689 * @i: the interrupt status register 0..4
1690 */
gmac_get_intr_flags(struct net_device * netdev,int i)1691 static u32 gmac_get_intr_flags(struct net_device *netdev, int i)
1692 {
1693 struct gemini_ethernet_port *port = netdev_priv(netdev);
1694 struct gemini_ethernet *geth = port->geth;
1695 void __iomem *irqif_reg, *irqen_reg;
1696 unsigned int offs, val;
1697
1698 /* Calculate the offset using the stride of the status registers */
1699 offs = i * (GLOBAL_INTERRUPT_STATUS_1_REG -
1700 GLOBAL_INTERRUPT_STATUS_0_REG);
1701
1702 irqif_reg = geth->base + GLOBAL_INTERRUPT_STATUS_0_REG + offs;
1703 irqen_reg = geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG + offs;
1704
1705 val = readl(irqif_reg) & readl(irqen_reg);
1706 return val;
1707 }
1708
gmac_coalesce_delay_expired(struct hrtimer * timer)1709 static enum hrtimer_restart gmac_coalesce_delay_expired(struct hrtimer *timer)
1710 {
1711 struct gemini_ethernet_port *port =
1712 container_of(timer, struct gemini_ethernet_port,
1713 rx_coalesce_timer);
1714
1715 napi_schedule(&port->napi);
1716 return HRTIMER_NORESTART;
1717 }
1718
gmac_irq(int irq,void * data)1719 static irqreturn_t gmac_irq(int irq, void *data)
1720 {
1721 struct gemini_ethernet_port *port;
1722 struct net_device *netdev = data;
1723 struct gemini_ethernet *geth;
1724 u32 val, orr = 0;
1725
1726 port = netdev_priv(netdev);
1727 geth = port->geth;
1728
1729 val = gmac_get_intr_flags(netdev, 0);
1730 orr |= val;
1731
1732 if (val & (GMAC0_IRQ0_2 << (netdev->dev_id * 2))) {
1733 /* Oh, crap */
1734 netdev_err(netdev, "hw failure/sw bug\n");
1735 gmac_dump_dma_state(netdev);
1736
1737 /* don't know how to recover, just reduce losses */
1738 gmac_enable_irq(netdev, 0);
1739 return IRQ_HANDLED;
1740 }
1741
1742 if (val & (GMAC0_IRQ0_TXQ0_INTS << (netdev->dev_id * 6)))
1743 gmac_tx_irq(netdev, 0);
1744
1745 val = gmac_get_intr_flags(netdev, 1);
1746 orr |= val;
1747
1748 if (val & (DEFAULT_Q0_INT_BIT << netdev->dev_id)) {
1749 gmac_enable_rx_irq(netdev, 0);
1750
1751 if (!port->rx_coalesce_nsecs) {
1752 napi_schedule(&port->napi);
1753 } else {
1754 ktime_t ktime;
1755
1756 ktime = ktime_set(0, port->rx_coalesce_nsecs);
1757 hrtimer_start(&port->rx_coalesce_timer, ktime,
1758 HRTIMER_MODE_REL);
1759 }
1760 }
1761
1762 val = gmac_get_intr_flags(netdev, 4);
1763 orr |= val;
1764
1765 if (val & (GMAC0_MIB_INT_BIT << (netdev->dev_id * 8)))
1766 gmac_update_hw_stats(netdev);
1767
1768 if (val & (GMAC0_RX_OVERRUN_INT_BIT << (netdev->dev_id * 8))) {
1769 spin_lock(&geth->irq_lock);
1770 writel(GMAC0_RXDERR_INT_BIT << (netdev->dev_id * 8),
1771 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1772 u64_stats_update_begin(&port->ir_stats_syncp);
1773 ++port->stats.rx_fifo_errors;
1774 u64_stats_update_end(&port->ir_stats_syncp);
1775 spin_unlock(&geth->irq_lock);
1776 }
1777
1778 return orr ? IRQ_HANDLED : IRQ_NONE;
1779 }
1780
gmac_start_dma(struct gemini_ethernet_port * port)1781 static void gmac_start_dma(struct gemini_ethernet_port *port)
1782 {
1783 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG;
1784 union gmac_dma_ctrl dma_ctrl;
1785
1786 dma_ctrl.bits32 = readl(dma_ctrl_reg);
1787 dma_ctrl.bits.rd_enable = 1;
1788 dma_ctrl.bits.td_enable = 1;
1789 dma_ctrl.bits.loopback = 0;
1790 dma_ctrl.bits.drop_small_ack = 0;
1791 dma_ctrl.bits.rd_insert_bytes = NET_IP_ALIGN;
1792 dma_ctrl.bits.rd_prot = HPROT_DATA_CACHE | HPROT_PRIVILIGED;
1793 dma_ctrl.bits.rd_burst_size = HBURST_INCR8;
1794 dma_ctrl.bits.rd_bus = HSIZE_8;
1795 dma_ctrl.bits.td_prot = HPROT_DATA_CACHE;
1796 dma_ctrl.bits.td_burst_size = HBURST_INCR8;
1797 dma_ctrl.bits.td_bus = HSIZE_8;
1798
1799 writel(dma_ctrl.bits32, dma_ctrl_reg);
1800 }
1801
gmac_stop_dma(struct gemini_ethernet_port * port)1802 static void gmac_stop_dma(struct gemini_ethernet_port *port)
1803 {
1804 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG;
1805 union gmac_dma_ctrl dma_ctrl;
1806
1807 dma_ctrl.bits32 = readl(dma_ctrl_reg);
1808 dma_ctrl.bits.rd_enable = 0;
1809 dma_ctrl.bits.td_enable = 0;
1810 writel(dma_ctrl.bits32, dma_ctrl_reg);
1811 }
1812
gmac_open(struct net_device * netdev)1813 static int gmac_open(struct net_device *netdev)
1814 {
1815 struct gemini_ethernet_port *port = netdev_priv(netdev);
1816 int err;
1817
1818 err = request_irq(netdev->irq, gmac_irq,
1819 IRQF_SHARED, netdev->name, netdev);
1820 if (err) {
1821 netdev_err(netdev, "no IRQ\n");
1822 return err;
1823 }
1824
1825 netif_carrier_off(netdev);
1826 phy_start(netdev->phydev);
1827
1828 err = geth_resize_freeq(port);
1829 /* It's fine if it's just busy, the other port has set up
1830 * the freeq in that case.
1831 */
1832 if (err && (err != -EBUSY)) {
1833 netdev_err(netdev, "could not resize freeq\n");
1834 goto err_stop_phy;
1835 }
1836
1837 err = gmac_setup_rxq(netdev);
1838 if (err) {
1839 netdev_err(netdev, "could not setup RXQ\n");
1840 goto err_stop_phy;
1841 }
1842
1843 err = gmac_setup_txqs(netdev);
1844 if (err) {
1845 netdev_err(netdev, "could not setup TXQs\n");
1846 gmac_cleanup_rxq(netdev);
1847 goto err_stop_phy;
1848 }
1849
1850 napi_enable(&port->napi);
1851
1852 gmac_start_dma(port);
1853 gmac_enable_irq(netdev, 1);
1854 gmac_enable_tx_rx(netdev);
1855 netif_tx_start_all_queues(netdev);
1856
1857 hrtimer_init(&port->rx_coalesce_timer, CLOCK_MONOTONIC,
1858 HRTIMER_MODE_REL);
1859 port->rx_coalesce_timer.function = &gmac_coalesce_delay_expired;
1860
1861 netdev_dbg(netdev, "opened\n");
1862
1863 return 0;
1864
1865 err_stop_phy:
1866 phy_stop(netdev->phydev);
1867 free_irq(netdev->irq, netdev);
1868 return err;
1869 }
1870
gmac_stop(struct net_device * netdev)1871 static int gmac_stop(struct net_device *netdev)
1872 {
1873 struct gemini_ethernet_port *port = netdev_priv(netdev);
1874
1875 hrtimer_cancel(&port->rx_coalesce_timer);
1876 netif_tx_stop_all_queues(netdev);
1877 gmac_disable_tx_rx(netdev);
1878 gmac_stop_dma(port);
1879 napi_disable(&port->napi);
1880
1881 gmac_enable_irq(netdev, 0);
1882 gmac_cleanup_rxq(netdev);
1883 gmac_cleanup_txqs(netdev);
1884
1885 phy_stop(netdev->phydev);
1886 free_irq(netdev->irq, netdev);
1887
1888 gmac_update_hw_stats(netdev);
1889 return 0;
1890 }
1891
gmac_set_rx_mode(struct net_device * netdev)1892 static void gmac_set_rx_mode(struct net_device *netdev)
1893 {
1894 struct gemini_ethernet_port *port = netdev_priv(netdev);
1895 union gmac_rx_fltr filter = { .bits = {
1896 .broadcast = 1,
1897 .multicast = 1,
1898 .unicast = 1,
1899 } };
1900 struct netdev_hw_addr *ha;
1901 unsigned int bit_nr;
1902 u32 mc_filter[2];
1903
1904 mc_filter[1] = 0;
1905 mc_filter[0] = 0;
1906
1907 if (netdev->flags & IFF_PROMISC) {
1908 filter.bits.error = 1;
1909 filter.bits.promiscuous = 1;
1910 mc_filter[1] = ~0;
1911 mc_filter[0] = ~0;
1912 } else if (netdev->flags & IFF_ALLMULTI) {
1913 mc_filter[1] = ~0;
1914 mc_filter[0] = ~0;
1915 } else {
1916 netdev_for_each_mc_addr(ha, netdev) {
1917 bit_nr = ~crc32_le(~0, ha->addr, ETH_ALEN) & 0x3f;
1918 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 0x1f);
1919 }
1920 }
1921
1922 writel(mc_filter[0], port->gmac_base + GMAC_MCAST_FIL0);
1923 writel(mc_filter[1], port->gmac_base + GMAC_MCAST_FIL1);
1924 writel(filter.bits32, port->gmac_base + GMAC_RX_FLTR);
1925 }
1926
gmac_write_mac_address(struct net_device * netdev)1927 static void gmac_write_mac_address(struct net_device *netdev)
1928 {
1929 struct gemini_ethernet_port *port = netdev_priv(netdev);
1930 __le32 addr[3];
1931
1932 memset(addr, 0, sizeof(addr));
1933 memcpy(addr, netdev->dev_addr, ETH_ALEN);
1934
1935 writel(le32_to_cpu(addr[0]), port->gmac_base + GMAC_STA_ADD0);
1936 writel(le32_to_cpu(addr[1]), port->gmac_base + GMAC_STA_ADD1);
1937 writel(le32_to_cpu(addr[2]), port->gmac_base + GMAC_STA_ADD2);
1938 }
1939
gmac_set_mac_address(struct net_device * netdev,void * addr)1940 static int gmac_set_mac_address(struct net_device *netdev, void *addr)
1941 {
1942 struct sockaddr *sa = addr;
1943
1944 eth_hw_addr_set(netdev, sa->sa_data);
1945 gmac_write_mac_address(netdev);
1946
1947 return 0;
1948 }
1949
gmac_clear_hw_stats(struct net_device * netdev)1950 static void gmac_clear_hw_stats(struct net_device *netdev)
1951 {
1952 struct gemini_ethernet_port *port = netdev_priv(netdev);
1953
1954 readl(port->gmac_base + GMAC_IN_DISCARDS);
1955 readl(port->gmac_base + GMAC_IN_ERRORS);
1956 readl(port->gmac_base + GMAC_IN_MCAST);
1957 readl(port->gmac_base + GMAC_IN_BCAST);
1958 readl(port->gmac_base + GMAC_IN_MAC1);
1959 readl(port->gmac_base + GMAC_IN_MAC2);
1960 }
1961
gmac_get_stats64(struct net_device * netdev,struct rtnl_link_stats64 * stats)1962 static void gmac_get_stats64(struct net_device *netdev,
1963 struct rtnl_link_stats64 *stats)
1964 {
1965 struct gemini_ethernet_port *port = netdev_priv(netdev);
1966 unsigned int start;
1967
1968 gmac_update_hw_stats(netdev);
1969
1970 /* Racing with RX NAPI */
1971 do {
1972 start = u64_stats_fetch_begin(&port->rx_stats_syncp);
1973
1974 stats->rx_packets = port->stats.rx_packets;
1975 stats->rx_bytes = port->stats.rx_bytes;
1976 stats->rx_errors = port->stats.rx_errors;
1977 stats->rx_dropped = port->stats.rx_dropped;
1978
1979 stats->rx_length_errors = port->stats.rx_length_errors;
1980 stats->rx_over_errors = port->stats.rx_over_errors;
1981 stats->rx_crc_errors = port->stats.rx_crc_errors;
1982 stats->rx_frame_errors = port->stats.rx_frame_errors;
1983
1984 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start));
1985
1986 /* Racing with MIB and TX completion interrupts */
1987 do {
1988 start = u64_stats_fetch_begin(&port->ir_stats_syncp);
1989
1990 stats->tx_errors = port->stats.tx_errors;
1991 stats->tx_packets = port->stats.tx_packets;
1992 stats->tx_bytes = port->stats.tx_bytes;
1993
1994 stats->multicast = port->stats.multicast;
1995 stats->rx_missed_errors = port->stats.rx_missed_errors;
1996 stats->rx_fifo_errors = port->stats.rx_fifo_errors;
1997
1998 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start));
1999
2000 /* Racing with hard_start_xmit */
2001 do {
2002 start = u64_stats_fetch_begin(&port->tx_stats_syncp);
2003
2004 stats->tx_dropped = port->stats.tx_dropped;
2005
2006 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start));
2007
2008 stats->rx_dropped += stats->rx_missed_errors;
2009 }
2010
gmac_change_mtu(struct net_device * netdev,int new_mtu)2011 static int gmac_change_mtu(struct net_device *netdev, int new_mtu)
2012 {
2013 int max_len = gmac_pick_rx_max_len(new_mtu);
2014
2015 if (max_len < 0)
2016 return -EINVAL;
2017
2018 gmac_disable_tx_rx(netdev);
2019
2020 WRITE_ONCE(netdev->mtu, new_mtu);
2021 gmac_update_config0_reg(netdev, max_len << CONFIG0_MAXLEN_SHIFT,
2022 CONFIG0_MAXLEN_MASK);
2023
2024 netdev_update_features(netdev);
2025
2026 gmac_enable_tx_rx(netdev);
2027
2028 return 0;
2029 }
2030
gmac_set_features(struct net_device * netdev,netdev_features_t features)2031 static int gmac_set_features(struct net_device *netdev,
2032 netdev_features_t features)
2033 {
2034 struct gemini_ethernet_port *port = netdev_priv(netdev);
2035 int enable = features & NETIF_F_RXCSUM;
2036 unsigned long flags;
2037 u32 reg;
2038
2039 spin_lock_irqsave(&port->config_lock, flags);
2040
2041 reg = readl(port->gmac_base + GMAC_CONFIG0);
2042 reg = enable ? reg | CONFIG0_RX_CHKSUM : reg & ~CONFIG0_RX_CHKSUM;
2043 writel(reg, port->gmac_base + GMAC_CONFIG0);
2044
2045 spin_unlock_irqrestore(&port->config_lock, flags);
2046 return 0;
2047 }
2048
gmac_get_sset_count(struct net_device * netdev,int sset)2049 static int gmac_get_sset_count(struct net_device *netdev, int sset)
2050 {
2051 return sset == ETH_SS_STATS ? GMAC_STATS_NUM : 0;
2052 }
2053
gmac_get_strings(struct net_device * netdev,u32 stringset,u8 * data)2054 static void gmac_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2055 {
2056 if (stringset != ETH_SS_STATS)
2057 return;
2058
2059 memcpy(data, gmac_stats_strings, sizeof(gmac_stats_strings));
2060 }
2061
gmac_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * estats,u64 * values)2062 static void gmac_get_ethtool_stats(struct net_device *netdev,
2063 struct ethtool_stats *estats, u64 *values)
2064 {
2065 struct gemini_ethernet_port *port = netdev_priv(netdev);
2066 unsigned int start;
2067 u64 *p;
2068 int i;
2069
2070 gmac_update_hw_stats(netdev);
2071
2072 /* Racing with MIB interrupt */
2073 do {
2074 p = values;
2075 start = u64_stats_fetch_begin(&port->ir_stats_syncp);
2076
2077 for (i = 0; i < RX_STATS_NUM; i++)
2078 *p++ = port->hw_stats[i];
2079
2080 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start));
2081 values = p;
2082
2083 /* Racing with RX NAPI */
2084 do {
2085 p = values;
2086 start = u64_stats_fetch_begin(&port->rx_stats_syncp);
2087
2088 for (i = 0; i < RX_STATUS_NUM; i++)
2089 *p++ = port->rx_stats[i];
2090 for (i = 0; i < RX_CHKSUM_NUM; i++)
2091 *p++ = port->rx_csum_stats[i];
2092 *p++ = port->rx_napi_exits;
2093
2094 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start));
2095 values = p;
2096
2097 /* Racing with TX start_xmit */
2098 do {
2099 p = values;
2100 start = u64_stats_fetch_begin(&port->tx_stats_syncp);
2101
2102 for (i = 0; i < TX_MAX_FRAGS; i++) {
2103 *values++ = port->tx_frag_stats[i];
2104 port->tx_frag_stats[i] = 0;
2105 }
2106 *values++ = port->tx_frags_linearized;
2107 *values++ = port->tx_hw_csummed;
2108
2109 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start));
2110 }
2111
gmac_get_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)2112 static int gmac_get_ksettings(struct net_device *netdev,
2113 struct ethtool_link_ksettings *cmd)
2114 {
2115 if (!netdev->phydev)
2116 return -ENXIO;
2117 phy_ethtool_ksettings_get(netdev->phydev, cmd);
2118
2119 return 0;
2120 }
2121
gmac_set_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * cmd)2122 static int gmac_set_ksettings(struct net_device *netdev,
2123 const struct ethtool_link_ksettings *cmd)
2124 {
2125 if (!netdev->phydev)
2126 return -ENXIO;
2127 return phy_ethtool_ksettings_set(netdev->phydev, cmd);
2128 }
2129
gmac_nway_reset(struct net_device * netdev)2130 static int gmac_nway_reset(struct net_device *netdev)
2131 {
2132 if (!netdev->phydev)
2133 return -ENXIO;
2134 return phy_start_aneg(netdev->phydev);
2135 }
2136
gmac_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pparam)2137 static void gmac_get_pauseparam(struct net_device *netdev,
2138 struct ethtool_pauseparam *pparam)
2139 {
2140 struct gemini_ethernet_port *port = netdev_priv(netdev);
2141 union gmac_config0 config0;
2142
2143 config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
2144
2145 pparam->rx_pause = config0.bits.rx_fc_en;
2146 pparam->tx_pause = config0.bits.tx_fc_en;
2147 pparam->autoneg = true;
2148 }
2149
gmac_set_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pparam)2150 static int gmac_set_pauseparam(struct net_device *netdev,
2151 struct ethtool_pauseparam *pparam)
2152 {
2153 struct phy_device *phydev = netdev->phydev;
2154
2155 if (!pparam->autoneg)
2156 return -EOPNOTSUPP;
2157
2158 phy_set_asym_pause(phydev, pparam->rx_pause, pparam->tx_pause);
2159
2160 return 0;
2161 }
2162
gmac_get_ringparam(struct net_device * netdev,struct ethtool_ringparam * rp,struct kernel_ethtool_ringparam * kernel_rp,struct netlink_ext_ack * extack)2163 static void gmac_get_ringparam(struct net_device *netdev,
2164 struct ethtool_ringparam *rp,
2165 struct kernel_ethtool_ringparam *kernel_rp,
2166 struct netlink_ext_ack *extack)
2167 {
2168 struct gemini_ethernet_port *port = netdev_priv(netdev);
2169
2170 readl(port->gmac_base + GMAC_CONFIG0);
2171
2172 rp->rx_max_pending = 1 << 15;
2173 rp->rx_mini_max_pending = 0;
2174 rp->rx_jumbo_max_pending = 0;
2175 rp->tx_max_pending = 1 << 15;
2176
2177 rp->rx_pending = 1 << port->rxq_order;
2178 rp->rx_mini_pending = 0;
2179 rp->rx_jumbo_pending = 0;
2180 rp->tx_pending = 1 << port->txq_order;
2181 }
2182
gmac_set_ringparam(struct net_device * netdev,struct ethtool_ringparam * rp,struct kernel_ethtool_ringparam * kernel_rp,struct netlink_ext_ack * extack)2183 static int gmac_set_ringparam(struct net_device *netdev,
2184 struct ethtool_ringparam *rp,
2185 struct kernel_ethtool_ringparam *kernel_rp,
2186 struct netlink_ext_ack *extack)
2187 {
2188 struct gemini_ethernet_port *port = netdev_priv(netdev);
2189 int err = 0;
2190
2191 if (netif_running(netdev))
2192 return -EBUSY;
2193
2194 if (rp->rx_pending) {
2195 port->rxq_order = min(15, ilog2(rp->rx_pending - 1) + 1);
2196 err = geth_resize_freeq(port);
2197 }
2198 if (rp->tx_pending) {
2199 port->txq_order = min(15, ilog2(rp->tx_pending - 1) + 1);
2200 port->irq_every_tx_packets = 1 << (port->txq_order - 2);
2201 }
2202
2203 return err;
2204 }
2205
gmac_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * ecmd,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)2206 static int gmac_get_coalesce(struct net_device *netdev,
2207 struct ethtool_coalesce *ecmd,
2208 struct kernel_ethtool_coalesce *kernel_coal,
2209 struct netlink_ext_ack *extack)
2210 {
2211 struct gemini_ethernet_port *port = netdev_priv(netdev);
2212
2213 ecmd->rx_max_coalesced_frames = 1;
2214 ecmd->tx_max_coalesced_frames = port->irq_every_tx_packets;
2215 ecmd->rx_coalesce_usecs = port->rx_coalesce_nsecs / 1000;
2216
2217 return 0;
2218 }
2219
gmac_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * ecmd,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)2220 static int gmac_set_coalesce(struct net_device *netdev,
2221 struct ethtool_coalesce *ecmd,
2222 struct kernel_ethtool_coalesce *kernel_coal,
2223 struct netlink_ext_ack *extack)
2224 {
2225 struct gemini_ethernet_port *port = netdev_priv(netdev);
2226
2227 if (ecmd->tx_max_coalesced_frames < 1)
2228 return -EINVAL;
2229 if (ecmd->tx_max_coalesced_frames >= 1 << port->txq_order)
2230 return -EINVAL;
2231
2232 port->irq_every_tx_packets = ecmd->tx_max_coalesced_frames;
2233 port->rx_coalesce_nsecs = ecmd->rx_coalesce_usecs * 1000;
2234
2235 return 0;
2236 }
2237
gmac_get_msglevel(struct net_device * netdev)2238 static u32 gmac_get_msglevel(struct net_device *netdev)
2239 {
2240 struct gemini_ethernet_port *port = netdev_priv(netdev);
2241
2242 return port->msg_enable;
2243 }
2244
gmac_set_msglevel(struct net_device * netdev,u32 level)2245 static void gmac_set_msglevel(struct net_device *netdev, u32 level)
2246 {
2247 struct gemini_ethernet_port *port = netdev_priv(netdev);
2248
2249 port->msg_enable = level;
2250 }
2251
gmac_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * info)2252 static void gmac_get_drvinfo(struct net_device *netdev,
2253 struct ethtool_drvinfo *info)
2254 {
2255 strcpy(info->driver, DRV_NAME);
2256 strcpy(info->bus_info, netdev->dev_id ? "1" : "0");
2257 }
2258
2259 static const struct net_device_ops gmac_351x_ops = {
2260 .ndo_init = gmac_init,
2261 .ndo_open = gmac_open,
2262 .ndo_stop = gmac_stop,
2263 .ndo_start_xmit = gmac_start_xmit,
2264 .ndo_tx_timeout = gmac_tx_timeout,
2265 .ndo_set_rx_mode = gmac_set_rx_mode,
2266 .ndo_set_mac_address = gmac_set_mac_address,
2267 .ndo_get_stats64 = gmac_get_stats64,
2268 .ndo_change_mtu = gmac_change_mtu,
2269 .ndo_set_features = gmac_set_features,
2270 };
2271
2272 static const struct ethtool_ops gmac_351x_ethtool_ops = {
2273 .supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS |
2274 ETHTOOL_COALESCE_MAX_FRAMES,
2275 .get_sset_count = gmac_get_sset_count,
2276 .get_strings = gmac_get_strings,
2277 .get_ethtool_stats = gmac_get_ethtool_stats,
2278 .get_link = ethtool_op_get_link,
2279 .get_link_ksettings = gmac_get_ksettings,
2280 .set_link_ksettings = gmac_set_ksettings,
2281 .nway_reset = gmac_nway_reset,
2282 .get_pauseparam = gmac_get_pauseparam,
2283 .set_pauseparam = gmac_set_pauseparam,
2284 .get_ringparam = gmac_get_ringparam,
2285 .set_ringparam = gmac_set_ringparam,
2286 .get_coalesce = gmac_get_coalesce,
2287 .set_coalesce = gmac_set_coalesce,
2288 .get_msglevel = gmac_get_msglevel,
2289 .set_msglevel = gmac_set_msglevel,
2290 .get_drvinfo = gmac_get_drvinfo,
2291 };
2292
gemini_port_irq_thread(int irq,void * data)2293 static irqreturn_t gemini_port_irq_thread(int irq, void *data)
2294 {
2295 unsigned long irqmask = SWFQ_EMPTY_INT_BIT;
2296 struct gemini_ethernet_port *port = data;
2297 struct gemini_ethernet *geth;
2298 unsigned long flags;
2299
2300 geth = port->geth;
2301 /* The queue is half empty so refill it */
2302 geth_fill_freeq(geth, true);
2303
2304 spin_lock_irqsave(&geth->irq_lock, flags);
2305 /* ACK queue interrupt */
2306 writel(irqmask, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2307 /* Enable queue interrupt again */
2308 irqmask |= readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2309 writel(irqmask, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2310 spin_unlock_irqrestore(&geth->irq_lock, flags);
2311
2312 return IRQ_HANDLED;
2313 }
2314
gemini_port_irq(int irq,void * data)2315 static irqreturn_t gemini_port_irq(int irq, void *data)
2316 {
2317 struct gemini_ethernet_port *port = data;
2318 struct gemini_ethernet *geth;
2319 irqreturn_t ret = IRQ_NONE;
2320 u32 val, en;
2321
2322 geth = port->geth;
2323 spin_lock(&geth->irq_lock);
2324
2325 val = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2326 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2327
2328 if (val & en & SWFQ_EMPTY_INT_BIT) {
2329 /* Disable the queue empty interrupt while we work on
2330 * processing the queue. Also disable overrun interrupts
2331 * as there is not much we can do about it here.
2332 */
2333 en &= ~(SWFQ_EMPTY_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT
2334 | GMAC1_RX_OVERRUN_INT_BIT);
2335 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2336 ret = IRQ_WAKE_THREAD;
2337 }
2338
2339 spin_unlock(&geth->irq_lock);
2340
2341 return ret;
2342 }
2343
gemini_port_remove(struct gemini_ethernet_port * port)2344 static void gemini_port_remove(struct gemini_ethernet_port *port)
2345 {
2346 if (port->netdev) {
2347 phy_disconnect(port->netdev->phydev);
2348 unregister_netdev(port->netdev);
2349 }
2350 clk_disable_unprepare(port->pclk);
2351 geth_cleanup_freeq(port->geth);
2352 }
2353
gemini_ethernet_init(struct gemini_ethernet * geth)2354 static void gemini_ethernet_init(struct gemini_ethernet *geth)
2355 {
2356 /* Only do this once both ports are online */
2357 if (geth->initialized)
2358 return;
2359 if (geth->port0 && geth->port1)
2360 geth->initialized = true;
2361 else
2362 return;
2363
2364 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
2365 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
2366 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG);
2367 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG);
2368 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2369
2370 /* Interrupt config:
2371 *
2372 * GMAC0 intr bits ------> int0 ----> eth0
2373 * GMAC1 intr bits ------> int1 ----> eth1
2374 * TOE intr -------------> int1 ----> eth1
2375 * Classification Intr --> int0 ----> eth0
2376 * Default Q0 -----------> int0 ----> eth0
2377 * Default Q1 -----------> int1 ----> eth1
2378 * FreeQ intr -----------> int1 ----> eth1
2379 */
2380 writel(0xCCFC0FC0, geth->base + GLOBAL_INTERRUPT_SELECT_0_REG);
2381 writel(0x00F00002, geth->base + GLOBAL_INTERRUPT_SELECT_1_REG);
2382 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_2_REG);
2383 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_3_REG);
2384 writel(0xFF000003, geth->base + GLOBAL_INTERRUPT_SELECT_4_REG);
2385
2386 /* edge-triggered interrupts packed to level-triggered one... */
2387 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
2388 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
2389 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_2_REG);
2390 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_3_REG);
2391 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2392
2393 /* Set up queue */
2394 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
2395 writel(0, geth->base + GLOBAL_HW_FREEQ_BASE_SIZE_REG);
2396 writel(0, geth->base + GLOBAL_SWFQ_RWPTR_REG);
2397 writel(0, geth->base + GLOBAL_HWFQ_RWPTR_REG);
2398
2399 geth->freeq_frag_order = DEFAULT_RX_BUF_ORDER;
2400 /* This makes the queue resize on probe() so that we
2401 * set up and enable the queue IRQ. FIXME: fragile.
2402 */
2403 geth->freeq_order = 1;
2404 }
2405
gemini_port_save_mac_addr(struct gemini_ethernet_port * port)2406 static void gemini_port_save_mac_addr(struct gemini_ethernet_port *port)
2407 {
2408 port->mac_addr[0] =
2409 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD0));
2410 port->mac_addr[1] =
2411 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD1));
2412 port->mac_addr[2] =
2413 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD2));
2414 }
2415
gemini_ethernet_port_probe(struct platform_device * pdev)2416 static int gemini_ethernet_port_probe(struct platform_device *pdev)
2417 {
2418 char *port_names[2] = { "ethernet0", "ethernet1" };
2419 struct device_node *np = pdev->dev.of_node;
2420 struct gemini_ethernet_port *port;
2421 struct device *dev = &pdev->dev;
2422 struct gemini_ethernet *geth;
2423 struct net_device *netdev;
2424 struct device *parent;
2425 u8 mac[ETH_ALEN];
2426 unsigned int id;
2427 int irq;
2428 int ret;
2429
2430 parent = dev->parent;
2431 geth = dev_get_drvdata(parent);
2432
2433 if (!strcmp(dev_name(dev), "60008000.ethernet-port"))
2434 id = 0;
2435 else if (!strcmp(dev_name(dev), "6000c000.ethernet-port"))
2436 id = 1;
2437 else
2438 return -ENODEV;
2439
2440 dev_info(dev, "probe %s ID %d\n", dev_name(dev), id);
2441
2442 netdev = devm_alloc_etherdev_mqs(dev, sizeof(*port), TX_QUEUE_NUM, TX_QUEUE_NUM);
2443 if (!netdev) {
2444 dev_err(dev, "Can't allocate ethernet device #%d\n", id);
2445 return -ENOMEM;
2446 }
2447
2448 port = netdev_priv(netdev);
2449 SET_NETDEV_DEV(netdev, dev);
2450 port->netdev = netdev;
2451 port->id = id;
2452 port->geth = geth;
2453 port->dev = dev;
2454 port->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2455
2456 /* DMA memory */
2457 port->dma_base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
2458 if (IS_ERR(port->dma_base)) {
2459 dev_err(dev, "get DMA address failed\n");
2460 return PTR_ERR(port->dma_base);
2461 }
2462
2463 /* GMAC config memory */
2464 port->gmac_base = devm_platform_get_and_ioremap_resource(pdev, 1, NULL);
2465 if (IS_ERR(port->gmac_base)) {
2466 dev_err(dev, "get GMAC address failed\n");
2467 return PTR_ERR(port->gmac_base);
2468 }
2469
2470 /* Interrupt */
2471 irq = platform_get_irq(pdev, 0);
2472 if (irq < 0)
2473 return irq;
2474 port->irq = irq;
2475
2476 /* Clock the port */
2477 port->pclk = devm_clk_get(dev, "PCLK");
2478 if (IS_ERR(port->pclk)) {
2479 dev_err(dev, "no PCLK\n");
2480 return PTR_ERR(port->pclk);
2481 }
2482 ret = clk_prepare_enable(port->pclk);
2483 if (ret)
2484 return ret;
2485
2486 /* Maybe there is a nice ethernet address we should use */
2487 gemini_port_save_mac_addr(port);
2488
2489 /* Reset the port */
2490 port->reset = devm_reset_control_get_exclusive(dev, NULL);
2491 if (IS_ERR(port->reset)) {
2492 dev_err(dev, "no reset\n");
2493 ret = PTR_ERR(port->reset);
2494 goto unprepare;
2495 }
2496 reset_control_reset(port->reset);
2497 usleep_range(100, 500);
2498
2499 /* Assign pointer in the main state container */
2500 if (!id)
2501 geth->port0 = port;
2502 else
2503 geth->port1 = port;
2504
2505 /* This will just be done once both ports are up and reset */
2506 gemini_ethernet_init(geth);
2507
2508 platform_set_drvdata(pdev, port);
2509
2510 /* Set up and register the netdev */
2511 netdev->dev_id = port->id;
2512 netdev->irq = irq;
2513 netdev->netdev_ops = &gmac_351x_ops;
2514 netdev->ethtool_ops = &gmac_351x_ethtool_ops;
2515
2516 spin_lock_init(&port->config_lock);
2517 gmac_clear_hw_stats(netdev);
2518
2519 netdev->hw_features = GMAC_OFFLOAD_FEATURES;
2520 netdev->features |= GMAC_OFFLOAD_FEATURES | NETIF_F_GRO;
2521 /* We can receive jumbo frames up to 10236 bytes but only
2522 * transmit 2047 bytes so, let's accept payloads of 2047
2523 * bytes minus VLAN and ethernet header
2524 */
2525 netdev->min_mtu = ETH_MIN_MTU;
2526 netdev->max_mtu = MTU_SIZE_BIT_MASK - VLAN_ETH_HLEN;
2527
2528 port->freeq_refill = 0;
2529 netif_napi_add(netdev, &port->napi, gmac_napi_poll);
2530
2531 ret = of_get_mac_address(np, mac);
2532 if (!ret) {
2533 dev_info(dev, "Setting macaddr from DT %pM\n", mac);
2534 memcpy(port->mac_addr, mac, ETH_ALEN);
2535 }
2536
2537 if (is_valid_ether_addr((void *)port->mac_addr)) {
2538 eth_hw_addr_set(netdev, (u8 *)port->mac_addr);
2539 } else {
2540 dev_dbg(dev, "ethernet address 0x%08x%08x%08x invalid\n",
2541 port->mac_addr[0], port->mac_addr[1],
2542 port->mac_addr[2]);
2543 dev_info(dev, "using a random ethernet address\n");
2544 eth_hw_addr_random(netdev);
2545 }
2546 gmac_write_mac_address(netdev);
2547
2548 ret = devm_request_threaded_irq(port->dev,
2549 port->irq,
2550 gemini_port_irq,
2551 gemini_port_irq_thread,
2552 IRQF_SHARED,
2553 port_names[port->id],
2554 port);
2555 if (ret)
2556 goto unprepare;
2557
2558 ret = gmac_setup_phy(netdev);
2559 if (ret) {
2560 netdev_err(netdev,
2561 "PHY init failed\n");
2562 goto unprepare;
2563 }
2564
2565 ret = register_netdev(netdev);
2566 if (ret)
2567 goto unprepare;
2568
2569 return 0;
2570
2571 unprepare:
2572 clk_disable_unprepare(port->pclk);
2573 return ret;
2574 }
2575
gemini_ethernet_port_remove(struct platform_device * pdev)2576 static void gemini_ethernet_port_remove(struct platform_device *pdev)
2577 {
2578 struct gemini_ethernet_port *port = platform_get_drvdata(pdev);
2579
2580 gemini_port_remove(port);
2581 }
2582
2583 static const struct of_device_id gemini_ethernet_port_of_match[] = {
2584 {
2585 .compatible = "cortina,gemini-ethernet-port",
2586 },
2587 {},
2588 };
2589 MODULE_DEVICE_TABLE(of, gemini_ethernet_port_of_match);
2590
2591 static struct platform_driver gemini_ethernet_port_driver = {
2592 .driver = {
2593 .name = "gemini-ethernet-port",
2594 .of_match_table = gemini_ethernet_port_of_match,
2595 },
2596 .probe = gemini_ethernet_port_probe,
2597 .remove_new = gemini_ethernet_port_remove,
2598 };
2599
gemini_ethernet_probe(struct platform_device * pdev)2600 static int gemini_ethernet_probe(struct platform_device *pdev)
2601 {
2602 struct device *dev = &pdev->dev;
2603 struct gemini_ethernet *geth;
2604 unsigned int retry = 5;
2605 u32 val;
2606
2607 /* Global registers */
2608 geth = devm_kzalloc(dev, sizeof(*geth), GFP_KERNEL);
2609 if (!geth)
2610 return -ENOMEM;
2611 geth->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
2612 if (IS_ERR(geth->base))
2613 return PTR_ERR(geth->base);
2614 geth->dev = dev;
2615
2616 /* Wait for ports to stabilize */
2617 do {
2618 udelay(2);
2619 val = readl(geth->base + GLOBAL_TOE_VERSION_REG);
2620 barrier();
2621 } while (!val && --retry);
2622 if (!retry) {
2623 dev_err(dev, "failed to reset ethernet\n");
2624 return -EIO;
2625 }
2626 dev_info(dev, "Ethernet device ID: 0x%03x, revision 0x%01x\n",
2627 (val >> 4) & 0xFFFU, val & 0xFU);
2628
2629 spin_lock_init(&geth->irq_lock);
2630 spin_lock_init(&geth->freeq_lock);
2631
2632 /* The children will use this */
2633 platform_set_drvdata(pdev, geth);
2634
2635 /* Spawn child devices for the two ports */
2636 return devm_of_platform_populate(dev);
2637 }
2638
gemini_ethernet_remove(struct platform_device * pdev)2639 static void gemini_ethernet_remove(struct platform_device *pdev)
2640 {
2641 struct gemini_ethernet *geth = platform_get_drvdata(pdev);
2642
2643 geth_cleanup_freeq(geth);
2644 geth->initialized = false;
2645 }
2646
2647 static const struct of_device_id gemini_ethernet_of_match[] = {
2648 {
2649 .compatible = "cortina,gemini-ethernet",
2650 },
2651 {},
2652 };
2653 MODULE_DEVICE_TABLE(of, gemini_ethernet_of_match);
2654
2655 static struct platform_driver gemini_ethernet_driver = {
2656 .driver = {
2657 .name = DRV_NAME,
2658 .of_match_table = gemini_ethernet_of_match,
2659 },
2660 .probe = gemini_ethernet_probe,
2661 .remove_new = gemini_ethernet_remove,
2662 };
2663
gemini_ethernet_module_init(void)2664 static int __init gemini_ethernet_module_init(void)
2665 {
2666 int ret;
2667
2668 ret = platform_driver_register(&gemini_ethernet_port_driver);
2669 if (ret)
2670 return ret;
2671
2672 ret = platform_driver_register(&gemini_ethernet_driver);
2673 if (ret) {
2674 platform_driver_unregister(&gemini_ethernet_port_driver);
2675 return ret;
2676 }
2677
2678 return 0;
2679 }
2680 module_init(gemini_ethernet_module_init);
2681
gemini_ethernet_module_exit(void)2682 static void __exit gemini_ethernet_module_exit(void)
2683 {
2684 platform_driver_unregister(&gemini_ethernet_driver);
2685 platform_driver_unregister(&gemini_ethernet_port_driver);
2686 }
2687 module_exit(gemini_ethernet_module_exit);
2688
2689 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
2690 MODULE_DESCRIPTION("StorLink SL351x (Gemini) ethernet driver");
2691 MODULE_LICENSE("GPL");
2692 MODULE_ALIAS("platform:" DRV_NAME);
2693