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1 // SPDX-License-Identifier: GPL-2.0
2 /* Texas Instruments ICSSG Ethernet driver
3  *
4  * Copyright (C) 2018-2021 Texas Instruments Incorporated - https://www.ti.com/
5  *
6  */
7 
8 #include "icssg_prueth.h"
9 #include "icssg_stats.h"
10 #include <linux/regmap.h>
11 
12 #define ICSSG_TX_PACKET_OFFSET	0xA0
13 #define ICSSG_TX_BYTE_OFFSET	0xEC
14 #define ICSSG_FW_STATS_BASE	0x0248
15 
16 static u32 stats_base[] = {	0x54c,	/* Slice 0 stats start */
17 				0xb18,	/* Slice 1 stats start */
18 };
19 
emac_update_hardware_stats(struct prueth_emac * emac)20 void emac_update_hardware_stats(struct prueth_emac *emac)
21 {
22 	struct prueth *prueth = emac->prueth;
23 	int slice = prueth_emac_slice(emac);
24 	u32 base = stats_base[slice];
25 	u32 tx_pkt_cnt = 0;
26 	u32 val, reg;
27 	int i;
28 
29 	spin_lock(&prueth->stats_lock);
30 
31 	for (i = 0; i < ARRAY_SIZE(icssg_all_miig_stats); i++) {
32 		/* In MII mode TX lines are swapped inside ICSSG, so read Tx stats
33 		 * from slice1 for port0 and slice0 for port1 to get accurate Tx
34 		 * stats for a given port
35 		 */
36 		if (emac->phy_if == PHY_INTERFACE_MODE_MII &&
37 		    icssg_all_miig_stats[i].offset >= ICSSG_TX_PACKET_OFFSET &&
38 		    icssg_all_miig_stats[i].offset <= ICSSG_TX_BYTE_OFFSET)
39 			base = stats_base[slice ^ 1];
40 		regmap_read(prueth->miig_rt,
41 			    base + icssg_all_miig_stats[i].offset,
42 			    &val);
43 		regmap_write(prueth->miig_rt,
44 			     base + icssg_all_miig_stats[i].offset,
45 			     val);
46 
47 		if (icssg_all_miig_stats[i].offset == ICSSG_TX_PACKET_OFFSET)
48 			tx_pkt_cnt = val;
49 
50 		emac->stats[i] += val;
51 		if (icssg_all_miig_stats[i].offset == ICSSG_TX_BYTE_OFFSET)
52 			emac->stats[i] -= tx_pkt_cnt * 8;
53 	}
54 
55 	if (prueth->pa_stats) {
56 		for (i = 0; i < ARRAY_SIZE(icssg_all_pa_stats); i++) {
57 			reg = ICSSG_FW_STATS_BASE +
58 			      icssg_all_pa_stats[i].offset *
59 			      PRUETH_NUM_MACS + slice * sizeof(u32);
60 			regmap_read(prueth->pa_stats, reg, &val);
61 			emac->pa_stats[i] += val;
62 		}
63 	}
64 
65 	spin_unlock(&prueth->stats_lock);
66 }
67 
icssg_stats_work_handler(struct work_struct * work)68 void icssg_stats_work_handler(struct work_struct *work)
69 {
70 	struct prueth_emac *emac = container_of(work, struct prueth_emac,
71 						stats_work.work);
72 	emac_update_hardware_stats(emac);
73 
74 	queue_delayed_work(system_long_wq, &emac->stats_work,
75 			   msecs_to_jiffies((STATS_TIME_LIMIT_1G_MS * 1000) / emac->speed));
76 }
77 EXPORT_SYMBOL_GPL(icssg_stats_work_handler);
78 
emac_get_stat_by_name(struct prueth_emac * emac,char * stat_name)79 int emac_get_stat_by_name(struct prueth_emac *emac, char *stat_name)
80 {
81 	int i;
82 
83 	for (i = 0; i < ARRAY_SIZE(icssg_all_miig_stats); i++) {
84 		if (!strcmp(icssg_all_miig_stats[i].name, stat_name))
85 			return emac->stats[icssg_all_miig_stats[i].offset / sizeof(u32)];
86 	}
87 
88 	if (emac->prueth->pa_stats) {
89 		for (i = 0; i < ARRAY_SIZE(icssg_all_pa_stats); i++) {
90 			if (!strcmp(icssg_all_pa_stats[i].name, stat_name))
91 				return emac->pa_stats[icssg_all_pa_stats[i].offset / sizeof(u32)];
92 		}
93 	}
94 
95 	netdev_err(emac->ndev, "Invalid stats %s\n", stat_name);
96 	return -EINVAL;
97 }
98