1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7 #ifndef ATH11K_CORE_H
8 #define ATH11K_CORE_H
9
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/bitfield.h>
14 #include <linux/dmi.h>
15 #include <linux/ctype.h>
16 #include <linux/rhashtable.h>
17 #include <linux/average.h>
18 #include <linux/firmware.h>
19
20 #include "qmi.h"
21 #include "htc.h"
22 #include "wmi.h"
23 #include "hal.h"
24 #include "dp.h"
25 #include "ce.h"
26 #include "mac.h"
27 #include "hw.h"
28 #include "hal_rx.h"
29 #include "reg.h"
30 #include "thermal.h"
31 #include "dbring.h"
32 #include "spectral.h"
33 #include "wow.h"
34 #include "fw.h"
35
36 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
37
38 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512
39
40 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
41
42 /* Pending management packets threshold for dropping probe responses */
43 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
44
45 #define ATH11K_INVALID_HW_MAC_ID 0xFF
46 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ)
47
48 /* SMBIOS type containing Board Data File Name Extension */
49 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8
50
51 /* SMBIOS type structure length (excluding strings-set) */
52 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9
53
54 /* The magic used by QCA spec */
55 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_"
56
57 extern unsigned int ath11k_frame_mode;
58 extern bool ath11k_ftm_mode;
59
60 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
61
62 #define ATH11K_MON_TIMER_INTERVAL 10
63 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ)
64 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3
65 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5
66 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
67 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
68 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
69
70 enum ath11k_supported_bw {
71 ATH11K_BW_20 = 0,
72 ATH11K_BW_40 = 1,
73 ATH11K_BW_80 = 2,
74 ATH11K_BW_160 = 3,
75 };
76
77 enum ath11k_bdf_search {
78 ATH11K_BDF_SEARCH_DEFAULT,
79 ATH11K_BDF_SEARCH_BUS_AND_BOARD,
80 };
81
82 enum wme_ac {
83 WME_AC_BE,
84 WME_AC_BK,
85 WME_AC_VI,
86 WME_AC_VO,
87 WME_NUM_AC
88 };
89
90 #define ATH11K_HT_MCS_MAX 7
91 #define ATH11K_VHT_MCS_MAX 9
92 #define ATH11K_HE_MCS_MAX 11
93
94 enum ath11k_crypt_mode {
95 /* Only use hardware crypto engine */
96 ATH11K_CRYPT_MODE_HW,
97 /* Only use software crypto */
98 ATH11K_CRYPT_MODE_SW,
99 };
100
ath11k_tid_to_ac(u32 tid)101 static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
102 {
103 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
104 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
105 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
106 WME_AC_VO);
107 }
108
109 enum ath11k_skb_flags {
110 ATH11K_SKB_HW_80211_ENCAP = BIT(0),
111 ATH11K_SKB_CIPHER_SET = BIT(1),
112 };
113
114 struct ath11k_skb_cb {
115 dma_addr_t paddr;
116 u8 eid;
117 u8 flags;
118 u32 cipher;
119 struct ath11k *ar;
120 struct ieee80211_vif *vif;
121 } __packed;
122
123 struct ath11k_skb_rxcb {
124 dma_addr_t paddr;
125 bool is_first_msdu;
126 bool is_last_msdu;
127 bool is_continuation;
128 bool is_mcbc;
129 bool is_eapol;
130 struct hal_rx_desc *rx_desc;
131 u8 err_rel_src;
132 u8 err_code;
133 u8 mac_id;
134 u8 unmapped;
135 u8 is_frag;
136 u8 tid;
137 u16 peer_id;
138 u16 seq_no;
139 };
140
141 enum ath11k_hw_rev {
142 ATH11K_HW_IPQ8074,
143 ATH11K_HW_QCA6390_HW20,
144 ATH11K_HW_IPQ6018_HW10,
145 ATH11K_HW_QCN9074_HW10,
146 ATH11K_HW_WCN6855_HW20,
147 ATH11K_HW_WCN6855_HW21,
148 ATH11K_HW_WCN6750_HW10,
149 ATH11K_HW_IPQ5018_HW10,
150 ATH11K_HW_QCA2066_HW21,
151 };
152
153 enum ath11k_firmware_mode {
154 /* the default mode, standard 802.11 functionality */
155 ATH11K_FIRMWARE_MODE_NORMAL,
156
157 /* factory tests etc */
158 ATH11K_FIRMWARE_MODE_FTM,
159
160 /* Cold boot calibration */
161 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
162 };
163
164 extern bool ath11k_cold_boot_cal;
165
166 #define ATH11K_IRQ_NUM_MAX 52
167 #define ATH11K_EXT_IRQ_NUM_MAX 16
168
169 struct ath11k_ext_irq_grp {
170 struct ath11k_base *ab;
171 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
172 u32 num_irq;
173 u32 grp_id;
174 u64 timestamp;
175 bool napi_enabled;
176 struct napi_struct napi;
177 struct net_device *napi_ndev;
178 };
179
180 enum ath11k_smbios_cc_type {
181 /* disable country code setting from SMBIOS */
182 ATH11K_SMBIOS_CC_DISABLE = 0,
183
184 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
185 ATH11K_SMBIOS_CC_ISO = 1,
186
187 /* worldwide regdomain */
188 ATH11K_SMBIOS_CC_WW = 2,
189 };
190
191 struct ath11k_smbios_bdf {
192 struct dmi_header hdr;
193
194 u8 features_disabled;
195
196 /* enum ath11k_smbios_cc_type */
197 u8 country_code_flag;
198
199 /* To set specific country, you need to set country code
200 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United
201 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=
202 * 0x53). To set country to INDONESIA, then country code value =
203 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =
204 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory
205 * setting.
206 */
207 u16 cc_code;
208
209 u8 bdf_enabled;
210 u8 bdf_ext[];
211 } __packed;
212
213 #define HEHANDLE_CAP_PHYINFO_SIZE 3
214 #define HECAP_PHYINFO_SIZE 9
215 #define HECAP_MACINFO_SIZE 5
216 #define HECAP_TXRX_MCS_NSS_SIZE 2
217 #define HECAP_PPET16_PPET8_MAX_SIZE 25
218
219 #define HE_PPET16_PPET8_SIZE 8
220
221 /* 802.11ax PPE (PPDU packet Extension) threshold */
222 struct he_ppe_threshold {
223 u32 numss_m1;
224 u32 ru_mask;
225 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
226 };
227
228 struct ath11k_he {
229 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
230 u32 hecap_rxmcsnssmap;
231 u32 hecap_txmcsnssmap;
232 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
233 struct he_ppe_threshold hecap_ppet;
234 u32 heop_param;
235 };
236
237 #define MAX_RADIOS 3
238
239 /* ipq5018 hw param macros */
240 #define MAX_RADIOS_5018 1
241 #define CE_CNT_5018 6
242 #define TARGET_CE_CNT_5018 9
243 #define SVC_CE_MAP_LEN_5018 17
244 #define RXDMA_PER_PDEV_5018 1
245
246 enum {
247 WMI_HOST_TP_SCALE_MAX = 0,
248 WMI_HOST_TP_SCALE_50 = 1,
249 WMI_HOST_TP_SCALE_25 = 2,
250 WMI_HOST_TP_SCALE_12 = 3,
251 WMI_HOST_TP_SCALE_MIN = 4,
252 WMI_HOST_TP_SCALE_SIZE = 5,
253 };
254
255 enum ath11k_scan_state {
256 ATH11K_SCAN_IDLE,
257 ATH11K_SCAN_STARTING,
258 ATH11K_SCAN_RUNNING,
259 ATH11K_SCAN_ABORTING,
260 };
261
262 enum ath11k_11d_state {
263 ATH11K_11D_IDLE,
264 ATH11K_11D_PREPARING,
265 ATH11K_11D_RUNNING,
266 };
267
268 enum ath11k_dev_flags {
269 ATH11K_CAC_RUNNING,
270 ATH11K_FLAG_CORE_REGISTERED,
271 ATH11K_FLAG_CRASH_FLUSH,
272 ATH11K_FLAG_RAW_MODE,
273 ATH11K_FLAG_HW_CRYPTO_DISABLED,
274 ATH11K_FLAG_BTCOEX,
275 ATH11K_FLAG_RECOVERY,
276 ATH11K_FLAG_UNREGISTERING,
277 ATH11K_FLAG_REGISTERED,
278 ATH11K_FLAG_QMI_FAIL,
279 ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
280 ATH11K_FLAG_CE_IRQ_ENABLED,
281 ATH11K_FLAG_EXT_IRQ_ENABLED,
282 ATH11K_FLAG_FIXED_MEM_RGN,
283 ATH11K_FLAG_DEVICE_INIT_DONE,
284 ATH11K_FLAG_MULTI_MSI_VECTORS,
285 ATH11K_FLAG_FTM_SEGMENTED,
286 };
287
288 enum ath11k_monitor_flags {
289 ATH11K_FLAG_MONITOR_CONF_ENABLED,
290 ATH11K_FLAG_MONITOR_STARTED,
291 ATH11K_FLAG_MONITOR_VDEV_CREATED,
292 };
293
294 #define ATH11K_IPV6_UC_TYPE 0
295 #define ATH11K_IPV6_AC_TYPE 1
296
297 #define ATH11K_IPV6_MAX_COUNT 16
298 #define ATH11K_IPV4_MAX_COUNT 2
299
300 struct ath11k_arp_ns_offload {
301 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4];
302 u32 ipv4_count;
303 u32 ipv6_count;
304 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
305 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
306 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT];
307 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT];
308 u8 mac_addr[ETH_ALEN];
309 };
310
311 struct ath11k_rekey_data {
312 u8 kck[NL80211_KCK_LEN];
313 u8 kek[NL80211_KCK_LEN];
314 u64 replay_ctr;
315 bool enable_offload;
316 };
317
318 /**
319 * struct ath11k_chan_power_info - TPE containing power info per channel chunk
320 * @chan_cfreq: channel center freq (MHz)
321 * e.g.
322 * channel 37/20 MHz, it is 6135
323 * channel 37/40 MHz, it is 6125
324 * channel 37/80 MHz, it is 6145
325 * channel 37/160 MHz, it is 6185
326 * @tx_power: transmit power (dBm)
327 */
328 struct ath11k_chan_power_info {
329 u16 chan_cfreq;
330 s8 tx_power;
331 };
332
333 /* ath11k only deals with 160 MHz, so 8 subchannels */
334 #define ATH11K_NUM_PWR_LEVELS 8
335
336 /**
337 * struct ath11k_reg_tpc_power_info - regulatory TPC power info
338 * @is_psd_power: is PSD power or not
339 * @eirp_power: Maximum EIRP power (dBm), valid only if power is PSD
340 * @ap_power_type: type of power (SP/LPI/VLP)
341 * @num_pwr_levels: number of power levels
342 * @reg_max: Array of maximum TX power (dBm) per PSD value
343 * @ap_constraint_power: AP constraint power (dBm)
344 * @tpe: TPE values processed from TPE IE
345 * @chan_power_info: power info to send to firmware
346 */
347 struct ath11k_reg_tpc_power_info {
348 bool is_psd_power;
349 u8 eirp_power;
350 enum wmi_reg_6ghz_ap_type ap_power_type;
351 u8 num_pwr_levels;
352 u8 reg_max[ATH11K_NUM_PWR_LEVELS];
353 u8 ap_constraint_power;
354 s8 tpe[ATH11K_NUM_PWR_LEVELS];
355 struct ath11k_chan_power_info chan_power_info[ATH11K_NUM_PWR_LEVELS];
356 };
357
358 struct ath11k_vif {
359 u32 vdev_id;
360 enum wmi_vdev_type vdev_type;
361 enum wmi_vdev_subtype vdev_subtype;
362 u32 beacon_interval;
363 u32 dtim_period;
364 u16 ast_hash;
365 u16 ast_idx;
366 u16 tcl_metadata;
367 u8 hal_addr_search_flags;
368 u8 search_type;
369
370 struct ath11k *ar;
371 struct ieee80211_vif *vif;
372
373 u16 tx_seq_no;
374 struct wmi_wmm_params_all_arg wmm_params;
375 struct list_head list;
376 union {
377 struct {
378 u32 uapsd;
379 } sta;
380 struct {
381 /* 127 stations; wmi limit */
382 u8 tim_bitmap[16];
383 u8 tim_len;
384 u32 ssid_len;
385 u8 ssid[IEEE80211_MAX_SSID_LEN];
386 bool hidden_ssid;
387 /* P2P_IE with NoA attribute for P2P_GO case */
388 u32 noa_len;
389 u8 *noa_data;
390 } ap;
391 } u;
392
393 bool is_started;
394 bool is_up;
395 bool ftm_responder;
396 bool spectral_enabled;
397 bool ps;
398 u32 aid;
399 u8 bssid[ETH_ALEN];
400 struct cfg80211_bitrate_mask bitrate_mask;
401 struct delayed_work connection_loss_work;
402 struct work_struct bcn_tx_work;
403 int num_legacy_stations;
404 int rtscts_prot_mode;
405 int txpower;
406 bool rsnie_present;
407 bool wpaie_present;
408 bool bcca_zero_sent;
409 bool do_not_send_tmpl;
410 struct ath11k_arp_ns_offload arp_ns_offload;
411 struct ath11k_rekey_data rekey_data;
412 u32 num_stations;
413 bool reinstall_group_keys;
414
415 struct ath11k_reg_tpc_power_info reg_tpc_info;
416
417 /* Must be last - ends in a flexible-array member.
418 *
419 * FIXME: Driver should not copy struct ieee80211_chanctx_conf,
420 * especially because it has a flexible array. Find a better way.
421 */
422 struct ieee80211_chanctx_conf chanctx;
423 };
424
425 struct ath11k_vif_iter {
426 u32 vdev_id;
427 struct ath11k_vif *arvif;
428 };
429
430 struct ath11k_rx_peer_stats {
431 u64 num_msdu;
432 u64 num_mpdu_fcs_ok;
433 u64 num_mpdu_fcs_err;
434 u64 tcp_msdu_count;
435 u64 udp_msdu_count;
436 u64 other_msdu_count;
437 u64 ampdu_msdu_count;
438 u64 non_ampdu_msdu_count;
439 u64 stbc_count;
440 u64 beamformed_count;
441 u64 mcs_count[HAL_RX_MAX_MCS + 1];
442 u64 nss_count[HAL_RX_MAX_NSS];
443 u64 bw_count[HAL_RX_BW_MAX];
444 u64 gi_count[HAL_RX_GI_MAX];
445 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
446 u64 tid_count[IEEE80211_NUM_TIDS + 1];
447 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
448 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
449 u64 rx_duration;
450 u64 dcm_count;
451 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
452 };
453
454 #define ATH11K_HE_MCS_NUM 12
455 #define ATH11K_VHT_MCS_NUM 10
456 #define ATH11K_BW_NUM 4
457 #define ATH11K_NSS_NUM 4
458 #define ATH11K_LEGACY_NUM 12
459 #define ATH11K_GI_NUM 4
460 #define ATH11K_HT_MCS_NUM 32
461
462 enum ath11k_pkt_rx_err {
463 ATH11K_PKT_RX_ERR_FCS,
464 ATH11K_PKT_RX_ERR_TKIP,
465 ATH11K_PKT_RX_ERR_CRYPT,
466 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
467 ATH11K_PKT_RX_ERR_MAX,
468 };
469
470 enum ath11k_ampdu_subfrm_num {
471 ATH11K_AMPDU_SUBFRM_NUM_10,
472 ATH11K_AMPDU_SUBFRM_NUM_20,
473 ATH11K_AMPDU_SUBFRM_NUM_30,
474 ATH11K_AMPDU_SUBFRM_NUM_40,
475 ATH11K_AMPDU_SUBFRM_NUM_50,
476 ATH11K_AMPDU_SUBFRM_NUM_60,
477 ATH11K_AMPDU_SUBFRM_NUM_MORE,
478 ATH11K_AMPDU_SUBFRM_NUM_MAX,
479 };
480
481 enum ath11k_amsdu_subfrm_num {
482 ATH11K_AMSDU_SUBFRM_NUM_1,
483 ATH11K_AMSDU_SUBFRM_NUM_2,
484 ATH11K_AMSDU_SUBFRM_NUM_3,
485 ATH11K_AMSDU_SUBFRM_NUM_4,
486 ATH11K_AMSDU_SUBFRM_NUM_MORE,
487 ATH11K_AMSDU_SUBFRM_NUM_MAX,
488 };
489
490 enum ath11k_counter_type {
491 ATH11K_COUNTER_TYPE_BYTES,
492 ATH11K_COUNTER_TYPE_PKTS,
493 ATH11K_COUNTER_TYPE_MAX,
494 };
495
496 enum ath11k_stats_type {
497 ATH11K_STATS_TYPE_SUCC,
498 ATH11K_STATS_TYPE_FAIL,
499 ATH11K_STATS_TYPE_RETRY,
500 ATH11K_STATS_TYPE_AMPDU,
501 ATH11K_STATS_TYPE_MAX,
502 };
503
504 struct ath11k_htt_data_stats {
505 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
506 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
507 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
508 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
509 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
510 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
511 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
512 };
513
514 struct ath11k_htt_tx_stats {
515 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
516 u64 tx_duration;
517 u64 ba_fails;
518 u64 ack_fails;
519 };
520
521 struct ath11k_per_ppdu_tx_stats {
522 u16 succ_pkts;
523 u16 failed_pkts;
524 u16 retry_pkts;
525 u32 succ_bytes;
526 u32 failed_bytes;
527 u32 retry_bytes;
528 };
529
530 DECLARE_EWMA(avg_rssi, 10, 8)
531
532 struct ath11k_sta {
533 struct ath11k_vif *arvif;
534
535 /* the following are protected by ar->data_lock */
536 u32 changed; /* IEEE80211_RC_* */
537 u32 bw;
538 u32 nss;
539 u32 smps;
540 enum hal_pn_type pn_type;
541
542 struct work_struct update_wk;
543 struct work_struct set_4addr_wk;
544 struct rate_info txrate;
545 u32 peer_nss;
546 struct rate_info last_txrate;
547 u64 rx_duration;
548 u64 tx_duration;
549 u8 rssi_comb;
550 struct ewma_avg_rssi avg_rssi;
551 s8 rssi_beacon;
552 s8 chain_signal[IEEE80211_MAX_CHAINS];
553 struct ath11k_htt_tx_stats *tx_stats;
554 struct ath11k_rx_peer_stats *rx_stats;
555
556 #ifdef CONFIG_MAC80211_DEBUGFS
557 /* protected by conf_mutex */
558 bool aggr_mode;
559 #endif
560
561 bool use_4addr_set;
562 u16 tcl_metadata;
563
564 /* Protected with ar->data_lock */
565 enum ath11k_wmi_peer_ps_state peer_ps_state;
566 u64 ps_start_time;
567 u64 ps_start_jiffies;
568 u64 ps_total_duration;
569 bool peer_current_ps_valid;
570
571 u32 bw_prev;
572 };
573
574 #define ATH11K_MIN_5G_FREQ 4150
575 #define ATH11K_MIN_6G_FREQ 5925
576 #define ATH11K_MAX_6G_FREQ 7115
577 #define ATH11K_NUM_CHANS 102
578 #define ATH11K_MAX_5G_CHAN 177
579
580 enum ath11k_state {
581 ATH11K_STATE_OFF,
582 ATH11K_STATE_ON,
583 ATH11K_STATE_RESTARTING,
584 ATH11K_STATE_RESTARTED,
585 ATH11K_STATE_WEDGED,
586 ATH11K_STATE_FTM,
587 /* Add other states as required */
588 };
589
590 /* Antenna noise floor */
591 #define ATH11K_DEFAULT_NOISE_FLOOR -95
592
593 #define ATH11K_INVALID_RSSI_FULL -1
594
595 #define ATH11K_INVALID_RSSI_EMPTY -128
596
597 struct ath11k_fw_stats {
598 struct dentry *debugfs_fwstats;
599 u32 pdev_id;
600 u32 stats_id;
601 struct list_head pdevs;
602 struct list_head vdevs;
603 struct list_head bcn;
604 u32 num_vdev_recvd;
605 u32 num_bcn_recvd;
606 };
607
608 struct ath11k_dbg_htt_stats {
609 u8 type;
610 u8 reset;
611 struct debug_htt_stats_req *stats_req;
612 /* protects shared stats req buffer */
613 spinlock_t lock;
614 };
615
616 #define MAX_MODULE_ID_BITMAP_WORDS 16
617
618 struct ath11k_debug {
619 struct dentry *debugfs_pdev;
620 struct ath11k_dbg_htt_stats htt_stats;
621 u32 extd_tx_stats;
622 u32 extd_rx_stats;
623 u32 pktlog_filter;
624 u32 pktlog_mode;
625 u32 pktlog_peer_valid;
626 u8 pktlog_peer_addr[ETH_ALEN];
627 u32 rx_filter;
628 u32 mem_offset;
629 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS];
630 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX];
631 };
632
633 struct ath11k_per_peer_tx_stats {
634 u32 succ_bytes;
635 u32 retry_bytes;
636 u32 failed_bytes;
637 u16 succ_pkts;
638 u16 retry_pkts;
639 u16 failed_pkts;
640 u32 duration;
641 u8 ba_fails;
642 bool is_ampdu;
643 };
644
645 #define ATH11K_FLUSH_TIMEOUT (5 * HZ)
646 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
647
648 struct ath11k {
649 struct ath11k_base *ab;
650 struct ath11k_pdev *pdev;
651 struct ieee80211_hw *hw;
652 struct ath11k_pdev_wmi *wmi;
653 struct ath11k_pdev_dp dp;
654 u8 mac_addr[ETH_ALEN];
655 struct ath11k_he ar_he;
656 enum ath11k_state state;
657 bool supports_6ghz;
658 struct {
659 struct completion started;
660 struct completion completed;
661 struct completion on_channel;
662 struct delayed_work timeout;
663 enum ath11k_scan_state state;
664 bool is_roc;
665 int vdev_id;
666 int roc_freq;
667 bool roc_notify;
668 } scan;
669
670 struct {
671 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
672 struct ieee80211_sband_iftype_data
673 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
674 } mac;
675
676 unsigned long dev_flags;
677 unsigned int filter_flags;
678 unsigned long monitor_flags;
679 u32 min_tx_power;
680 u32 max_tx_power;
681 u32 txpower_limit_2g;
682 u32 txpower_limit_5g;
683 u32 txpower_scale;
684 u32 power_scale;
685 u32 chan_tx_pwr;
686 u32 num_stations;
687 u32 max_num_stations;
688 /* To synchronize concurrent synchronous mac80211 callback operations,
689 * concurrent debugfs configuration and concurrent FW statistics events.
690 */
691 struct mutex conf_mutex;
692 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
693 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
694 * channel context data, survey info, test mode data, channel_update_queue.
695 */
696 spinlock_t data_lock;
697
698 struct list_head arvifs;
699 /* should never be NULL; needed for regular htt rx */
700 struct ieee80211_channel *rx_channel;
701
702 /* valid during scan; needed for mgmt rx during scan */
703 struct ieee80211_channel *scan_channel;
704
705 u8 cfg_tx_chainmask;
706 u8 cfg_rx_chainmask;
707 u8 num_rx_chains;
708 u8 num_tx_chains;
709 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
710 u8 pdev_idx;
711 u8 lmac_id;
712
713 struct completion peer_assoc_done;
714 struct completion peer_delete_done;
715
716 int install_key_status;
717 struct completion install_key_done;
718
719 int last_wmi_vdev_start_status;
720 struct completion vdev_setup_done;
721 struct completion vdev_delete_done;
722
723 int num_peers;
724 int max_num_peers;
725 u32 num_started_vdevs;
726 u32 num_created_vdevs;
727 unsigned long long allocated_vdev_map;
728
729 struct idr txmgmt_idr;
730 /* protects txmgmt_idr data */
731 spinlock_t txmgmt_idr_lock;
732 atomic_t num_pending_mgmt_tx;
733 wait_queue_head_t txmgmt_empty_waitq;
734
735 /* cycle count is reported twice for each visited channel during scan.
736 * access protected by data_lock
737 */
738 u32 survey_last_rx_clear_count;
739 u32 survey_last_cycle_count;
740
741 /* Channel info events are expected to come in pairs without and with
742 * COMPLETE flag set respectively for each channel visit during scan.
743 *
744 * However there are deviations from this rule. This flag is used to
745 * avoid reporting garbage data.
746 */
747 bool ch_info_can_report_survey;
748 struct survey_info survey[ATH11K_NUM_CHANS];
749 struct completion bss_survey_done;
750
751 struct work_struct regd_update_work;
752 struct work_struct channel_update_work;
753 /* protected with data_lock */
754 struct list_head channel_update_queue;
755
756 struct work_struct wmi_mgmt_tx_work;
757 struct sk_buff_head wmi_mgmt_tx_queue;
758
759 struct ath11k_wow wow;
760 struct completion target_suspend;
761 bool target_suspend_ack;
762 struct ath11k_per_peer_tx_stats peer_tx_stats;
763 struct list_head ppdu_stats_info;
764 u32 ppdu_stat_list_depth;
765
766 struct ath11k_per_peer_tx_stats cached_stats;
767 u32 last_ppdu_id;
768 u32 cached_ppdu_id;
769 int monitor_vdev_id;
770 struct completion fw_mode_reset;
771 u8 ftm_msgref;
772 #ifdef CONFIG_ATH11K_DEBUGFS
773 struct ath11k_debug debug;
774 #endif
775 #ifdef CONFIG_ATH11K_SPECTRAL
776 struct ath11k_spectral spectral;
777 #endif
778 bool dfs_block_radar_events;
779 struct ath11k_thermal thermal;
780 u32 vdev_id_11d_scan;
781 struct completion completed_11d_scan;
782 enum ath11k_11d_state state_11d;
783 bool regdom_set_by_user;
784 int hw_rate_code;
785 u8 twt_enabled;
786 bool nlo_enabled;
787 u8 alpha2[REG_ALPHA2_LEN + 1];
788 struct ath11k_fw_stats fw_stats;
789 struct completion fw_stats_complete;
790 struct completion fw_stats_done;
791
792 /* protected by conf_mutex */
793 bool ps_state_enable;
794 bool ps_timekeeper_enable;
795 s8 max_allowed_tx_power;
796 };
797
798 struct ath11k_band_cap {
799 u32 phy_id;
800 u32 max_bw_supported;
801 u32 ht_cap_info;
802 u32 he_cap_info[2];
803 u32 he_mcs;
804 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
805 struct ath11k_ppe_threshold he_ppet;
806 u16 he_6ghz_capa;
807 };
808
809 struct ath11k_pdev_cap {
810 u32 supported_bands;
811 u32 ampdu_density;
812 u32 vht_cap;
813 u32 vht_mcs;
814 u32 he_mcs;
815 u32 tx_chain_mask;
816 u32 rx_chain_mask;
817 u32 tx_chain_mask_shift;
818 u32 rx_chain_mask_shift;
819 struct ath11k_band_cap band[NUM_NL80211_BANDS];
820 bool nss_ratio_enabled;
821 u8 nss_ratio_info;
822 };
823
824 struct ath11k_pdev {
825 struct ath11k *ar;
826 u32 pdev_id;
827 struct ath11k_pdev_cap cap;
828 u8 mac_addr[ETH_ALEN];
829 };
830
831 struct ath11k_board_data {
832 const struct firmware *fw;
833 const void *data;
834 size_t len;
835 };
836
837 struct ath11k_pci_ops {
838 int (*wakeup)(struct ath11k_base *ab);
839 void (*release)(struct ath11k_base *ab);
840 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector);
841 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value);
842 u32 (*window_read32)(struct ath11k_base *ab, u32 offset);
843 };
844
845 /* IPQ8074 HW channel counters frequency value in hertz */
846 #define IPQ8074_CC_FREQ_HERTZ 320000
847
848 struct ath11k_bp_stats {
849 /* Head Pointer reported by the last HTT Backpressure event for the ring */
850 u16 hp;
851
852 /* Tail Pointer reported by the last HTT Backpressure event for the ring */
853 u16 tp;
854
855 /* Number of Backpressure events received for the ring */
856 u32 count;
857
858 /* Last recorded event timestamp */
859 unsigned long jiffies;
860 };
861
862 struct ath11k_dp_ring_bp_stats {
863 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
864 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
865 };
866
867 struct ath11k_soc_dp_tx_err_stats {
868 /* TCL Ring Descriptor unavailable */
869 u32 desc_na[DP_TCL_NUM_RING_MAX];
870 /* Other failures during dp_tx due to mem allocation failure
871 * idr unavailable etc.
872 */
873 atomic_t misc_fail;
874 };
875
876 struct ath11k_soc_dp_stats {
877 u32 err_ring_pkts;
878 u32 invalid_rbm;
879 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
880 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
881 u32 hal_reo_error[DP_REO_DST_RING_MAX];
882 struct ath11k_soc_dp_tx_err_stats tx_err;
883 struct ath11k_dp_ring_bp_stats bp_stats;
884 };
885
886 struct ath11k_msi_user {
887 char *name;
888 int num_vectors;
889 u32 base_vector;
890 };
891
892 struct ath11k_msi_config {
893 int total_vectors;
894 int total_users;
895 struct ath11k_msi_user *users;
896 u16 hw_rev;
897 };
898
899 enum ath11k_pm_policy {
900 ATH11K_PM_DEFAULT,
901 ATH11K_PM_WOW,
902 };
903
904 /* Master structure to hold the hw data which may be used in core module */
905 struct ath11k_base {
906 enum ath11k_hw_rev hw_rev;
907 enum ath11k_firmware_mode fw_mode;
908 struct platform_device *pdev;
909 struct device *dev;
910 struct ath11k_qmi qmi;
911 struct ath11k_wmi_base wmi_ab;
912 struct completion fw_ready;
913 int num_radios;
914 /* HW channel counters frequency value in hertz common to all MACs */
915 u32 cc_freq_hz;
916
917 struct ath11k_htc htc;
918
919 struct ath11k_dp dp;
920
921 void __iomem *mem;
922 void __iomem *mem_ce;
923 unsigned long mem_len;
924
925 struct {
926 enum ath11k_bus bus;
927 const struct ath11k_hif_ops *ops;
928 } hif;
929
930 struct {
931 struct completion wakeup_completed;
932 } wow;
933
934 struct ath11k_ce ce;
935 struct timer_list rx_replenish_retry;
936 struct ath11k_hal hal;
937 /* To synchronize core_start/core_stop */
938 struct mutex core_lock;
939 /* Protects data like peers */
940 spinlock_t base_lock;
941 struct ath11k_pdev pdevs[MAX_RADIOS];
942 struct {
943 enum WMI_HOST_WLAN_BAND supported_bands;
944 u32 pdev_id;
945 } target_pdev_ids[MAX_RADIOS];
946 u8 target_pdev_count;
947 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
948 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
949 unsigned long long free_vdev_map;
950
951 /* To synchronize rhash tbl write operation */
952 struct mutex tbl_mtx_lock;
953
954 /* The rhashtable containing struct ath11k_peer keyed by mac addr */
955 struct rhashtable *rhead_peer_addr;
956 struct rhashtable_params rhash_peer_addr_param;
957
958 /* The rhashtable containing struct ath11k_peer keyed by id */
959 struct rhashtable *rhead_peer_id;
960 struct rhashtable_params rhash_peer_id_param;
961
962 struct list_head peers;
963 wait_queue_head_t peer_mapping_wq;
964 u8 mac_addr[ETH_ALEN];
965 int irq_num[ATH11K_IRQ_NUM_MAX];
966 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
967 struct ath11k_targ_cap target_caps;
968 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
969 bool pdevs_macaddr_valid;
970
971 struct ath11k_hw_params hw_params;
972
973 const struct firmware *cal_file;
974
975 /* Below regd's are protected by ab->data_lock */
976 /* This is the regd set for every radio
977 * by the firmware during initialization
978 */
979 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
980 /* This regd is set during dynamic country setting
981 * This may or may not be used during the runtime
982 */
983 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
984 struct cur_regulatory_info *reg_info_store;
985
986 /* Current DFS Regulatory */
987 enum ath11k_dfs_region dfs_region;
988 #ifdef CONFIG_ATH11K_DEBUGFS
989 struct dentry *debugfs_soc;
990 #endif
991 struct ath11k_soc_dp_stats soc_stats;
992
993 unsigned long dev_flags;
994 struct completion driver_recovery;
995 struct workqueue_struct *workqueue;
996 struct work_struct restart_work;
997 struct work_struct update_11d_work;
998 u8 new_alpha2[3];
999 struct workqueue_struct *workqueue_aux;
1000 struct work_struct reset_work;
1001 atomic_t reset_count;
1002 atomic_t recovery_count;
1003 atomic_t recovery_start_count;
1004 bool is_reset;
1005 struct completion reset_complete;
1006 struct completion reconfigure_complete;
1007 struct completion recovery_start;
1008 /* continuous recovery fail count */
1009 atomic_t fail_cont_count;
1010 unsigned long reset_fail_timeout;
1011 struct {
1012 /* protected by data_lock */
1013 u32 fw_crash_counter;
1014 } stats;
1015 u32 pktlog_defs_checksum;
1016
1017 struct ath11k_dbring_cap *db_caps;
1018 u32 num_db_cap;
1019
1020 /* To synchronize 11d scan vdev id */
1021 struct mutex vdev_id_11d_lock;
1022 struct timer_list mon_reap_timer;
1023
1024 struct completion htc_suspend;
1025
1026 struct {
1027 enum ath11k_bdf_search bdf_search;
1028 u32 vendor;
1029 u32 device;
1030 u32 subsystem_vendor;
1031 u32 subsystem_device;
1032 } id;
1033
1034 struct {
1035 struct {
1036 const struct ath11k_msi_config *config;
1037 u32 ep_base_data;
1038 u32 irqs[32];
1039 u32 addr_lo;
1040 u32 addr_hi;
1041 } msi;
1042
1043 const struct ath11k_pci_ops *ops;
1044 } pci;
1045
1046 struct {
1047 u32 api_version;
1048
1049 const struct firmware *fw;
1050 const u8 *amss_data;
1051 size_t amss_len;
1052 const u8 *m3_data;
1053 size_t m3_len;
1054
1055 DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT);
1056 } fw;
1057
1058 #ifdef CONFIG_NL80211_TESTMODE
1059 struct {
1060 u32 data_pos;
1061 u32 expected_seq;
1062 u8 *eventdata;
1063 } testmode;
1064 #endif
1065
1066 enum ath11k_pm_policy pm_policy;
1067
1068 /* must be last */
1069 u8 drv_priv[] __aligned(sizeof(void *));
1070 };
1071
1072 struct ath11k_fw_stats_pdev {
1073 struct list_head list;
1074
1075 /* PDEV stats */
1076 s32 ch_noise_floor;
1077 /* Cycles spent transmitting frames */
1078 u32 tx_frame_count;
1079 /* Cycles spent receiving frames */
1080 u32 rx_frame_count;
1081 /* Total channel busy time, evidently */
1082 u32 rx_clear_count;
1083 /* Total on-channel time */
1084 u32 cycle_count;
1085 u32 phy_err_count;
1086 u32 chan_tx_power;
1087 u32 ack_rx_bad;
1088 u32 rts_bad;
1089 u32 rts_good;
1090 u32 fcs_bad;
1091 u32 no_beacons;
1092 u32 mib_int_count;
1093
1094 /* PDEV TX stats */
1095 /* Num HTT cookies queued to dispatch list */
1096 s32 comp_queued;
1097 /* Num HTT cookies dispatched */
1098 s32 comp_delivered;
1099 /* Num MSDU queued to WAL */
1100 s32 msdu_enqued;
1101 /* Num MPDU queue to WAL */
1102 s32 mpdu_enqued;
1103 /* Num MSDUs dropped by WMM limit */
1104 s32 wmm_drop;
1105 /* Num Local frames queued */
1106 s32 local_enqued;
1107 /* Num Local frames done */
1108 s32 local_freed;
1109 /* Num queued to HW */
1110 s32 hw_queued;
1111 /* Num PPDU reaped from HW */
1112 s32 hw_reaped;
1113 /* Num underruns */
1114 s32 underrun;
1115 /* Num hw paused */
1116 u32 hw_paused;
1117 /* Num PPDUs cleaned up in TX abort */
1118 s32 tx_abort;
1119 /* Num MPDUs requeued by SW */
1120 s32 mpdus_requeued;
1121 /* excessive retries */
1122 u32 tx_ko;
1123 u32 tx_xretry;
1124 /* data hw rate code */
1125 u32 data_rc;
1126 /* Scheduler self triggers */
1127 u32 self_triggers;
1128 /* frames dropped due to excessive sw retries */
1129 u32 sw_retry_failure;
1130 /* illegal rate phy errors */
1131 u32 illgl_rate_phy_err;
1132 /* wal pdev continuous xretry */
1133 u32 pdev_cont_xretry;
1134 /* wal pdev tx timeouts */
1135 u32 pdev_tx_timeout;
1136 /* wal pdev resets */
1137 u32 pdev_resets;
1138 /* frames dropped due to non-availability of stateless TIDs */
1139 u32 stateless_tid_alloc_failure;
1140 /* PhY/BB underrun */
1141 u32 phy_underrun;
1142 /* MPDU is more than txop limit */
1143 u32 txop_ovf;
1144 /* Num sequences posted */
1145 u32 seq_posted;
1146 /* Num sequences failed in queueing */
1147 u32 seq_failed_queueing;
1148 /* Num sequences completed */
1149 u32 seq_completed;
1150 /* Num sequences restarted */
1151 u32 seq_restarted;
1152 /* Num of MU sequences posted */
1153 u32 mu_seq_posted;
1154 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
1155 * (Reset,channel change)
1156 */
1157 s32 mpdus_sw_flush;
1158 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
1159 s32 mpdus_hw_filter;
1160 /* Num MPDUs truncated by PDG (TXOP, TBTT,
1161 * PPDU_duration based on rate, dyn_bw)
1162 */
1163 s32 mpdus_truncated;
1164 /* Num MPDUs that was tried but didn't receive ACK or BA */
1165 s32 mpdus_ack_failed;
1166 /* Num MPDUs that was dropped du to expiry. */
1167 s32 mpdus_expired;
1168
1169 /* PDEV RX stats */
1170 /* Cnts any change in ring routing mid-ppdu */
1171 s32 mid_ppdu_route_change;
1172 /* Total number of statuses processed */
1173 s32 status_rcvd;
1174 /* Extra frags on rings 0-3 */
1175 s32 r0_frags;
1176 s32 r1_frags;
1177 s32 r2_frags;
1178 s32 r3_frags;
1179 /* MSDUs / MPDUs delivered to HTT */
1180 s32 htt_msdus;
1181 s32 htt_mpdus;
1182 /* MSDUs / MPDUs delivered to local stack */
1183 s32 loc_msdus;
1184 s32 loc_mpdus;
1185 /* AMSDUs that have more MSDUs than the status ring size */
1186 s32 oversize_amsdu;
1187 /* Number of PHY errors */
1188 s32 phy_errs;
1189 /* Number of PHY errors drops */
1190 s32 phy_err_drop;
1191 /* Number of mpdu errors - FCS, MIC, ENC etc. */
1192 s32 mpdu_errs;
1193 /* Num overflow errors */
1194 s32 rx_ovfl_errs;
1195 };
1196
1197 struct ath11k_fw_stats_vdev {
1198 struct list_head list;
1199
1200 u32 vdev_id;
1201 u32 beacon_snr;
1202 u32 data_snr;
1203 u32 num_tx_frames[WLAN_MAX_AC];
1204 u32 num_rx_frames;
1205 u32 num_tx_frames_retries[WLAN_MAX_AC];
1206 u32 num_tx_frames_failures[WLAN_MAX_AC];
1207 u32 num_rts_fail;
1208 u32 num_rts_success;
1209 u32 num_rx_err;
1210 u32 num_rx_discard;
1211 u32 num_tx_not_acked;
1212 u32 tx_rate_history[MAX_TX_RATE_VALUES];
1213 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1214 };
1215
1216 struct ath11k_fw_stats_bcn {
1217 struct list_head list;
1218
1219 u32 vdev_id;
1220 u32 tx_bcn_succ_cnt;
1221 u32 tx_bcn_outage_cnt;
1222 };
1223
1224 void ath11k_fw_stats_init(struct ath11k *ar);
1225 void ath11k_fw_stats_pdevs_free(struct list_head *head);
1226 void ath11k_fw_stats_vdevs_free(struct list_head *head);
1227 void ath11k_fw_stats_bcn_free(struct list_head *head);
1228 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats);
1229
1230 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
1231 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
1232 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
1233
1234 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
1235 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
1236
1237 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[];
1238 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[];
1239
1240 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
1241 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
1242 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
1243 int ath11k_core_pre_init(struct ath11k_base *ab);
1244 int ath11k_core_init(struct ath11k_base *ath11k);
1245 void ath11k_core_deinit(struct ath11k_base *ath11k);
1246 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
1247 enum ath11k_bus bus);
1248 void ath11k_core_free(struct ath11k_base *ath11k);
1249 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
1250 struct ath11k_board_data *bd);
1251 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd);
1252 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
1253 struct ath11k_board_data *bd,
1254 const char *name);
1255 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
1256 int ath11k_core_check_dt(struct ath11k_base *ath11k);
1257 int ath11k_core_check_smbios(struct ath11k_base *ab);
1258 void ath11k_core_halt(struct ath11k *ar);
1259 int ath11k_core_resume(struct ath11k_base *ab);
1260 int ath11k_core_suspend(struct ath11k_base *ab);
1261 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab);
1262 bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab);
1263
1264 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
1265 const char *filename);
1266
ath11k_scan_state_str(enum ath11k_scan_state state)1267 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
1268 {
1269 switch (state) {
1270 case ATH11K_SCAN_IDLE:
1271 return "idle";
1272 case ATH11K_SCAN_STARTING:
1273 return "starting";
1274 case ATH11K_SCAN_RUNNING:
1275 return "running";
1276 case ATH11K_SCAN_ABORTING:
1277 return "aborting";
1278 }
1279
1280 return "unknown";
1281 }
1282
ATH11K_SKB_CB(struct sk_buff * skb)1283 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
1284 {
1285 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
1286 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1287 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1288 }
1289
ATH11K_SKB_RXCB(struct sk_buff * skb)1290 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
1291 {
1292 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
1293 return (struct ath11k_skb_rxcb *)skb->cb;
1294 }
1295
ath11k_vif_to_arvif(struct ieee80211_vif * vif)1296 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
1297 {
1298 return (struct ath11k_vif *)vif->drv_priv;
1299 }
1300
ath11k_sta_to_arsta(struct ieee80211_sta * sta)1301 static inline struct ath11k_sta *ath11k_sta_to_arsta(struct ieee80211_sta *sta)
1302 {
1303 return (struct ath11k_sta *)sta->drv_priv;
1304 }
1305
ath11k_ab_to_ar(struct ath11k_base * ab,int mac_id)1306 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
1307 int mac_id)
1308 {
1309 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
1310 }
1311
ath11k_core_create_firmware_path(struct ath11k_base * ab,const char * filename,void * buf,size_t buf_len)1312 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
1313 const char *filename,
1314 void *buf, size_t buf_len)
1315 {
1316 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
1317 ab->hw_params.fw.dir, filename);
1318 }
1319
ath11k_bus_str(enum ath11k_bus bus)1320 static inline const char *ath11k_bus_str(enum ath11k_bus bus)
1321 {
1322 switch (bus) {
1323 case ATH11K_BUS_PCI:
1324 return "pci";
1325 case ATH11K_BUS_AHB:
1326 return "ahb";
1327 }
1328
1329 return "unknown";
1330 }
1331
1332 #endif /* _CORE_H_ */
1333