1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #include <linux/fs.h>
5 #include "mt7915.h"
6 #include "mcu.h"
7 #include "mac.h"
8 #include "eeprom.h"
9
10 #define fw_name(_dev, name, ...) ({ \
11 char *_fw; \
12 switch (mt76_chip(&(_dev)->mt76)) { \
13 case 0x7915: \
14 _fw = MT7915_##name; \
15 break; \
16 case 0x7981: \
17 _fw = MT7981_##name; \
18 break; \
19 case 0x7986: \
20 _fw = MT7986_##name##__VA_ARGS__; \
21 break; \
22 default: \
23 _fw = MT7916_##name; \
24 break; \
25 } \
26 _fw; \
27 })
28
29 #define fw_name_var(_dev, name) (mt7915_check_adie(dev, false) ? \
30 fw_name(_dev, name) : \
31 fw_name(_dev, name, _MT7975))
32
33 #define MCU_PATCH_ADDRESS 0x200000
34
35 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p)
36 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m)
37
38 static bool sr_scene_detect = true;
39 module_param(sr_scene_detect, bool, 0644);
40 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm");
41
42 static u8
mt7915_mcu_get_sta_nss(u16 mcs_map)43 mt7915_mcu_get_sta_nss(u16 mcs_map)
44 {
45 u8 nss;
46
47 for (nss = 8; nss > 0; nss--) {
48 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3;
49
50 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED)
51 break;
52 }
53
54 return nss - 1;
55 }
56
57 static void
mt7915_mcu_set_sta_he_mcs(struct ieee80211_sta * sta,__le16 * he_mcs,u16 mcs_map)58 mt7915_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs,
59 u16 mcs_map)
60 {
61 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
62 struct mt7915_dev *dev = msta->vif->phy->dev;
63 enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band;
64 const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs;
65 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
66
67 for (nss = 0; nss < max_nss; nss++) {
68 int mcs;
69
70 switch ((mcs_map >> (2 * nss)) & 0x3) {
71 case IEEE80211_HE_MCS_SUPPORT_0_11:
72 mcs = GENMASK(11, 0);
73 break;
74 case IEEE80211_HE_MCS_SUPPORT_0_9:
75 mcs = GENMASK(9, 0);
76 break;
77 case IEEE80211_HE_MCS_SUPPORT_0_7:
78 mcs = GENMASK(7, 0);
79 break;
80 default:
81 mcs = 0;
82 }
83
84 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1;
85
86 switch (mcs) {
87 case 0 ... 7:
88 mcs = IEEE80211_HE_MCS_SUPPORT_0_7;
89 break;
90 case 8 ... 9:
91 mcs = IEEE80211_HE_MCS_SUPPORT_0_9;
92 break;
93 case 10 ... 11:
94 mcs = IEEE80211_HE_MCS_SUPPORT_0_11;
95 break;
96 default:
97 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED;
98 break;
99 }
100 mcs_map &= ~(0x3 << (nss * 2));
101 mcs_map |= mcs << (nss * 2);
102
103 /* only support 2ss on 160MHz for mt7915 */
104 if (is_mt7915(&dev->mt76) && nss > 1 &&
105 sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
106 break;
107 }
108
109 *he_mcs = cpu_to_le16(mcs_map);
110 }
111
112 static void
mt7915_mcu_set_sta_vht_mcs(struct ieee80211_sta * sta,__le16 * vht_mcs,const u16 * mask)113 mt7915_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs,
114 const u16 *mask)
115 {
116 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
117 struct mt7915_dev *dev = msta->vif->phy->dev;
118 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
119 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
120 u16 mcs;
121
122 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) {
123 switch (mcs_map & 0x3) {
124 case IEEE80211_VHT_MCS_SUPPORT_0_9:
125 mcs = GENMASK(9, 0);
126 break;
127 case IEEE80211_VHT_MCS_SUPPORT_0_8:
128 mcs = GENMASK(8, 0);
129 break;
130 case IEEE80211_VHT_MCS_SUPPORT_0_7:
131 mcs = GENMASK(7, 0);
132 break;
133 default:
134 mcs = 0;
135 }
136
137 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]);
138
139 /* only support 2ss on 160MHz for mt7915 */
140 if (is_mt7915(&dev->mt76) && nss > 1 &&
141 sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
142 break;
143 }
144 }
145
146 static void
mt7915_mcu_set_sta_ht_mcs(struct ieee80211_sta * sta,u8 * ht_mcs,const u8 * mask)147 mt7915_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs,
148 const u8 *mask)
149 {
150 int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;
151
152 for (nss = 0; nss < max_nss; nss++)
153 ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss];
154 }
155
156 static int
mt7915_mcu_parse_response(struct mt76_dev * mdev,int cmd,struct sk_buff * skb,int seq)157 mt7915_mcu_parse_response(struct mt76_dev *mdev, int cmd,
158 struct sk_buff *skb, int seq)
159 {
160 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76);
161 struct mt76_connac2_mcu_rxd *rxd;
162 int ret = 0;
163
164 if (!skb) {
165 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n",
166 cmd, seq);
167
168 if (!test_and_set_bit(MT76_MCU_RESET, &dev->mphy.state)) {
169 dev->recovery.restart = true;
170 wake_up(&dev->mt76.mcu.wait);
171 queue_work(dev->mt76.wq, &dev->reset_work);
172 wake_up(&dev->reset_wait);
173 }
174
175 return -ETIMEDOUT;
176 }
177
178 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
179 if (seq != rxd->seq &&
180 !(rxd->eid == MCU_CMD_EXT_CID &&
181 rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT))
182 return -EAGAIN;
183
184 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) {
185 skb_pull(skb, sizeof(*rxd) - 4);
186 ret = *skb->data;
187 } else if (cmd == MCU_EXT_CMD(THERMAL_CTRL)) {
188 skb_pull(skb, sizeof(*rxd) + 4);
189 ret = le32_to_cpu(*(__le32 *)skb->data);
190 } else {
191 skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd));
192 }
193
194 return ret;
195 }
196
197 static int
mt7915_mcu_send_message(struct mt76_dev * mdev,struct sk_buff * skb,int cmd,int * wait_seq)198 mt7915_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
199 int cmd, int *wait_seq)
200 {
201 struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76);
202 enum mt76_mcuq_id qid;
203
204 if (cmd == MCU_CMD(FW_SCATTER))
205 qid = MT_MCUQ_FWDL;
206 else if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state))
207 qid = MT_MCUQ_WA;
208 else
209 qid = MT_MCUQ_WM;
210
211 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0);
212 }
213
mt7915_mcu_wa_cmd(struct mt7915_dev * dev,int cmd,u32 a1,u32 a2,u32 a3)214 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3)
215 {
216 struct {
217 __le32 args[3];
218 } req = {
219 .args = {
220 cpu_to_le32(a1),
221 cpu_to_le32(a2),
222 cpu_to_le32(a3),
223 },
224 };
225
226 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false);
227 }
228
229 static void
mt7915_mcu_csa_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)230 mt7915_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
231 {
232 if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION)
233 return;
234
235 ieee80211_csa_finish(vif, 0);
236 }
237
238 static void
mt7915_mcu_rx_csa_notify(struct mt7915_dev * dev,struct sk_buff * skb)239 mt7915_mcu_rx_csa_notify(struct mt7915_dev *dev, struct sk_buff *skb)
240 {
241 struct mt76_phy *mphy = &dev->mt76.phy;
242 struct mt7915_mcu_csa_notify *c;
243
244 c = (struct mt7915_mcu_csa_notify *)skb->data;
245
246 if (c->band_idx > MT_BAND1)
247 return;
248
249 if ((c->band_idx && !dev->phy.mt76->band_idx) &&
250 dev->mt76.phys[MT_BAND1])
251 mphy = dev->mt76.phys[MT_BAND1];
252
253 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
254 IEEE80211_IFACE_ITER_RESUME_ALL,
255 mt7915_mcu_csa_finish, mphy->hw);
256 }
257
258 static void
mt7915_mcu_rx_thermal_notify(struct mt7915_dev * dev,struct sk_buff * skb)259 mt7915_mcu_rx_thermal_notify(struct mt7915_dev *dev, struct sk_buff *skb)
260 {
261 struct mt76_phy *mphy = &dev->mt76.phy;
262 struct mt7915_mcu_thermal_notify *t;
263 struct mt7915_phy *phy;
264
265 t = (struct mt7915_mcu_thermal_notify *)skb->data;
266 if (t->ctrl.ctrl_id != THERMAL_PROTECT_ENABLE)
267 return;
268
269 if (t->ctrl.band_idx > MT_BAND1)
270 return;
271
272 if ((t->ctrl.band_idx && !dev->phy.mt76->band_idx) &&
273 dev->mt76.phys[MT_BAND1])
274 mphy = dev->mt76.phys[MT_BAND1];
275
276 phy = mphy->priv;
277 phy->throttle_state = t->ctrl.duty.duty_cycle;
278 }
279
280 static void
mt7915_mcu_rx_radar_detected(struct mt7915_dev * dev,struct sk_buff * skb)281 mt7915_mcu_rx_radar_detected(struct mt7915_dev *dev, struct sk_buff *skb)
282 {
283 struct mt76_phy *mphy = &dev->mt76.phy;
284 struct mt7915_mcu_rdd_report *r;
285
286 r = (struct mt7915_mcu_rdd_report *)skb->data;
287
288 if (r->band_idx > MT_RX_SEL2)
289 return;
290
291 if ((r->band_idx && !dev->phy.mt76->band_idx) &&
292 dev->mt76.phys[MT_BAND1])
293 mphy = dev->mt76.phys[MT_BAND1];
294
295 if (r->band_idx == MT_RX_SEL2)
296 cfg80211_background_radar_event(mphy->hw->wiphy,
297 &dev->rdd2_chandef,
298 GFP_ATOMIC);
299 else
300 ieee80211_radar_detected(mphy->hw, NULL);
301 dev->hw_pattern++;
302 }
303
304 static void
mt7915_mcu_rx_log_message(struct mt7915_dev * dev,struct sk_buff * skb)305 mt7915_mcu_rx_log_message(struct mt7915_dev *dev, struct sk_buff *skb)
306 {
307 struct mt76_connac2_mcu_rxd *rxd;
308 int len = skb->len - sizeof(*rxd);
309 const char *data, *type;
310
311 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
312 data = (char *)&rxd[1];
313
314 switch (rxd->s2d_index) {
315 case 0:
316 if (mt7915_debugfs_rx_log(dev, data, len))
317 return;
318
319 type = "WM";
320 break;
321 case 2:
322 type = "WA";
323 break;
324 default:
325 type = "unknown";
326 break;
327 }
328
329 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data);
330 }
331
332 static void
mt7915_mcu_cca_finish(void * priv,u8 * mac,struct ieee80211_vif * vif)333 mt7915_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)
334 {
335 if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION)
336 return;
337
338 ieee80211_color_change_finish(vif, 0);
339 }
340
341 static void
mt7915_mcu_rx_bcc_notify(struct mt7915_dev * dev,struct sk_buff * skb)342 mt7915_mcu_rx_bcc_notify(struct mt7915_dev *dev, struct sk_buff *skb)
343 {
344 struct mt76_phy *mphy = &dev->mt76.phy;
345 struct mt7915_mcu_bcc_notify *b;
346
347 b = (struct mt7915_mcu_bcc_notify *)skb->data;
348
349 if (b->band_idx > MT_BAND1)
350 return;
351
352 if ((b->band_idx && !dev->phy.mt76->band_idx) &&
353 dev->mt76.phys[MT_BAND1])
354 mphy = dev->mt76.phys[MT_BAND1];
355
356 ieee80211_iterate_active_interfaces_atomic(mphy->hw,
357 IEEE80211_IFACE_ITER_RESUME_ALL,
358 mt7915_mcu_cca_finish, mphy->hw);
359 }
360
361 static void
mt7915_mcu_rx_ext_event(struct mt7915_dev * dev,struct sk_buff * skb)362 mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb)
363 {
364 struct mt76_connac2_mcu_rxd *rxd;
365
366 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
367 switch (rxd->ext_eid) {
368 case MCU_EXT_EVENT_THERMAL_PROTECT:
369 mt7915_mcu_rx_thermal_notify(dev, skb);
370 break;
371 case MCU_EXT_EVENT_RDD_REPORT:
372 mt7915_mcu_rx_radar_detected(dev, skb);
373 break;
374 case MCU_EXT_EVENT_CSA_NOTIFY:
375 mt7915_mcu_rx_csa_notify(dev, skb);
376 break;
377 case MCU_EXT_EVENT_FW_LOG_2_HOST:
378 mt7915_mcu_rx_log_message(dev, skb);
379 break;
380 case MCU_EXT_EVENT_BCC_NOTIFY:
381 mt7915_mcu_rx_bcc_notify(dev, skb);
382 break;
383 default:
384 break;
385 }
386 }
387
388 static void
mt7915_mcu_rx_unsolicited_event(struct mt7915_dev * dev,struct sk_buff * skb)389 mt7915_mcu_rx_unsolicited_event(struct mt7915_dev *dev, struct sk_buff *skb)
390 {
391 struct mt76_connac2_mcu_rxd *rxd;
392
393 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
394 switch (rxd->eid) {
395 case MCU_EVENT_EXT:
396 mt7915_mcu_rx_ext_event(dev, skb);
397 break;
398 default:
399 break;
400 }
401 dev_kfree_skb(skb);
402 }
403
mt7915_mcu_rx_event(struct mt7915_dev * dev,struct sk_buff * skb)404 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb)
405 {
406 struct mt76_connac2_mcu_rxd *rxd;
407
408 rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
409 if ((rxd->ext_eid == MCU_EXT_EVENT_THERMAL_PROTECT ||
410 rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST ||
411 rxd->ext_eid == MCU_EXT_EVENT_ASSERT_DUMP ||
412 rxd->ext_eid == MCU_EXT_EVENT_PS_SYNC ||
413 rxd->ext_eid == MCU_EXT_EVENT_BCC_NOTIFY ||
414 !rxd->seq) &&
415 !(rxd->eid == MCU_CMD_EXT_CID &&
416 rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT))
417 mt7915_mcu_rx_unsolicited_event(dev, skb);
418 else
419 mt76_mcu_rx_event(&dev->mt76, skb);
420 }
421
422 static struct tlv *
mt7915_mcu_add_nested_subtlv(struct sk_buff * skb,int sub_tag,int sub_len,__le16 * sub_ntlv,__le16 * len)423 mt7915_mcu_add_nested_subtlv(struct sk_buff *skb, int sub_tag, int sub_len,
424 __le16 *sub_ntlv, __le16 *len)
425 {
426 struct tlv *ptlv, tlv = {
427 .tag = cpu_to_le16(sub_tag),
428 .len = cpu_to_le16(sub_len),
429 };
430
431 ptlv = skb_put_zero(skb, sub_len);
432 memcpy(ptlv, &tlv, sizeof(tlv));
433
434 le16_add_cpu(sub_ntlv, 1);
435 le16_add_cpu(len, sub_len);
436
437 return ptlv;
438 }
439
440 /** bss info **/
441 struct mt7915_he_obss_narrow_bw_ru_data {
442 bool tolerated;
443 };
444
mt7915_check_he_obss_narrow_bw_ru_iter(struct wiphy * wiphy,struct cfg80211_bss * bss,void * _data)445 static void mt7915_check_he_obss_narrow_bw_ru_iter(struct wiphy *wiphy,
446 struct cfg80211_bss *bss,
447 void *_data)
448 {
449 struct mt7915_he_obss_narrow_bw_ru_data *data = _data;
450 const struct element *elem;
451
452 rcu_read_lock();
453 elem = ieee80211_bss_get_elem(bss, WLAN_EID_EXT_CAPABILITY);
454
455 if (!elem || elem->datalen <= 10 ||
456 !(elem->data[10] &
457 WLAN_EXT_CAPA10_OBSS_NARROW_BW_RU_TOLERANCE_SUPPORT))
458 data->tolerated = false;
459
460 rcu_read_unlock();
461 }
462
mt7915_check_he_obss_narrow_bw_ru(struct ieee80211_hw * hw,struct ieee80211_vif * vif)463 static bool mt7915_check_he_obss_narrow_bw_ru(struct ieee80211_hw *hw,
464 struct ieee80211_vif *vif)
465 {
466 struct mt7915_he_obss_narrow_bw_ru_data iter_data = {
467 .tolerated = true,
468 };
469
470 if (!(vif->bss_conf.chanreq.oper.chan->flags & IEEE80211_CHAN_RADAR))
471 return false;
472
473 cfg80211_bss_iter(hw->wiphy, &vif->bss_conf.chanreq.oper,
474 mt7915_check_he_obss_narrow_bw_ru_iter,
475 &iter_data);
476
477 /*
478 * If there is at least one AP on radar channel that cannot
479 * tolerate 26-tone RU UL OFDMA transmissions using HE TB PPDU.
480 */
481 return !iter_data.tolerated;
482 }
483
484 static void
mt7915_mcu_bss_rfch_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7915_phy * phy)485 mt7915_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
486 struct mt7915_phy *phy)
487 {
488 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
489 struct bss_info_rf_ch *ch;
490 struct tlv *tlv;
491 int freq1 = chandef->center_freq1;
492
493 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RF_CH, sizeof(*ch));
494
495 ch = (struct bss_info_rf_ch *)tlv;
496 ch->pri_ch = chandef->chan->hw_value;
497 ch->center_ch0 = ieee80211_frequency_to_channel(freq1);
498 ch->bw = mt76_connac_chan_bw(chandef);
499
500 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
501 int freq2 = chandef->center_freq2;
502
503 ch->center_ch1 = ieee80211_frequency_to_channel(freq2);
504 }
505
506 if (vif->bss_conf.he_support && vif->type == NL80211_IFTYPE_STATION) {
507 struct mt76_phy *mphy = phy->mt76;
508
509 ch->he_ru26_block =
510 mt7915_check_he_obss_narrow_bw_ru(mphy->hw, vif);
511 ch->he_all_disable = false;
512 } else {
513 ch->he_all_disable = true;
514 }
515 }
516
517 static void
mt7915_mcu_bss_ra_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7915_phy * phy)518 mt7915_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
519 struct mt7915_phy *phy)
520 {
521 int max_nss = hweight8(phy->mt76->antenna_mask);
522 struct bss_info_ra *ra;
523 struct tlv *tlv;
524
525 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RA, sizeof(*ra));
526
527 ra = (struct bss_info_ra *)tlv;
528 ra->op_mode = vif->type == NL80211_IFTYPE_AP;
529 ra->adhoc_en = vif->type == NL80211_IFTYPE_ADHOC;
530 ra->short_preamble = true;
531 ra->tx_streams = max_nss;
532 ra->rx_streams = max_nss;
533 ra->algo = 4;
534 ra->train_up_rule = 2;
535 ra->train_up_high_thres = 110;
536 ra->train_up_rule_rssi = -70;
537 ra->low_traffic_thres = 2;
538 ra->phy_cap = cpu_to_le32(0xfdf);
539 ra->interval = cpu_to_le32(500);
540 ra->fast_interval = cpu_to_le32(100);
541 }
542
543 static void
mt7915_mcu_bss_he_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt7915_phy * phy)544 mt7915_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,
545 struct mt7915_phy *phy)
546 {
547 #define DEFAULT_HE_PE_DURATION 4
548 #define DEFAULT_HE_DURATION_RTS_THRES 1023
549 const struct ieee80211_sta_he_cap *cap;
550 struct bss_info_he *he;
551 struct tlv *tlv;
552
553 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif);
554
555 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HE_BASIC, sizeof(*he));
556
557 he = (struct bss_info_he *)tlv;
558 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext;
559 if (!he->he_pe_duration)
560 he->he_pe_duration = DEFAULT_HE_PE_DURATION;
561
562 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th);
563 if (!he->he_rts_thres)
564 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);
565
566 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80;
567 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160;
568 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80;
569 }
570
571 static void
mt7915_mcu_bss_hw_amsdu_tlv(struct sk_buff * skb)572 mt7915_mcu_bss_hw_amsdu_tlv(struct sk_buff *skb)
573 {
574 #define TXD_CMP_MAP1 GENMASK(15, 0)
575 #define TXD_CMP_MAP2 (GENMASK(31, 0) & ~BIT(23))
576 struct bss_info_hw_amsdu *amsdu;
577 struct tlv *tlv;
578
579 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HW_AMSDU, sizeof(*amsdu));
580
581 amsdu = (struct bss_info_hw_amsdu *)tlv;
582 amsdu->cmp_bitmap_0 = cpu_to_le32(TXD_CMP_MAP1);
583 amsdu->cmp_bitmap_1 = cpu_to_le32(TXD_CMP_MAP2);
584 amsdu->trig_thres = cpu_to_le16(2);
585 amsdu->enable = true;
586 }
587
588 static void
mt7915_mcu_bss_bmc_tlv(struct sk_buff * skb,struct mt7915_phy * phy)589 mt7915_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt7915_phy *phy)
590 {
591 struct bss_info_bmc_rate *bmc;
592 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
593 enum nl80211_band band = chandef->chan->band;
594 struct tlv *tlv;
595
596 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BMC_RATE, sizeof(*bmc));
597
598 bmc = (struct bss_info_bmc_rate *)tlv;
599 if (band == NL80211_BAND_2GHZ) {
600 bmc->short_preamble = true;
601 } else {
602 bmc->bc_trans = cpu_to_le16(0x2000);
603 bmc->mc_trans = cpu_to_le16(0x2080);
604 }
605 }
606
607 static int
mt7915_mcu_muar_config(struct mt7915_phy * phy,struct ieee80211_vif * vif,bool bssid,bool enable)608 mt7915_mcu_muar_config(struct mt7915_phy *phy, struct ieee80211_vif *vif,
609 bool bssid, bool enable)
610 {
611 struct mt7915_dev *dev = phy->dev;
612 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
613 u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START;
614 u32 mask = phy->omac_mask >> 32 & ~BIT(idx);
615 const u8 *addr = vif->addr;
616 struct {
617 u8 mode;
618 u8 force_clear;
619 u8 clear_bitmap[8];
620 u8 entry_count;
621 u8 write;
622 u8 band;
623
624 u8 index;
625 u8 bssid;
626 u8 addr[ETH_ALEN];
627 } __packed req = {
628 .mode = !!mask || enable,
629 .entry_count = 1,
630 .write = 1,
631 .band = phy->mt76->band_idx,
632 .index = idx * 2 + bssid,
633 };
634
635 if (bssid)
636 addr = vif->bss_conf.bssid;
637
638 if (enable)
639 ether_addr_copy(req.addr, addr);
640
641 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MUAR_UPDATE), &req,
642 sizeof(req), true);
643 }
644
mt7915_mcu_add_bss_info(struct mt7915_phy * phy,struct ieee80211_vif * vif,int enable)645 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy,
646 struct ieee80211_vif *vif, int enable)
647 {
648 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
649 struct mt7915_dev *dev = phy->dev;
650 struct sk_buff *skb;
651
652 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) {
653 mt7915_mcu_muar_config(phy, vif, false, enable);
654 mt7915_mcu_muar_config(phy, vif, true, enable);
655 }
656
657 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL,
658 MT7915_BSS_UPDATE_MAX_SIZE);
659 if (IS_ERR(skb))
660 return PTR_ERR(skb);
661
662 /* bss_omac must be first */
663 if (enable)
664 mt76_connac_mcu_bss_omac_tlv(skb, vif);
665
666 mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76,
667 mvif->sta.wcid.idx, enable);
668
669 if (vif->type == NL80211_IFTYPE_MONITOR)
670 goto out;
671
672 if (enable) {
673 mt7915_mcu_bss_rfch_tlv(skb, vif, phy);
674 mt7915_mcu_bss_bmc_tlv(skb, phy);
675 mt7915_mcu_bss_ra_tlv(skb, vif, phy);
676 mt7915_mcu_bss_hw_amsdu_tlv(skb);
677
678 if (vif->bss_conf.he_support)
679 mt7915_mcu_bss_he_tlv(skb, vif, phy);
680
681 if (mvif->mt76.omac_idx >= EXT_BSSID_START &&
682 mvif->mt76.omac_idx < REPEATER_BSSID_START)
683 mt76_connac_mcu_bss_ext_tlv(skb, &mvif->mt76);
684 }
685 out:
686 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
687 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
688 }
689
690 /** starec & wtbl **/
mt7915_mcu_add_tx_ba(struct mt7915_dev * dev,struct ieee80211_ampdu_params * params,bool enable)691 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev,
692 struct ieee80211_ampdu_params *params,
693 bool enable)
694 {
695 struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv;
696 struct mt7915_vif *mvif = msta->vif;
697 int ret;
698
699 mt76_worker_disable(&dev->mt76.tx_worker);
700 if (enable && !params->amsdu)
701 msta->wcid.amsdu = false;
702 ret = mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,
703 MCU_EXT_CMD(STA_REC_UPDATE),
704 enable, true);
705 mt76_worker_enable(&dev->mt76.tx_worker);
706
707 return ret;
708 }
709
mt7915_mcu_add_rx_ba(struct mt7915_dev * dev,struct ieee80211_ampdu_params * params,bool enable)710 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev,
711 struct ieee80211_ampdu_params *params,
712 bool enable)
713 {
714 struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv;
715 struct mt7915_vif *mvif = msta->vif;
716
717 return mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,
718 MCU_EXT_CMD(STA_REC_UPDATE),
719 enable, false);
720 }
721
722 static void
mt7915_mcu_sta_he_tlv(struct sk_buff * skb,struct ieee80211_sta * sta,struct ieee80211_vif * vif)723 mt7915_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta,
724 struct ieee80211_vif *vif)
725 {
726 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
727 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
728 struct ieee80211_he_mcs_nss_supp mcs_map;
729 struct sta_rec_he *he;
730 struct tlv *tlv;
731 u32 cap = 0;
732
733 if (!sta->deflink.he_cap.has_he)
734 return;
735
736 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he));
737
738 he = (struct sta_rec_he *)tlv;
739
740 if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE)
741 cap |= STA_REC_HE_CAP_HTC;
742
743 if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR)
744 cap |= STA_REC_HE_CAP_BSR;
745
746 if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL)
747 cap |= STA_REC_HE_CAP_OM;
748
749 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU)
750 cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU;
751
752 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR)
753 cap |= STA_REC_HE_CAP_BQR;
754
755 if (elem->phy_cap_info[0] &
756 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G |
757 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G))
758 cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT;
759
760 if (mvif->cap.he_ldpc &&
761 (elem->phy_cap_info[1] &
762 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD))
763 cap |= STA_REC_HE_CAP_LDPC;
764
765 if (elem->phy_cap_info[1] &
766 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US)
767 cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI;
768
769 if (elem->phy_cap_info[2] &
770 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US)
771 cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI;
772
773 if (elem->phy_cap_info[2] &
774 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ)
775 cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC;
776
777 if (elem->phy_cap_info[2] &
778 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ)
779 cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC;
780
781 if (elem->phy_cap_info[6] &
782 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB)
783 cap |= STA_REC_HE_CAP_TRIG_CQI_FK;
784
785 if (elem->phy_cap_info[6] &
786 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE)
787 cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE;
788
789 if (elem->phy_cap_info[7] &
790 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI)
791 cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI;
792
793 if (elem->phy_cap_info[7] &
794 IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ)
795 cap |= STA_REC_HE_CAP_GT_80M_TX_STBC;
796
797 if (elem->phy_cap_info[7] &
798 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ)
799 cap |= STA_REC_HE_CAP_GT_80M_RX_STBC;
800
801 if (elem->phy_cap_info[8] &
802 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI)
803 cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI;
804
805 if (elem->phy_cap_info[8] &
806 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI)
807 cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI;
808
809 if (elem->phy_cap_info[9] &
810 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU)
811 cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242;
812
813 if (elem->phy_cap_info[9] &
814 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU)
815 cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242;
816
817 he->he_cap = cpu_to_le32(cap);
818
819 mcs_map = sta->deflink.he_cap.he_mcs_nss_supp;
820 switch (sta->deflink.bandwidth) {
821 case IEEE80211_STA_RX_BW_160:
822 if (elem->phy_cap_info[0] &
823 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
824 mt7915_mcu_set_sta_he_mcs(sta,
825 &he->max_nss_mcs[CMD_HE_MCS_BW8080],
826 le16_to_cpu(mcs_map.rx_mcs_80p80));
827
828 mt7915_mcu_set_sta_he_mcs(sta,
829 &he->max_nss_mcs[CMD_HE_MCS_BW160],
830 le16_to_cpu(mcs_map.rx_mcs_160));
831 fallthrough;
832 default:
833 mt7915_mcu_set_sta_he_mcs(sta,
834 &he->max_nss_mcs[CMD_HE_MCS_BW80],
835 le16_to_cpu(mcs_map.rx_mcs_80));
836 break;
837 }
838
839 he->t_frame_dur =
840 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
841 he->max_ampdu_exp =
842 HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]);
843
844 he->bw_set =
845 HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]);
846 he->device_class =
847 HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]);
848 he->punc_pream_rx =
849 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
850
851 he->dcm_tx_mode =
852 HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]);
853 he->dcm_tx_max_nss =
854 HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]);
855 he->dcm_rx_mode =
856 HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]);
857 he->dcm_rx_max_nss =
858 HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]);
859 he->dcm_rx_max_nss =
860 HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]);
861
862 he->pkt_ext = 2;
863 }
864
865 static void
mt7915_mcu_sta_muru_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_sta * sta,struct ieee80211_vif * vif)866 mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
867 struct ieee80211_sta *sta, struct ieee80211_vif *vif)
868 {
869 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
870 struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;
871 struct sta_rec_muru *muru;
872 struct tlv *tlv;
873
874 if (vif->type != NL80211_IFTYPE_STATION &&
875 vif->type != NL80211_IFTYPE_AP)
876 return;
877
878 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru));
879
880 muru = (struct sta_rec_muru *)tlv;
881
882 muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer ||
883 mvif->cap.vht_mu_ebfer ||
884 mvif->cap.vht_mu_ebfee;
885 if (!is_mt7915(&dev->mt76))
886 muru->cfg.mimo_ul_en = true;
887 muru->cfg.ofdma_dl_en = true;
888
889 if (sta->deflink.vht_cap.vht_supported)
890 muru->mimo_dl.vht_mu_bfee =
891 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);
892
893 if (!sta->deflink.he_cap.has_he)
894 return;
895
896 muru->mimo_dl.partial_bw_dl_mimo =
897 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]);
898
899 muru->mimo_ul.full_ul_mimo =
900 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]);
901 muru->mimo_ul.partial_ul_mimo =
902 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]);
903
904 muru->ofdma_dl.punc_pream_rx =
905 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
906 muru->ofdma_dl.he_20m_in_40m_2g =
907 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]);
908 muru->ofdma_dl.he_20m_in_160m =
909 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
910 muru->ofdma_dl.he_80m_in_160m =
911 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);
912
913 muru->ofdma_ul.t_frame_dur =
914 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
915 muru->ofdma_ul.mu_cascading =
916 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]);
917 muru->ofdma_ul.uo_ra =
918 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]);
919 muru->ofdma_ul.rx_ctrl_frame_to_mbss =
920 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]);
921 }
922
923 static void
mt7915_mcu_sta_ht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)924 mt7915_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
925 {
926 struct sta_rec_ht *ht;
927 struct tlv *tlv;
928
929 if (!sta->deflink.ht_cap.ht_supported)
930 return;
931
932 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht));
933
934 ht = (struct sta_rec_ht *)tlv;
935 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap);
936 }
937
938 static void
mt7915_mcu_sta_vht_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)939 mt7915_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
940 {
941 struct sta_rec_vht *vht;
942 struct tlv *tlv;
943
944 if (!sta->deflink.vht_cap.vht_supported)
945 return;
946
947 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht));
948
949 vht = (struct sta_rec_vht *)tlv;
950 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap);
951 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map;
952 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map;
953 }
954
955 static void
mt7915_mcu_sta_amsdu_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)956 mt7915_mcu_sta_amsdu_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
957 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
958 {
959 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
960 struct sta_rec_amsdu *amsdu;
961 struct tlv *tlv;
962
963 if (vif->type != NL80211_IFTYPE_STATION &&
964 vif->type != NL80211_IFTYPE_AP)
965 return;
966
967 if (!sta->deflink.agg.max_amsdu_len)
968 return;
969
970 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu));
971 amsdu = (struct sta_rec_amsdu *)tlv;
972 amsdu->max_amsdu_num = 8;
973 amsdu->amsdu_en = true;
974 msta->wcid.amsdu = true;
975
976 switch (sta->deflink.agg.max_amsdu_len) {
977 case IEEE80211_MAX_MPDU_LEN_VHT_11454:
978 if (!is_mt7915(&dev->mt76)) {
979 amsdu->max_mpdu_size =
980 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
981 return;
982 }
983 fallthrough;
984 case IEEE80211_MAX_MPDU_LEN_HT_7935:
985 case IEEE80211_MAX_MPDU_LEN_VHT_7991:
986 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
987 return;
988 default:
989 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
990 return;
991 }
992 }
993
994 static int
mt7915_mcu_sta_wtbl_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)995 mt7915_mcu_sta_wtbl_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
996 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
997 {
998 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
999 struct mt7915_sta *msta;
1000 struct wtbl_req_hdr *wtbl_hdr;
1001 struct mt76_wcid *wcid;
1002 struct tlv *tlv;
1003
1004 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;
1005 wcid = sta ? &msta->wcid : NULL;
1006
1007 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv));
1008 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
1009 WTBL_RESET_AND_SET, tlv,
1010 &skb);
1011 if (IS_ERR(wtbl_hdr))
1012 return PTR_ERR(wtbl_hdr);
1013
1014 mt76_connac_mcu_wtbl_generic_tlv(&dev->mt76, skb, vif, sta, tlv,
1015 wtbl_hdr);
1016 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, tlv, wtbl_hdr);
1017 if (sta)
1018 mt76_connac_mcu_wtbl_ht_tlv(&dev->mt76, skb, sta, tlv,
1019 wtbl_hdr, mvif->cap.ht_ldpc,
1020 mvif->cap.vht_ldpc);
1021
1022 return 0;
1023 }
1024
1025 static inline bool
mt7915_is_ebf_supported(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool bfee)1026 mt7915_is_ebf_supported(struct mt7915_phy *phy, struct ieee80211_vif *vif,
1027 struct ieee80211_sta *sta, bool bfee)
1028 {
1029 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1030 int sts = hweight16(phy->mt76->chainmask);
1031
1032 if (vif->type != NL80211_IFTYPE_STATION &&
1033 vif->type != NL80211_IFTYPE_AP)
1034 return false;
1035
1036 if (!bfee && sts < 2)
1037 return false;
1038
1039 if (sta->deflink.he_cap.has_he) {
1040 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1041
1042 if (bfee)
1043 return mvif->cap.he_su_ebfee &&
1044 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]);
1045 else
1046 return mvif->cap.he_su_ebfer &&
1047 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]);
1048 }
1049
1050 if (sta->deflink.vht_cap.vht_supported) {
1051 u32 cap = sta->deflink.vht_cap.cap;
1052
1053 if (bfee)
1054 return mvif->cap.vht_su_ebfee &&
1055 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE);
1056 else
1057 return mvif->cap.vht_su_ebfer &&
1058 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE);
1059 }
1060
1061 return false;
1062 }
1063
1064 static void
mt7915_mcu_sta_sounding_rate(struct sta_rec_bf * bf)1065 mt7915_mcu_sta_sounding_rate(struct sta_rec_bf *bf)
1066 {
1067 bf->sounding_phy = MT_PHY_TYPE_OFDM;
1068 bf->ndp_rate = 0; /* mcs0 */
1069 bf->ndpa_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */
1070 bf->rept_poll_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */
1071 }
1072
1073 static void
mt7915_mcu_sta_bfer_ht(struct ieee80211_sta * sta,struct mt7915_phy * phy,struct sta_rec_bf * bf)1074 mt7915_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7915_phy *phy,
1075 struct sta_rec_bf *bf)
1076 {
1077 struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs;
1078 u8 n = 0;
1079
1080 bf->tx_mode = MT_PHY_TYPE_HT;
1081
1082 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) &&
1083 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED))
1084 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK,
1085 mcs->tx_params);
1086 else if (mcs->rx_mask[3])
1087 n = 3;
1088 else if (mcs->rx_mask[2])
1089 n = 2;
1090 else if (mcs->rx_mask[1])
1091 n = 1;
1092
1093 bf->nrow = hweight8(phy->mt76->chainmask) - 1;
1094 bf->ncol = min_t(u8, bf->nrow, n);
1095 bf->ibf_ncol = n;
1096 }
1097
1098 static void
mt7915_mcu_sta_bfer_vht(struct ieee80211_sta * sta,struct mt7915_phy * phy,struct sta_rec_bf * bf,bool explicit)1099 mt7915_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7915_phy *phy,
1100 struct sta_rec_bf *bf, bool explicit)
1101 {
1102 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1103 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap;
1104 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map);
1105 u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1106 u8 tx_ant = hweight8(phy->mt76->chainmask) - 1;
1107
1108 bf->tx_mode = MT_PHY_TYPE_VHT;
1109
1110 if (explicit) {
1111 u8 sts, snd_dim;
1112
1113 mt7915_mcu_sta_sounding_rate(bf);
1114
1115 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK,
1116 pc->cap);
1117 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1118 vc->cap);
1119 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant);
1120 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1121 bf->ibf_ncol = bf->ncol;
1122
1123 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1124 bf->nrow = 1;
1125 } else {
1126 bf->nrow = tx_ant;
1127 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1128 bf->ibf_ncol = nss_mcs;
1129
1130 if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)
1131 bf->ibf_nrow = 1;
1132 }
1133 }
1134
1135 static void
mt7915_mcu_sta_bfer_he(struct ieee80211_sta * sta,struct ieee80211_vif * vif,struct mt7915_phy * phy,struct sta_rec_bf * bf)1136 mt7915_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif,
1137 struct mt7915_phy *phy, struct sta_rec_bf *bf)
1138 {
1139 struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap;
1140 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem;
1141 const struct ieee80211_sta_he_cap *vc =
1142 mt76_connac_get_he_phy_cap(phy->mt76, vif);
1143 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem;
1144 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80);
1145 u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1146 u8 snd_dim, sts;
1147
1148 bf->tx_mode = MT_PHY_TYPE_HE_SU;
1149
1150 mt7915_mcu_sta_sounding_rate(bf);
1151
1152 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB,
1153 pe->phy_cap_info[6]);
1154 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB,
1155 pe->phy_cap_info[6]);
1156 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1157 ve->phy_cap_info[5]);
1158 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK,
1159 pe->phy_cap_info[4]);
1160 bf->nrow = min_t(u8, snd_dim, sts);
1161 bf->ncol = min_t(u8, nss_mcs, bf->nrow);
1162 bf->ibf_ncol = bf->ncol;
1163
1164 if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160)
1165 return;
1166
1167 /* go over for 160MHz and 80p80 */
1168 if (pe->phy_cap_info[0] &
1169 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) {
1170 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160);
1171 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1172
1173 bf->ncol_gt_bw80 = nss_mcs;
1174 }
1175
1176 if (pe->phy_cap_info[0] &
1177 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) {
1178 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80);
1179 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);
1180
1181 if (bf->ncol_gt_bw80)
1182 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs);
1183 else
1184 bf->ncol_gt_bw80 = nss_mcs;
1185 }
1186
1187 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
1188 ve->phy_cap_info[5]);
1189 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK,
1190 pe->phy_cap_info[4]);
1191
1192 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts);
1193 }
1194
1195 static void
mt7915_mcu_sta_bfer_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1196 mt7915_mcu_sta_bfer_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
1197 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1198 {
1199 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1200 struct mt7915_phy *phy = mvif->phy;
1201 int tx_ant = hweight8(phy->mt76->chainmask) - 1;
1202 struct sta_rec_bf *bf;
1203 struct tlv *tlv;
1204 static const u8 matrix[4][4] = {
1205 {0, 0, 0, 0},
1206 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */
1207 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */
1208 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */
1209 };
1210 bool ebf;
1211
1212 if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he))
1213 return;
1214
1215 ebf = mt7915_is_ebf_supported(phy, vif, sta, false);
1216 if (!ebf && !dev->ibf)
1217 return;
1218
1219 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf));
1220 bf = (struct sta_rec_bf *)tlv;
1221
1222 /* he: eBF only, in accordance with spec
1223 * vht: support eBF and iBF
1224 * ht: iBF only, since mac80211 lacks of eBF support
1225 */
1226 if (sta->deflink.he_cap.has_he && ebf)
1227 mt7915_mcu_sta_bfer_he(sta, vif, phy, bf);
1228 else if (sta->deflink.vht_cap.vht_supported)
1229 mt7915_mcu_sta_bfer_vht(sta, phy, bf, ebf);
1230 else if (sta->deflink.ht_cap.ht_supported)
1231 mt7915_mcu_sta_bfer_ht(sta, phy, bf);
1232 else
1233 return;
1234
1235 bf->bf_cap = ebf ? ebf : dev->ibf << 1;
1236 bf->bw = sta->deflink.bandwidth;
1237 bf->ibf_dbw = sta->deflink.bandwidth;
1238 bf->ibf_nrow = tx_ant;
1239
1240 if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol)
1241 bf->ibf_timeout = 0x48;
1242 else
1243 bf->ibf_timeout = 0x18;
1244
1245 if (ebf && bf->nrow != tx_ant)
1246 bf->mem_20m = matrix[tx_ant][bf->ncol];
1247 else
1248 bf->mem_20m = matrix[bf->nrow][bf->ncol];
1249
1250 switch (sta->deflink.bandwidth) {
1251 case IEEE80211_STA_RX_BW_160:
1252 case IEEE80211_STA_RX_BW_80:
1253 bf->mem_total = bf->mem_20m * 2;
1254 break;
1255 case IEEE80211_STA_RX_BW_40:
1256 bf->mem_total = bf->mem_20m;
1257 break;
1258 case IEEE80211_STA_RX_BW_20:
1259 default:
1260 break;
1261 }
1262 }
1263
1264 static void
mt7915_mcu_sta_bfee_tlv(struct mt7915_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1265 mt7915_mcu_sta_bfee_tlv(struct mt7915_dev *dev, struct sk_buff *skb,
1266 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1267 {
1268 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1269 struct mt7915_phy *phy = mvif->phy;
1270 int tx_ant = hweight8(phy->mt76->chainmask) - 1;
1271 struct sta_rec_bfee *bfee;
1272 struct tlv *tlv;
1273 u8 nrow = 0;
1274
1275 if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he))
1276 return;
1277
1278 if (!mt7915_is_ebf_supported(phy, vif, sta, true))
1279 return;
1280
1281 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee));
1282 bfee = (struct sta_rec_bfee *)tlv;
1283
1284 if (sta->deflink.he_cap.has_he) {
1285 struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;
1286
1287 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
1288 pe->phy_cap_info[5]);
1289 } else if (sta->deflink.vht_cap.vht_supported) {
1290 struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;
1291
1292 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
1293 pc->cap);
1294 }
1295
1296 /* reply with identity matrix to avoid 2x2 BF negative gain */
1297 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2);
1298 }
1299
1300 static enum mcu_mmps_mode
mt7915_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)1301 mt7915_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)
1302 {
1303 switch (smps) {
1304 case IEEE80211_SMPS_OFF:
1305 return MCU_MMPS_DISABLE;
1306 case IEEE80211_SMPS_STATIC:
1307 return MCU_MMPS_STATIC;
1308 case IEEE80211_SMPS_DYNAMIC:
1309 return MCU_MMPS_DYNAMIC;
1310 default:
1311 return MCU_MMPS_DISABLE;
1312 }
1313 }
1314
mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,void * data,u32 field)1315 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev,
1316 struct ieee80211_vif *vif,
1317 struct ieee80211_sta *sta,
1318 void *data, u32 field)
1319 {
1320 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1321 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1322 struct sta_phy *phy = data;
1323 struct sta_rec_ra_fixed *ra;
1324 struct sk_buff *skb;
1325 struct tlv *tlv;
1326
1327 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1328 &msta->wcid);
1329 if (IS_ERR(skb))
1330 return PTR_ERR(skb);
1331
1332 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra));
1333 ra = (struct sta_rec_ra_fixed *)tlv;
1334
1335 switch (field) {
1336 case RATE_PARAM_AUTO:
1337 break;
1338 case RATE_PARAM_FIXED:
1339 case RATE_PARAM_FIXED_MCS:
1340 case RATE_PARAM_FIXED_GI:
1341 case RATE_PARAM_FIXED_HE_LTF:
1342 if (phy)
1343 ra->phy = *phy;
1344 break;
1345 case RATE_PARAM_MMPS_UPDATE:
1346 ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode);
1347 break;
1348 case RATE_PARAM_SPE_UPDATE:
1349 ra->spe_idx = *(u8 *)data;
1350 break;
1351 default:
1352 break;
1353 }
1354 ra->field = cpu_to_le32(field);
1355
1356 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1357 MCU_EXT_CMD(STA_REC_UPDATE), true);
1358 }
1359
mt7915_mcu_add_smps(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1360 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1361 struct ieee80211_sta *sta)
1362 {
1363 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1364 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1365 struct wtbl_req_hdr *wtbl_hdr;
1366 struct tlv *sta_wtbl;
1367 struct sk_buff *skb;
1368 int ret;
1369
1370 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1371 &msta->wcid);
1372 if (IS_ERR(skb))
1373 return PTR_ERR(skb);
1374
1375 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
1376 sizeof(struct tlv));
1377 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,
1378 WTBL_SET, sta_wtbl, &skb);
1379 if (IS_ERR(wtbl_hdr))
1380 return PTR_ERR(wtbl_hdr);
1381
1382 mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_hdr);
1383
1384 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
1385 MCU_EXT_CMD(STA_REC_UPDATE), true);
1386 if (ret)
1387 return ret;
1388
1389 return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, NULL,
1390 RATE_PARAM_MMPS_UPDATE);
1391 }
1392
1393 static int
mt7915_mcu_set_spe_idx(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1394 mt7915_mcu_set_spe_idx(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1395 struct ieee80211_sta *sta)
1396 {
1397 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1398 struct mt76_phy *mphy = mvif->phy->mt76;
1399 u8 spe_idx = mt76_connac_spe_idx(mphy->antenna_mask);
1400
1401 return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &spe_idx,
1402 RATE_PARAM_SPE_UPDATE);
1403 }
1404
1405 static int
mt7915_mcu_add_rate_ctrl_fixed(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1406 mt7915_mcu_add_rate_ctrl_fixed(struct mt7915_dev *dev,
1407 struct ieee80211_vif *vif,
1408 struct ieee80211_sta *sta)
1409 {
1410 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1411 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;
1412 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;
1413 enum nl80211_band band = chandef->chan->band;
1414 struct sta_phy phy = {};
1415 int ret, nrates = 0;
1416
1417 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \
1418 do { \
1419 u8 i, gi = mask->control[band]._gi; \
1420 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \
1421 for (i = 0; i <= sta->deflink.bandwidth; i++) { \
1422 phy.sgi |= gi << (i << (_he)); \
1423 phy.he_ltf |= mask->control[band].he_ltf << (i << (_he));\
1424 } \
1425 for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \
1426 if (!mask->control[band]._mcs[i]) \
1427 continue; \
1428 nrates += hweight16(mask->control[band]._mcs[i]); \
1429 phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \
1430 if (_ht) \
1431 phy.mcs += 8 * i; \
1432 } \
1433 } while (0)
1434
1435 if (sta->deflink.he_cap.has_he) {
1436 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1);
1437 } else if (sta->deflink.vht_cap.vht_supported) {
1438 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0);
1439 } else if (sta->deflink.ht_cap.ht_supported) {
1440 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0);
1441 } else {
1442 nrates = hweight32(mask->control[band].legacy);
1443 phy.mcs = ffs(mask->control[band].legacy) - 1;
1444 }
1445 #undef __sta_phy_bitrate_mask_check
1446
1447 /* fall back to auto rate control */
1448 if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI &&
1449 mask->control[band].he_gi == GENMASK(7, 0) &&
1450 mask->control[band].he_ltf == GENMASK(7, 0) &&
1451 nrates != 1)
1452 return 0;
1453
1454 /* fixed single rate */
1455 if (nrates == 1) {
1456 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,
1457 RATE_PARAM_FIXED_MCS);
1458 if (ret)
1459 return ret;
1460 }
1461
1462 /* fixed GI */
1463 if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI ||
1464 mask->control[band].he_gi != GENMASK(7, 0)) {
1465 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1466 u32 addr;
1467
1468 /* firmware updates only TXCMD but doesn't take WTBL into
1469 * account, so driver should update here to reflect the
1470 * actual txrate hardware sends out.
1471 */
1472 addr = mt7915_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7);
1473 if (sta->deflink.he_cap.has_he)
1474 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi);
1475 else
1476 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi);
1477
1478 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,
1479 RATE_PARAM_FIXED_GI);
1480 if (ret)
1481 return ret;
1482 }
1483
1484 /* fixed HE_LTF */
1485 if (mask->control[band].he_ltf != GENMASK(7, 0)) {
1486 ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,
1487 RATE_PARAM_FIXED_HE_LTF);
1488 if (ret)
1489 return ret;
1490 }
1491
1492 return mt7915_mcu_set_spe_idx(dev, vif, sta);
1493 }
1494
1495 static void
mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff * skb,struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1496 mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7915_dev *dev,
1497 struct ieee80211_vif *vif, struct ieee80211_sta *sta)
1498 {
1499 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1500 struct mt76_phy *mphy = mvif->phy->mt76;
1501 struct cfg80211_chan_def *chandef = &mphy->chandef;
1502 struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;
1503 enum nl80211_band band = chandef->chan->band;
1504 struct sta_rec_ra *ra;
1505 struct tlv *tlv;
1506 u32 supp_rate = sta->deflink.supp_rates[band];
1507 u32 cap = sta->wme ? STA_CAP_WMM : 0;
1508
1509 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra));
1510 ra = (struct sta_rec_ra *)tlv;
1511
1512 ra->valid = true;
1513 ra->auto_rate = true;
1514 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, &sta->deflink);
1515 ra->channel = chandef->chan->hw_value;
1516 ra->bw = sta->deflink.bandwidth;
1517 ra->phy.bw = sta->deflink.bandwidth;
1518 ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode);
1519
1520 if (supp_rate) {
1521 supp_rate &= mask->control[band].legacy;
1522 ra->rate_len = hweight32(supp_rate);
1523
1524 if (band == NL80211_BAND_2GHZ) {
1525 ra->supp_mode = MODE_CCK;
1526 ra->supp_cck_rate = supp_rate & GENMASK(3, 0);
1527
1528 if (ra->rate_len > 4) {
1529 ra->supp_mode |= MODE_OFDM;
1530 ra->supp_ofdm_rate = supp_rate >> 4;
1531 }
1532 } else {
1533 ra->supp_mode = MODE_OFDM;
1534 ra->supp_ofdm_rate = supp_rate;
1535 }
1536 }
1537
1538 if (sta->deflink.ht_cap.ht_supported) {
1539 ra->supp_mode |= MODE_HT;
1540 ra->af = sta->deflink.ht_cap.ampdu_factor;
1541 ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD);
1542
1543 cap |= STA_CAP_HT;
1544 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20)
1545 cap |= STA_CAP_SGI_20;
1546 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
1547 cap |= STA_CAP_SGI_40;
1548 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC)
1549 cap |= STA_CAP_TX_STBC;
1550 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
1551 cap |= STA_CAP_RX_STBC;
1552 if (mvif->cap.ht_ldpc &&
1553 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING))
1554 cap |= STA_CAP_LDPC;
1555
1556 mt7915_mcu_set_sta_ht_mcs(sta, ra->ht_mcs,
1557 mask->control[band].ht_mcs);
1558 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs;
1559 }
1560
1561 if (sta->deflink.vht_cap.vht_supported) {
1562 u8 af;
1563
1564 ra->supp_mode |= MODE_VHT;
1565 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
1566 sta->deflink.vht_cap.cap);
1567 ra->af = max_t(u8, ra->af, af);
1568
1569 cap |= STA_CAP_VHT;
1570 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
1571 cap |= STA_CAP_VHT_SGI_80;
1572 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160)
1573 cap |= STA_CAP_VHT_SGI_160;
1574 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC)
1575 cap |= STA_CAP_VHT_TX_STBC;
1576 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1)
1577 cap |= STA_CAP_VHT_RX_STBC;
1578 if (mvif->cap.vht_ldpc &&
1579 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC))
1580 cap |= STA_CAP_VHT_LDPC;
1581
1582 mt7915_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs,
1583 mask->control[band].vht_mcs);
1584 }
1585
1586 if (sta->deflink.he_cap.has_he) {
1587 ra->supp_mode |= MODE_HE;
1588 cap |= STA_CAP_HE;
1589
1590 if (sta->deflink.he_6ghz_capa.capa)
1591 ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
1592 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
1593 }
1594
1595 ra->sta_cap = cpu_to_le32(cap);
1596 }
1597
mt7915_mcu_add_rate_ctrl(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool changed)1598 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1599 struct ieee80211_sta *sta, bool changed)
1600 {
1601 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1602 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
1603 struct sk_buff *skb;
1604 int ret;
1605
1606 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1607 &msta->wcid);
1608 if (IS_ERR(skb))
1609 return PTR_ERR(skb);
1610
1611 /* firmware rc algorithm refers to sta_rec_he for HE control.
1612 * once dev->rc_work changes the settings driver should also
1613 * update sta_rec_he here.
1614 */
1615 if (changed)
1616 mt7915_mcu_sta_he_tlv(skb, sta, vif);
1617
1618 /* sta_rec_ra accommodates BW, NSS and only MCS range format
1619 * i.e 0-{7,8,9} for VHT.
1620 */
1621 mt7915_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta);
1622
1623 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
1624 MCU_EXT_CMD(STA_REC_UPDATE), true);
1625 if (ret)
1626 return ret;
1627
1628 /* sta_rec_ra_fixed accommodates single rate, (HE)GI and HE_LTE,
1629 * and updates as peer fixed rate parameters, which overrides
1630 * sta_rec_ra and firmware rate control algorithm.
1631 */
1632 return mt7915_mcu_add_rate_ctrl_fixed(dev, vif, sta);
1633 }
1634
1635 static int
mt7915_mcu_add_group(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1636 mt7915_mcu_add_group(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1637 struct ieee80211_sta *sta)
1638 {
1639 #define MT_STA_BSS_GROUP 1
1640 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1641 struct mt7915_sta *msta;
1642 struct {
1643 __le32 action;
1644 u8 wlan_idx_lo;
1645 u8 status;
1646 u8 wlan_idx_hi;
1647 u8 rsv0[5];
1648 __le32 val;
1649 u8 rsv1[8];
1650 } __packed req = {
1651 .action = cpu_to_le32(MT_STA_BSS_GROUP),
1652 .val = cpu_to_le32(mvif->mt76.idx % 16),
1653 };
1654
1655 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;
1656 req.wlan_idx_lo = to_wcid_lo(msta->wcid.idx);
1657 req.wlan_idx_hi = to_wcid_hi(msta->wcid.idx);
1658
1659 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_DRR_CTRL), &req,
1660 sizeof(req), true);
1661 }
1662
mt7915_mcu_add_sta(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta,int conn_state,bool newly)1663 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1664 struct ieee80211_sta *sta, int conn_state, bool newly)
1665 {
1666 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1667 struct ieee80211_link_sta *link_sta;
1668 struct mt7915_sta *msta;
1669 struct sk_buff *skb;
1670 int ret;
1671
1672 msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;
1673 link_sta = sta ? &sta->deflink : NULL;
1674
1675 skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
1676 &msta->wcid);
1677 if (IS_ERR(skb))
1678 return PTR_ERR(skb);
1679
1680 /* starec basic */
1681 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, vif, link_sta,
1682 conn_state, newly);
1683 /* tag order is in accordance with firmware dependency. */
1684 if (sta && conn_state != CONN_STATE_DISCONNECT) {
1685 /* starec bfer */
1686 mt7915_mcu_sta_bfer_tlv(dev, skb, vif, sta);
1687 /* starec ht */
1688 mt7915_mcu_sta_ht_tlv(skb, sta);
1689 /* starec vht */
1690 mt7915_mcu_sta_vht_tlv(skb, sta);
1691 /* starec uapsd */
1692 mt76_connac_mcu_sta_uapsd(skb, vif, sta);
1693 }
1694
1695 if (newly || conn_state != CONN_STATE_DISCONNECT) {
1696 ret = mt7915_mcu_sta_wtbl_tlv(dev, skb, vif, sta);
1697 if (ret) {
1698 dev_kfree_skb(skb);
1699 return ret;
1700 }
1701 }
1702
1703 if (conn_state == CONN_STATE_DISCONNECT)
1704 goto out;
1705
1706 if (sta) {
1707 /* starec amsdu */
1708 mt7915_mcu_sta_amsdu_tlv(dev, skb, vif, sta);
1709 /* starec he */
1710 mt7915_mcu_sta_he_tlv(skb, sta, vif);
1711 /* starec muru */
1712 mt7915_mcu_sta_muru_tlv(dev, skb, sta, vif);
1713 /* starec bfee */
1714 mt7915_mcu_sta_bfee_tlv(dev, skb, vif, sta);
1715 }
1716
1717 ret = mt7915_mcu_add_group(dev, vif, sta);
1718 if (ret) {
1719 dev_kfree_skb(skb);
1720 return ret;
1721 }
1722 out:
1723 ret = mt76_connac_mcu_sta_wed_update(&dev->mt76, skb);
1724 if (ret)
1725 return ret;
1726
1727 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
1728 MCU_EXT_CMD(STA_REC_UPDATE), true);
1729 }
1730
mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev * dev)1731 int mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev *dev)
1732 {
1733 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
1734 struct mtk_wed_device *wed = &dev->mt76.mmio.wed;
1735 struct {
1736 __le32 args[2];
1737 } req = {
1738 .args[0] = cpu_to_le32(1),
1739 .args[1] = cpu_to_le32(6),
1740 };
1741
1742 return mtk_wed_device_update_msg(wed, MTK_WED_WO_CMD_RXCNT_CTRL,
1743 &req, sizeof(req));
1744 #else
1745 return 0;
1746 #endif
1747 }
1748
mt7915_mcu_add_dev_info(struct mt7915_phy * phy,struct ieee80211_vif * vif,bool enable)1749 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy,
1750 struct ieee80211_vif *vif, bool enable)
1751 {
1752 struct mt7915_dev *dev = phy->dev;
1753 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1754 struct {
1755 struct req_hdr {
1756 u8 omac_idx;
1757 u8 band_idx;
1758 __le16 tlv_num;
1759 u8 is_tlv_append;
1760 u8 rsv[3];
1761 } __packed hdr;
1762 struct req_tlv {
1763 __le16 tag;
1764 __le16 len;
1765 u8 active;
1766 u8 band_idx;
1767 u8 omac_addr[ETH_ALEN];
1768 } __packed tlv;
1769 } data = {
1770 .hdr = {
1771 .omac_idx = mvif->mt76.omac_idx,
1772 .band_idx = mvif->mt76.band_idx,
1773 .tlv_num = cpu_to_le16(1),
1774 .is_tlv_append = 1,
1775 },
1776 .tlv = {
1777 .tag = cpu_to_le16(DEV_INFO_ACTIVE),
1778 .len = cpu_to_le16(sizeof(struct req_tlv)),
1779 .active = enable,
1780 .band_idx = mvif->mt76.band_idx,
1781 },
1782 };
1783
1784 if (mvif->mt76.omac_idx >= REPEATER_BSSID_START)
1785 return mt7915_mcu_muar_config(phy, vif, false, enable);
1786
1787 memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN);
1788 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(DEV_INFO_UPDATE),
1789 &data, sizeof(data), true);
1790 }
1791
1792 static void
mt7915_mcu_beacon_cntdwn(struct ieee80211_vif * vif,struct sk_buff * rskb,struct sk_buff * skb,struct bss_info_bcn * bcn,struct ieee80211_mutable_offsets * offs)1793 mt7915_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb,
1794 struct sk_buff *skb, struct bss_info_bcn *bcn,
1795 struct ieee80211_mutable_offsets *offs)
1796 {
1797 struct bss_info_bcn_cntdwn *info;
1798 struct tlv *tlv;
1799 int sub_tag;
1800
1801 if (!offs->cntdwn_counter_offs[0])
1802 return;
1803
1804 sub_tag = vif->bss_conf.csa_active ? BSS_INFO_BCN_CSA : BSS_INFO_BCN_BCC;
1805 tlv = mt7915_mcu_add_nested_subtlv(rskb, sub_tag, sizeof(*info),
1806 &bcn->sub_ntlv, &bcn->len);
1807 info = (struct bss_info_bcn_cntdwn *)tlv;
1808 info->cnt = skb->data[offs->cntdwn_counter_offs[0]];
1809 }
1810
1811 static void
mt7915_mcu_beacon_mbss(struct sk_buff * rskb,struct sk_buff * skb,struct ieee80211_vif * vif,struct bss_info_bcn * bcn,struct ieee80211_mutable_offsets * offs)1812 mt7915_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb,
1813 struct ieee80211_vif *vif, struct bss_info_bcn *bcn,
1814 struct ieee80211_mutable_offsets *offs)
1815 {
1816 struct bss_info_bcn_mbss *mbss;
1817 const struct element *elem;
1818 struct tlv *tlv;
1819
1820 if (!vif->bss_conf.bssid_indicator)
1821 return;
1822
1823 tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_MBSSID,
1824 sizeof(*mbss), &bcn->sub_ntlv,
1825 &bcn->len);
1826
1827 mbss = (struct bss_info_bcn_mbss *)tlv;
1828 mbss->offset[0] = cpu_to_le16(offs->tim_offset);
1829 mbss->bitmap = cpu_to_le32(1);
1830
1831 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID,
1832 &skb->data[offs->mbssid_off],
1833 skb->len - offs->mbssid_off) {
1834 const struct element *sub_elem;
1835
1836 if (elem->datalen < 2)
1837 continue;
1838
1839 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) {
1840 const struct ieee80211_bssid_index *idx;
1841 const u8 *idx_ie;
1842
1843 if (sub_elem->id || sub_elem->datalen < 4)
1844 continue; /* not a valid BSS profile */
1845
1846 /* Find WLAN_EID_MULTI_BSSID_IDX
1847 * in the merged nontransmitted profile
1848 */
1849 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX,
1850 sub_elem->data,
1851 sub_elem->datalen);
1852 if (!idx_ie || idx_ie[1] < sizeof(*idx))
1853 continue;
1854
1855 idx = (void *)(idx_ie + 2);
1856 if (!idx->bssid_index || idx->bssid_index > 31)
1857 continue;
1858
1859 mbss->offset[idx->bssid_index] =
1860 cpu_to_le16(idx_ie - skb->data);
1861 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index));
1862 }
1863 }
1864 }
1865
1866 static void
mt7915_mcu_beacon_cont(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct sk_buff * rskb,struct sk_buff * skb,struct bss_info_bcn * bcn,struct ieee80211_mutable_offsets * offs)1867 mt7915_mcu_beacon_cont(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1868 struct sk_buff *rskb, struct sk_buff *skb,
1869 struct bss_info_bcn *bcn,
1870 struct ieee80211_mutable_offsets *offs)
1871 {
1872 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
1873 struct bss_info_bcn_cont *cont;
1874 struct tlv *tlv;
1875 u8 *buf;
1876 int len = sizeof(*cont) + MT_TXD_SIZE + skb->len;
1877
1878 len = (len & 0x3) ? ((len | 0x3) + 1) : len;
1879 tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_CONTENT,
1880 len, &bcn->sub_ntlv, &bcn->len);
1881
1882 cont = (struct bss_info_bcn_cont *)tlv;
1883 cont->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
1884 cont->tim_ofs = cpu_to_le16(offs->tim_offset);
1885
1886 if (offs->cntdwn_counter_offs[0]) {
1887 u16 offset = offs->cntdwn_counter_offs[0];
1888
1889 if (vif->bss_conf.csa_active)
1890 cont->csa_ofs = cpu_to_le16(offset - 4);
1891 if (vif->bss_conf.color_change_active)
1892 cont->bcc_ofs = cpu_to_le16(offset - 3);
1893 }
1894
1895 buf = (u8 *)tlv + sizeof(*cont);
1896 mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL,
1897 0, BSS_CHANGED_BEACON);
1898 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
1899 }
1900
1901 int
mt7915_mcu_add_inband_discov(struct mt7915_dev * dev,struct ieee80211_vif * vif,u32 changed)1902 mt7915_mcu_add_inband_discov(struct mt7915_dev *dev, struct ieee80211_vif *vif,
1903 u32 changed)
1904 {
1905 #define OFFLOAD_TX_MODE_SU BIT(0)
1906 #define OFFLOAD_TX_MODE_MU BIT(1)
1907 struct ieee80211_hw *hw = mt76_hw(dev);
1908 struct mt7915_phy *phy = mt7915_hw_phy(hw);
1909 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1910 struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;
1911 enum nl80211_band band = chandef->chan->band;
1912 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
1913 struct bss_info_bcn *bcn;
1914 struct bss_info_inband_discovery *discov;
1915 struct ieee80211_tx_info *info;
1916 struct sk_buff *rskb, *skb = NULL;
1917 struct tlv *tlv, *sub_tlv;
1918 bool ext_phy = phy != &dev->phy;
1919 u8 *buf, interval;
1920 int len;
1921
1922 if (vif->bss_conf.nontransmitted)
1923 return 0;
1924
1925 rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL,
1926 MT7915_MAX_BSS_OFFLOAD_SIZE);
1927 if (IS_ERR(rskb))
1928 return PTR_ERR(rskb);
1929
1930 tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn));
1931 bcn = (struct bss_info_bcn *)tlv;
1932 bcn->enable = true;
1933
1934 if (changed & BSS_CHANGED_FILS_DISCOVERY) {
1935 interval = vif->bss_conf.fils_discovery.max_interval;
1936 skb = ieee80211_get_fils_discovery_tmpl(hw, vif);
1937 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP &&
1938 vif->bss_conf.unsol_bcast_probe_resp_interval) {
1939 interval = vif->bss_conf.unsol_bcast_probe_resp_interval;
1940 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif);
1941 }
1942
1943 if (!skb) {
1944 dev_kfree_skb(rskb);
1945 return -EINVAL;
1946 }
1947
1948 info = IEEE80211_SKB_CB(skb);
1949 info->control.vif = vif;
1950 info->band = band;
1951 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy);
1952
1953 len = sizeof(*discov) + MT_TXD_SIZE + skb->len;
1954 len = (len & 0x3) ? ((len | 0x3) + 1) : len;
1955
1956 if (skb->len > MT7915_MAX_BEACON_SIZE) {
1957 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n");
1958 dev_kfree_skb(rskb);
1959 dev_kfree_skb(skb);
1960 return -EINVAL;
1961 }
1962
1963 sub_tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_DISCOV,
1964 len, &bcn->sub_ntlv, &bcn->len);
1965 discov = (struct bss_info_inband_discovery *)sub_tlv;
1966 discov->tx_mode = OFFLOAD_TX_MODE_SU;
1967 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */
1968 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY);
1969 discov->tx_interval = interval;
1970 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
1971 discov->enable = !!interval;
1972
1973 buf = (u8 *)sub_tlv + sizeof(*discov);
1974
1975 mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL,
1976 0, changed);
1977 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);
1978
1979 dev_kfree_skb(skb);
1980
1981 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb,
1982 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
1983 }
1984
mt7915_mcu_add_beacon(struct ieee80211_hw * hw,struct ieee80211_vif * vif,int en,u32 changed)1985 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1986 int en, u32 changed)
1987 {
1988 struct mt7915_dev *dev = mt7915_hw_dev(hw);
1989 struct mt7915_phy *phy = mt7915_hw_phy(hw);
1990 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
1991 struct ieee80211_mutable_offsets offs;
1992 struct ieee80211_tx_info *info;
1993 struct sk_buff *skb, *rskb;
1994 struct tlv *tlv;
1995 struct bss_info_bcn *bcn;
1996 int len = MT7915_MAX_BSS_OFFLOAD_SIZE;
1997 bool ext_phy = phy != &dev->phy;
1998
1999 if (vif->bss_conf.nontransmitted)
2000 return 0;
2001
2002 rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
2003 NULL, len);
2004 if (IS_ERR(rskb))
2005 return PTR_ERR(rskb);
2006
2007 tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn));
2008 bcn = (struct bss_info_bcn *)tlv;
2009 bcn->enable = en;
2010
2011 if (!en)
2012 goto out;
2013
2014 skb = ieee80211_beacon_get_template(hw, vif, &offs, 0);
2015 if (!skb) {
2016 dev_kfree_skb(rskb);
2017 return -EINVAL;
2018 }
2019
2020 if (skb->len > MT7915_MAX_BEACON_SIZE) {
2021 dev_err(dev->mt76.dev, "Bcn size limit exceed\n");
2022 dev_kfree_skb(rskb);
2023 dev_kfree_skb(skb);
2024 return -EINVAL;
2025 }
2026
2027 info = IEEE80211_SKB_CB(skb);
2028 info->hw_queue = FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy);
2029
2030 mt7915_mcu_beacon_cntdwn(vif, rskb, skb, bcn, &offs);
2031 mt7915_mcu_beacon_mbss(rskb, skb, vif, bcn, &offs);
2032 mt7915_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs);
2033 dev_kfree_skb(skb);
2034
2035 out:
2036 return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb,
2037 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
2038 }
2039
mt7915_driver_own(struct mt7915_dev * dev,u8 band)2040 static int mt7915_driver_own(struct mt7915_dev *dev, u8 band)
2041 {
2042 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN);
2043 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band),
2044 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) {
2045 dev_err(dev->mt76.dev, "Timeout for driver own\n");
2046 return -EIO;
2047 }
2048
2049 /* clear irq when the driver own success */
2050 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band),
2051 MT_TOP_LPCR_HOST_BAND_STAT);
2052
2053 return 0;
2054 }
2055
2056 static int
mt7915_firmware_state(struct mt7915_dev * dev,bool wa)2057 mt7915_firmware_state(struct mt7915_dev *dev, bool wa)
2058 {
2059 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE,
2060 wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD);
2061
2062 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE,
2063 state, 1000)) {
2064 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");
2065 return -EIO;
2066 }
2067 return 0;
2068 }
2069
mt7915_load_firmware(struct mt7915_dev * dev)2070 static int mt7915_load_firmware(struct mt7915_dev *dev)
2071 {
2072 int ret;
2073
2074 /* Release Semaphore if taken by previous failed attempt */
2075 ret = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, false);
2076 if (ret != PATCH_REL_SEM_SUCCESS) {
2077 dev_err(dev->mt76.dev, "Could not release semaphore\n");
2078 /* Continue anyways */
2079 }
2080
2081 /* Always restart MCU firmware */
2082 mt76_connac_mcu_restart(&dev->mt76);
2083
2084 /* Check if MCU is ready */
2085 ret = mt7915_firmware_state(dev, false);
2086 if (ret) {
2087 dev_err(dev->mt76.dev, "Firmware did not enter download state\n");
2088 return ret;
2089 }
2090
2091 ret = mt76_connac2_load_patch(&dev->mt76, fw_name_var(dev, ROM_PATCH));
2092 if (ret)
2093 return ret;
2094
2095 ret = mt76_connac2_load_ram(&dev->mt76, fw_name_var(dev, FIRMWARE_WM),
2096 fw_name(dev, FIRMWARE_WA));
2097 if (ret)
2098 return ret;
2099
2100 ret = mt7915_firmware_state(dev, true);
2101 if (ret)
2102 return ret;
2103
2104 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);
2105
2106 dev_dbg(dev->mt76.dev, "Firmware init done\n");
2107
2108 return 0;
2109 }
2110
mt7915_mcu_fw_log_2_host(struct mt7915_dev * dev,u8 type,u8 ctrl)2111 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl)
2112 {
2113 struct {
2114 u8 ctrl_val;
2115 u8 pad[3];
2116 } data = {
2117 .ctrl_val = ctrl
2118 };
2119
2120 if (type == MCU_FW_LOG_WA)
2121 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(FW_LOG_2_HOST),
2122 &data, sizeof(data), true);
2123
2124 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_LOG_2_HOST), &data,
2125 sizeof(data), true);
2126 }
2127
mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev * dev,u32 module,u8 level)2128 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level)
2129 {
2130 struct {
2131 u8 ver;
2132 u8 pad;
2133 __le16 len;
2134 u8 level;
2135 u8 rsv[3];
2136 __le32 module_idx;
2137 } data = {
2138 .module_idx = cpu_to_le32(module),
2139 .level = level,
2140 };
2141
2142 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_DBG_CTRL), &data,
2143 sizeof(data), false);
2144 }
2145
mt7915_mcu_muru_debug_set(struct mt7915_dev * dev,bool enabled)2146 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enabled)
2147 {
2148 struct {
2149 __le32 cmd;
2150 u8 enable;
2151 } data = {
2152 .cmd = cpu_to_le32(MURU_SET_TXC_TX_STATS_EN),
2153 .enable = enabled,
2154 };
2155
2156 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &data,
2157 sizeof(data), false);
2158 }
2159
mt7915_mcu_muru_debug_get(struct mt7915_phy * phy)2160 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy)
2161 {
2162 struct mt7915_dev *dev = phy->dev;
2163 struct sk_buff *skb;
2164 struct mt7915_mcu_muru_stats *mu_stats;
2165 int ret;
2166
2167 struct {
2168 __le32 cmd;
2169 u8 band_idx;
2170 } req = {
2171 .cmd = cpu_to_le32(MURU_GET_TXC_TX_STATS),
2172 .band_idx = phy->mt76->band_idx,
2173 };
2174
2175 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL),
2176 &req, sizeof(req), true, &skb);
2177 if (ret)
2178 return ret;
2179
2180 mu_stats = (struct mt7915_mcu_muru_stats *)(skb->data);
2181
2182 /* accumulate stats, these are clear-on-read */
2183 #define __dl_u32(s) phy->mib.dl_##s += le32_to_cpu(mu_stats->dl.s)
2184 #define __ul_u32(s) phy->mib.ul_##s += le32_to_cpu(mu_stats->ul.s)
2185 __dl_u32(cck_cnt);
2186 __dl_u32(ofdm_cnt);
2187 __dl_u32(htmix_cnt);
2188 __dl_u32(htgf_cnt);
2189 __dl_u32(vht_su_cnt);
2190 __dl_u32(vht_2mu_cnt);
2191 __dl_u32(vht_3mu_cnt);
2192 __dl_u32(vht_4mu_cnt);
2193 __dl_u32(he_su_cnt);
2194 __dl_u32(he_2ru_cnt);
2195 __dl_u32(he_2mu_cnt);
2196 __dl_u32(he_3ru_cnt);
2197 __dl_u32(he_3mu_cnt);
2198 __dl_u32(he_4ru_cnt);
2199 __dl_u32(he_4mu_cnt);
2200 __dl_u32(he_5to8ru_cnt);
2201 __dl_u32(he_9to16ru_cnt);
2202 __dl_u32(he_gtr16ru_cnt);
2203
2204 __ul_u32(hetrig_su_cnt);
2205 __ul_u32(hetrig_2ru_cnt);
2206 __ul_u32(hetrig_3ru_cnt);
2207 __ul_u32(hetrig_4ru_cnt);
2208 __ul_u32(hetrig_5to8ru_cnt);
2209 __ul_u32(hetrig_9to16ru_cnt);
2210 __ul_u32(hetrig_gtr16ru_cnt);
2211 __ul_u32(hetrig_2mu_cnt);
2212 __ul_u32(hetrig_3mu_cnt);
2213 __ul_u32(hetrig_4mu_cnt);
2214 #undef __dl_u32
2215 #undef __ul_u32
2216
2217 dev_kfree_skb(skb);
2218
2219 return 0;
2220 }
2221
mt7915_mcu_set_mwds(struct mt7915_dev * dev,bool enabled)2222 static int mt7915_mcu_set_mwds(struct mt7915_dev *dev, bool enabled)
2223 {
2224 struct {
2225 u8 enable;
2226 u8 _rsv[3];
2227 } __packed req = {
2228 .enable = enabled
2229 };
2230
2231 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req,
2232 sizeof(req), false);
2233 }
2234
mt7915_mcu_set_muru_ctrl(struct mt7915_dev * dev,u32 cmd,u32 val)2235 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val)
2236 {
2237 struct {
2238 __le32 cmd;
2239 u8 val[4];
2240 } __packed req = {
2241 .cmd = cpu_to_le32(cmd),
2242 };
2243
2244 put_unaligned_le32(val, req.val);
2245
2246 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req,
2247 sizeof(req), false);
2248 }
2249
2250 static int
mt7915_mcu_init_rx_airtime(struct mt7915_dev * dev)2251 mt7915_mcu_init_rx_airtime(struct mt7915_dev *dev)
2252 {
2253 #define RX_AIRTIME_FEATURE_CTRL 1
2254 #define RX_AIRTIME_BITWISE_CTRL 2
2255 #define RX_AIRTIME_CLEAR_EN 1
2256 struct {
2257 __le16 field;
2258 __le16 sub_field;
2259 __le32 set_status;
2260 __le32 get_status;
2261 u8 _rsv[12];
2262
2263 bool airtime_en;
2264 bool mibtime_en;
2265 bool earlyend_en;
2266 u8 _rsv1[9];
2267
2268 bool airtime_clear;
2269 bool mibtime_clear;
2270 u8 _rsv2[98];
2271 } __packed req = {
2272 .field = cpu_to_le16(RX_AIRTIME_BITWISE_CTRL),
2273 .sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN),
2274 .airtime_clear = true,
2275 };
2276 int ret;
2277
2278 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req,
2279 sizeof(req), true);
2280 if (ret)
2281 return ret;
2282
2283 req.field = cpu_to_le16(RX_AIRTIME_FEATURE_CTRL);
2284 req.sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN);
2285 req.airtime_en = true;
2286
2287 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req,
2288 sizeof(req), true);
2289 }
2290
mt7915_red_set_watermark(struct mt7915_dev * dev)2291 static int mt7915_red_set_watermark(struct mt7915_dev *dev)
2292 {
2293 #define RED_GLOBAL_TOKEN_WATERMARK 2
2294 struct {
2295 __le32 args[3];
2296 u8 cmd;
2297 u8 version;
2298 u8 __rsv1[4];
2299 __le16 len;
2300 __le16 high_mark;
2301 __le16 low_mark;
2302 u8 __rsv2[12];
2303 } __packed req = {
2304 .args[0] = cpu_to_le32(MCU_WA_PARAM_RED_SETTING),
2305 .cmd = RED_GLOBAL_TOKEN_WATERMARK,
2306 .len = cpu_to_le16(sizeof(req) - sizeof(req.args)),
2307 .high_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256),
2308 .low_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256 - 1536),
2309 };
2310
2311 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_PARAM_CMD(SET), &req,
2312 sizeof(req), false);
2313 }
2314
mt7915_mcu_set_red(struct mt7915_dev * dev,bool enabled)2315 static int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled)
2316 {
2317 #define RED_DISABLE 0
2318 #define RED_BY_WA_ENABLE 2
2319 int ret;
2320 u32 red_type = enabled ? RED_BY_WA_ENABLE : RED_DISABLE;
2321 __le32 req = cpu_to_le32(red_type);
2322
2323 if (enabled) {
2324 ret = mt7915_red_set_watermark(dev);
2325 if (ret < 0)
2326 return ret;
2327 }
2328
2329 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RED_ENABLE), &req,
2330 sizeof(req), false);
2331 if (ret < 0)
2332 return ret;
2333
2334 return mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),
2335 MCU_WA_PARAM_RED, enabled, 0);
2336 }
2337
mt7915_mcu_init_firmware(struct mt7915_dev * dev)2338 int mt7915_mcu_init_firmware(struct mt7915_dev *dev)
2339 {
2340 int ret;
2341
2342 /* force firmware operation mode into normal state,
2343 * which should be set before firmware download stage.
2344 */
2345 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);
2346
2347 ret = mt7915_driver_own(dev, 0);
2348 if (ret)
2349 return ret;
2350 /* set driver own for band1 when two hif exist */
2351 if (dev->hif2) {
2352 ret = mt7915_driver_own(dev, 1);
2353 if (ret)
2354 return ret;
2355 }
2356
2357 ret = mt7915_load_firmware(dev);
2358 if (ret)
2359 return ret;
2360
2361 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
2362 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
2363 if (ret)
2364 return ret;
2365
2366 ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0);
2367 if (ret)
2368 return ret;
2369
2370 mt76_connac_mcu_del_wtbl_all(&dev->mt76);
2371
2372 if ((mtk_wed_device_active(&dev->mt76.mmio.wed) &&
2373 is_mt7915(&dev->mt76)) ||
2374 !mtk_wed_get_rx_capa(&dev->mt76.mmio.wed))
2375 mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY), 0, 0, 0);
2376
2377 ret = mt7915_mcu_set_mwds(dev, 1);
2378 if (ret)
2379 return ret;
2380
2381 ret = mt7915_mcu_set_muru_ctrl(dev, MURU_SET_PLATFORM_TYPE,
2382 MURU_PLATFORM_TYPE_PERF_LEVEL_2);
2383 if (ret)
2384 return ret;
2385
2386 ret = mt7915_mcu_init_rx_airtime(dev);
2387 if (ret)
2388 return ret;
2389
2390 return mt7915_mcu_set_red(dev, mtk_wed_device_active(&dev->mt76.mmio.wed));
2391 }
2392
mt7915_mcu_init(struct mt7915_dev * dev)2393 int mt7915_mcu_init(struct mt7915_dev *dev)
2394 {
2395 static const struct mt76_mcu_ops mt7915_mcu_ops = {
2396 .max_retry = 3,
2397 .headroom = sizeof(struct mt76_connac2_mcu_txd),
2398 .mcu_skb_prepare_msg = mt76_connac2_mcu_fill_message,
2399 .mcu_skb_send_msg = mt7915_mcu_send_message,
2400 .mcu_parse_response = mt7915_mcu_parse_response,
2401 };
2402
2403 dev->mt76.mcu_ops = &mt7915_mcu_ops;
2404
2405 return mt7915_mcu_init_firmware(dev);
2406 }
2407
mt7915_mcu_exit(struct mt7915_dev * dev)2408 void mt7915_mcu_exit(struct mt7915_dev *dev)
2409 {
2410 mt76_connac_mcu_restart(&dev->mt76);
2411 if (mt7915_firmware_state(dev, false)) {
2412 dev_err(dev->mt76.dev, "Failed to exit mcu\n");
2413 goto out;
2414 }
2415
2416 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN);
2417 if (dev->hif2)
2418 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1),
2419 MT_TOP_LPCR_HOST_FW_OWN);
2420 out:
2421 skb_queue_purge(&dev->mt76.mcu.res_q);
2422 }
2423
2424 static int
mt7915_mcu_set_rx_hdr_trans_blacklist(struct mt7915_dev * dev,int band)2425 mt7915_mcu_set_rx_hdr_trans_blacklist(struct mt7915_dev *dev, int band)
2426 {
2427 struct {
2428 u8 operation;
2429 u8 count;
2430 u8 _rsv[2];
2431 u8 index;
2432 u8 enable;
2433 __le16 etype;
2434 } req = {
2435 .operation = 1,
2436 .count = 1,
2437 .enable = 1,
2438 .etype = cpu_to_le16(ETH_P_PAE),
2439 };
2440
2441 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS),
2442 &req, sizeof(req), false);
2443 }
2444
mt7915_mcu_set_mac(struct mt7915_dev * dev,int band,bool enable,bool hdr_trans)2445 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band,
2446 bool enable, bool hdr_trans)
2447 {
2448 struct {
2449 u8 operation;
2450 u8 enable;
2451 u8 check_bssid;
2452 u8 insert_vlan;
2453 u8 remove_vlan;
2454 u8 tid;
2455 u8 mode;
2456 u8 rsv;
2457 } __packed req_trans = {
2458 .enable = hdr_trans,
2459 };
2460 struct {
2461 u8 enable;
2462 u8 band;
2463 u8 rsv[2];
2464 } __packed req_mac = {
2465 .enable = enable,
2466 .band = band,
2467 };
2468 int ret;
2469
2470 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS),
2471 &req_trans, sizeof(req_trans), false);
2472 if (ret)
2473 return ret;
2474
2475 if (hdr_trans)
2476 mt7915_mcu_set_rx_hdr_trans_blacklist(dev, band);
2477
2478 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MAC_INIT_CTRL),
2479 &req_mac, sizeof(req_mac), true);
2480 }
2481
mt7915_mcu_update_edca(struct mt7915_dev * dev,void * param)2482 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *param)
2483 {
2484 struct mt7915_mcu_tx *req = (struct mt7915_mcu_tx *)param;
2485 u8 num = req->total;
2486 size_t len = sizeof(*req) -
2487 (IEEE80211_NUM_ACS - num) * sizeof(struct edca);
2488
2489 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EDCA_UPDATE), req,
2490 len, true);
2491 }
2492
mt7915_mcu_set_tx(struct mt7915_dev * dev,struct ieee80211_vif * vif)2493 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif)
2494 {
2495 #define TX_CMD_MODE 1
2496 struct mt7915_mcu_tx req = {
2497 .valid = true,
2498 .mode = TX_CMD_MODE,
2499 .total = IEEE80211_NUM_ACS,
2500 };
2501 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
2502 int ac;
2503
2504 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
2505 struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac];
2506 struct edca *e = &req.edca[ac];
2507
2508 e->set = WMM_PARAM_SET;
2509 e->queue = ac + mvif->mt76.wmm_idx * MT76_CONNAC_MAX_WMM_SETS;
2510 e->aifs = q->aifs;
2511 e->txop = cpu_to_le16(q->txop);
2512
2513 if (q->cw_min)
2514 e->cw_min = fls(q->cw_min);
2515 else
2516 e->cw_min = 5;
2517
2518 if (q->cw_max)
2519 e->cw_max = cpu_to_le16(fls(q->cw_max));
2520 else
2521 e->cw_max = cpu_to_le16(10);
2522 }
2523
2524 return mt7915_mcu_update_edca(dev, &req);
2525 }
2526
mt7915_mcu_set_fcc5_lpn(struct mt7915_dev * dev,int val)2527 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val)
2528 {
2529 struct {
2530 __le32 tag;
2531 __le16 min_lpn;
2532 u8 rsv[2];
2533 } __packed req = {
2534 .tag = cpu_to_le32(0x1),
2535 .min_lpn = cpu_to_le16(val),
2536 };
2537
2538 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,
2539 sizeof(req), true);
2540 }
2541
mt7915_mcu_set_pulse_th(struct mt7915_dev * dev,const struct mt7915_dfs_pulse * pulse)2542 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev,
2543 const struct mt7915_dfs_pulse *pulse)
2544 {
2545 struct {
2546 __le32 tag;
2547
2548 __le32 max_width; /* us */
2549 __le32 max_pwr; /* dbm */
2550 __le32 min_pwr; /* dbm */
2551 __le32 min_stgr_pri; /* us */
2552 __le32 max_stgr_pri; /* us */
2553 __le32 min_cr_pri; /* us */
2554 __le32 max_cr_pri; /* us */
2555 } __packed req = {
2556 .tag = cpu_to_le32(0x3),
2557
2558 #define __req_field(field) .field = cpu_to_le32(pulse->field)
2559 __req_field(max_width),
2560 __req_field(max_pwr),
2561 __req_field(min_pwr),
2562 __req_field(min_stgr_pri),
2563 __req_field(max_stgr_pri),
2564 __req_field(min_cr_pri),
2565 __req_field(max_cr_pri),
2566 #undef __req_field
2567 };
2568
2569 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,
2570 sizeof(req), true);
2571 }
2572
mt7915_mcu_set_radar_th(struct mt7915_dev * dev,int index,const struct mt7915_dfs_pattern * pattern)2573 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index,
2574 const struct mt7915_dfs_pattern *pattern)
2575 {
2576 struct {
2577 __le32 tag;
2578 __le16 radar_type;
2579
2580 u8 enb;
2581 u8 stgr;
2582 u8 min_crpn;
2583 u8 max_crpn;
2584 u8 min_crpr;
2585 u8 min_pw;
2586 __le32 min_pri;
2587 __le32 max_pri;
2588 u8 max_pw;
2589 u8 min_crbn;
2590 u8 max_crbn;
2591 u8 min_stgpn;
2592 u8 max_stgpn;
2593 u8 min_stgpr;
2594 u8 rsv[2];
2595 __le32 min_stgpr_diff;
2596 } __packed req = {
2597 .tag = cpu_to_le32(0x2),
2598 .radar_type = cpu_to_le16(index),
2599
2600 #define __req_field_u8(field) .field = pattern->field
2601 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field)
2602 __req_field_u8(enb),
2603 __req_field_u8(stgr),
2604 __req_field_u8(min_crpn),
2605 __req_field_u8(max_crpn),
2606 __req_field_u8(min_crpr),
2607 __req_field_u8(min_pw),
2608 __req_field_u32(min_pri),
2609 __req_field_u32(max_pri),
2610 __req_field_u8(max_pw),
2611 __req_field_u8(min_crbn),
2612 __req_field_u8(max_crbn),
2613 __req_field_u8(min_stgpn),
2614 __req_field_u8(max_stgpn),
2615 __req_field_u8(min_stgpr),
2616 __req_field_u32(min_stgpr_diff),
2617 #undef __req_field_u8
2618 #undef __req_field_u32
2619 };
2620
2621 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,
2622 sizeof(req), true);
2623 }
2624
2625 static int
mt7915_mcu_background_chain_ctrl(struct mt7915_phy * phy,struct cfg80211_chan_def * chandef,int cmd)2626 mt7915_mcu_background_chain_ctrl(struct mt7915_phy *phy,
2627 struct cfg80211_chan_def *chandef,
2628 int cmd)
2629 {
2630 struct mt7915_dev *dev = phy->dev;
2631 struct mt76_phy *mphy = phy->mt76;
2632 struct ieee80211_channel *chan = mphy->chandef.chan;
2633 int freq = mphy->chandef.center_freq1;
2634 struct mt7915_mcu_background_chain_ctrl req = {
2635 .monitor_scan_type = 2, /* simple rx */
2636 };
2637
2638 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP)
2639 return -EINVAL;
2640
2641 if (!cfg80211_chandef_valid(&mphy->chandef))
2642 return -EINVAL;
2643
2644 switch (cmd) {
2645 case CH_SWITCH_BACKGROUND_SCAN_START: {
2646 req.chan = chan->hw_value;
2647 req.central_chan = ieee80211_frequency_to_channel(freq);
2648 req.bw = mt76_connac_chan_bw(&mphy->chandef);
2649 req.monitor_chan = chandef->chan->hw_value;
2650 req.monitor_central_chan =
2651 ieee80211_frequency_to_channel(chandef->center_freq1);
2652 req.monitor_bw = mt76_connac_chan_bw(chandef);
2653 req.band_idx = phy->mt76->band_idx;
2654 req.scan_mode = 1;
2655 break;
2656 }
2657 case CH_SWITCH_BACKGROUND_SCAN_RUNNING:
2658 req.monitor_chan = chandef->chan->hw_value;
2659 req.monitor_central_chan =
2660 ieee80211_frequency_to_channel(chandef->center_freq1);
2661 req.band_idx = phy->mt76->band_idx;
2662 req.scan_mode = 2;
2663 break;
2664 case CH_SWITCH_BACKGROUND_SCAN_STOP:
2665 req.chan = chan->hw_value;
2666 req.central_chan = ieee80211_frequency_to_channel(freq);
2667 req.bw = mt76_connac_chan_bw(&mphy->chandef);
2668 req.tx_stream = hweight8(mphy->antenna_mask);
2669 req.rx_stream = mphy->antenna_mask;
2670 break;
2671 default:
2672 return -EINVAL;
2673 }
2674 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1;
2675
2676 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(OFFCH_SCAN_CTRL),
2677 &req, sizeof(req), false);
2678 }
2679
mt7915_mcu_rdd_background_enable(struct mt7915_phy * phy,struct cfg80211_chan_def * chandef)2680 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,
2681 struct cfg80211_chan_def *chandef)
2682 {
2683 struct mt7915_dev *dev = phy->dev;
2684 int err, region;
2685
2686 if (!chandef) { /* disable offchain */
2687 err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, MT_RX_SEL2,
2688 0, 0);
2689 if (err)
2690 return err;
2691
2692 return mt7915_mcu_background_chain_ctrl(phy, NULL,
2693 CH_SWITCH_BACKGROUND_SCAN_STOP);
2694 }
2695
2696 err = mt7915_mcu_background_chain_ctrl(phy, chandef,
2697 CH_SWITCH_BACKGROUND_SCAN_START);
2698 if (err)
2699 return err;
2700
2701 switch (dev->mt76.region) {
2702 case NL80211_DFS_ETSI:
2703 region = 0;
2704 break;
2705 case NL80211_DFS_JP:
2706 region = 2;
2707 break;
2708 case NL80211_DFS_FCC:
2709 default:
2710 region = 1;
2711 break;
2712 }
2713
2714 return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_START, MT_RX_SEL2,
2715 0, region);
2716 }
2717
mt7915_mcu_set_chan_info(struct mt7915_phy * phy,int cmd)2718 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd)
2719 {
2720 static const u8 ch_band[] = {
2721 [NL80211_BAND_2GHZ] = 0,
2722 [NL80211_BAND_5GHZ] = 1,
2723 [NL80211_BAND_6GHZ] = 2,
2724 };
2725 struct mt7915_dev *dev = phy->dev;
2726 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
2727 int freq1 = chandef->center_freq1;
2728 u8 band = phy->mt76->band_idx;
2729 struct {
2730 u8 control_ch;
2731 u8 center_ch;
2732 u8 bw;
2733 u8 tx_path_num;
2734 u8 rx_path; /* mask or num */
2735 u8 switch_reason;
2736 u8 band_idx;
2737 u8 center_ch2; /* for 80+80 only */
2738 __le16 cac_case;
2739 u8 channel_band;
2740 u8 rsv0;
2741 __le32 outband_freq;
2742 u8 txpower_drop;
2743 u8 ap_bw;
2744 u8 ap_center_ch;
2745 u8 rsv1[57];
2746 } __packed req = {
2747 .control_ch = chandef->chan->hw_value,
2748 .center_ch = ieee80211_frequency_to_channel(freq1),
2749 .bw = mt76_connac_chan_bw(chandef),
2750 .tx_path_num = hweight16(phy->mt76->chainmask),
2751 .rx_path = phy->mt76->chainmask >> (dev->chainshift * band),
2752 .band_idx = band,
2753 .channel_band = ch_band[chandef->chan->band],
2754 };
2755
2756 #ifdef CONFIG_NL80211_TESTMODE
2757 if (phy->mt76->test.tx_antenna_mask &&
2758 mt76_testmode_enabled(phy->mt76)) {
2759 req.tx_path_num = fls(phy->mt76->test.tx_antenna_mask);
2760 req.rx_path = phy->mt76->test.tx_antenna_mask;
2761 }
2762 #endif
2763
2764 if (mt76_connac_spe_idx(phy->mt76->antenna_mask))
2765 req.tx_path_num = fls(phy->mt76->antenna_mask);
2766
2767 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR)
2768 req.switch_reason = CH_SWITCH_NORMAL;
2769 else if (phy->mt76->offchannel ||
2770 phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE)
2771 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD;
2772 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef,
2773 NL80211_IFTYPE_AP))
2774 req.switch_reason = CH_SWITCH_DFS;
2775 else
2776 req.switch_reason = CH_SWITCH_NORMAL;
2777
2778 if (cmd == MCU_EXT_CMD(CHANNEL_SWITCH))
2779 req.rx_path = hweight8(req.rx_path);
2780
2781 if (chandef->width == NL80211_CHAN_WIDTH_80P80) {
2782 int freq2 = chandef->center_freq2;
2783
2784 req.center_ch2 = ieee80211_frequency_to_channel(freq2);
2785 }
2786
2787 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), true);
2788 }
2789
mt7915_mcu_set_eeprom_flash(struct mt7915_dev * dev)2790 static int mt7915_mcu_set_eeprom_flash(struct mt7915_dev *dev)
2791 {
2792 #define MAX_PAGE_IDX_MASK GENMASK(7, 5)
2793 #define PAGE_IDX_MASK GENMASK(4, 2)
2794 #define PER_PAGE_SIZE 0x400
2795 struct mt7915_mcu_eeprom req = { .buffer_mode = EE_MODE_BUFFER };
2796 u16 eeprom_size = mt7915_eeprom_size(dev);
2797 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE);
2798 u8 *eep = (u8 *)dev->mt76.eeprom.data;
2799 int eep_len;
2800 int i;
2801
2802 for (i = 0; i < total; i++, eep += eep_len) {
2803 struct sk_buff *skb;
2804 int ret;
2805
2806 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE))
2807 eep_len = eeprom_size % PER_PAGE_SIZE;
2808 else
2809 eep_len = PER_PAGE_SIZE;
2810
2811 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL,
2812 sizeof(req) + eep_len);
2813 if (!skb)
2814 return -ENOMEM;
2815
2816 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) |
2817 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE;
2818 req.len = cpu_to_le16(eep_len);
2819
2820 skb_put_data(skb, &req, sizeof(req));
2821 skb_put_data(skb, eep, eep_len);
2822
2823 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
2824 MCU_EXT_CMD(EFUSE_BUFFER_MODE), true);
2825 if (ret)
2826 return ret;
2827 }
2828
2829 return 0;
2830 }
2831
mt7915_mcu_set_eeprom(struct mt7915_dev * dev)2832 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev)
2833 {
2834 struct mt7915_mcu_eeprom req = {
2835 .buffer_mode = EE_MODE_EFUSE,
2836 .format = EE_FORMAT_WHOLE,
2837 };
2838
2839 if (dev->flash_mode)
2840 return mt7915_mcu_set_eeprom_flash(dev);
2841
2842 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EFUSE_BUFFER_MODE),
2843 &req, sizeof(req), true);
2844 }
2845
mt7915_mcu_get_eeprom(struct mt7915_dev * dev,u32 offset)2846 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset)
2847 {
2848 struct mt7915_mcu_eeprom_info req = {
2849 .addr = cpu_to_le32(round_down(offset,
2850 MT7915_EEPROM_BLOCK_SIZE)),
2851 };
2852 struct mt7915_mcu_eeprom_info *res;
2853 struct sk_buff *skb;
2854 int ret;
2855 u8 *buf;
2856
2857 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
2858 MCU_EXT_QUERY(EFUSE_ACCESS),
2859 &req, sizeof(req), true, &skb);
2860 if (ret)
2861 return ret;
2862
2863 res = (struct mt7915_mcu_eeprom_info *)skb->data;
2864 buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr);
2865 memcpy(buf, res->data, MT7915_EEPROM_BLOCK_SIZE);
2866 dev_kfree_skb(skb);
2867
2868 return 0;
2869 }
2870
mt7915_mcu_get_eeprom_free_block(struct mt7915_dev * dev,u8 * block_num)2871 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num)
2872 {
2873 struct {
2874 u8 _rsv;
2875 u8 version;
2876 u8 die_idx;
2877 u8 _rsv2;
2878 } __packed req = {
2879 .version = 1,
2880 };
2881 struct sk_buff *skb;
2882 int ret;
2883
2884 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
2885 MCU_EXT_QUERY(EFUSE_FREE_BLOCK),
2886 &req, sizeof(req), true, &skb);
2887 if (ret)
2888 return ret;
2889
2890 *block_num = *(u8 *)skb->data;
2891 dev_kfree_skb(skb);
2892
2893 return 0;
2894 }
2895
mt7915_mcu_set_pre_cal(struct mt7915_dev * dev,u8 idx,u8 * data,u32 len,int cmd)2896 static int mt7915_mcu_set_pre_cal(struct mt7915_dev *dev, u8 idx,
2897 u8 *data, u32 len, int cmd)
2898 {
2899 struct {
2900 u8 dir;
2901 u8 valid;
2902 __le16 bitmap;
2903 s8 precal;
2904 u8 action;
2905 u8 band;
2906 u8 idx;
2907 u8 rsv[4];
2908 __le32 len;
2909 } req = {};
2910 struct sk_buff *skb;
2911
2912 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, sizeof(req) + len);
2913 if (!skb)
2914 return -ENOMEM;
2915
2916 req.idx = idx;
2917 req.len = cpu_to_le32(len);
2918 skb_put_data(skb, &req, sizeof(req));
2919 skb_put_data(skb, data, len);
2920
2921 return mt76_mcu_skb_send_msg(&dev->mt76, skb, cmd, false);
2922 }
2923
mt7915_mcu_apply_group_cal(struct mt7915_dev * dev)2924 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev)
2925 {
2926 u8 idx = 0, *cal = dev->cal, *eep = dev->mt76.eeprom.data;
2927 u32 total = mt7915_get_cal_group_size(dev);
2928 u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2;
2929
2930 if (!(eep[offs] & MT_EE_WIFI_CAL_GROUP))
2931 return 0;
2932
2933 /*
2934 * Items: Rx DCOC, RSSI DCOC, Tx TSSI DCOC, Tx LPFG
2935 * Tx FDIQ, Tx DCIQ, Rx FDIQ, Rx FIIQ, ADCDCOC
2936 */
2937 while (total > 0) {
2938 int ret, len;
2939
2940 len = min_t(u32, total, MT_EE_CAL_UNIT);
2941
2942 ret = mt7915_mcu_set_pre_cal(dev, idx, cal, len,
2943 MCU_EXT_CMD(GROUP_PRE_CAL_INFO));
2944 if (ret)
2945 return ret;
2946
2947 total -= len;
2948 cal += len;
2949 idx++;
2950 }
2951
2952 return 0;
2953 }
2954
mt7915_find_freq_idx(const u16 * freqs,int n_freqs,u16 cur)2955 static int mt7915_find_freq_idx(const u16 *freqs, int n_freqs, u16 cur)
2956 {
2957 int i;
2958
2959 for (i = 0; i < n_freqs; i++)
2960 if (cur == freqs[i])
2961 return i;
2962
2963 return -1;
2964 }
2965
mt7915_dpd_freq_idx(struct mt7915_dev * dev,u16 freq,u8 bw)2966 static int mt7915_dpd_freq_idx(struct mt7915_dev *dev, u16 freq, u8 bw)
2967 {
2968 static const u16 freq_list_v1[] = {
2969 5180, 5200, 5220, 5240,
2970 5260, 5280, 5300, 5320,
2971 5500, 5520, 5540, 5560,
2972 5580, 5600, 5620, 5640,
2973 5660, 5680, 5700, 5745,
2974 5765, 5785, 5805, 5825
2975 };
2976 static const u16 freq_list_v2[] = {
2977 /* 6G BW20*/
2978 5955, 5975, 5995, 6015,
2979 6035, 6055, 6075, 6095,
2980 6115, 6135, 6155, 6175,
2981 6195, 6215, 6235, 6255,
2982 6275, 6295, 6315, 6335,
2983 6355, 6375, 6395, 6415,
2984 6435, 6455, 6475, 6495,
2985 6515, 6535, 6555, 6575,
2986 6595, 6615, 6635, 6655,
2987 6675, 6695, 6715, 6735,
2988 6755, 6775, 6795, 6815,
2989 6835, 6855, 6875, 6895,
2990 6915, 6935, 6955, 6975,
2991 6995, 7015, 7035, 7055,
2992 7075, 7095, 7115,
2993 /* 6G BW160 */
2994 6025, 6185, 6345, 6505,
2995 6665, 6825, 6985,
2996 /* 5G BW20 */
2997 5180, 5200, 5220, 5240,
2998 5260, 5280, 5300, 5320,
2999 5500, 5520, 5540, 5560,
3000 5580, 5600, 5620, 5640,
3001 5660, 5680, 5700, 5720,
3002 5745, 5765, 5785, 5805,
3003 5825, 5845, 5865, 5885,
3004 /* 5G BW160 */
3005 5250, 5570, 5815
3006 };
3007 static const u16 freq_list_v2_7981[] = {
3008 /* 5G BW20 */
3009 5180, 5200, 5220, 5240,
3010 5260, 5280, 5300, 5320,
3011 5500, 5520, 5540, 5560,
3012 5580, 5600, 5620, 5640,
3013 5660, 5680, 5700, 5720,
3014 5745, 5765, 5785, 5805,
3015 5825, 5845, 5865, 5885,
3016 /* 5G BW160 */
3017 5250, 5570, 5815
3018 };
3019 const u16 *freq_list = freq_list_v1;
3020 int n_freqs = ARRAY_SIZE(freq_list_v1);
3021 int idx;
3022
3023 if (!is_mt7915(&dev->mt76)) {
3024 if (is_mt7981(&dev->mt76)) {
3025 freq_list = freq_list_v2_7981;
3026 n_freqs = ARRAY_SIZE(freq_list_v2_7981);
3027 } else {
3028 freq_list = freq_list_v2;
3029 n_freqs = ARRAY_SIZE(freq_list_v2);
3030 }
3031 }
3032
3033 if (freq < 4000) {
3034 if (freq < 2432)
3035 return n_freqs;
3036 if (freq < 2457)
3037 return n_freqs + 1;
3038
3039 return n_freqs + 2;
3040 }
3041
3042 if (bw == NL80211_CHAN_WIDTH_80P80)
3043 return -1;
3044
3045 if (bw != NL80211_CHAN_WIDTH_20) {
3046 idx = mt7915_find_freq_idx(freq_list, n_freqs, freq + 10);
3047 if (idx >= 0)
3048 return idx;
3049
3050 idx = mt7915_find_freq_idx(freq_list, n_freqs, freq - 10);
3051 if (idx >= 0)
3052 return idx;
3053 }
3054
3055 return mt7915_find_freq_idx(freq_list, n_freqs, freq);
3056 }
3057
mt7915_mcu_apply_tx_dpd(struct mt7915_phy * phy)3058 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy)
3059 {
3060 struct mt7915_dev *dev = phy->dev;
3061 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
3062 enum nl80211_band band = chandef->chan->band;
3063 u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2;
3064 u16 center_freq = chandef->center_freq1;
3065 u8 *cal = dev->cal, *eep = dev->mt76.eeprom.data;
3066 u8 dpd_mask, cal_num = is_mt7915(&dev->mt76) ? 2 : 3;
3067 int idx;
3068
3069 switch (band) {
3070 case NL80211_BAND_2GHZ:
3071 dpd_mask = MT_EE_WIFI_CAL_DPD_2G;
3072 break;
3073 case NL80211_BAND_5GHZ:
3074 dpd_mask = MT_EE_WIFI_CAL_DPD_5G;
3075 break;
3076 case NL80211_BAND_6GHZ:
3077 dpd_mask = MT_EE_WIFI_CAL_DPD_6G;
3078 break;
3079 default:
3080 dpd_mask = 0;
3081 break;
3082 }
3083
3084 if (!(eep[offs] & dpd_mask))
3085 return 0;
3086
3087 idx = mt7915_dpd_freq_idx(dev, center_freq, chandef->width);
3088 if (idx < 0)
3089 return -EINVAL;
3090
3091 /* Items: Tx DPD, Tx Flatness */
3092 idx = idx * cal_num;
3093 cal += mt7915_get_cal_group_size(dev) + (idx * MT_EE_CAL_UNIT);
3094
3095 while (cal_num--) {
3096 int ret;
3097
3098 ret = mt7915_mcu_set_pre_cal(dev, idx, cal, MT_EE_CAL_UNIT,
3099 MCU_EXT_CMD(DPD_PRE_CAL_INFO));
3100 if (ret)
3101 return ret;
3102
3103 idx++;
3104 cal += MT_EE_CAL_UNIT;
3105 }
3106
3107 return 0;
3108 }
3109
mt7915_mcu_get_chan_mib_info(struct mt7915_phy * phy,bool chan_switch)3110 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch)
3111 {
3112 struct mt76_channel_state *state = phy->mt76->chan_state;
3113 struct mt76_channel_state *state_ts = &phy->state_ts;
3114 struct mt7915_dev *dev = phy->dev;
3115 struct mt7915_mcu_mib *res, req[5];
3116 struct sk_buff *skb;
3117 static const u32 *offs;
3118 int i, ret, len, offs_cc;
3119 u64 cc_tx;
3120
3121 /* strict order */
3122 if (is_mt7915(&dev->mt76)) {
3123 static const u32 chip_offs[] = {
3124 MIB_NON_WIFI_TIME,
3125 MIB_TX_TIME,
3126 MIB_RX_TIME,
3127 MIB_OBSS_AIRTIME,
3128 MIB_TXOP_INIT_COUNT,
3129 };
3130 len = ARRAY_SIZE(chip_offs);
3131 offs = chip_offs;
3132 offs_cc = 20;
3133 } else {
3134 static const u32 chip_offs[] = {
3135 MIB_NON_WIFI_TIME_V2,
3136 MIB_TX_TIME_V2,
3137 MIB_RX_TIME_V2,
3138 MIB_OBSS_AIRTIME_V2
3139 };
3140 len = ARRAY_SIZE(chip_offs);
3141 offs = chip_offs;
3142 offs_cc = 0;
3143 }
3144
3145 for (i = 0; i < len; i++) {
3146 req[i].band = cpu_to_le32(phy->mt76->band_idx);
3147 req[i].offs = cpu_to_le32(offs[i]);
3148 }
3149
3150 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(GET_MIB_INFO),
3151 req, len * sizeof(req[0]), true, &skb);
3152 if (ret)
3153 return ret;
3154
3155 res = (struct mt7915_mcu_mib *)(skb->data + offs_cc);
3156
3157 #define __res_u64(s) le64_to_cpu(res[s].data)
3158 /* subtract Tx backoff time from Tx duration */
3159 cc_tx = is_mt7915(&dev->mt76) ? __res_u64(1) - __res_u64(4) : __res_u64(1);
3160
3161 if (chan_switch)
3162 goto out;
3163
3164 state->cc_tx += cc_tx - state_ts->cc_tx;
3165 state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx;
3166 state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx;
3167 state->cc_busy += __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3) -
3168 state_ts->cc_busy;
3169
3170 out:
3171 state_ts->cc_tx = cc_tx;
3172 state_ts->cc_bss_rx = __res_u64(2);
3173 state_ts->cc_rx = __res_u64(2) + __res_u64(3);
3174 state_ts->cc_busy = __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3);
3175 #undef __res_u64
3176
3177 dev_kfree_skb(skb);
3178
3179 return 0;
3180 }
3181
mt7915_mcu_get_temperature(struct mt7915_phy * phy)3182 int mt7915_mcu_get_temperature(struct mt7915_phy *phy)
3183 {
3184 struct mt7915_dev *dev = phy->dev;
3185 struct {
3186 u8 ctrl_id;
3187 u8 action;
3188 u8 band_idx;
3189 u8 rsv[5];
3190 } req = {
3191 .ctrl_id = THERMAL_SENSOR_TEMP_QUERY,
3192 .band_idx = phy->mt76->band_idx,
3193 };
3194
3195 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_CTRL), &req,
3196 sizeof(req), true);
3197 }
3198
mt7915_mcu_set_thermal_throttling(struct mt7915_phy * phy,u8 state)3199 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state)
3200 {
3201 struct mt7915_dev *dev = phy->dev;
3202 struct mt7915_mcu_thermal_ctrl req = {
3203 .band_idx = phy->mt76->band_idx,
3204 .ctrl_id = THERMAL_PROTECT_DUTY_CONFIG,
3205 };
3206 int level, ret;
3207
3208 /* set duty cycle and level */
3209 for (level = 0; level < 4; level++) {
3210 req.duty.duty_level = level;
3211 req.duty.duty_cycle = state;
3212 state /= 2;
3213
3214 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),
3215 &req, sizeof(req), false);
3216 if (ret)
3217 return ret;
3218 }
3219 return 0;
3220 }
3221
mt7915_mcu_set_thermal_protect(struct mt7915_phy * phy)3222 int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy)
3223 {
3224 struct mt7915_dev *dev = phy->dev;
3225 struct {
3226 struct mt7915_mcu_thermal_ctrl ctrl;
3227
3228 __le32 trigger_temp;
3229 __le32 restore_temp;
3230 __le16 sustain_time;
3231 u8 rsv[2];
3232 } __packed req = {
3233 .ctrl = {
3234 .band_idx = phy->mt76->band_idx,
3235 .type.protect_type = 1,
3236 .type.trigger_type = 1,
3237 },
3238 };
3239 int ret;
3240
3241 req.ctrl.ctrl_id = THERMAL_PROTECT_DISABLE;
3242 ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),
3243 &req, sizeof(req.ctrl), false);
3244
3245 if (ret)
3246 return ret;
3247
3248 /* set high-temperature trigger threshold */
3249 req.ctrl.ctrl_id = THERMAL_PROTECT_ENABLE;
3250 /* add a safety margin ~10 */
3251 req.restore_temp = cpu_to_le32(phy->throttle_temp[0] - 10);
3252 req.trigger_temp = cpu_to_le32(phy->throttle_temp[1]);
3253 req.sustain_time = cpu_to_le16(10);
3254
3255 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),
3256 &req, sizeof(req), false);
3257 }
3258
mt7915_mcu_set_txpower_frame_min(struct mt7915_phy * phy,s8 txpower)3259 int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower)
3260 {
3261 struct mt7915_dev *dev = phy->dev;
3262 struct {
3263 u8 format_id;
3264 u8 rsv;
3265 u8 band_idx;
3266 s8 txpower_min;
3267 } __packed req = {
3268 .format_id = TX_POWER_LIMIT_FRAME_MIN,
3269 .band_idx = phy->mt76->band_idx,
3270 .txpower_min = txpower * 2, /* 0.5db */
3271 };
3272
3273 return mt76_mcu_send_msg(&dev->mt76,
3274 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3275 sizeof(req), true);
3276 }
3277
mt7915_mcu_set_txpower_frame(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,s8 txpower)3278 int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy,
3279 struct ieee80211_vif *vif,
3280 struct ieee80211_sta *sta, s8 txpower)
3281 {
3282 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
3283 struct mt7915_dev *dev = phy->dev;
3284 struct mt76_phy *mphy = phy->mt76;
3285 struct {
3286 u8 format_id;
3287 u8 rsv[3];
3288 u8 band_idx;
3289 s8 txpower_max;
3290 __le16 wcid;
3291 s8 txpower_offs[48];
3292 } __packed req = {
3293 .format_id = TX_POWER_LIMIT_FRAME,
3294 .band_idx = phy->mt76->band_idx,
3295 .txpower_max = DIV_ROUND_UP(mphy->txpower_cur, 2),
3296 .wcid = cpu_to_le16(msta->wcid.idx),
3297 };
3298 int ret;
3299 s8 txpower_sku[MT7915_SKU_RATE_NUM];
3300
3301 ret = mt7915_mcu_get_txpower_sku(phy, txpower_sku, sizeof(txpower_sku));
3302 if (ret)
3303 return ret;
3304
3305 txpower = mt7915_get_power_bound(phy, txpower);
3306 if (txpower > mphy->txpower_cur || txpower < 0)
3307 return -EINVAL;
3308
3309 if (txpower) {
3310 u32 offs, len, i;
3311
3312 if (sta->deflink.ht_cap.ht_supported) {
3313 const u8 *sku_len = mt7915_sku_group_len;
3314
3315 offs = sku_len[SKU_CCK] + sku_len[SKU_OFDM];
3316 len = sku_len[SKU_HT_BW20] + sku_len[SKU_HT_BW40];
3317
3318 if (sta->deflink.vht_cap.vht_supported) {
3319 offs += len;
3320 len = sku_len[SKU_VHT_BW20] * 4;
3321
3322 if (sta->deflink.he_cap.has_he) {
3323 offs += len + sku_len[SKU_HE_RU26] * 3;
3324 len = sku_len[SKU_HE_RU242] * 4;
3325 }
3326 }
3327 } else {
3328 return -EINVAL;
3329 }
3330
3331 for (i = 0; i < len; i++, offs++)
3332 req.txpower_offs[i] =
3333 DIV_ROUND_UP(txpower - txpower_sku[offs], 2);
3334 }
3335
3336 return mt76_mcu_send_msg(&dev->mt76,
3337 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3338 sizeof(req), true);
3339 }
3340
mt7915_mcu_set_txpower_sku(struct mt7915_phy * phy)3341 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy)
3342 {
3343 struct mt7915_dev *dev = phy->dev;
3344 struct mt76_phy *mphy = phy->mt76;
3345 struct ieee80211_hw *hw = mphy->hw;
3346 struct mt7915_mcu_txpower_sku req = {
3347 .format_id = TX_POWER_LIMIT_TABLE,
3348 .band_idx = phy->mt76->band_idx,
3349 };
3350 struct mt76_power_limits limits_array;
3351 s8 *la = (s8 *)&limits_array;
3352 int i, idx;
3353 int tx_power;
3354
3355 tx_power = mt7915_get_power_bound(phy, hw->conf.power_level);
3356 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan,
3357 &limits_array, tx_power);
3358 mphy->txpower_cur = tx_power;
3359
3360 for (i = 0, idx = 0; i < ARRAY_SIZE(mt7915_sku_group_len); i++) {
3361 u8 mcs_num, len = mt7915_sku_group_len[i];
3362 int j;
3363
3364 if (i >= SKU_HT_BW20 && i <= SKU_VHT_BW160) {
3365 mcs_num = 10;
3366
3367 if (i == SKU_HT_BW20 || i == SKU_VHT_BW20)
3368 la = (s8 *)&limits_array + 12;
3369 } else {
3370 mcs_num = len;
3371 }
3372
3373 for (j = 0; j < min_t(u8, mcs_num, len); j++)
3374 req.txpower_sku[idx + j] = la[j];
3375
3376 la += mcs_num;
3377 idx += len;
3378 }
3379
3380 return mt76_mcu_send_msg(&dev->mt76,
3381 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3382 sizeof(req), true);
3383 }
3384
mt7915_mcu_get_txpower_sku(struct mt7915_phy * phy,s8 * txpower,int len)3385 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len)
3386 {
3387 #define RATE_POWER_INFO 2
3388 struct mt7915_dev *dev = phy->dev;
3389 struct {
3390 u8 format_id;
3391 u8 category;
3392 u8 band_idx;
3393 u8 _rsv;
3394 } __packed req = {
3395 .format_id = TX_POWER_LIMIT_INFO,
3396 .category = RATE_POWER_INFO,
3397 .band_idx = phy->mt76->band_idx,
3398 };
3399 s8 txpower_sku[MT7915_SKU_RATE_NUM][2];
3400 struct sk_buff *skb;
3401 int ret, i;
3402
3403 ret = mt76_mcu_send_and_get_msg(&dev->mt76,
3404 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL),
3405 &req, sizeof(req), true, &skb);
3406 if (ret)
3407 return ret;
3408
3409 memcpy(txpower_sku, skb->data + 4, sizeof(txpower_sku));
3410 for (i = 0; i < len; i++)
3411 txpower[i] = txpower_sku[i][req.band_idx];
3412
3413 dev_kfree_skb(skb);
3414
3415 return 0;
3416 }
3417
mt7915_mcu_set_test_param(struct mt7915_dev * dev,u8 param,bool test_mode,u8 en)3418 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode,
3419 u8 en)
3420 {
3421 struct {
3422 u8 test_mode_en;
3423 u8 param_idx;
3424 u8 _rsv[2];
3425
3426 u8 enable;
3427 u8 _rsv2[3];
3428
3429 u8 pad[8];
3430 } __packed req = {
3431 .test_mode_en = test_mode,
3432 .param_idx = param,
3433 .enable = en,
3434 };
3435
3436 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req,
3437 sizeof(req), false);
3438 }
3439
mt7915_mcu_set_sku_en(struct mt7915_phy * phy,bool enable)3440 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable)
3441 {
3442 struct mt7915_dev *dev = phy->dev;
3443 struct mt7915_sku {
3444 u8 format_id;
3445 u8 sku_enable;
3446 u8 band_idx;
3447 u8 rsv;
3448 } __packed req = {
3449 .format_id = TX_POWER_LIMIT_ENABLE,
3450 .band_idx = phy->mt76->band_idx,
3451 .sku_enable = enable,
3452 };
3453
3454 return mt76_mcu_send_msg(&dev->mt76,
3455 MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,
3456 sizeof(req), true);
3457 }
3458
mt7915_mcu_set_ser(struct mt7915_dev * dev,u8 action,u8 set,u8 band)3459 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band)
3460 {
3461 struct {
3462 u8 action;
3463 u8 set;
3464 u8 band;
3465 u8 rsv;
3466 } req = {
3467 .action = action,
3468 .set = set,
3469 .band = band,
3470 };
3471
3472 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SER_TRIGGER),
3473 &req, sizeof(req), false);
3474 }
3475
mt7915_mcu_set_txbf(struct mt7915_dev * dev,u8 action)3476 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action)
3477 {
3478 struct {
3479 u8 action;
3480 union {
3481 struct {
3482 u8 snd_mode;
3483 u8 sta_num;
3484 u8 rsv;
3485 u8 wlan_idx[4];
3486 __le32 snd_period; /* ms */
3487 } __packed snd;
3488 struct {
3489 bool ebf;
3490 bool ibf;
3491 u8 rsv;
3492 } __packed type;
3493 struct {
3494 u8 bf_num;
3495 u8 bf_bitmap;
3496 u8 bf_sel[8];
3497 u8 rsv[5];
3498 } __packed mod;
3499 };
3500 } __packed req = {
3501 .action = action,
3502 };
3503
3504 #define MT_BF_PROCESSING 4
3505 switch (action) {
3506 case MT_BF_SOUNDING_ON:
3507 req.snd.snd_mode = MT_BF_PROCESSING;
3508 break;
3509 case MT_BF_TYPE_UPDATE:
3510 req.type.ebf = true;
3511 req.type.ibf = dev->ibf;
3512 break;
3513 case MT_BF_MODULE_UPDATE:
3514 req.mod.bf_num = 2;
3515 req.mod.bf_bitmap = GENMASK(1, 0);
3516 break;
3517 default:
3518 return -EINVAL;
3519 }
3520
3521 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req,
3522 sizeof(req), true);
3523 }
3524
3525 static int
mt7915_mcu_enable_obss_spr(struct mt7915_phy * phy,u8 action,u8 val)3526 mt7915_mcu_enable_obss_spr(struct mt7915_phy *phy, u8 action, u8 val)
3527 {
3528 struct mt7915_dev *dev = phy->dev;
3529 struct mt7915_mcu_sr_ctrl req = {
3530 .action = action,
3531 .argnum = 1,
3532 .band_idx = phy->mt76->band_idx,
3533 .val = cpu_to_le32(val),
3534 };
3535
3536 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3537 sizeof(req), true);
3538 }
3539
3540 static int
mt7915_mcu_set_obss_spr_pd(struct mt7915_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)3541 mt7915_mcu_set_obss_spr_pd(struct mt7915_phy *phy,
3542 struct ieee80211_he_obss_pd *he_obss_pd)
3543 {
3544 struct mt7915_dev *dev = phy->dev;
3545 struct {
3546 struct mt7915_mcu_sr_ctrl ctrl;
3547 struct {
3548 u8 pd_th_non_srg;
3549 u8 pd_th_srg;
3550 u8 period_offs;
3551 u8 rcpi_src;
3552 __le16 obss_pd_min;
3553 __le16 obss_pd_min_srg;
3554 u8 resp_txpwr_mode;
3555 u8 txpwr_restrict_mode;
3556 u8 txpwr_ref;
3557 u8 rsv[3];
3558 } __packed param;
3559 } __packed req = {
3560 .ctrl = {
3561 .action = SPR_SET_PARAM,
3562 .argnum = 9,
3563 .band_idx = phy->mt76->band_idx,
3564 },
3565 };
3566 int ret;
3567 u8 max_th = 82, non_srg_max_th = 62;
3568
3569 /* disable firmware dynamical PD asjustment */
3570 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_DPD, false);
3571 if (ret)
3572 return ret;
3573
3574 if (he_obss_pd->sr_ctrl &
3575 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED)
3576 req.param.pd_th_non_srg = max_th;
3577 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT)
3578 req.param.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset;
3579 else
3580 req.param.pd_th_non_srg = non_srg_max_th;
3581
3582 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT)
3583 req.param.pd_th_srg = max_th - he_obss_pd->max_offset;
3584
3585 req.param.obss_pd_min = cpu_to_le16(82);
3586 req.param.obss_pd_min_srg = cpu_to_le16(82);
3587 req.param.txpwr_restrict_mode = 2;
3588 req.param.txpwr_ref = 21;
3589
3590 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3591 sizeof(req), true);
3592 }
3593
3594 static int
mt7915_mcu_set_obss_spr_siga(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)3595 mt7915_mcu_set_obss_spr_siga(struct mt7915_phy *phy, struct ieee80211_vif *vif,
3596 struct ieee80211_he_obss_pd *he_obss_pd)
3597 {
3598 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
3599 struct mt7915_dev *dev = phy->dev;
3600 u8 omac = mvif->mt76.omac_idx;
3601 struct {
3602 struct mt7915_mcu_sr_ctrl ctrl;
3603 struct {
3604 u8 omac;
3605 u8 rsv[3];
3606 u8 flag[20];
3607 } __packed siga;
3608 } __packed req = {
3609 .ctrl = {
3610 .action = SPR_SET_SIGA,
3611 .argnum = 1,
3612 .band_idx = phy->mt76->band_idx,
3613 },
3614 .siga = {
3615 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac,
3616 },
3617 };
3618 int ret;
3619
3620 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED)
3621 req.siga.flag[req.siga.omac] = 0xf;
3622 else
3623 return 0;
3624
3625 /* switch to normal AP mode */
3626 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_MODE, 0);
3627 if (ret)
3628 return ret;
3629
3630 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3631 sizeof(req), true);
3632 }
3633
3634 static int
mt7915_mcu_set_obss_spr_bitmap(struct mt7915_phy * phy,struct ieee80211_he_obss_pd * he_obss_pd)3635 mt7915_mcu_set_obss_spr_bitmap(struct mt7915_phy *phy,
3636 struct ieee80211_he_obss_pd *he_obss_pd)
3637 {
3638 struct mt7915_dev *dev = phy->dev;
3639 struct {
3640 struct mt7915_mcu_sr_ctrl ctrl;
3641 struct {
3642 __le32 color_l[2];
3643 __le32 color_h[2];
3644 __le32 bssid_l[2];
3645 __le32 bssid_h[2];
3646 } __packed bitmap;
3647 } __packed req = {
3648 .ctrl = {
3649 .action = SPR_SET_SRG_BITMAP,
3650 .argnum = 4,
3651 .band_idx = phy->mt76->band_idx,
3652 },
3653 };
3654 u32 bitmap;
3655
3656 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap));
3657 req.bitmap.color_l[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3658
3659 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap));
3660 req.bitmap.color_h[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3661
3662 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap));
3663 req.bitmap.bssid_l[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3664
3665 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap));
3666 req.bitmap.bssid_h[req.ctrl.band_idx] = cpu_to_le32(bitmap);
3667
3668 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,
3669 sizeof(req), true);
3670 }
3671
mt7915_mcu_add_obss_spr(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_he_obss_pd * he_obss_pd)3672 int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif,
3673 struct ieee80211_he_obss_pd *he_obss_pd)
3674 {
3675 int ret;
3676
3677 /* enable firmware scene detection algorithms */
3678 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_SD, sr_scene_detect);
3679 if (ret)
3680 return ret;
3681
3682 /* firmware dynamically adjusts PD threshold so skip manual control */
3683 if (sr_scene_detect && !he_obss_pd->enable)
3684 return 0;
3685
3686 /* enable spatial reuse */
3687 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE, he_obss_pd->enable);
3688 if (ret)
3689 return ret;
3690
3691 if (sr_scene_detect || !he_obss_pd->enable)
3692 return 0;
3693
3694 ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_TX, true);
3695 if (ret)
3696 return ret;
3697
3698 /* set SRG/non-SRG OBSS PD threshold */
3699 ret = mt7915_mcu_set_obss_spr_pd(phy, he_obss_pd);
3700 if (ret)
3701 return ret;
3702
3703 /* Set SR prohibit */
3704 ret = mt7915_mcu_set_obss_spr_siga(phy, vif, he_obss_pd);
3705 if (ret)
3706 return ret;
3707
3708 /* set SRG BSS color/BSSID bitmap */
3709 return mt7915_mcu_set_obss_spr_bitmap(phy, he_obss_pd);
3710 }
3711
mt7915_mcu_get_rx_rate(struct mt7915_phy * phy,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct rate_info * rate)3712 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,
3713 struct ieee80211_sta *sta, struct rate_info *rate)
3714 {
3715 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
3716 struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;
3717 struct mt7915_dev *dev = phy->dev;
3718 struct mt76_phy *mphy = phy->mt76;
3719 struct {
3720 u8 category;
3721 u8 band;
3722 __le16 wcid;
3723 } __packed req = {
3724 .category = MCU_PHY_STATE_CONTENTION_RX_RATE,
3725 .band = mvif->mt76.band_idx,
3726 .wcid = cpu_to_le16(msta->wcid.idx),
3727 };
3728 struct ieee80211_supported_band *sband;
3729 struct mt7915_mcu_phy_rx_info *res;
3730 struct sk_buff *skb;
3731 int ret;
3732 bool cck = false;
3733
3734 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(PHY_STAT_INFO),
3735 &req, sizeof(req), true, &skb);
3736 if (ret)
3737 return ret;
3738
3739 res = (struct mt7915_mcu_phy_rx_info *)skb->data;
3740
3741 rate->mcs = res->rate;
3742 rate->nss = res->nsts + 1;
3743
3744 switch (res->mode) {
3745 case MT_PHY_TYPE_CCK:
3746 cck = true;
3747 fallthrough;
3748 case MT_PHY_TYPE_OFDM:
3749 if (mphy->chandef.chan->band == NL80211_BAND_5GHZ)
3750 sband = &mphy->sband_5g.sband;
3751 else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ)
3752 sband = &mphy->sband_6g.sband;
3753 else
3754 sband = &mphy->sband_2g.sband;
3755
3756 rate->mcs = mt76_get_rate(&dev->mt76, sband, rate->mcs, cck);
3757 rate->legacy = sband->bitrates[rate->mcs].bitrate;
3758 break;
3759 case MT_PHY_TYPE_HT:
3760 case MT_PHY_TYPE_HT_GF:
3761 if (rate->mcs > 31) {
3762 ret = -EINVAL;
3763 goto out;
3764 }
3765
3766 rate->flags = RATE_INFO_FLAGS_MCS;
3767 if (res->gi)
3768 rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
3769 break;
3770 case MT_PHY_TYPE_VHT:
3771 if (rate->mcs > 9) {
3772 ret = -EINVAL;
3773 goto out;
3774 }
3775
3776 rate->flags = RATE_INFO_FLAGS_VHT_MCS;
3777 if (res->gi)
3778 rate->flags |= RATE_INFO_FLAGS_SHORT_GI;
3779 break;
3780 case MT_PHY_TYPE_HE_SU:
3781 case MT_PHY_TYPE_HE_EXT_SU:
3782 case MT_PHY_TYPE_HE_TB:
3783 case MT_PHY_TYPE_HE_MU:
3784 if (res->gi > NL80211_RATE_INFO_HE_GI_3_2 || rate->mcs > 11) {
3785 ret = -EINVAL;
3786 goto out;
3787 }
3788 rate->he_gi = res->gi;
3789 rate->flags = RATE_INFO_FLAGS_HE_MCS;
3790 break;
3791 default:
3792 ret = -EINVAL;
3793 goto out;
3794 }
3795
3796 switch (res->bw) {
3797 case IEEE80211_STA_RX_BW_160:
3798 rate->bw = RATE_INFO_BW_160;
3799 break;
3800 case IEEE80211_STA_RX_BW_80:
3801 rate->bw = RATE_INFO_BW_80;
3802 break;
3803 case IEEE80211_STA_RX_BW_40:
3804 rate->bw = RATE_INFO_BW_40;
3805 break;
3806 default:
3807 rate->bw = RATE_INFO_BW_20;
3808 break;
3809 }
3810
3811 out:
3812 dev_kfree_skb(skb);
3813
3814 return ret;
3815 }
3816
mt7915_mcu_update_bss_color(struct mt7915_dev * dev,struct ieee80211_vif * vif,struct cfg80211_he_bss_color * he_bss_color)3817 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif,
3818 struct cfg80211_he_bss_color *he_bss_color)
3819 {
3820 int len = sizeof(struct sta_req_hdr) + sizeof(struct bss_info_color);
3821 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
3822 struct bss_info_color *bss_color;
3823 struct sk_buff *skb;
3824 struct tlv *tlv;
3825
3826 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,
3827 NULL, len);
3828 if (IS_ERR(skb))
3829 return PTR_ERR(skb);
3830
3831 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BSS_COLOR,
3832 sizeof(*bss_color));
3833 bss_color = (struct bss_info_color *)tlv;
3834 bss_color->disable = !he_bss_color->enabled;
3835 bss_color->color = he_bss_color->color;
3836
3837 return mt76_mcu_skb_send_msg(&dev->mt76, skb,
3838 MCU_EXT_CMD(BSS_INFO_UPDATE), true);
3839 }
3840
3841 #define TWT_AGRT_TRIGGER BIT(0)
3842 #define TWT_AGRT_ANNOUNCE BIT(1)
3843 #define TWT_AGRT_PROTECT BIT(2)
3844
mt7915_mcu_twt_agrt_update(struct mt7915_dev * dev,struct mt7915_vif * mvif,struct mt7915_twt_flow * flow,int cmd)3845 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,
3846 struct mt7915_vif *mvif,
3847 struct mt7915_twt_flow *flow,
3848 int cmd)
3849 {
3850 struct {
3851 u8 tbl_idx;
3852 u8 cmd;
3853 u8 own_mac_idx;
3854 u8 flowid; /* 0xff for group id */
3855 __le16 peer_id; /* specify the peer_id (msb=0)
3856 * or group_id (msb=1)
3857 */
3858 u8 duration; /* 256 us */
3859 u8 bss_idx;
3860 __le64 start_tsf;
3861 __le16 mantissa;
3862 u8 exponent;
3863 u8 is_ap;
3864 u8 agrt_params;
3865 u8 rsv[23];
3866 } __packed req = {
3867 .tbl_idx = flow->table_id,
3868 .cmd = cmd,
3869 .own_mac_idx = mvif->mt76.omac_idx,
3870 .flowid = flow->id,
3871 .peer_id = cpu_to_le16(flow->wcid),
3872 .duration = flow->duration,
3873 .bss_idx = mvif->mt76.idx,
3874 .start_tsf = cpu_to_le64(flow->tsf),
3875 .mantissa = flow->mantissa,
3876 .exponent = flow->exp,
3877 .is_ap = true,
3878 };
3879
3880 if (flow->protection)
3881 req.agrt_params |= TWT_AGRT_PROTECT;
3882 if (!flow->flowtype)
3883 req.agrt_params |= TWT_AGRT_ANNOUNCE;
3884 if (flow->trigger)
3885 req.agrt_params |= TWT_AGRT_TRIGGER;
3886
3887 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TWT_AGRT_UPDATE),
3888 &req, sizeof(req), true);
3889 }
3890
mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev * dev,u16 wlan_idx)3891 int mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev *dev, u16 wlan_idx)
3892 {
3893 struct {
3894 __le32 cmd;
3895 __le32 arg0;
3896 __le32 arg1;
3897 __le16 arg2;
3898 } __packed req = {
3899 .cmd = cpu_to_le32(0x15),
3900 };
3901 struct mt7915_mcu_wa_tx_stat {
3902 __le16 wcid;
3903 u8 __rsv2[2];
3904
3905 /* tx_bytes is deprecated since WA byte counter uses u32,
3906 * which easily leads to overflow.
3907 */
3908 __le32 tx_bytes;
3909 __le32 tx_packets;
3910 } __packed *res;
3911 struct mt76_wcid *wcid;
3912 struct sk_buff *skb;
3913 int ret, len;
3914 u16 ret_wcid;
3915
3916 if (is_mt7915(&dev->mt76)) {
3917 req.arg0 = cpu_to_le32(wlan_idx);
3918 len = sizeof(req) - sizeof(req.arg2);
3919 } else {
3920 req.arg0 = cpu_to_le32(1);
3921 req.arg2 = cpu_to_le16(wlan_idx);
3922 len = sizeof(req);
3923 }
3924
3925 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WA_PARAM_CMD(QUERY),
3926 &req, len, true, &skb);
3927 if (ret)
3928 return ret;
3929
3930 if (!is_mt7915(&dev->mt76))
3931 skb_pull(skb, 4);
3932
3933 res = (struct mt7915_mcu_wa_tx_stat *)skb->data;
3934
3935 ret_wcid = le16_to_cpu(res->wcid);
3936 if (is_mt7915(&dev->mt76))
3937 ret_wcid &= 0xff;
3938
3939 if (ret_wcid != wlan_idx) {
3940 ret = -EINVAL;
3941 goto out;
3942 }
3943
3944 rcu_read_lock();
3945
3946 wcid = rcu_dereference(dev->mt76.wcid[wlan_idx]);
3947 if (wcid)
3948 wcid->stats.tx_packets += le32_to_cpu(res->tx_packets);
3949 else
3950 ret = -EINVAL;
3951
3952 rcu_read_unlock();
3953 out:
3954 dev_kfree_skb(skb);
3955
3956 return ret;
3957 }
3958
mt7915_mcu_rf_regval(struct mt7915_dev * dev,u32 regidx,u32 * val,bool set)3959 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set)
3960 {
3961 struct {
3962 __le32 idx;
3963 __le32 ofs;
3964 __le32 data;
3965 } __packed req = {
3966 .idx = cpu_to_le32(u32_get_bits(regidx, GENMASK(31, 24))),
3967 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))),
3968 .data = set ? cpu_to_le32(*val) : 0,
3969 };
3970 struct sk_buff *skb;
3971 int ret;
3972
3973 if (set)
3974 return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_REG_ACCESS),
3975 &req, sizeof(req), false);
3976
3977 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(RF_REG_ACCESS),
3978 &req, sizeof(req), true, &skb);
3979 if (ret)
3980 return ret;
3981
3982 *val = le32_to_cpu(*(__le32 *)(skb->data + 8));
3983 dev_kfree_skb(skb);
3984
3985 return 0;
3986 }
3987