1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * NVM Express device driver
4 * Copyright (c) 2011-2014, Intel Corporation.
5 */
6
7 #include <linux/async.h>
8 #include <linux/blkdev.h>
9 #include <linux/blk-mq.h>
10 #include <linux/blk-integrity.h>
11 #include <linux/compat.h>
12 #include <linux/delay.h>
13 #include <linux/errno.h>
14 #include <linux/hdreg.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/backing-dev.h>
18 #include <linux/slab.h>
19 #include <linux/types.h>
20 #include <linux/pr.h>
21 #include <linux/ptrace.h>
22 #include <linux/nvme_ioctl.h>
23 #include <linux/pm_qos.h>
24 #include <linux/ratelimit.h>
25 #include <linux/unaligned.h>
26
27 #include "nvme.h"
28 #include "fabrics.h"
29 #include <linux/nvme-auth.h>
30
31 #define CREATE_TRACE_POINTS
32 #include "trace.h"
33
34 #define NVME_MINORS (1U << MINORBITS)
35
36 struct nvme_ns_info {
37 struct nvme_ns_ids ids;
38 u32 nsid;
39 __le32 anagrpid;
40 u8 pi_offset;
41 bool is_shared;
42 bool is_readonly;
43 bool is_ready;
44 bool is_removed;
45 };
46
47 unsigned int admin_timeout = 60;
48 module_param(admin_timeout, uint, 0644);
49 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
50 EXPORT_SYMBOL_GPL(admin_timeout);
51
52 unsigned int nvme_io_timeout = 30;
53 module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
54 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
55 EXPORT_SYMBOL_GPL(nvme_io_timeout);
56
57 static unsigned char shutdown_timeout = 5;
58 module_param(shutdown_timeout, byte, 0644);
59 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
60
61 static u8 nvme_max_retries = 5;
62 module_param_named(max_retries, nvme_max_retries, byte, 0644);
63 MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
64
65 static unsigned long default_ps_max_latency_us = 100000;
66 module_param(default_ps_max_latency_us, ulong, 0644);
67 MODULE_PARM_DESC(default_ps_max_latency_us,
68 "max power saving latency for new devices; use PM QOS to change per device");
69
70 static bool force_apst;
71 module_param(force_apst, bool, 0644);
72 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
73
74 static unsigned long apst_primary_timeout_ms = 100;
75 module_param(apst_primary_timeout_ms, ulong, 0644);
76 MODULE_PARM_DESC(apst_primary_timeout_ms,
77 "primary APST timeout in ms");
78
79 static unsigned long apst_secondary_timeout_ms = 2000;
80 module_param(apst_secondary_timeout_ms, ulong, 0644);
81 MODULE_PARM_DESC(apst_secondary_timeout_ms,
82 "secondary APST timeout in ms");
83
84 static unsigned long apst_primary_latency_tol_us = 15000;
85 module_param(apst_primary_latency_tol_us, ulong, 0644);
86 MODULE_PARM_DESC(apst_primary_latency_tol_us,
87 "primary APST latency tolerance in us");
88
89 static unsigned long apst_secondary_latency_tol_us = 100000;
90 module_param(apst_secondary_latency_tol_us, ulong, 0644);
91 MODULE_PARM_DESC(apst_secondary_latency_tol_us,
92 "secondary APST latency tolerance in us");
93
94 /*
95 * Older kernels didn't enable protection information if it was at an offset.
96 * Newer kernels do, so it breaks reads on the upgrade if such formats were
97 * used in prior kernels since the metadata written did not contain a valid
98 * checksum.
99 */
100 static bool disable_pi_offsets = false;
101 module_param(disable_pi_offsets, bool, 0444);
102 MODULE_PARM_DESC(disable_pi_offsets,
103 "disable protection information if it has an offset");
104
105 /*
106 * nvme_wq - hosts nvme related works that are not reset or delete
107 * nvme_reset_wq - hosts nvme reset works
108 * nvme_delete_wq - hosts nvme delete works
109 *
110 * nvme_wq will host works such as scan, aen handling, fw activation,
111 * keep-alive, periodic reconnects etc. nvme_reset_wq
112 * runs reset works which also flush works hosted on nvme_wq for
113 * serialization purposes. nvme_delete_wq host controller deletion
114 * works which flush reset works for serialization.
115 */
116 struct workqueue_struct *nvme_wq;
117 EXPORT_SYMBOL_GPL(nvme_wq);
118
119 struct workqueue_struct *nvme_reset_wq;
120 EXPORT_SYMBOL_GPL(nvme_reset_wq);
121
122 struct workqueue_struct *nvme_delete_wq;
123 EXPORT_SYMBOL_GPL(nvme_delete_wq);
124
125 static LIST_HEAD(nvme_subsystems);
126 DEFINE_MUTEX(nvme_subsystems_lock);
127
128 static DEFINE_IDA(nvme_instance_ida);
129 static dev_t nvme_ctrl_base_chr_devt;
130 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env);
131 static const struct class nvme_class = {
132 .name = "nvme",
133 .dev_uevent = nvme_class_uevent,
134 };
135
136 static const struct class nvme_subsys_class = {
137 .name = "nvme-subsystem",
138 };
139
140 static DEFINE_IDA(nvme_ns_chr_minor_ida);
141 static dev_t nvme_ns_chr_devt;
142 static const struct class nvme_ns_chr_class = {
143 .name = "nvme-generic",
144 };
145
146 static void nvme_put_subsystem(struct nvme_subsystem *subsys);
147 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
148 unsigned nsid);
149 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
150 struct nvme_command *cmd);
151
nvme_queue_scan(struct nvme_ctrl * ctrl)152 void nvme_queue_scan(struct nvme_ctrl *ctrl)
153 {
154 /*
155 * Only new queue scan work when admin and IO queues are both alive
156 */
157 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset)
158 queue_work(nvme_wq, &ctrl->scan_work);
159 }
160
161 /*
162 * Use this function to proceed with scheduling reset_work for a controller
163 * that had previously been set to the resetting state. This is intended for
164 * code paths that can't be interrupted by other reset attempts. A hot removal
165 * may prevent this from succeeding.
166 */
nvme_try_sched_reset(struct nvme_ctrl * ctrl)167 int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
168 {
169 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING)
170 return -EBUSY;
171 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
172 return -EBUSY;
173 return 0;
174 }
175 EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
176
nvme_failfast_work(struct work_struct * work)177 static void nvme_failfast_work(struct work_struct *work)
178 {
179 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
180 struct nvme_ctrl, failfast_work);
181
182 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING)
183 return;
184
185 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
186 dev_info(ctrl->device, "failfast expired\n");
187 nvme_kick_requeue_lists(ctrl);
188 }
189
nvme_start_failfast_work(struct nvme_ctrl * ctrl)190 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
191 {
192 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
193 return;
194
195 schedule_delayed_work(&ctrl->failfast_work,
196 ctrl->opts->fast_io_fail_tmo * HZ);
197 }
198
nvme_stop_failfast_work(struct nvme_ctrl * ctrl)199 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
200 {
201 if (!ctrl->opts)
202 return;
203
204 cancel_delayed_work_sync(&ctrl->failfast_work);
205 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
206 }
207
208
nvme_reset_ctrl(struct nvme_ctrl * ctrl)209 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
210 {
211 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
212 return -EBUSY;
213 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
214 return -EBUSY;
215 return 0;
216 }
217 EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
218
nvme_reset_ctrl_sync(struct nvme_ctrl * ctrl)219 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
220 {
221 int ret;
222
223 ret = nvme_reset_ctrl(ctrl);
224 if (!ret) {
225 flush_work(&ctrl->reset_work);
226 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
227 ret = -ENETRESET;
228 }
229
230 return ret;
231 }
232
nvme_do_delete_ctrl(struct nvme_ctrl * ctrl)233 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
234 {
235 dev_info(ctrl->device,
236 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
237
238 flush_work(&ctrl->reset_work);
239 nvme_stop_ctrl(ctrl);
240 nvme_remove_namespaces(ctrl);
241 ctrl->ops->delete_ctrl(ctrl);
242 nvme_uninit_ctrl(ctrl);
243 }
244
nvme_delete_ctrl_work(struct work_struct * work)245 static void nvme_delete_ctrl_work(struct work_struct *work)
246 {
247 struct nvme_ctrl *ctrl =
248 container_of(work, struct nvme_ctrl, delete_work);
249
250 nvme_do_delete_ctrl(ctrl);
251 }
252
nvme_delete_ctrl(struct nvme_ctrl * ctrl)253 int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
254 {
255 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
256 return -EBUSY;
257 if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
258 return -EBUSY;
259 return 0;
260 }
261 EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
262
nvme_delete_ctrl_sync(struct nvme_ctrl * ctrl)263 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
264 {
265 /*
266 * Keep a reference until nvme_do_delete_ctrl() complete,
267 * since ->delete_ctrl can free the controller.
268 */
269 nvme_get_ctrl(ctrl);
270 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
271 nvme_do_delete_ctrl(ctrl);
272 nvme_put_ctrl(ctrl);
273 }
274
nvme_error_status(u16 status)275 static blk_status_t nvme_error_status(u16 status)
276 {
277 switch (status & NVME_SCT_SC_MASK) {
278 case NVME_SC_SUCCESS:
279 return BLK_STS_OK;
280 case NVME_SC_CAP_EXCEEDED:
281 return BLK_STS_NOSPC;
282 case NVME_SC_LBA_RANGE:
283 case NVME_SC_CMD_INTERRUPTED:
284 case NVME_SC_NS_NOT_READY:
285 return BLK_STS_TARGET;
286 case NVME_SC_BAD_ATTRIBUTES:
287 case NVME_SC_INVALID_OPCODE:
288 case NVME_SC_INVALID_FIELD:
289 case NVME_SC_INVALID_NS:
290 return BLK_STS_NOTSUPP;
291 case NVME_SC_WRITE_FAULT:
292 case NVME_SC_READ_ERROR:
293 case NVME_SC_UNWRITTEN_BLOCK:
294 case NVME_SC_ACCESS_DENIED:
295 case NVME_SC_READ_ONLY:
296 case NVME_SC_COMPARE_FAILED:
297 return BLK_STS_MEDIUM;
298 case NVME_SC_GUARD_CHECK:
299 case NVME_SC_APPTAG_CHECK:
300 case NVME_SC_REFTAG_CHECK:
301 case NVME_SC_INVALID_PI:
302 return BLK_STS_PROTECTION;
303 case NVME_SC_RESERVATION_CONFLICT:
304 return BLK_STS_RESV_CONFLICT;
305 case NVME_SC_HOST_PATH_ERROR:
306 return BLK_STS_TRANSPORT;
307 case NVME_SC_ZONE_TOO_MANY_ACTIVE:
308 return BLK_STS_ZONE_ACTIVE_RESOURCE;
309 case NVME_SC_ZONE_TOO_MANY_OPEN:
310 return BLK_STS_ZONE_OPEN_RESOURCE;
311 default:
312 return BLK_STS_IOERR;
313 }
314 }
315
nvme_retry_req(struct request * req)316 static void nvme_retry_req(struct request *req)
317 {
318 unsigned long delay = 0;
319 u16 crd;
320
321 /* The mask and shift result must be <= 3 */
322 crd = (nvme_req(req)->status & NVME_STATUS_CRD) >> 11;
323 if (crd)
324 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
325
326 nvme_req(req)->retries++;
327 blk_mq_requeue_request(req, false);
328 blk_mq_delay_kick_requeue_list(req->q, delay);
329 }
330
nvme_log_error(struct request * req)331 static void nvme_log_error(struct request *req)
332 {
333 struct nvme_ns *ns = req->q->queuedata;
334 struct nvme_request *nr = nvme_req(req);
335
336 if (ns) {
337 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
338 ns->disk ? ns->disk->disk_name : "?",
339 nvme_get_opcode_str(nr->cmd->common.opcode),
340 nr->cmd->common.opcode,
341 nvme_sect_to_lba(ns->head, blk_rq_pos(req)),
342 blk_rq_bytes(req) >> ns->head->lba_shift,
343 nvme_get_error_status_str(nr->status),
344 NVME_SCT(nr->status), /* Status Code Type */
345 nr->status & NVME_SC_MASK, /* Status Code */
346 nr->status & NVME_STATUS_MORE ? "MORE " : "",
347 nr->status & NVME_STATUS_DNR ? "DNR " : "");
348 return;
349 }
350
351 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
352 dev_name(nr->ctrl->device),
353 nvme_get_admin_opcode_str(nr->cmd->common.opcode),
354 nr->cmd->common.opcode,
355 nvme_get_error_status_str(nr->status),
356 NVME_SCT(nr->status), /* Status Code Type */
357 nr->status & NVME_SC_MASK, /* Status Code */
358 nr->status & NVME_STATUS_MORE ? "MORE " : "",
359 nr->status & NVME_STATUS_DNR ? "DNR " : "");
360 }
361
nvme_log_err_passthru(struct request * req)362 static void nvme_log_err_passthru(struct request *req)
363 {
364 struct nvme_ns *ns = req->q->queuedata;
365 struct nvme_request *nr = nvme_req(req);
366
367 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s"
368 "cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n",
369 ns ? ns->disk->disk_name : dev_name(nr->ctrl->device),
370 ns ? nvme_get_opcode_str(nr->cmd->common.opcode) :
371 nvme_get_admin_opcode_str(nr->cmd->common.opcode),
372 nr->cmd->common.opcode,
373 nvme_get_error_status_str(nr->status),
374 NVME_SCT(nr->status), /* Status Code Type */
375 nr->status & NVME_SC_MASK, /* Status Code */
376 nr->status & NVME_STATUS_MORE ? "MORE " : "",
377 nr->status & NVME_STATUS_DNR ? "DNR " : "",
378 le32_to_cpu(nr->cmd->common.cdw10),
379 le32_to_cpu(nr->cmd->common.cdw11),
380 le32_to_cpu(nr->cmd->common.cdw12),
381 le32_to_cpu(nr->cmd->common.cdw13),
382 le32_to_cpu(nr->cmd->common.cdw14),
383 le32_to_cpu(nr->cmd->common.cdw15));
384 }
385
386 enum nvme_disposition {
387 COMPLETE,
388 RETRY,
389 FAILOVER,
390 AUTHENTICATE,
391 };
392
nvme_decide_disposition(struct request * req)393 static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
394 {
395 if (likely(nvme_req(req)->status == 0))
396 return COMPLETE;
397
398 if (blk_noretry_request(req) ||
399 (nvme_req(req)->status & NVME_STATUS_DNR) ||
400 nvme_req(req)->retries >= nvme_max_retries)
401 return COMPLETE;
402
403 if ((nvme_req(req)->status & NVME_SCT_SC_MASK) == NVME_SC_AUTH_REQUIRED)
404 return AUTHENTICATE;
405
406 if (req->cmd_flags & REQ_NVME_MPATH) {
407 if (nvme_is_path_error(nvme_req(req)->status) ||
408 blk_queue_dying(req->q))
409 return FAILOVER;
410 } else {
411 if (blk_queue_dying(req->q))
412 return COMPLETE;
413 }
414
415 return RETRY;
416 }
417
nvme_end_req_zoned(struct request * req)418 static inline void nvme_end_req_zoned(struct request *req)
419 {
420 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
421 req_op(req) == REQ_OP_ZONE_APPEND) {
422 struct nvme_ns *ns = req->q->queuedata;
423
424 req->__sector = nvme_lba_to_sect(ns->head,
425 le64_to_cpu(nvme_req(req)->result.u64));
426 }
427 }
428
__nvme_end_req(struct request * req)429 static inline void __nvme_end_req(struct request *req)
430 {
431 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) {
432 if (blk_rq_is_passthrough(req))
433 nvme_log_err_passthru(req);
434 else
435 nvme_log_error(req);
436 }
437 nvme_end_req_zoned(req);
438 nvme_trace_bio_complete(req);
439 if (req->cmd_flags & REQ_NVME_MPATH)
440 nvme_mpath_end_request(req);
441 }
442
nvme_end_req(struct request * req)443 void nvme_end_req(struct request *req)
444 {
445 blk_status_t status = nvme_error_status(nvme_req(req)->status);
446
447 __nvme_end_req(req);
448 blk_mq_end_request(req, status);
449 }
450
nvme_complete_rq(struct request * req)451 void nvme_complete_rq(struct request *req)
452 {
453 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
454
455 trace_nvme_complete_rq(req);
456 nvme_cleanup_cmd(req);
457
458 /*
459 * Completions of long-running commands should not be able to
460 * defer sending of periodic keep alives, since the controller
461 * may have completed processing such commands a long time ago
462 * (arbitrarily close to command submission time).
463 * req->deadline - req->timeout is the command submission time
464 * in jiffies.
465 */
466 if (ctrl->kas &&
467 req->deadline - req->timeout >= ctrl->ka_last_check_time)
468 ctrl->comp_seen = true;
469
470 switch (nvme_decide_disposition(req)) {
471 case COMPLETE:
472 nvme_end_req(req);
473 return;
474 case RETRY:
475 nvme_retry_req(req);
476 return;
477 case FAILOVER:
478 nvme_failover_req(req);
479 return;
480 case AUTHENTICATE:
481 #ifdef CONFIG_NVME_HOST_AUTH
482 queue_work(nvme_wq, &ctrl->dhchap_auth_work);
483 nvme_retry_req(req);
484 #else
485 nvme_end_req(req);
486 #endif
487 return;
488 }
489 }
490 EXPORT_SYMBOL_GPL(nvme_complete_rq);
491
nvme_complete_batch_req(struct request * req)492 void nvme_complete_batch_req(struct request *req)
493 {
494 trace_nvme_complete_rq(req);
495 nvme_cleanup_cmd(req);
496 __nvme_end_req(req);
497 }
498 EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
499
500 /*
501 * Called to unwind from ->queue_rq on a failed command submission so that the
502 * multipathing code gets called to potentially failover to another path.
503 * The caller needs to unwind all transport specific resource allocations and
504 * must return propagate the return value.
505 */
nvme_host_path_error(struct request * req)506 blk_status_t nvme_host_path_error(struct request *req)
507 {
508 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
509 blk_mq_set_request_complete(req);
510 nvme_complete_rq(req);
511 return BLK_STS_OK;
512 }
513 EXPORT_SYMBOL_GPL(nvme_host_path_error);
514
nvme_cancel_request(struct request * req,void * data)515 bool nvme_cancel_request(struct request *req, void *data)
516 {
517 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
518 "Cancelling I/O %d", req->tag);
519
520 /* don't abort one completed or idle request */
521 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
522 return true;
523
524 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
525 nvme_req(req)->flags |= NVME_REQ_CANCELLED;
526 blk_mq_complete_request(req);
527 return true;
528 }
529 EXPORT_SYMBOL_GPL(nvme_cancel_request);
530
nvme_cancel_tagset(struct nvme_ctrl * ctrl)531 void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
532 {
533 if (ctrl->tagset) {
534 blk_mq_tagset_busy_iter(ctrl->tagset,
535 nvme_cancel_request, ctrl);
536 blk_mq_tagset_wait_completed_request(ctrl->tagset);
537 }
538 }
539 EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
540
nvme_cancel_admin_tagset(struct nvme_ctrl * ctrl)541 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
542 {
543 if (ctrl->admin_tagset) {
544 blk_mq_tagset_busy_iter(ctrl->admin_tagset,
545 nvme_cancel_request, ctrl);
546 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
547 }
548 }
549 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
550
nvme_change_ctrl_state(struct nvme_ctrl * ctrl,enum nvme_ctrl_state new_state)551 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
552 enum nvme_ctrl_state new_state)
553 {
554 enum nvme_ctrl_state old_state;
555 unsigned long flags;
556 bool changed = false;
557
558 spin_lock_irqsave(&ctrl->lock, flags);
559
560 old_state = nvme_ctrl_state(ctrl);
561 switch (new_state) {
562 case NVME_CTRL_LIVE:
563 switch (old_state) {
564 case NVME_CTRL_CONNECTING:
565 changed = true;
566 fallthrough;
567 default:
568 break;
569 }
570 break;
571 case NVME_CTRL_RESETTING:
572 switch (old_state) {
573 case NVME_CTRL_NEW:
574 case NVME_CTRL_LIVE:
575 changed = true;
576 fallthrough;
577 default:
578 break;
579 }
580 break;
581 case NVME_CTRL_CONNECTING:
582 switch (old_state) {
583 case NVME_CTRL_NEW:
584 case NVME_CTRL_RESETTING:
585 changed = true;
586 fallthrough;
587 default:
588 break;
589 }
590 break;
591 case NVME_CTRL_DELETING:
592 switch (old_state) {
593 case NVME_CTRL_LIVE:
594 case NVME_CTRL_RESETTING:
595 case NVME_CTRL_CONNECTING:
596 changed = true;
597 fallthrough;
598 default:
599 break;
600 }
601 break;
602 case NVME_CTRL_DELETING_NOIO:
603 switch (old_state) {
604 case NVME_CTRL_DELETING:
605 case NVME_CTRL_DEAD:
606 changed = true;
607 fallthrough;
608 default:
609 break;
610 }
611 break;
612 case NVME_CTRL_DEAD:
613 switch (old_state) {
614 case NVME_CTRL_DELETING:
615 changed = true;
616 fallthrough;
617 default:
618 break;
619 }
620 break;
621 default:
622 break;
623 }
624
625 if (changed) {
626 WRITE_ONCE(ctrl->state, new_state);
627 wake_up_all(&ctrl->state_wq);
628 }
629
630 spin_unlock_irqrestore(&ctrl->lock, flags);
631 if (!changed)
632 return false;
633
634 if (new_state == NVME_CTRL_LIVE) {
635 if (old_state == NVME_CTRL_CONNECTING)
636 nvme_stop_failfast_work(ctrl);
637 nvme_kick_requeue_lists(ctrl);
638 } else if (new_state == NVME_CTRL_CONNECTING &&
639 old_state == NVME_CTRL_RESETTING) {
640 nvme_start_failfast_work(ctrl);
641 }
642 return changed;
643 }
644 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
645
646 /*
647 * Waits for the controller state to be resetting, or returns false if it is
648 * not possible to ever transition to that state.
649 */
nvme_wait_reset(struct nvme_ctrl * ctrl)650 bool nvme_wait_reset(struct nvme_ctrl *ctrl)
651 {
652 wait_event(ctrl->state_wq,
653 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
654 nvme_state_terminal(ctrl));
655 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING;
656 }
657 EXPORT_SYMBOL_GPL(nvme_wait_reset);
658
nvme_free_ns_head(struct kref * ref)659 static void nvme_free_ns_head(struct kref *ref)
660 {
661 struct nvme_ns_head *head =
662 container_of(ref, struct nvme_ns_head, ref);
663
664 nvme_mpath_remove_disk(head);
665 ida_free(&head->subsys->ns_ida, head->instance);
666 cleanup_srcu_struct(&head->srcu);
667 nvme_put_subsystem(head->subsys);
668 kfree(head);
669 }
670
nvme_tryget_ns_head(struct nvme_ns_head * head)671 bool nvme_tryget_ns_head(struct nvme_ns_head *head)
672 {
673 return kref_get_unless_zero(&head->ref);
674 }
675
nvme_put_ns_head(struct nvme_ns_head * head)676 void nvme_put_ns_head(struct nvme_ns_head *head)
677 {
678 kref_put(&head->ref, nvme_free_ns_head);
679 }
680
nvme_free_ns(struct kref * kref)681 static void nvme_free_ns(struct kref *kref)
682 {
683 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
684
685 put_disk(ns->disk);
686 nvme_put_ns_head(ns->head);
687 nvme_put_ctrl(ns->ctrl);
688 kfree(ns);
689 }
690
nvme_get_ns(struct nvme_ns * ns)691 bool nvme_get_ns(struct nvme_ns *ns)
692 {
693 return kref_get_unless_zero(&ns->kref);
694 }
695
nvme_put_ns(struct nvme_ns * ns)696 void nvme_put_ns(struct nvme_ns *ns)
697 {
698 kref_put(&ns->kref, nvme_free_ns);
699 }
700 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU);
701
nvme_clear_nvme_request(struct request * req)702 static inline void nvme_clear_nvme_request(struct request *req)
703 {
704 nvme_req(req)->status = 0;
705 nvme_req(req)->retries = 0;
706 nvme_req(req)->flags = 0;
707 req->rq_flags |= RQF_DONTPREP;
708 }
709
710 /* initialize a passthrough request */
nvme_init_request(struct request * req,struct nvme_command * cmd)711 void nvme_init_request(struct request *req, struct nvme_command *cmd)
712 {
713 struct nvme_request *nr = nvme_req(req);
714 bool logging_enabled;
715
716 if (req->q->queuedata) {
717 struct nvme_ns *ns = req->q->disk->private_data;
718
719 logging_enabled = ns->head->passthru_err_log_enabled;
720 req->timeout = NVME_IO_TIMEOUT;
721 } else { /* no queuedata implies admin queue */
722 logging_enabled = nr->ctrl->passthru_err_log_enabled;
723 req->timeout = NVME_ADMIN_TIMEOUT;
724 }
725
726 if (!logging_enabled)
727 req->rq_flags |= RQF_QUIET;
728
729 /* passthru commands should let the driver set the SGL flags */
730 cmd->common.flags &= ~NVME_CMD_SGL_ALL;
731
732 req->cmd_flags |= REQ_FAILFAST_DRIVER;
733 if (req->mq_hctx->type == HCTX_TYPE_POLL)
734 req->cmd_flags |= REQ_POLLED;
735 nvme_clear_nvme_request(req);
736 memcpy(nr->cmd, cmd, sizeof(*cmd));
737 }
738 EXPORT_SYMBOL_GPL(nvme_init_request);
739
740 /*
741 * For something we're not in a state to send to the device the default action
742 * is to busy it and retry it after the controller state is recovered. However,
743 * if the controller is deleting or if anything is marked for failfast or
744 * nvme multipath it is immediately failed.
745 *
746 * Note: commands used to initialize the controller will be marked for failfast.
747 * Note: nvme cli/ioctl commands are marked for failfast.
748 */
nvme_fail_nonready_command(struct nvme_ctrl * ctrl,struct request * rq)749 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
750 struct request *rq)
751 {
752 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
753
754 if (state != NVME_CTRL_DELETING_NOIO &&
755 state != NVME_CTRL_DELETING &&
756 state != NVME_CTRL_DEAD &&
757 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
758 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
759 return BLK_STS_RESOURCE;
760
761 if (!(rq->rq_flags & RQF_DONTPREP))
762 nvme_clear_nvme_request(rq);
763
764 return nvme_host_path_error(rq);
765 }
766 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
767
__nvme_check_ready(struct nvme_ctrl * ctrl,struct request * rq,bool queue_live,enum nvme_ctrl_state state)768 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
769 bool queue_live, enum nvme_ctrl_state state)
770 {
771 struct nvme_request *req = nvme_req(rq);
772
773 /*
774 * currently we have a problem sending passthru commands
775 * on the admin_q if the controller is not LIVE because we can't
776 * make sure that they are going out after the admin connect,
777 * controller enable and/or other commands in the initialization
778 * sequence. until the controller will be LIVE, fail with
779 * BLK_STS_RESOURCE so that they will be rescheduled.
780 */
781 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
782 return false;
783
784 if (ctrl->ops->flags & NVME_F_FABRICS) {
785 /*
786 * Only allow commands on a live queue, except for the connect
787 * command, which is require to set the queue live in the
788 * appropinquate states.
789 */
790 switch (state) {
791 case NVME_CTRL_CONNECTING:
792 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
793 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
794 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
795 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
796 return true;
797 break;
798 default:
799 break;
800 case NVME_CTRL_DEAD:
801 return false;
802 }
803 }
804
805 return queue_live;
806 }
807 EXPORT_SYMBOL_GPL(__nvme_check_ready);
808
nvme_setup_flush(struct nvme_ns * ns,struct nvme_command * cmnd)809 static inline void nvme_setup_flush(struct nvme_ns *ns,
810 struct nvme_command *cmnd)
811 {
812 memset(cmnd, 0, sizeof(*cmnd));
813 cmnd->common.opcode = nvme_cmd_flush;
814 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
815 }
816
nvme_setup_discard(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd)817 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
818 struct nvme_command *cmnd)
819 {
820 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
821 struct nvme_dsm_range *range;
822 struct bio *bio;
823
824 /*
825 * Some devices do not consider the DSM 'Number of Ranges' field when
826 * determining how much data to DMA. Always allocate memory for maximum
827 * number of segments to prevent device reading beyond end of buffer.
828 */
829 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
830
831 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
832 if (!range) {
833 /*
834 * If we fail allocation our range, fallback to the controller
835 * discard page. If that's also busy, it's safe to return
836 * busy, as we know we can make progress once that's freed.
837 */
838 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
839 return BLK_STS_RESOURCE;
840
841 range = page_address(ns->ctrl->discard_page);
842 }
843
844 if (queue_max_discard_segments(req->q) == 1) {
845 u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req));
846 u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9);
847
848 range[0].cattr = cpu_to_le32(0);
849 range[0].nlb = cpu_to_le32(nlb);
850 range[0].slba = cpu_to_le64(slba);
851 n = 1;
852 } else {
853 __rq_for_each_bio(bio, req) {
854 u64 slba = nvme_sect_to_lba(ns->head,
855 bio->bi_iter.bi_sector);
856 u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift;
857
858 if (n < segments) {
859 range[n].cattr = cpu_to_le32(0);
860 range[n].nlb = cpu_to_le32(nlb);
861 range[n].slba = cpu_to_le64(slba);
862 }
863 n++;
864 }
865 }
866
867 if (WARN_ON_ONCE(n != segments)) {
868 if (virt_to_page(range) == ns->ctrl->discard_page)
869 clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
870 else
871 kfree(range);
872 return BLK_STS_IOERR;
873 }
874
875 memset(cmnd, 0, sizeof(*cmnd));
876 cmnd->dsm.opcode = nvme_cmd_dsm;
877 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
878 cmnd->dsm.nr = cpu_to_le32(segments - 1);
879 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
880
881 bvec_set_virt(&req->special_vec, range, alloc_size);
882 req->rq_flags |= RQF_SPECIAL_PAYLOAD;
883
884 return BLK_STS_OK;
885 }
886
nvme_set_ref_tag(struct nvme_ns * ns,struct nvme_command * cmnd,struct request * req)887 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
888 struct request *req)
889 {
890 u32 upper, lower;
891 u64 ref48;
892
893 /* only type1 and type 2 PI formats have a reftag */
894 switch (ns->head->pi_type) {
895 case NVME_NS_DPS_PI_TYPE1:
896 case NVME_NS_DPS_PI_TYPE2:
897 break;
898 default:
899 return;
900 }
901
902 /* both rw and write zeroes share the same reftag format */
903 switch (ns->head->guard_type) {
904 case NVME_NVM_NS_16B_GUARD:
905 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
906 break;
907 case NVME_NVM_NS_64B_GUARD:
908 ref48 = ext_pi_ref_tag(req);
909 lower = lower_32_bits(ref48);
910 upper = upper_32_bits(ref48);
911
912 cmnd->rw.reftag = cpu_to_le32(lower);
913 cmnd->rw.cdw3 = cpu_to_le32(upper);
914 break;
915 default:
916 break;
917 }
918 }
919
nvme_setup_write_zeroes(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd)920 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
921 struct request *req, struct nvme_command *cmnd)
922 {
923 memset(cmnd, 0, sizeof(*cmnd));
924
925 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
926 return nvme_setup_discard(ns, req, cmnd);
927
928 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
929 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
930 cmnd->write_zeroes.slba =
931 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
932 cmnd->write_zeroes.length =
933 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
934
935 if (!(req->cmd_flags & REQ_NOUNMAP) &&
936 (ns->head->features & NVME_NS_DEAC))
937 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
938
939 if (nvme_ns_has_pi(ns->head)) {
940 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
941 nvme_set_ref_tag(ns, cmnd, req);
942 }
943
944 return BLK_STS_OK;
945 }
946
947 /*
948 * NVMe does not support a dedicated command to issue an atomic write. A write
949 * which does adhere to the device atomic limits will silently be executed
950 * non-atomically. The request issuer should ensure that the write is within
951 * the queue atomic writes limits, but just validate this in case it is not.
952 */
nvme_valid_atomic_write(struct request * req)953 static bool nvme_valid_atomic_write(struct request *req)
954 {
955 struct request_queue *q = req->q;
956 u32 boundary_bytes = queue_atomic_write_boundary_bytes(q);
957
958 if (blk_rq_bytes(req) > queue_atomic_write_unit_max_bytes(q))
959 return false;
960
961 if (boundary_bytes) {
962 u64 mask = boundary_bytes - 1, imask = ~mask;
963 u64 start = blk_rq_pos(req) << SECTOR_SHIFT;
964 u64 end = start + blk_rq_bytes(req) - 1;
965
966 /* If greater then must be crossing a boundary */
967 if (blk_rq_bytes(req) > boundary_bytes)
968 return false;
969
970 if ((start & imask) != (end & imask))
971 return false;
972 }
973
974 return true;
975 }
976
nvme_setup_rw(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd,enum nvme_opcode op)977 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
978 struct request *req, struct nvme_command *cmnd,
979 enum nvme_opcode op)
980 {
981 u16 control = 0;
982 u32 dsmgmt = 0;
983
984 if (req->cmd_flags & REQ_FUA)
985 control |= NVME_RW_FUA;
986 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
987 control |= NVME_RW_LR;
988
989 if (req->cmd_flags & REQ_RAHEAD)
990 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
991
992 if (req->cmd_flags & REQ_ATOMIC && !nvme_valid_atomic_write(req))
993 return BLK_STS_INVAL;
994
995 cmnd->rw.opcode = op;
996 cmnd->rw.flags = 0;
997 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
998 cmnd->rw.cdw2 = 0;
999 cmnd->rw.cdw3 = 0;
1000 cmnd->rw.metadata = 0;
1001 cmnd->rw.slba =
1002 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
1003 cmnd->rw.length =
1004 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
1005 cmnd->rw.reftag = 0;
1006 cmnd->rw.lbat = 0;
1007 cmnd->rw.lbatm = 0;
1008
1009 if (ns->head->ms) {
1010 /*
1011 * If formated with metadata, the block layer always provides a
1012 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else
1013 * we enable the PRACT bit for protection information or set the
1014 * namespace capacity to zero to prevent any I/O.
1015 */
1016 if (!blk_integrity_rq(req)) {
1017 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head)))
1018 return BLK_STS_NOTSUPP;
1019 control |= NVME_RW_PRINFO_PRACT;
1020 nvme_set_ref_tag(ns, cmnd, req);
1021 }
1022
1023 switch (ns->head->pi_type) {
1024 case NVME_NS_DPS_PI_TYPE3:
1025 control |= NVME_RW_PRINFO_PRCHK_GUARD;
1026 break;
1027 case NVME_NS_DPS_PI_TYPE1:
1028 case NVME_NS_DPS_PI_TYPE2:
1029 control |= NVME_RW_PRINFO_PRCHK_GUARD |
1030 NVME_RW_PRINFO_PRCHK_REF;
1031 if (op == nvme_cmd_zone_append)
1032 control |= NVME_RW_APPEND_PIREMAP;
1033 nvme_set_ref_tag(ns, cmnd, req);
1034 break;
1035 }
1036 }
1037
1038 cmnd->rw.control = cpu_to_le16(control);
1039 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
1040 return 0;
1041 }
1042
nvme_cleanup_cmd(struct request * req)1043 void nvme_cleanup_cmd(struct request *req)
1044 {
1045 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
1046 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
1047
1048 if (req->special_vec.bv_page == ctrl->discard_page)
1049 clear_bit_unlock(0, &ctrl->discard_page_busy);
1050 else
1051 kfree(bvec_virt(&req->special_vec));
1052 req->rq_flags &= ~RQF_SPECIAL_PAYLOAD;
1053 }
1054 }
1055 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
1056
nvme_setup_cmd(struct nvme_ns * ns,struct request * req)1057 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
1058 {
1059 struct nvme_command *cmd = nvme_req(req)->cmd;
1060 blk_status_t ret = BLK_STS_OK;
1061
1062 if (!(req->rq_flags & RQF_DONTPREP))
1063 nvme_clear_nvme_request(req);
1064
1065 switch (req_op(req)) {
1066 case REQ_OP_DRV_IN:
1067 case REQ_OP_DRV_OUT:
1068 /* these are setup prior to execution in nvme_init_request() */
1069 break;
1070 case REQ_OP_FLUSH:
1071 nvme_setup_flush(ns, cmd);
1072 break;
1073 case REQ_OP_ZONE_RESET_ALL:
1074 case REQ_OP_ZONE_RESET:
1075 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
1076 break;
1077 case REQ_OP_ZONE_OPEN:
1078 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
1079 break;
1080 case REQ_OP_ZONE_CLOSE:
1081 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
1082 break;
1083 case REQ_OP_ZONE_FINISH:
1084 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
1085 break;
1086 case REQ_OP_WRITE_ZEROES:
1087 ret = nvme_setup_write_zeroes(ns, req, cmd);
1088 break;
1089 case REQ_OP_DISCARD:
1090 ret = nvme_setup_discard(ns, req, cmd);
1091 break;
1092 case REQ_OP_READ:
1093 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
1094 break;
1095 case REQ_OP_WRITE:
1096 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
1097 break;
1098 case REQ_OP_ZONE_APPEND:
1099 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
1100 break;
1101 default:
1102 WARN_ON_ONCE(1);
1103 return BLK_STS_IOERR;
1104 }
1105
1106 cmd->common.command_id = nvme_cid(req);
1107 trace_nvme_setup_cmd(req, cmd);
1108 return ret;
1109 }
1110 EXPORT_SYMBOL_GPL(nvme_setup_cmd);
1111
1112 /*
1113 * Return values:
1114 * 0: success
1115 * >0: nvme controller's cqe status response
1116 * <0: kernel error in lieu of controller response
1117 */
nvme_execute_rq(struct request * rq,bool at_head)1118 int nvme_execute_rq(struct request *rq, bool at_head)
1119 {
1120 blk_status_t status;
1121
1122 status = blk_execute_rq(rq, at_head);
1123 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1124 return -EINTR;
1125 if (nvme_req(rq)->status)
1126 return nvme_req(rq)->status;
1127 return blk_status_to_errno(status);
1128 }
1129 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU);
1130
1131 /*
1132 * Returns 0 on success. If the result is negative, it's a Linux error code;
1133 * if the result is positive, it's an NVM Express status code
1134 */
__nvme_submit_sync_cmd(struct request_queue * q,struct nvme_command * cmd,union nvme_result * result,void * buffer,unsigned bufflen,int qid,nvme_submit_flags_t flags)1135 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1136 union nvme_result *result, void *buffer, unsigned bufflen,
1137 int qid, nvme_submit_flags_t flags)
1138 {
1139 struct request *req;
1140 int ret;
1141 blk_mq_req_flags_t blk_flags = 0;
1142
1143 if (flags & NVME_SUBMIT_NOWAIT)
1144 blk_flags |= BLK_MQ_REQ_NOWAIT;
1145 if (flags & NVME_SUBMIT_RESERVED)
1146 blk_flags |= BLK_MQ_REQ_RESERVED;
1147 if (qid == NVME_QID_ANY)
1148 req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags);
1149 else
1150 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags,
1151 qid - 1);
1152
1153 if (IS_ERR(req))
1154 return PTR_ERR(req);
1155 nvme_init_request(req, cmd);
1156 if (flags & NVME_SUBMIT_RETRY)
1157 req->cmd_flags &= ~REQ_FAILFAST_DRIVER;
1158
1159 if (buffer && bufflen) {
1160 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
1161 if (ret)
1162 goto out;
1163 }
1164
1165 ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD);
1166 if (result && ret >= 0)
1167 *result = nvme_req(req)->result;
1168 out:
1169 blk_mq_free_request(req);
1170 return ret;
1171 }
1172 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1173
nvme_submit_sync_cmd(struct request_queue * q,struct nvme_command * cmd,void * buffer,unsigned bufflen)1174 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1175 void *buffer, unsigned bufflen)
1176 {
1177 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1178 NVME_QID_ANY, 0);
1179 }
1180 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1181
nvme_command_effects(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u8 opcode)1182 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1183 {
1184 u32 effects = 0;
1185
1186 if (ns) {
1187 effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1188 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1189 dev_warn_once(ctrl->device,
1190 "IO command:%02x has unusual effects:%08x\n",
1191 opcode, effects);
1192
1193 /*
1194 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1195 * which would deadlock when done on an I/O command. Note that
1196 * We already warn about an unusual effect above.
1197 */
1198 effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1199 } else {
1200 effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1201
1202 /* Ignore execution restrictions if any relaxation bits are set */
1203 if (effects & NVME_CMD_EFFECTS_CSER_MASK)
1204 effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1205 }
1206
1207 return effects;
1208 }
1209 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU);
1210
nvme_passthru_start(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u8 opcode)1211 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1212 {
1213 u32 effects = nvme_command_effects(ctrl, ns, opcode);
1214
1215 /*
1216 * For simplicity, IO to all namespaces is quiesced even if the command
1217 * effects say only one namespace is affected.
1218 */
1219 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1220 mutex_lock(&ctrl->scan_lock);
1221 mutex_lock(&ctrl->subsys->lock);
1222 nvme_mpath_start_freeze(ctrl->subsys);
1223 nvme_mpath_wait_freeze(ctrl->subsys);
1224 nvme_start_freeze(ctrl);
1225 nvme_wait_freeze(ctrl);
1226 }
1227 return effects;
1228 }
1229 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU);
1230
nvme_passthru_end(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u32 effects,struct nvme_command * cmd,int status)1231 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1232 struct nvme_command *cmd, int status)
1233 {
1234 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1235 nvme_unfreeze(ctrl);
1236 nvme_mpath_unfreeze(ctrl->subsys);
1237 mutex_unlock(&ctrl->subsys->lock);
1238 mutex_unlock(&ctrl->scan_lock);
1239 }
1240 if (effects & NVME_CMD_EFFECTS_CCC) {
1241 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY,
1242 &ctrl->flags)) {
1243 dev_info(ctrl->device,
1244 "controller capabilities changed, reset may be required to take effect.\n");
1245 }
1246 }
1247 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1248 nvme_queue_scan(ctrl);
1249 flush_work(&ctrl->scan_work);
1250 }
1251 if (ns)
1252 return;
1253
1254 switch (cmd->common.opcode) {
1255 case nvme_admin_set_features:
1256 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1257 case NVME_FEAT_KATO:
1258 /*
1259 * Keep alive commands interval on the host should be
1260 * updated when KATO is modified by Set Features
1261 * commands.
1262 */
1263 if (!status)
1264 nvme_update_keep_alive(ctrl, cmd);
1265 break;
1266 default:
1267 break;
1268 }
1269 break;
1270 default:
1271 break;
1272 }
1273 }
1274 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU);
1275
1276 /*
1277 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1278 *
1279 * The host should send Keep Alive commands at half of the Keep Alive Timeout
1280 * accounting for transport roundtrip times [..].
1281 */
nvme_keep_alive_work_period(struct nvme_ctrl * ctrl)1282 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1283 {
1284 unsigned long delay = ctrl->kato * HZ / 2;
1285
1286 /*
1287 * When using Traffic Based Keep Alive, we need to run
1288 * nvme_keep_alive_work at twice the normal frequency, as one
1289 * command completion can postpone sending a keep alive command
1290 * by up to twice the delay between runs.
1291 */
1292 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1293 delay /= 2;
1294 return delay;
1295 }
1296
nvme_queue_keep_alive_work(struct nvme_ctrl * ctrl)1297 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1298 {
1299 unsigned long now = jiffies;
1300 unsigned long delay = nvme_keep_alive_work_period(ctrl);
1301 unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay;
1302
1303 if (time_after(now, ka_next_check_tm))
1304 delay = 0;
1305 else
1306 delay = ka_next_check_tm - now;
1307
1308 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1309 }
1310
nvme_keep_alive_end_io(struct request * rq,blk_status_t status)1311 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1312 blk_status_t status)
1313 {
1314 struct nvme_ctrl *ctrl = rq->end_io_data;
1315 unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1316 unsigned long delay = nvme_keep_alive_work_period(ctrl);
1317 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
1318
1319 /*
1320 * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1321 * at the desired frequency.
1322 */
1323 if (rtt <= delay) {
1324 delay -= rtt;
1325 } else {
1326 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1327 jiffies_to_msecs(rtt));
1328 delay = 0;
1329 }
1330
1331 blk_mq_free_request(rq);
1332
1333 if (status) {
1334 dev_err(ctrl->device,
1335 "failed nvme_keep_alive_end_io error=%d\n",
1336 status);
1337 return RQ_END_IO_NONE;
1338 }
1339
1340 ctrl->ka_last_check_time = jiffies;
1341 ctrl->comp_seen = false;
1342 if (state == NVME_CTRL_LIVE || state == NVME_CTRL_CONNECTING)
1343 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1344 return RQ_END_IO_NONE;
1345 }
1346
nvme_keep_alive_work(struct work_struct * work)1347 static void nvme_keep_alive_work(struct work_struct *work)
1348 {
1349 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1350 struct nvme_ctrl, ka_work);
1351 bool comp_seen = ctrl->comp_seen;
1352 struct request *rq;
1353
1354 ctrl->ka_last_check_time = jiffies;
1355
1356 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1357 dev_dbg(ctrl->device,
1358 "reschedule traffic based keep-alive timer\n");
1359 ctrl->comp_seen = false;
1360 nvme_queue_keep_alive_work(ctrl);
1361 return;
1362 }
1363
1364 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1365 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1366 if (IS_ERR(rq)) {
1367 /* allocation failure, reset the controller */
1368 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1369 nvme_reset_ctrl(ctrl);
1370 return;
1371 }
1372 nvme_init_request(rq, &ctrl->ka_cmd);
1373
1374 rq->timeout = ctrl->kato * HZ;
1375 rq->end_io = nvme_keep_alive_end_io;
1376 rq->end_io_data = ctrl;
1377 blk_execute_rq_nowait(rq, false);
1378 }
1379
nvme_start_keep_alive(struct nvme_ctrl * ctrl)1380 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1381 {
1382 if (unlikely(ctrl->kato == 0))
1383 return;
1384
1385 nvme_queue_keep_alive_work(ctrl);
1386 }
1387
nvme_stop_keep_alive(struct nvme_ctrl * ctrl)1388 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1389 {
1390 if (unlikely(ctrl->kato == 0))
1391 return;
1392
1393 cancel_delayed_work_sync(&ctrl->ka_work);
1394 }
1395 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1396
nvme_update_keep_alive(struct nvme_ctrl * ctrl,struct nvme_command * cmd)1397 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1398 struct nvme_command *cmd)
1399 {
1400 unsigned int new_kato =
1401 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1402
1403 dev_info(ctrl->device,
1404 "keep alive interval updated from %u ms to %u ms\n",
1405 ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1406
1407 nvme_stop_keep_alive(ctrl);
1408 ctrl->kato = new_kato;
1409 nvme_start_keep_alive(ctrl);
1410 }
1411
nvme_id_cns_ok(struct nvme_ctrl * ctrl,u8 cns)1412 static bool nvme_id_cns_ok(struct nvme_ctrl *ctrl, u8 cns)
1413 {
1414 /*
1415 * The CNS field occupies a full byte starting with NVMe 1.2
1416 */
1417 if (ctrl->vs >= NVME_VS(1, 2, 0))
1418 return true;
1419
1420 /*
1421 * NVMe 1.1 expanded the CNS value to two bits, which means values
1422 * larger than that could get truncated and treated as an incorrect
1423 * value.
1424 *
1425 * Qemu implemented 1.0 behavior for controllers claiming 1.1
1426 * compliance, so they need to be quirked here.
1427 */
1428 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1429 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS))
1430 return cns <= 3;
1431
1432 /*
1433 * NVMe 1.0 used a single bit for the CNS value.
1434 */
1435 return cns <= 1;
1436 }
1437
nvme_identify_ctrl(struct nvme_ctrl * dev,struct nvme_id_ctrl ** id)1438 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1439 {
1440 struct nvme_command c = { };
1441 int error;
1442
1443 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1444 c.identify.opcode = nvme_admin_identify;
1445 c.identify.cns = NVME_ID_CNS_CTRL;
1446
1447 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1448 if (!*id)
1449 return -ENOMEM;
1450
1451 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1452 sizeof(struct nvme_id_ctrl));
1453 if (error) {
1454 kfree(*id);
1455 *id = NULL;
1456 }
1457 return error;
1458 }
1459
nvme_process_ns_desc(struct nvme_ctrl * ctrl,struct nvme_ns_ids * ids,struct nvme_ns_id_desc * cur,bool * csi_seen)1460 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1461 struct nvme_ns_id_desc *cur, bool *csi_seen)
1462 {
1463 const char *warn_str = "ctrl returned bogus length:";
1464 void *data = cur;
1465
1466 switch (cur->nidt) {
1467 case NVME_NIDT_EUI64:
1468 if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1469 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1470 warn_str, cur->nidl);
1471 return -1;
1472 }
1473 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1474 return NVME_NIDT_EUI64_LEN;
1475 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1476 return NVME_NIDT_EUI64_LEN;
1477 case NVME_NIDT_NGUID:
1478 if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1479 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1480 warn_str, cur->nidl);
1481 return -1;
1482 }
1483 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1484 return NVME_NIDT_NGUID_LEN;
1485 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1486 return NVME_NIDT_NGUID_LEN;
1487 case NVME_NIDT_UUID:
1488 if (cur->nidl != NVME_NIDT_UUID_LEN) {
1489 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1490 warn_str, cur->nidl);
1491 return -1;
1492 }
1493 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1494 return NVME_NIDT_UUID_LEN;
1495 uuid_copy(&ids->uuid, data + sizeof(*cur));
1496 return NVME_NIDT_UUID_LEN;
1497 case NVME_NIDT_CSI:
1498 if (cur->nidl != NVME_NIDT_CSI_LEN) {
1499 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1500 warn_str, cur->nidl);
1501 return -1;
1502 }
1503 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1504 *csi_seen = true;
1505 return NVME_NIDT_CSI_LEN;
1506 default:
1507 /* Skip unknown types */
1508 return cur->nidl;
1509 }
1510 }
1511
nvme_identify_ns_descs(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1512 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1513 struct nvme_ns_info *info)
1514 {
1515 struct nvme_command c = { };
1516 bool csi_seen = false;
1517 int status, pos, len;
1518 void *data;
1519
1520 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1521 return 0;
1522 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1523 return 0;
1524
1525 c.identify.opcode = nvme_admin_identify;
1526 c.identify.nsid = cpu_to_le32(info->nsid);
1527 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1528
1529 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1530 if (!data)
1531 return -ENOMEM;
1532
1533 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1534 NVME_IDENTIFY_DATA_SIZE);
1535 if (status) {
1536 dev_warn(ctrl->device,
1537 "Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1538 info->nsid, status);
1539 goto free_data;
1540 }
1541
1542 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1543 struct nvme_ns_id_desc *cur = data + pos;
1544
1545 if (cur->nidl == 0)
1546 break;
1547
1548 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1549 if (len < 0)
1550 break;
1551
1552 len += sizeof(*cur);
1553 }
1554
1555 if (nvme_multi_css(ctrl) && !csi_seen) {
1556 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1557 info->nsid);
1558 status = -EINVAL;
1559 }
1560
1561 free_data:
1562 kfree(data);
1563 return status;
1564 }
1565
nvme_identify_ns(struct nvme_ctrl * ctrl,unsigned nsid,struct nvme_id_ns ** id)1566 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1567 struct nvme_id_ns **id)
1568 {
1569 struct nvme_command c = { };
1570 int error;
1571
1572 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1573 c.identify.opcode = nvme_admin_identify;
1574 c.identify.nsid = cpu_to_le32(nsid);
1575 c.identify.cns = NVME_ID_CNS_NS;
1576
1577 *id = kmalloc(sizeof(**id), GFP_KERNEL);
1578 if (!*id)
1579 return -ENOMEM;
1580
1581 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1582 if (error) {
1583 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1584 kfree(*id);
1585 *id = NULL;
1586 }
1587 return error;
1588 }
1589
nvme_ns_info_from_identify(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1590 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1591 struct nvme_ns_info *info)
1592 {
1593 struct nvme_ns_ids *ids = &info->ids;
1594 struct nvme_id_ns *id;
1595 int ret;
1596
1597 ret = nvme_identify_ns(ctrl, info->nsid, &id);
1598 if (ret)
1599 return ret;
1600
1601 if (id->ncap == 0) {
1602 /* namespace not allocated or attached */
1603 info->is_removed = true;
1604 ret = -ENODEV;
1605 goto error;
1606 }
1607
1608 info->anagrpid = id->anagrpid;
1609 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1610 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1611 info->is_ready = true;
1612 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1613 dev_info(ctrl->device,
1614 "Ignoring bogus Namespace Identifiers\n");
1615 } else {
1616 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1617 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1618 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1619 if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1620 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1621 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1622 }
1623
1624 error:
1625 kfree(id);
1626 return ret;
1627 }
1628
nvme_ns_info_from_id_cs_indep(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1629 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1630 struct nvme_ns_info *info)
1631 {
1632 struct nvme_id_ns_cs_indep *id;
1633 struct nvme_command c = {
1634 .identify.opcode = nvme_admin_identify,
1635 .identify.nsid = cpu_to_le32(info->nsid),
1636 .identify.cns = NVME_ID_CNS_NS_CS_INDEP,
1637 };
1638 int ret;
1639
1640 id = kmalloc(sizeof(*id), GFP_KERNEL);
1641 if (!id)
1642 return -ENOMEM;
1643
1644 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1645 if (!ret) {
1646 info->anagrpid = id->anagrpid;
1647 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1648 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1649 info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1650 }
1651 kfree(id);
1652 return ret;
1653 }
1654
nvme_features(struct nvme_ctrl * dev,u8 op,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1655 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1656 unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1657 {
1658 union nvme_result res = { 0 };
1659 struct nvme_command c = { };
1660 int ret;
1661
1662 c.features.opcode = op;
1663 c.features.fid = cpu_to_le32(fid);
1664 c.features.dword11 = cpu_to_le32(dword11);
1665
1666 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1667 buffer, buflen, NVME_QID_ANY, 0);
1668 if (ret >= 0 && result)
1669 *result = le32_to_cpu(res.u32);
1670 return ret;
1671 }
1672
nvme_set_features(struct nvme_ctrl * dev,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1673 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1674 unsigned int dword11, void *buffer, size_t buflen,
1675 u32 *result)
1676 {
1677 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1678 buflen, result);
1679 }
1680 EXPORT_SYMBOL_GPL(nvme_set_features);
1681
nvme_get_features(struct nvme_ctrl * dev,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1682 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1683 unsigned int dword11, void *buffer, size_t buflen,
1684 u32 *result)
1685 {
1686 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1687 buflen, result);
1688 }
1689 EXPORT_SYMBOL_GPL(nvme_get_features);
1690
nvme_set_queue_count(struct nvme_ctrl * ctrl,int * count)1691 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1692 {
1693 u32 q_count = (*count - 1) | ((*count - 1) << 16);
1694 u32 result;
1695 int status, nr_io_queues;
1696
1697 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1698 &result);
1699
1700 /*
1701 * It's either a kernel error or the host observed a connection
1702 * lost. In either case it's not possible communicate with the
1703 * controller and thus enter the error code path.
1704 */
1705 if (status < 0 || status == NVME_SC_HOST_PATH_ERROR)
1706 return status;
1707
1708 /*
1709 * Degraded controllers might return an error when setting the queue
1710 * count. We still want to be able to bring them online and offer
1711 * access to the admin queue, as that might be only way to fix them up.
1712 */
1713 if (status > 0) {
1714 dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1715 *count = 0;
1716 } else {
1717 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1718 *count = min(*count, nr_io_queues);
1719 }
1720
1721 return 0;
1722 }
1723 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1724
1725 #define NVME_AEN_SUPPORTED \
1726 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1727 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1728
nvme_enable_aen(struct nvme_ctrl * ctrl)1729 static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1730 {
1731 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1732 int status;
1733
1734 if (!supported_aens)
1735 return;
1736
1737 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1738 NULL, 0, &result);
1739 if (status)
1740 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1741 supported_aens);
1742
1743 queue_work(nvme_wq, &ctrl->async_event_work);
1744 }
1745
nvme_ns_open(struct nvme_ns * ns)1746 static int nvme_ns_open(struct nvme_ns *ns)
1747 {
1748
1749 /* should never be called due to GENHD_FL_HIDDEN */
1750 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1751 goto fail;
1752 if (!nvme_get_ns(ns))
1753 goto fail;
1754 if (!try_module_get(ns->ctrl->ops->module))
1755 goto fail_put_ns;
1756
1757 return 0;
1758
1759 fail_put_ns:
1760 nvme_put_ns(ns);
1761 fail:
1762 return -ENXIO;
1763 }
1764
nvme_ns_release(struct nvme_ns * ns)1765 static void nvme_ns_release(struct nvme_ns *ns)
1766 {
1767
1768 module_put(ns->ctrl->ops->module);
1769 nvme_put_ns(ns);
1770 }
1771
nvme_open(struct gendisk * disk,blk_mode_t mode)1772 static int nvme_open(struct gendisk *disk, blk_mode_t mode)
1773 {
1774 return nvme_ns_open(disk->private_data);
1775 }
1776
nvme_release(struct gendisk * disk)1777 static void nvme_release(struct gendisk *disk)
1778 {
1779 nvme_ns_release(disk->private_data);
1780 }
1781
nvme_getgeo(struct block_device * bdev,struct hd_geometry * geo)1782 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1783 {
1784 /* some standard values */
1785 geo->heads = 1 << 6;
1786 geo->sectors = 1 << 5;
1787 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1788 return 0;
1789 }
1790
nvme_init_integrity(struct nvme_ns_head * head,struct queue_limits * lim,struct nvme_ns_info * info)1791 static bool nvme_init_integrity(struct nvme_ns_head *head,
1792 struct queue_limits *lim, struct nvme_ns_info *info)
1793 {
1794 struct blk_integrity *bi = &lim->integrity;
1795
1796 memset(bi, 0, sizeof(*bi));
1797
1798 if (!head->ms)
1799 return true;
1800
1801 /*
1802 * PI can always be supported as we can ask the controller to simply
1803 * insert/strip it, which is not possible for other kinds of metadata.
1804 */
1805 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) ||
1806 !(head->features & NVME_NS_METADATA_SUPPORTED))
1807 return nvme_ns_has_pi(head);
1808
1809 switch (head->pi_type) {
1810 case NVME_NS_DPS_PI_TYPE3:
1811 switch (head->guard_type) {
1812 case NVME_NVM_NS_16B_GUARD:
1813 bi->csum_type = BLK_INTEGRITY_CSUM_CRC;
1814 bi->tag_size = sizeof(u16) + sizeof(u32);
1815 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1816 break;
1817 case NVME_NVM_NS_64B_GUARD:
1818 bi->csum_type = BLK_INTEGRITY_CSUM_CRC64;
1819 bi->tag_size = sizeof(u16) + 6;
1820 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1821 break;
1822 default:
1823 break;
1824 }
1825 break;
1826 case NVME_NS_DPS_PI_TYPE1:
1827 case NVME_NS_DPS_PI_TYPE2:
1828 switch (head->guard_type) {
1829 case NVME_NVM_NS_16B_GUARD:
1830 bi->csum_type = BLK_INTEGRITY_CSUM_CRC;
1831 bi->tag_size = sizeof(u16);
1832 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE |
1833 BLK_INTEGRITY_REF_TAG;
1834 break;
1835 case NVME_NVM_NS_64B_GUARD:
1836 bi->csum_type = BLK_INTEGRITY_CSUM_CRC64;
1837 bi->tag_size = sizeof(u16);
1838 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE |
1839 BLK_INTEGRITY_REF_TAG;
1840 break;
1841 default:
1842 break;
1843 }
1844 break;
1845 default:
1846 break;
1847 }
1848
1849 bi->tuple_size = head->ms;
1850 bi->pi_offset = info->pi_offset;
1851 return true;
1852 }
1853
nvme_config_discard(struct nvme_ns * ns,struct queue_limits * lim)1854 static void nvme_config_discard(struct nvme_ns *ns, struct queue_limits *lim)
1855 {
1856 struct nvme_ctrl *ctrl = ns->ctrl;
1857
1858 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns->head, UINT_MAX))
1859 lim->max_hw_discard_sectors =
1860 nvme_lba_to_sect(ns->head, ctrl->dmrsl);
1861 else if (ctrl->oncs & NVME_CTRL_ONCS_DSM)
1862 lim->max_hw_discard_sectors = UINT_MAX;
1863 else
1864 lim->max_hw_discard_sectors = 0;
1865
1866 lim->discard_granularity = lim->logical_block_size;
1867
1868 if (ctrl->dmrl)
1869 lim->max_discard_segments = ctrl->dmrl;
1870 else
1871 lim->max_discard_segments = NVME_DSM_MAX_RANGES;
1872 }
1873
nvme_ns_ids_equal(struct nvme_ns_ids * a,struct nvme_ns_ids * b)1874 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1875 {
1876 return uuid_equal(&a->uuid, &b->uuid) &&
1877 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1878 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1879 a->csi == b->csi;
1880 }
1881
nvme_identify_ns_nvm(struct nvme_ctrl * ctrl,unsigned int nsid,struct nvme_id_ns_nvm ** nvmp)1882 static int nvme_identify_ns_nvm(struct nvme_ctrl *ctrl, unsigned int nsid,
1883 struct nvme_id_ns_nvm **nvmp)
1884 {
1885 struct nvme_command c = {
1886 .identify.opcode = nvme_admin_identify,
1887 .identify.nsid = cpu_to_le32(nsid),
1888 .identify.cns = NVME_ID_CNS_CS_NS,
1889 .identify.csi = NVME_CSI_NVM,
1890 };
1891 struct nvme_id_ns_nvm *nvm;
1892 int ret;
1893
1894 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1895 if (!nvm)
1896 return -ENOMEM;
1897
1898 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm));
1899 if (ret)
1900 kfree(nvm);
1901 else
1902 *nvmp = nvm;
1903 return ret;
1904 }
1905
nvme_configure_pi_elbas(struct nvme_ns_head * head,struct nvme_id_ns * id,struct nvme_id_ns_nvm * nvm)1906 static void nvme_configure_pi_elbas(struct nvme_ns_head *head,
1907 struct nvme_id_ns *id, struct nvme_id_ns_nvm *nvm)
1908 {
1909 u32 elbaf = le32_to_cpu(nvm->elbaf[nvme_lbaf_index(id->flbas)]);
1910 u8 guard_type;
1911
1912 /* no support for storage tag formats right now */
1913 if (nvme_elbaf_sts(elbaf))
1914 return;
1915
1916 guard_type = nvme_elbaf_guard_type(elbaf);
1917 if ((nvm->pic & NVME_ID_NS_NVM_QPIFS) &&
1918 guard_type == NVME_NVM_NS_QTYPE_GUARD)
1919 guard_type = nvme_elbaf_qualified_guard_type(elbaf);
1920
1921 head->guard_type = guard_type;
1922 switch (head->guard_type) {
1923 case NVME_NVM_NS_64B_GUARD:
1924 head->pi_size = sizeof(struct crc64_pi_tuple);
1925 break;
1926 case NVME_NVM_NS_16B_GUARD:
1927 head->pi_size = sizeof(struct t10_pi_tuple);
1928 break;
1929 default:
1930 break;
1931 }
1932 }
1933
nvme_configure_metadata(struct nvme_ctrl * ctrl,struct nvme_ns_head * head,struct nvme_id_ns * id,struct nvme_id_ns_nvm * nvm,struct nvme_ns_info * info)1934 static void nvme_configure_metadata(struct nvme_ctrl *ctrl,
1935 struct nvme_ns_head *head, struct nvme_id_ns *id,
1936 struct nvme_id_ns_nvm *nvm, struct nvme_ns_info *info)
1937 {
1938 head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1939 head->pi_type = 0;
1940 head->pi_size = 0;
1941 head->ms = le16_to_cpu(id->lbaf[nvme_lbaf_index(id->flbas)].ms);
1942 if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1943 return;
1944
1945 if (nvm && (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1946 nvme_configure_pi_elbas(head, id, nvm);
1947 } else {
1948 head->pi_size = sizeof(struct t10_pi_tuple);
1949 head->guard_type = NVME_NVM_NS_16B_GUARD;
1950 }
1951
1952 if (head->pi_size && head->ms >= head->pi_size)
1953 head->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1954 if (!(id->dps & NVME_NS_DPS_PI_FIRST)) {
1955 if (disable_pi_offsets)
1956 head->pi_type = 0;
1957 else
1958 info->pi_offset = head->ms - head->pi_size;
1959 }
1960
1961 if (ctrl->ops->flags & NVME_F_FABRICS) {
1962 /*
1963 * The NVMe over Fabrics specification only supports metadata as
1964 * part of the extended data LBA. We rely on HCA/HBA support to
1965 * remap the separate metadata buffer from the block layer.
1966 */
1967 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1968 return;
1969
1970 head->features |= NVME_NS_EXT_LBAS;
1971
1972 /*
1973 * The current fabrics transport drivers support namespace
1974 * metadata formats only if nvme_ns_has_pi() returns true.
1975 * Suppress support for all other formats so the namespace will
1976 * have a 0 capacity and not be usable through the block stack.
1977 *
1978 * Note, this check will need to be modified if any drivers
1979 * gain the ability to use other metadata formats.
1980 */
1981 if (ctrl->max_integrity_segments && nvme_ns_has_pi(head))
1982 head->features |= NVME_NS_METADATA_SUPPORTED;
1983 } else {
1984 /*
1985 * For PCIe controllers, we can't easily remap the separate
1986 * metadata buffer from the block layer and thus require a
1987 * separate metadata buffer for block layer metadata/PI support.
1988 * We allow extended LBAs for the passthrough interface, though.
1989 */
1990 if (id->flbas & NVME_NS_FLBAS_META_EXT)
1991 head->features |= NVME_NS_EXT_LBAS;
1992 else
1993 head->features |= NVME_NS_METADATA_SUPPORTED;
1994 }
1995 }
1996
1997
nvme_update_atomic_write_disk_info(struct nvme_ns * ns,struct nvme_id_ns * id,struct queue_limits * lim,u32 bs,u32 atomic_bs)1998 static void nvme_update_atomic_write_disk_info(struct nvme_ns *ns,
1999 struct nvme_id_ns *id, struct queue_limits *lim,
2000 u32 bs, u32 atomic_bs)
2001 {
2002 unsigned int boundary = 0;
2003
2004 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) {
2005 if (le16_to_cpu(id->nabspf))
2006 boundary = (le16_to_cpu(id->nabspf) + 1) * bs;
2007 }
2008 lim->atomic_write_hw_max = atomic_bs;
2009 lim->atomic_write_hw_boundary = boundary;
2010 lim->atomic_write_hw_unit_min = bs;
2011 lim->atomic_write_hw_unit_max = rounddown_pow_of_two(atomic_bs);
2012 }
2013
nvme_max_drv_segments(struct nvme_ctrl * ctrl)2014 static u32 nvme_max_drv_segments(struct nvme_ctrl *ctrl)
2015 {
2016 return ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> SECTOR_SHIFT) + 1;
2017 }
2018
nvme_set_ctrl_limits(struct nvme_ctrl * ctrl,struct queue_limits * lim)2019 static void nvme_set_ctrl_limits(struct nvme_ctrl *ctrl,
2020 struct queue_limits *lim)
2021 {
2022 lim->max_hw_sectors = ctrl->max_hw_sectors;
2023 lim->max_segments = min_t(u32, USHRT_MAX,
2024 min_not_zero(nvme_max_drv_segments(ctrl), ctrl->max_segments));
2025 lim->max_integrity_segments = ctrl->max_integrity_segments;
2026 lim->virt_boundary_mask = NVME_CTRL_PAGE_SIZE - 1;
2027 lim->max_segment_size = UINT_MAX;
2028 lim->dma_alignment = 3;
2029 }
2030
nvme_update_disk_info(struct nvme_ns * ns,struct nvme_id_ns * id,struct queue_limits * lim)2031 static bool nvme_update_disk_info(struct nvme_ns *ns, struct nvme_id_ns *id,
2032 struct queue_limits *lim)
2033 {
2034 struct nvme_ns_head *head = ns->head;
2035 u32 bs = 1U << head->lba_shift;
2036 u32 atomic_bs, phys_bs, io_opt = 0;
2037 bool valid = true;
2038
2039 /*
2040 * The block layer can't support LBA sizes larger than the page size
2041 * or smaller than a sector size yet, so catch this early and don't
2042 * allow block I/O.
2043 */
2044 if (head->lba_shift > PAGE_SHIFT || head->lba_shift < SECTOR_SHIFT) {
2045 bs = (1 << 9);
2046 valid = false;
2047 }
2048
2049 atomic_bs = phys_bs = bs;
2050 if (id->nabo == 0) {
2051 /*
2052 * Bit 1 indicates whether NAWUPF is defined for this namespace
2053 * and whether it should be used instead of AWUPF. If NAWUPF ==
2054 * 0 then AWUPF must be used instead.
2055 */
2056 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
2057 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
2058 else
2059 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs;
2060
2061 nvme_update_atomic_write_disk_info(ns, id, lim, bs, atomic_bs);
2062 }
2063
2064 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
2065 /* NPWG = Namespace Preferred Write Granularity */
2066 phys_bs = bs * (1 + le16_to_cpu(id->npwg));
2067 /* NOWS = Namespace Optimal Write Size */
2068 if (id->nows)
2069 io_opt = bs * (1 + le16_to_cpu(id->nows));
2070 }
2071
2072 /*
2073 * Linux filesystems assume writing a single physical block is
2074 * an atomic operation. Hence limit the physical block size to the
2075 * value of the Atomic Write Unit Power Fail parameter.
2076 */
2077 lim->logical_block_size = bs;
2078 lim->physical_block_size = min(phys_bs, atomic_bs);
2079 lim->io_min = phys_bs;
2080 lim->io_opt = io_opt;
2081 if ((ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) &&
2082 (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM))
2083 lim->max_write_zeroes_sectors = UINT_MAX;
2084 else
2085 lim->max_write_zeroes_sectors = ns->ctrl->max_zeroes_sectors;
2086 return valid;
2087 }
2088
nvme_ns_is_readonly(struct nvme_ns * ns,struct nvme_ns_info * info)2089 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
2090 {
2091 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
2092 }
2093
nvme_first_scan(struct gendisk * disk)2094 static inline bool nvme_first_scan(struct gendisk *disk)
2095 {
2096 /* nvme_alloc_ns() scans the disk prior to adding it */
2097 return !disk_live(disk);
2098 }
2099
nvme_set_chunk_sectors(struct nvme_ns * ns,struct nvme_id_ns * id,struct queue_limits * lim)2100 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id,
2101 struct queue_limits *lim)
2102 {
2103 struct nvme_ctrl *ctrl = ns->ctrl;
2104 u32 iob;
2105
2106 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
2107 is_power_of_2(ctrl->max_hw_sectors))
2108 iob = ctrl->max_hw_sectors;
2109 else
2110 iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob));
2111
2112 if (!iob)
2113 return;
2114
2115 if (!is_power_of_2(iob)) {
2116 if (nvme_first_scan(ns->disk))
2117 pr_warn("%s: ignoring unaligned IO boundary:%u\n",
2118 ns->disk->disk_name, iob);
2119 return;
2120 }
2121
2122 if (blk_queue_is_zoned(ns->disk->queue)) {
2123 if (nvme_first_scan(ns->disk))
2124 pr_warn("%s: ignoring zoned namespace IO boundary\n",
2125 ns->disk->disk_name);
2126 return;
2127 }
2128
2129 lim->chunk_sectors = iob;
2130 }
2131
nvme_update_ns_info_generic(struct nvme_ns * ns,struct nvme_ns_info * info)2132 static int nvme_update_ns_info_generic(struct nvme_ns *ns,
2133 struct nvme_ns_info *info)
2134 {
2135 struct queue_limits lim;
2136 int ret;
2137
2138 lim = queue_limits_start_update(ns->disk->queue);
2139 nvme_set_ctrl_limits(ns->ctrl, &lim);
2140
2141 blk_mq_freeze_queue(ns->disk->queue);
2142 ret = queue_limits_commit_update(ns->disk->queue, &lim);
2143 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2144 blk_mq_unfreeze_queue(ns->disk->queue);
2145
2146 /* Hide the block-interface for these devices */
2147 if (!ret)
2148 ret = -ENODEV;
2149 return ret;
2150 }
2151
nvme_update_ns_info_block(struct nvme_ns * ns,struct nvme_ns_info * info)2152 static int nvme_update_ns_info_block(struct nvme_ns *ns,
2153 struct nvme_ns_info *info)
2154 {
2155 struct queue_limits lim;
2156 struct nvme_id_ns_nvm *nvm = NULL;
2157 struct nvme_zone_info zi = {};
2158 struct nvme_id_ns *id;
2159 sector_t capacity;
2160 unsigned lbaf;
2161 int ret;
2162
2163 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2164 if (ret)
2165 return ret;
2166
2167 if (id->ncap == 0) {
2168 /* namespace not allocated or attached */
2169 info->is_removed = true;
2170 ret = -ENXIO;
2171 goto out;
2172 }
2173 lbaf = nvme_lbaf_index(id->flbas);
2174
2175 if (ns->ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) {
2176 ret = nvme_identify_ns_nvm(ns->ctrl, info->nsid, &nvm);
2177 if (ret < 0)
2178 goto out;
2179 }
2180
2181 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
2182 ns->head->ids.csi == NVME_CSI_ZNS) {
2183 ret = nvme_query_zone_info(ns, lbaf, &zi);
2184 if (ret < 0)
2185 goto out;
2186 }
2187
2188 lim = queue_limits_start_update(ns->disk->queue);
2189
2190 blk_mq_freeze_queue(ns->disk->queue);
2191 ns->head->lba_shift = id->lbaf[lbaf].ds;
2192 ns->head->nuse = le64_to_cpu(id->nuse);
2193 capacity = nvme_lba_to_sect(ns->head, le64_to_cpu(id->nsze));
2194 nvme_set_ctrl_limits(ns->ctrl, &lim);
2195 nvme_configure_metadata(ns->ctrl, ns->head, id, nvm, info);
2196 nvme_set_chunk_sectors(ns, id, &lim);
2197 if (!nvme_update_disk_info(ns, id, &lim))
2198 capacity = 0;
2199 nvme_config_discard(ns, &lim);
2200 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
2201 ns->head->ids.csi == NVME_CSI_ZNS)
2202 nvme_update_zone_info(ns, &lim, &zi);
2203
2204 if (ns->ctrl->vwc & NVME_CTRL_VWC_PRESENT)
2205 lim.features |= BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA;
2206 else
2207 lim.features &= ~(BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA);
2208
2209 /*
2210 * Register a metadata profile for PI, or the plain non-integrity NVMe
2211 * metadata masquerading as Type 0 if supported, otherwise reject block
2212 * I/O to namespaces with metadata except when the namespace supports
2213 * PI, as it can strip/insert in that case.
2214 */
2215 if (!nvme_init_integrity(ns->head, &lim, info))
2216 capacity = 0;
2217
2218 ret = queue_limits_commit_update(ns->disk->queue, &lim);
2219 if (ret) {
2220 blk_mq_unfreeze_queue(ns->disk->queue);
2221 goto out;
2222 }
2223
2224 set_capacity_and_notify(ns->disk, capacity);
2225
2226 /*
2227 * Only set the DEAC bit if the device guarantees that reads from
2228 * deallocated data return zeroes. While the DEAC bit does not
2229 * require that, it must be a no-op if reads from deallocated data
2230 * do not return zeroes.
2231 */
2232 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
2233 ns->head->features |= NVME_NS_DEAC;
2234 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2235 set_bit(NVME_NS_READY, &ns->flags);
2236 blk_mq_unfreeze_queue(ns->disk->queue);
2237
2238 if (blk_queue_is_zoned(ns->queue)) {
2239 ret = blk_revalidate_disk_zones(ns->disk);
2240 if (ret && !nvme_first_scan(ns->disk))
2241 goto out;
2242 }
2243
2244 ret = 0;
2245 out:
2246 kfree(nvm);
2247 kfree(id);
2248 return ret;
2249 }
2250
nvme_update_ns_info(struct nvme_ns * ns,struct nvme_ns_info * info)2251 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2252 {
2253 bool unsupported = false;
2254 int ret;
2255
2256 switch (info->ids.csi) {
2257 case NVME_CSI_ZNS:
2258 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2259 dev_info(ns->ctrl->device,
2260 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2261 info->nsid);
2262 ret = nvme_update_ns_info_generic(ns, info);
2263 break;
2264 }
2265 ret = nvme_update_ns_info_block(ns, info);
2266 break;
2267 case NVME_CSI_NVM:
2268 ret = nvme_update_ns_info_block(ns, info);
2269 break;
2270 default:
2271 dev_info(ns->ctrl->device,
2272 "block device for nsid %u not supported (csi %u)\n",
2273 info->nsid, info->ids.csi);
2274 ret = nvme_update_ns_info_generic(ns, info);
2275 break;
2276 }
2277
2278 /*
2279 * If probing fails due an unsupported feature, hide the block device,
2280 * but still allow other access.
2281 */
2282 if (ret == -ENODEV) {
2283 ns->disk->flags |= GENHD_FL_HIDDEN;
2284 set_bit(NVME_NS_READY, &ns->flags);
2285 unsupported = true;
2286 ret = 0;
2287 }
2288
2289 if (!ret && nvme_ns_head_multipath(ns->head)) {
2290 struct queue_limits *ns_lim = &ns->disk->queue->limits;
2291 struct queue_limits lim;
2292
2293 lim = queue_limits_start_update(ns->head->disk->queue);
2294 blk_mq_freeze_queue(ns->head->disk->queue);
2295 /*
2296 * queue_limits mixes values that are the hardware limitations
2297 * for bio splitting with what is the device configuration.
2298 *
2299 * For NVMe the device configuration can change after e.g. a
2300 * Format command, and we really want to pick up the new format
2301 * value here. But we must still stack the queue limits to the
2302 * least common denominator for multipathing to split the bios
2303 * properly.
2304 *
2305 * To work around this, we explicitly set the device
2306 * configuration to those that we just queried, but only stack
2307 * the splitting limits in to make sure we still obey possibly
2308 * lower limitations of other controllers.
2309 */
2310 lim.logical_block_size = ns_lim->logical_block_size;
2311 lim.physical_block_size = ns_lim->physical_block_size;
2312 lim.io_min = ns_lim->io_min;
2313 lim.io_opt = ns_lim->io_opt;
2314 queue_limits_stack_bdev(&lim, ns->disk->part0, 0,
2315 ns->head->disk->disk_name);
2316 if (unsupported)
2317 ns->head->disk->flags |= GENHD_FL_HIDDEN;
2318 else
2319 nvme_init_integrity(ns->head, &lim, info);
2320 ret = queue_limits_commit_update(ns->head->disk->queue, &lim);
2321
2322 set_capacity_and_notify(ns->head->disk, get_capacity(ns->disk));
2323 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2324 nvme_mpath_revalidate_paths(ns);
2325
2326 blk_mq_unfreeze_queue(ns->head->disk->queue);
2327 }
2328
2329 return ret;
2330 }
2331
nvme_ns_get_unique_id(struct nvme_ns * ns,u8 id[16],enum blk_unique_id type)2332 int nvme_ns_get_unique_id(struct nvme_ns *ns, u8 id[16],
2333 enum blk_unique_id type)
2334 {
2335 struct nvme_ns_ids *ids = &ns->head->ids;
2336
2337 if (type != BLK_UID_EUI64)
2338 return -EINVAL;
2339
2340 if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) {
2341 memcpy(id, &ids->nguid, sizeof(ids->nguid));
2342 return sizeof(ids->nguid);
2343 }
2344 if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) {
2345 memcpy(id, &ids->eui64, sizeof(ids->eui64));
2346 return sizeof(ids->eui64);
2347 }
2348
2349 return -EINVAL;
2350 }
2351
nvme_get_unique_id(struct gendisk * disk,u8 id[16],enum blk_unique_id type)2352 static int nvme_get_unique_id(struct gendisk *disk, u8 id[16],
2353 enum blk_unique_id type)
2354 {
2355 return nvme_ns_get_unique_id(disk->private_data, id, type);
2356 }
2357
2358 #ifdef CONFIG_BLK_SED_OPAL
nvme_sec_submit(void * data,u16 spsp,u8 secp,void * buffer,size_t len,bool send)2359 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2360 bool send)
2361 {
2362 struct nvme_ctrl *ctrl = data;
2363 struct nvme_command cmd = { };
2364
2365 if (send)
2366 cmd.common.opcode = nvme_admin_security_send;
2367 else
2368 cmd.common.opcode = nvme_admin_security_recv;
2369 cmd.common.nsid = 0;
2370 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2371 cmd.common.cdw11 = cpu_to_le32(len);
2372
2373 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2374 NVME_QID_ANY, NVME_SUBMIT_AT_HEAD);
2375 }
2376
nvme_configure_opal(struct nvme_ctrl * ctrl,bool was_suspended)2377 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2378 {
2379 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2380 if (!ctrl->opal_dev)
2381 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2382 else if (was_suspended)
2383 opal_unlock_from_suspend(ctrl->opal_dev);
2384 } else {
2385 free_opal_dev(ctrl->opal_dev);
2386 ctrl->opal_dev = NULL;
2387 }
2388 }
2389 #else
nvme_configure_opal(struct nvme_ctrl * ctrl,bool was_suspended)2390 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2391 {
2392 }
2393 #endif /* CONFIG_BLK_SED_OPAL */
2394
2395 #ifdef CONFIG_BLK_DEV_ZONED
nvme_report_zones(struct gendisk * disk,sector_t sector,unsigned int nr_zones,report_zones_cb cb,void * data)2396 static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2397 unsigned int nr_zones, report_zones_cb cb, void *data)
2398 {
2399 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2400 data);
2401 }
2402 #else
2403 #define nvme_report_zones NULL
2404 #endif /* CONFIG_BLK_DEV_ZONED */
2405
2406 const struct block_device_operations nvme_bdev_ops = {
2407 .owner = THIS_MODULE,
2408 .ioctl = nvme_ioctl,
2409 .compat_ioctl = blkdev_compat_ptr_ioctl,
2410 .open = nvme_open,
2411 .release = nvme_release,
2412 .getgeo = nvme_getgeo,
2413 .get_unique_id = nvme_get_unique_id,
2414 .report_zones = nvme_report_zones,
2415 .pr_ops = &nvme_pr_ops,
2416 };
2417
nvme_wait_ready(struct nvme_ctrl * ctrl,u32 mask,u32 val,u32 timeout,const char * op)2418 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2419 u32 timeout, const char *op)
2420 {
2421 unsigned long timeout_jiffies = jiffies + timeout * HZ;
2422 u32 csts;
2423 int ret;
2424
2425 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2426 if (csts == ~0)
2427 return -ENODEV;
2428 if ((csts & mask) == val)
2429 break;
2430
2431 usleep_range(1000, 2000);
2432 if (fatal_signal_pending(current))
2433 return -EINTR;
2434 if (time_after(jiffies, timeout_jiffies)) {
2435 dev_err(ctrl->device,
2436 "Device not ready; aborting %s, CSTS=0x%x\n",
2437 op, csts);
2438 return -ENODEV;
2439 }
2440 }
2441
2442 return ret;
2443 }
2444
nvme_disable_ctrl(struct nvme_ctrl * ctrl,bool shutdown)2445 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2446 {
2447 int ret;
2448
2449 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2450 if (shutdown)
2451 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2452 else
2453 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2454
2455 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2456 if (ret)
2457 return ret;
2458
2459 if (shutdown) {
2460 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2461 NVME_CSTS_SHST_CMPLT,
2462 ctrl->shutdown_timeout, "shutdown");
2463 }
2464 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2465 msleep(NVME_QUIRK_DELAY_AMOUNT);
2466 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2467 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2468 }
2469 EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2470
nvme_enable_ctrl(struct nvme_ctrl * ctrl)2471 int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2472 {
2473 unsigned dev_page_min;
2474 u32 timeout;
2475 int ret;
2476
2477 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2478 if (ret) {
2479 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2480 return ret;
2481 }
2482 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2483
2484 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2485 dev_err(ctrl->device,
2486 "Minimum device page size %u too large for host (%u)\n",
2487 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2488 return -ENODEV;
2489 }
2490
2491 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2492 ctrl->ctrl_config = NVME_CC_CSS_CSI;
2493 else
2494 ctrl->ctrl_config = NVME_CC_CSS_NVM;
2495
2496 /*
2497 * Setting CRIME results in CSTS.RDY before the media is ready. This
2498 * makes it possible for media related commands to return the error
2499 * NVME_SC_ADMIN_COMMAND_MEDIA_NOT_READY. Until the driver is
2500 * restructured to handle retries, disable CC.CRIME.
2501 */
2502 ctrl->ctrl_config &= ~NVME_CC_CRIME;
2503
2504 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2505 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2506 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2507 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2508 if (ret)
2509 return ret;
2510
2511 /* CAP value may change after initial CC write */
2512 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2513 if (ret)
2514 return ret;
2515
2516 timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2517 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2518 u32 crto, ready_timeout;
2519
2520 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2521 if (ret) {
2522 dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2523 ret);
2524 return ret;
2525 }
2526
2527 /*
2528 * CRTO should always be greater or equal to CAP.TO, but some
2529 * devices are known to get this wrong. Use the larger of the
2530 * two values.
2531 */
2532 ready_timeout = NVME_CRTO_CRWMT(crto);
2533
2534 if (ready_timeout < timeout)
2535 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
2536 crto, ctrl->cap);
2537 else
2538 timeout = ready_timeout;
2539 }
2540
2541 ctrl->ctrl_config |= NVME_CC_ENABLE;
2542 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2543 if (ret)
2544 return ret;
2545 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2546 (timeout + 1) / 2, "initialisation");
2547 }
2548 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2549
nvme_configure_timestamp(struct nvme_ctrl * ctrl)2550 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2551 {
2552 __le64 ts;
2553 int ret;
2554
2555 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2556 return 0;
2557
2558 ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2559 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2560 NULL);
2561 if (ret)
2562 dev_warn_once(ctrl->device,
2563 "could not set timestamp (%d)\n", ret);
2564 return ret;
2565 }
2566
nvme_configure_host_options(struct nvme_ctrl * ctrl)2567 static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2568 {
2569 struct nvme_feat_host_behavior *host;
2570 u8 acre = 0, lbafee = 0;
2571 int ret;
2572
2573 /* Don't bother enabling the feature if retry delay is not reported */
2574 if (ctrl->crdt[0])
2575 acre = NVME_ENABLE_ACRE;
2576 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2577 lbafee = NVME_ENABLE_LBAFEE;
2578
2579 if (!acre && !lbafee)
2580 return 0;
2581
2582 host = kzalloc(sizeof(*host), GFP_KERNEL);
2583 if (!host)
2584 return 0;
2585
2586 host->acre = acre;
2587 host->lbafee = lbafee;
2588 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2589 host, sizeof(*host), NULL);
2590 kfree(host);
2591 return ret;
2592 }
2593
2594 /*
2595 * The function checks whether the given total (exlat + enlat) latency of
2596 * a power state allows the latter to be used as an APST transition target.
2597 * It does so by comparing the latency to the primary and secondary latency
2598 * tolerances defined by module params. If there's a match, the corresponding
2599 * timeout value is returned and the matching tolerance index (1 or 2) is
2600 * reported.
2601 */
nvme_apst_get_transition_time(u64 total_latency,u64 * transition_time,unsigned * last_index)2602 static bool nvme_apst_get_transition_time(u64 total_latency,
2603 u64 *transition_time, unsigned *last_index)
2604 {
2605 if (total_latency <= apst_primary_latency_tol_us) {
2606 if (*last_index == 1)
2607 return false;
2608 *last_index = 1;
2609 *transition_time = apst_primary_timeout_ms;
2610 return true;
2611 }
2612 if (apst_secondary_timeout_ms &&
2613 total_latency <= apst_secondary_latency_tol_us) {
2614 if (*last_index <= 2)
2615 return false;
2616 *last_index = 2;
2617 *transition_time = apst_secondary_timeout_ms;
2618 return true;
2619 }
2620 return false;
2621 }
2622
2623 /*
2624 * APST (Autonomous Power State Transition) lets us program a table of power
2625 * state transitions that the controller will perform automatically.
2626 *
2627 * Depending on module params, one of the two supported techniques will be used:
2628 *
2629 * - If the parameters provide explicit timeouts and tolerances, they will be
2630 * used to build a table with up to 2 non-operational states to transition to.
2631 * The default parameter values were selected based on the values used by
2632 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2633 * regeneration of the APST table in the event of switching between external
2634 * and battery power, the timeouts and tolerances reflect a compromise
2635 * between values used by Microsoft for AC and battery scenarios.
2636 * - If not, we'll configure the table with a simple heuristic: we are willing
2637 * to spend at most 2% of the time transitioning between power states.
2638 * Therefore, when running in any given state, we will enter the next
2639 * lower-power non-operational state after waiting 50 * (enlat + exlat)
2640 * microseconds, as long as that state's exit latency is under the requested
2641 * maximum latency.
2642 *
2643 * We will not autonomously enter any non-operational state for which the total
2644 * latency exceeds ps_max_latency_us.
2645 *
2646 * Users can set ps_max_latency_us to zero to turn off APST.
2647 */
nvme_configure_apst(struct nvme_ctrl * ctrl)2648 static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2649 {
2650 struct nvme_feat_auto_pst *table;
2651 unsigned apste = 0;
2652 u64 max_lat_us = 0;
2653 __le64 target = 0;
2654 int max_ps = -1;
2655 int state;
2656 int ret;
2657 unsigned last_lt_index = UINT_MAX;
2658
2659 /*
2660 * If APST isn't supported or if we haven't been initialized yet,
2661 * then don't do anything.
2662 */
2663 if (!ctrl->apsta)
2664 return 0;
2665
2666 if (ctrl->npss > 31) {
2667 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2668 return 0;
2669 }
2670
2671 table = kzalloc(sizeof(*table), GFP_KERNEL);
2672 if (!table)
2673 return 0;
2674
2675 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2676 /* Turn off APST. */
2677 dev_dbg(ctrl->device, "APST disabled\n");
2678 goto done;
2679 }
2680
2681 /*
2682 * Walk through all states from lowest- to highest-power.
2683 * According to the spec, lower-numbered states use more power. NPSS,
2684 * despite the name, is the index of the lowest-power state, not the
2685 * number of states.
2686 */
2687 for (state = (int)ctrl->npss; state >= 0; state--) {
2688 u64 total_latency_us, exit_latency_us, transition_ms;
2689
2690 if (target)
2691 table->entries[state] = target;
2692
2693 /*
2694 * Don't allow transitions to the deepest state if it's quirked
2695 * off.
2696 */
2697 if (state == ctrl->npss &&
2698 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2699 continue;
2700
2701 /*
2702 * Is this state a useful non-operational state for higher-power
2703 * states to autonomously transition to?
2704 */
2705 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2706 continue;
2707
2708 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2709 if (exit_latency_us > ctrl->ps_max_latency_us)
2710 continue;
2711
2712 total_latency_us = exit_latency_us +
2713 le32_to_cpu(ctrl->psd[state].entry_lat);
2714
2715 /*
2716 * This state is good. It can be used as the APST idle target
2717 * for higher power states.
2718 */
2719 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2720 if (!nvme_apst_get_transition_time(total_latency_us,
2721 &transition_ms, &last_lt_index))
2722 continue;
2723 } else {
2724 transition_ms = total_latency_us + 19;
2725 do_div(transition_ms, 20);
2726 if (transition_ms > (1 << 24) - 1)
2727 transition_ms = (1 << 24) - 1;
2728 }
2729
2730 target = cpu_to_le64((state << 3) | (transition_ms << 8));
2731 if (max_ps == -1)
2732 max_ps = state;
2733 if (total_latency_us > max_lat_us)
2734 max_lat_us = total_latency_us;
2735 }
2736
2737 if (max_ps == -1)
2738 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2739 else
2740 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2741 max_ps, max_lat_us, (int)sizeof(*table), table);
2742 apste = 1;
2743
2744 done:
2745 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2746 table, sizeof(*table), NULL);
2747 if (ret)
2748 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2749 kfree(table);
2750 return ret;
2751 }
2752
nvme_set_latency_tolerance(struct device * dev,s32 val)2753 static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2754 {
2755 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2756 u64 latency;
2757
2758 switch (val) {
2759 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2760 case PM_QOS_LATENCY_ANY:
2761 latency = U64_MAX;
2762 break;
2763
2764 default:
2765 latency = val;
2766 }
2767
2768 if (ctrl->ps_max_latency_us != latency) {
2769 ctrl->ps_max_latency_us = latency;
2770 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
2771 nvme_configure_apst(ctrl);
2772 }
2773 }
2774
2775 struct nvme_core_quirk_entry {
2776 /*
2777 * NVMe model and firmware strings are padded with spaces. For
2778 * simplicity, strings in the quirk table are padded with NULLs
2779 * instead.
2780 */
2781 u16 vid;
2782 const char *mn;
2783 const char *fr;
2784 unsigned long quirks;
2785 };
2786
2787 static const struct nvme_core_quirk_entry core_quirks[] = {
2788 {
2789 /*
2790 * This Toshiba device seems to die using any APST states. See:
2791 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
2792 */
2793 .vid = 0x1179,
2794 .mn = "THNSF5256GPUK TOSHIBA",
2795 .quirks = NVME_QUIRK_NO_APST,
2796 },
2797 {
2798 /*
2799 * This LiteON CL1-3D*-Q11 firmware version has a race
2800 * condition associated with actions related to suspend to idle
2801 * LiteON has resolved the problem in future firmware
2802 */
2803 .vid = 0x14a4,
2804 .fr = "22301111",
2805 .quirks = NVME_QUIRK_SIMPLE_SUSPEND,
2806 },
2807 {
2808 /*
2809 * This Kioxia CD6-V Series / HPE PE8030 device times out and
2810 * aborts I/O during any load, but more easily reproducible
2811 * with discards (fstrim).
2812 *
2813 * The device is left in a state where it is also not possible
2814 * to use "nvme set-feature" to disable APST, but booting with
2815 * nvme_core.default_ps_max_latency=0 works.
2816 */
2817 .vid = 0x1e0f,
2818 .mn = "KCD6XVUL6T40",
2819 .quirks = NVME_QUIRK_NO_APST,
2820 },
2821 {
2822 /*
2823 * The external Samsung X5 SSD fails initialization without a
2824 * delay before checking if it is ready and has a whole set of
2825 * other problems. To make this even more interesting, it
2826 * shares the PCI ID with internal Samsung 970 Evo Plus that
2827 * does not need or want these quirks.
2828 */
2829 .vid = 0x144d,
2830 .mn = "Samsung Portable SSD X5",
2831 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
2832 NVME_QUIRK_NO_DEEPEST_PS |
2833 NVME_QUIRK_IGNORE_DEV_SUBNQN,
2834 }
2835 };
2836
2837 /* match is null-terminated but idstr is space-padded. */
string_matches(const char * idstr,const char * match,size_t len)2838 static bool string_matches(const char *idstr, const char *match, size_t len)
2839 {
2840 size_t matchlen;
2841
2842 if (!match)
2843 return true;
2844
2845 matchlen = strlen(match);
2846 WARN_ON_ONCE(matchlen > len);
2847
2848 if (memcmp(idstr, match, matchlen))
2849 return false;
2850
2851 for (; matchlen < len; matchlen++)
2852 if (idstr[matchlen] != ' ')
2853 return false;
2854
2855 return true;
2856 }
2857
quirk_matches(const struct nvme_id_ctrl * id,const struct nvme_core_quirk_entry * q)2858 static bool quirk_matches(const struct nvme_id_ctrl *id,
2859 const struct nvme_core_quirk_entry *q)
2860 {
2861 return q->vid == le16_to_cpu(id->vid) &&
2862 string_matches(id->mn, q->mn, sizeof(id->mn)) &&
2863 string_matches(id->fr, q->fr, sizeof(id->fr));
2864 }
2865
nvme_init_subnqn(struct nvme_subsystem * subsys,struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2866 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
2867 struct nvme_id_ctrl *id)
2868 {
2869 size_t nqnlen;
2870 int off;
2871
2872 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
2873 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
2874 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
2875 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
2876 return;
2877 }
2878
2879 if (ctrl->vs >= NVME_VS(1, 2, 1))
2880 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
2881 }
2882
2883 /*
2884 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
2885 * Base Specification 2.0. It is slightly different from the format
2886 * specified there due to historic reasons, and we can't change it now.
2887 */
2888 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
2889 "nqn.2014.08.org.nvmexpress:%04x%04x",
2890 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
2891 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
2892 off += sizeof(id->sn);
2893 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
2894 off += sizeof(id->mn);
2895 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
2896 }
2897
nvme_release_subsystem(struct device * dev)2898 static void nvme_release_subsystem(struct device *dev)
2899 {
2900 struct nvme_subsystem *subsys =
2901 container_of(dev, struct nvme_subsystem, dev);
2902
2903 if (subsys->instance >= 0)
2904 ida_free(&nvme_instance_ida, subsys->instance);
2905 kfree(subsys);
2906 }
2907
nvme_destroy_subsystem(struct kref * ref)2908 static void nvme_destroy_subsystem(struct kref *ref)
2909 {
2910 struct nvme_subsystem *subsys =
2911 container_of(ref, struct nvme_subsystem, ref);
2912
2913 mutex_lock(&nvme_subsystems_lock);
2914 list_del(&subsys->entry);
2915 mutex_unlock(&nvme_subsystems_lock);
2916
2917 ida_destroy(&subsys->ns_ida);
2918 device_del(&subsys->dev);
2919 put_device(&subsys->dev);
2920 }
2921
nvme_put_subsystem(struct nvme_subsystem * subsys)2922 static void nvme_put_subsystem(struct nvme_subsystem *subsys)
2923 {
2924 kref_put(&subsys->ref, nvme_destroy_subsystem);
2925 }
2926
__nvme_find_get_subsystem(const char * subsysnqn)2927 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
2928 {
2929 struct nvme_subsystem *subsys;
2930
2931 lockdep_assert_held(&nvme_subsystems_lock);
2932
2933 /*
2934 * Fail matches for discovery subsystems. This results
2935 * in each discovery controller bound to a unique subsystem.
2936 * This avoids issues with validating controller values
2937 * that can only be true when there is a single unique subsystem.
2938 * There may be multiple and completely independent entities
2939 * that provide discovery controllers.
2940 */
2941 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
2942 return NULL;
2943
2944 list_for_each_entry(subsys, &nvme_subsystems, entry) {
2945 if (strcmp(subsys->subnqn, subsysnqn))
2946 continue;
2947 if (!kref_get_unless_zero(&subsys->ref))
2948 continue;
2949 return subsys;
2950 }
2951
2952 return NULL;
2953 }
2954
nvme_discovery_ctrl(struct nvme_ctrl * ctrl)2955 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
2956 {
2957 return ctrl->opts && ctrl->opts->discovery_nqn;
2958 }
2959
nvme_validate_cntlid(struct nvme_subsystem * subsys,struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2960 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2961 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2962 {
2963 struct nvme_ctrl *tmp;
2964
2965 lockdep_assert_held(&nvme_subsystems_lock);
2966
2967 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
2968 if (nvme_state_terminal(tmp))
2969 continue;
2970
2971 if (tmp->cntlid == ctrl->cntlid) {
2972 dev_err(ctrl->device,
2973 "Duplicate cntlid %u with %s, subsys %s, rejecting\n",
2974 ctrl->cntlid, dev_name(tmp->device),
2975 subsys->subnqn);
2976 return false;
2977 }
2978
2979 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
2980 nvme_discovery_ctrl(ctrl))
2981 continue;
2982
2983 dev_err(ctrl->device,
2984 "Subsystem does not support multiple controllers\n");
2985 return false;
2986 }
2987
2988 return true;
2989 }
2990
nvme_init_subsystem(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2991 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2992 {
2993 struct nvme_subsystem *subsys, *found;
2994 int ret;
2995
2996 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
2997 if (!subsys)
2998 return -ENOMEM;
2999
3000 subsys->instance = -1;
3001 mutex_init(&subsys->lock);
3002 kref_init(&subsys->ref);
3003 INIT_LIST_HEAD(&subsys->ctrls);
3004 INIT_LIST_HEAD(&subsys->nsheads);
3005 nvme_init_subnqn(subsys, ctrl, id);
3006 memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
3007 memcpy(subsys->model, id->mn, sizeof(subsys->model));
3008 subsys->vendor_id = le16_to_cpu(id->vid);
3009 subsys->cmic = id->cmic;
3010
3011 /* Versions prior to 1.4 don't necessarily report a valid type */
3012 if (id->cntrltype == NVME_CTRL_DISC ||
3013 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
3014 subsys->subtype = NVME_NQN_DISC;
3015 else
3016 subsys->subtype = NVME_NQN_NVME;
3017
3018 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
3019 dev_err(ctrl->device,
3020 "Subsystem %s is not a discovery controller",
3021 subsys->subnqn);
3022 kfree(subsys);
3023 return -EINVAL;
3024 }
3025 subsys->awupf = le16_to_cpu(id->awupf);
3026 nvme_mpath_default_iopolicy(subsys);
3027
3028 subsys->dev.class = &nvme_subsys_class;
3029 subsys->dev.release = nvme_release_subsystem;
3030 subsys->dev.groups = nvme_subsys_attrs_groups;
3031 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
3032 device_initialize(&subsys->dev);
3033
3034 mutex_lock(&nvme_subsystems_lock);
3035 found = __nvme_find_get_subsystem(subsys->subnqn);
3036 if (found) {
3037 put_device(&subsys->dev);
3038 subsys = found;
3039
3040 if (!nvme_validate_cntlid(subsys, ctrl, id)) {
3041 ret = -EINVAL;
3042 goto out_put_subsystem;
3043 }
3044 } else {
3045 ret = device_add(&subsys->dev);
3046 if (ret) {
3047 dev_err(ctrl->device,
3048 "failed to register subsystem device.\n");
3049 put_device(&subsys->dev);
3050 goto out_unlock;
3051 }
3052 ida_init(&subsys->ns_ida);
3053 list_add_tail(&subsys->entry, &nvme_subsystems);
3054 }
3055
3056 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
3057 dev_name(ctrl->device));
3058 if (ret) {
3059 dev_err(ctrl->device,
3060 "failed to create sysfs link from subsystem.\n");
3061 goto out_put_subsystem;
3062 }
3063
3064 if (!found)
3065 subsys->instance = ctrl->instance;
3066 ctrl->subsys = subsys;
3067 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
3068 mutex_unlock(&nvme_subsystems_lock);
3069 return 0;
3070
3071 out_put_subsystem:
3072 nvme_put_subsystem(subsys);
3073 out_unlock:
3074 mutex_unlock(&nvme_subsystems_lock);
3075 return ret;
3076 }
3077
nvme_get_log(struct nvme_ctrl * ctrl,u32 nsid,u8 log_page,u8 lsp,u8 csi,void * log,size_t size,u64 offset)3078 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
3079 void *log, size_t size, u64 offset)
3080 {
3081 struct nvme_command c = { };
3082 u32 dwlen = nvme_bytes_to_numd(size);
3083
3084 c.get_log_page.opcode = nvme_admin_get_log_page;
3085 c.get_log_page.nsid = cpu_to_le32(nsid);
3086 c.get_log_page.lid = log_page;
3087 c.get_log_page.lsp = lsp;
3088 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
3089 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
3090 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
3091 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
3092 c.get_log_page.csi = csi;
3093
3094 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
3095 }
3096
nvme_get_effects_log(struct nvme_ctrl * ctrl,u8 csi,struct nvme_effects_log ** log)3097 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
3098 struct nvme_effects_log **log)
3099 {
3100 struct nvme_effects_log *old, *cel = xa_load(&ctrl->cels, csi);
3101 int ret;
3102
3103 if (cel)
3104 goto out;
3105
3106 cel = kzalloc(sizeof(*cel), GFP_KERNEL);
3107 if (!cel)
3108 return -ENOMEM;
3109
3110 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
3111 cel, sizeof(*cel), 0);
3112 if (ret) {
3113 kfree(cel);
3114 return ret;
3115 }
3116
3117 old = xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
3118 if (xa_is_err(old)) {
3119 kfree(cel);
3120 return xa_err(old);
3121 }
3122 out:
3123 *log = cel;
3124 return 0;
3125 }
3126
nvme_mps_to_sectors(struct nvme_ctrl * ctrl,u32 units)3127 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
3128 {
3129 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
3130
3131 if (check_shl_overflow(1U, units + page_shift - 9, &val))
3132 return UINT_MAX;
3133 return val;
3134 }
3135
nvme_init_non_mdts_limits(struct nvme_ctrl * ctrl)3136 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
3137 {
3138 struct nvme_command c = { };
3139 struct nvme_id_ctrl_nvm *id;
3140 int ret;
3141
3142 /*
3143 * Even though NVMe spec explicitly states that MDTS is not applicable
3144 * to the write-zeroes, we are cautious and limit the size to the
3145 * controllers max_hw_sectors value, which is based on the MDTS field
3146 * and possibly other limiting factors.
3147 */
3148 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
3149 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
3150 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
3151 else
3152 ctrl->max_zeroes_sectors = 0;
3153
3154 if (ctrl->subsys->subtype != NVME_NQN_NVME ||
3155 !nvme_id_cns_ok(ctrl, NVME_ID_CNS_CS_CTRL) ||
3156 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags))
3157 return 0;
3158
3159 id = kzalloc(sizeof(*id), GFP_KERNEL);
3160 if (!id)
3161 return -ENOMEM;
3162
3163 c.identify.opcode = nvme_admin_identify;
3164 c.identify.cns = NVME_ID_CNS_CS_CTRL;
3165 c.identify.csi = NVME_CSI_NVM;
3166
3167 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
3168 if (ret)
3169 goto free_data;
3170
3171 ctrl->dmrl = id->dmrl;
3172 ctrl->dmrsl = le32_to_cpu(id->dmrsl);
3173 if (id->wzsl)
3174 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
3175
3176 free_data:
3177 if (ret > 0)
3178 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags);
3179 kfree(id);
3180 return ret;
3181 }
3182
nvme_init_effects_log(struct nvme_ctrl * ctrl,u8 csi,struct nvme_effects_log ** log)3183 static int nvme_init_effects_log(struct nvme_ctrl *ctrl,
3184 u8 csi, struct nvme_effects_log **log)
3185 {
3186 struct nvme_effects_log *effects, *old;
3187
3188 effects = kzalloc(sizeof(*effects), GFP_KERNEL);
3189 if (!effects)
3190 return -ENOMEM;
3191
3192 old = xa_store(&ctrl->cels, csi, effects, GFP_KERNEL);
3193 if (xa_is_err(old)) {
3194 kfree(effects);
3195 return xa_err(old);
3196 }
3197
3198 *log = effects;
3199 return 0;
3200 }
3201
nvme_init_known_nvm_effects(struct nvme_ctrl * ctrl)3202 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
3203 {
3204 struct nvme_effects_log *log = ctrl->effects;
3205
3206 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3207 NVME_CMD_EFFECTS_NCC |
3208 NVME_CMD_EFFECTS_CSE_MASK);
3209 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3210 NVME_CMD_EFFECTS_CSE_MASK);
3211
3212 /*
3213 * The spec says the result of a security receive command depends on
3214 * the previous security send command. As such, many vendors log this
3215 * command as one to submitted only when no other commands to the same
3216 * namespace are outstanding. The intention is to tell the host to
3217 * prevent mixing security send and receive.
3218 *
3219 * This driver can only enforce such exclusive access against IO
3220 * queues, though. We are not readily able to enforce such a rule for
3221 * two commands to the admin queue, which is the only queue that
3222 * matters for this command.
3223 *
3224 * Rather than blindly freezing the IO queues for this effect that
3225 * doesn't even apply to IO, mask it off.
3226 */
3227 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
3228
3229 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3230 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3231 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3232 }
3233
nvme_init_effects(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)3234 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3235 {
3236 int ret = 0;
3237
3238 if (ctrl->effects)
3239 return 0;
3240
3241 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3242 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3243 if (ret < 0)
3244 return ret;
3245 }
3246
3247 if (!ctrl->effects) {
3248 ret = nvme_init_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3249 if (ret < 0)
3250 return ret;
3251 }
3252
3253 nvme_init_known_nvm_effects(ctrl);
3254 return 0;
3255 }
3256
nvme_check_ctrl_fabric_info(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)3257 static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3258 {
3259 /*
3260 * In fabrics we need to verify the cntlid matches the
3261 * admin connect
3262 */
3263 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3264 dev_err(ctrl->device,
3265 "Mismatching cntlid: Connect %u vs Identify %u, rejecting\n",
3266 ctrl->cntlid, le16_to_cpu(id->cntlid));
3267 return -EINVAL;
3268 }
3269
3270 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3271 dev_err(ctrl->device,
3272 "keep-alive support is mandatory for fabrics\n");
3273 return -EINVAL;
3274 }
3275
3276 if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) {
3277 dev_err(ctrl->device,
3278 "I/O queue command capsule supported size %d < 4\n",
3279 ctrl->ioccsz);
3280 return -EINVAL;
3281 }
3282
3283 if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) {
3284 dev_err(ctrl->device,
3285 "I/O queue response capsule supported size %d < 1\n",
3286 ctrl->iorcsz);
3287 return -EINVAL;
3288 }
3289
3290 if (!ctrl->maxcmd) {
3291 dev_warn(ctrl->device,
3292 "Firmware bug: maximum outstanding commands is 0\n");
3293 ctrl->maxcmd = ctrl->sqsize + 1;
3294 }
3295
3296 return 0;
3297 }
3298
nvme_init_identify(struct nvme_ctrl * ctrl)3299 static int nvme_init_identify(struct nvme_ctrl *ctrl)
3300 {
3301 struct queue_limits lim;
3302 struct nvme_id_ctrl *id;
3303 u32 max_hw_sectors;
3304 bool prev_apst_enabled;
3305 int ret;
3306
3307 ret = nvme_identify_ctrl(ctrl, &id);
3308 if (ret) {
3309 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3310 return -EIO;
3311 }
3312
3313 if (!(ctrl->ops->flags & NVME_F_FABRICS))
3314 ctrl->cntlid = le16_to_cpu(id->cntlid);
3315
3316 if (!ctrl->identified) {
3317 unsigned int i;
3318
3319 /*
3320 * Check for quirks. Quirk can depend on firmware version,
3321 * so, in principle, the set of quirks present can change
3322 * across a reset. As a possible future enhancement, we
3323 * could re-scan for quirks every time we reinitialize
3324 * the device, but we'd have to make sure that the driver
3325 * behaves intelligently if the quirks change.
3326 */
3327 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3328 if (quirk_matches(id, &core_quirks[i]))
3329 ctrl->quirks |= core_quirks[i].quirks;
3330 }
3331
3332 ret = nvme_init_subsystem(ctrl, id);
3333 if (ret)
3334 goto out_free;
3335
3336 ret = nvme_init_effects(ctrl, id);
3337 if (ret)
3338 goto out_free;
3339 }
3340 memcpy(ctrl->subsys->firmware_rev, id->fr,
3341 sizeof(ctrl->subsys->firmware_rev));
3342
3343 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3344 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3345 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3346 }
3347
3348 ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3349 ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3350 ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3351
3352 ctrl->oacs = le16_to_cpu(id->oacs);
3353 ctrl->oncs = le16_to_cpu(id->oncs);
3354 ctrl->mtfa = le16_to_cpu(id->mtfa);
3355 ctrl->oaes = le32_to_cpu(id->oaes);
3356 ctrl->wctemp = le16_to_cpu(id->wctemp);
3357 ctrl->cctemp = le16_to_cpu(id->cctemp);
3358
3359 atomic_set(&ctrl->abort_limit, id->acl + 1);
3360 ctrl->vwc = id->vwc;
3361 if (id->mdts)
3362 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3363 else
3364 max_hw_sectors = UINT_MAX;
3365 ctrl->max_hw_sectors =
3366 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3367
3368 lim = queue_limits_start_update(ctrl->admin_q);
3369 nvme_set_ctrl_limits(ctrl, &lim);
3370 ret = queue_limits_commit_update(ctrl->admin_q, &lim);
3371 if (ret)
3372 goto out_free;
3373
3374 ctrl->sgls = le32_to_cpu(id->sgls);
3375 ctrl->kas = le16_to_cpu(id->kas);
3376 ctrl->max_namespaces = le32_to_cpu(id->mnan);
3377 ctrl->ctratt = le32_to_cpu(id->ctratt);
3378
3379 ctrl->cntrltype = id->cntrltype;
3380 ctrl->dctype = id->dctype;
3381
3382 if (id->rtd3e) {
3383 /* us -> s */
3384 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3385
3386 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3387 shutdown_timeout, 60);
3388
3389 if (ctrl->shutdown_timeout != shutdown_timeout)
3390 dev_info(ctrl->device,
3391 "D3 entry latency set to %u seconds\n",
3392 ctrl->shutdown_timeout);
3393 } else
3394 ctrl->shutdown_timeout = shutdown_timeout;
3395
3396 ctrl->npss = id->npss;
3397 ctrl->apsta = id->apsta;
3398 prev_apst_enabled = ctrl->apst_enabled;
3399 if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3400 if (force_apst && id->apsta) {
3401 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3402 ctrl->apst_enabled = true;
3403 } else {
3404 ctrl->apst_enabled = false;
3405 }
3406 } else {
3407 ctrl->apst_enabled = id->apsta;
3408 }
3409 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3410
3411 if (ctrl->ops->flags & NVME_F_FABRICS) {
3412 ctrl->icdoff = le16_to_cpu(id->icdoff);
3413 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3414 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3415 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3416
3417 ret = nvme_check_ctrl_fabric_info(ctrl, id);
3418 if (ret)
3419 goto out_free;
3420 } else {
3421 ctrl->hmpre = le32_to_cpu(id->hmpre);
3422 ctrl->hmmin = le32_to_cpu(id->hmmin);
3423 ctrl->hmminds = le32_to_cpu(id->hmminds);
3424 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3425 }
3426
3427 ret = nvme_mpath_init_identify(ctrl, id);
3428 if (ret < 0)
3429 goto out_free;
3430
3431 if (ctrl->apst_enabled && !prev_apst_enabled)
3432 dev_pm_qos_expose_latency_tolerance(ctrl->device);
3433 else if (!ctrl->apst_enabled && prev_apst_enabled)
3434 dev_pm_qos_hide_latency_tolerance(ctrl->device);
3435
3436 out_free:
3437 kfree(id);
3438 return ret;
3439 }
3440
3441 /*
3442 * Initialize the cached copies of the Identify data and various controller
3443 * register in our nvme_ctrl structure. This should be called as soon as
3444 * the admin queue is fully up and running.
3445 */
nvme_init_ctrl_finish(struct nvme_ctrl * ctrl,bool was_suspended)3446 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3447 {
3448 int ret;
3449
3450 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3451 if (ret) {
3452 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3453 return ret;
3454 }
3455
3456 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3457
3458 if (ctrl->vs >= NVME_VS(1, 1, 0))
3459 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3460
3461 ret = nvme_init_identify(ctrl);
3462 if (ret)
3463 return ret;
3464
3465 ret = nvme_configure_apst(ctrl);
3466 if (ret < 0)
3467 return ret;
3468
3469 ret = nvme_configure_timestamp(ctrl);
3470 if (ret < 0)
3471 return ret;
3472
3473 ret = nvme_configure_host_options(ctrl);
3474 if (ret < 0)
3475 return ret;
3476
3477 nvme_configure_opal(ctrl, was_suspended);
3478
3479 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3480 /*
3481 * Do not return errors unless we are in a controller reset,
3482 * the controller works perfectly fine without hwmon.
3483 */
3484 ret = nvme_hwmon_init(ctrl);
3485 if (ret == -EINTR)
3486 return ret;
3487 }
3488
3489 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags);
3490 ctrl->identified = true;
3491
3492 nvme_start_keep_alive(ctrl);
3493
3494 return 0;
3495 }
3496 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3497
nvme_dev_open(struct inode * inode,struct file * file)3498 static int nvme_dev_open(struct inode *inode, struct file *file)
3499 {
3500 struct nvme_ctrl *ctrl =
3501 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3502
3503 switch (nvme_ctrl_state(ctrl)) {
3504 case NVME_CTRL_LIVE:
3505 break;
3506 default:
3507 return -EWOULDBLOCK;
3508 }
3509
3510 nvme_get_ctrl(ctrl);
3511 if (!try_module_get(ctrl->ops->module)) {
3512 nvme_put_ctrl(ctrl);
3513 return -EINVAL;
3514 }
3515
3516 file->private_data = ctrl;
3517 return 0;
3518 }
3519
nvme_dev_release(struct inode * inode,struct file * file)3520 static int nvme_dev_release(struct inode *inode, struct file *file)
3521 {
3522 struct nvme_ctrl *ctrl =
3523 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3524
3525 module_put(ctrl->ops->module);
3526 nvme_put_ctrl(ctrl);
3527 return 0;
3528 }
3529
3530 static const struct file_operations nvme_dev_fops = {
3531 .owner = THIS_MODULE,
3532 .open = nvme_dev_open,
3533 .release = nvme_dev_release,
3534 .unlocked_ioctl = nvme_dev_ioctl,
3535 .compat_ioctl = compat_ptr_ioctl,
3536 .uring_cmd = nvme_dev_uring_cmd,
3537 };
3538
nvme_find_ns_head(struct nvme_ctrl * ctrl,unsigned nsid)3539 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3540 unsigned nsid)
3541 {
3542 struct nvme_ns_head *h;
3543
3544 lockdep_assert_held(&ctrl->subsys->lock);
3545
3546 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3547 /*
3548 * Private namespaces can share NSIDs under some conditions.
3549 * In that case we can't use the same ns_head for namespaces
3550 * with the same NSID.
3551 */
3552 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3553 continue;
3554 if (!list_empty(&h->list) && nvme_tryget_ns_head(h))
3555 return h;
3556 }
3557
3558 return NULL;
3559 }
3560
nvme_subsys_check_duplicate_ids(struct nvme_subsystem * subsys,struct nvme_ns_ids * ids)3561 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3562 struct nvme_ns_ids *ids)
3563 {
3564 bool has_uuid = !uuid_is_null(&ids->uuid);
3565 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3566 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3567 struct nvme_ns_head *h;
3568
3569 lockdep_assert_held(&subsys->lock);
3570
3571 list_for_each_entry(h, &subsys->nsheads, entry) {
3572 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3573 return -EINVAL;
3574 if (has_nguid &&
3575 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3576 return -EINVAL;
3577 if (has_eui64 &&
3578 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
3579 return -EINVAL;
3580 }
3581
3582 return 0;
3583 }
3584
nvme_cdev_rel(struct device * dev)3585 static void nvme_cdev_rel(struct device *dev)
3586 {
3587 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
3588 }
3589
nvme_cdev_del(struct cdev * cdev,struct device * cdev_device)3590 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
3591 {
3592 cdev_device_del(cdev, cdev_device);
3593 put_device(cdev_device);
3594 }
3595
nvme_cdev_add(struct cdev * cdev,struct device * cdev_device,const struct file_operations * fops,struct module * owner)3596 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
3597 const struct file_operations *fops, struct module *owner)
3598 {
3599 int minor, ret;
3600
3601 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
3602 if (minor < 0)
3603 return minor;
3604 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
3605 cdev_device->class = &nvme_ns_chr_class;
3606 cdev_device->release = nvme_cdev_rel;
3607 device_initialize(cdev_device);
3608 cdev_init(cdev, fops);
3609 cdev->owner = owner;
3610 ret = cdev_device_add(cdev, cdev_device);
3611 if (ret)
3612 put_device(cdev_device);
3613
3614 return ret;
3615 }
3616
nvme_ns_chr_open(struct inode * inode,struct file * file)3617 static int nvme_ns_chr_open(struct inode *inode, struct file *file)
3618 {
3619 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
3620 }
3621
nvme_ns_chr_release(struct inode * inode,struct file * file)3622 static int nvme_ns_chr_release(struct inode *inode, struct file *file)
3623 {
3624 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
3625 return 0;
3626 }
3627
3628 static const struct file_operations nvme_ns_chr_fops = {
3629 .owner = THIS_MODULE,
3630 .open = nvme_ns_chr_open,
3631 .release = nvme_ns_chr_release,
3632 .unlocked_ioctl = nvme_ns_chr_ioctl,
3633 .compat_ioctl = compat_ptr_ioctl,
3634 .uring_cmd = nvme_ns_chr_uring_cmd,
3635 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
3636 };
3637
nvme_add_ns_cdev(struct nvme_ns * ns)3638 static int nvme_add_ns_cdev(struct nvme_ns *ns)
3639 {
3640 int ret;
3641
3642 ns->cdev_device.parent = ns->ctrl->device;
3643 ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
3644 ns->ctrl->instance, ns->head->instance);
3645 if (ret)
3646 return ret;
3647
3648 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
3649 ns->ctrl->ops->module);
3650 }
3651
nvme_alloc_ns_head(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)3652 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
3653 struct nvme_ns_info *info)
3654 {
3655 struct nvme_ns_head *head;
3656 size_t size = sizeof(*head);
3657 int ret = -ENOMEM;
3658
3659 #ifdef CONFIG_NVME_MULTIPATH
3660 size += num_possible_nodes() * sizeof(struct nvme_ns *);
3661 #endif
3662
3663 head = kzalloc(size, GFP_KERNEL);
3664 if (!head)
3665 goto out;
3666 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
3667 if (ret < 0)
3668 goto out_free_head;
3669 head->instance = ret;
3670 INIT_LIST_HEAD(&head->list);
3671 ret = init_srcu_struct(&head->srcu);
3672 if (ret)
3673 goto out_ida_remove;
3674 head->subsys = ctrl->subsys;
3675 head->ns_id = info->nsid;
3676 head->ids = info->ids;
3677 head->shared = info->is_shared;
3678 ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1);
3679 ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE);
3680 kref_init(&head->ref);
3681
3682 if (head->ids.csi) {
3683 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
3684 if (ret)
3685 goto out_cleanup_srcu;
3686 } else
3687 head->effects = ctrl->effects;
3688
3689 ret = nvme_mpath_alloc_disk(ctrl, head);
3690 if (ret)
3691 goto out_cleanup_srcu;
3692
3693 list_add_tail(&head->entry, &ctrl->subsys->nsheads);
3694
3695 kref_get(&ctrl->subsys->ref);
3696
3697 return head;
3698 out_cleanup_srcu:
3699 cleanup_srcu_struct(&head->srcu);
3700 out_ida_remove:
3701 ida_free(&ctrl->subsys->ns_ida, head->instance);
3702 out_free_head:
3703 kfree(head);
3704 out:
3705 if (ret > 0)
3706 ret = blk_status_to_errno(nvme_error_status(ret));
3707 return ERR_PTR(ret);
3708 }
3709
nvme_global_check_duplicate_ids(struct nvme_subsystem * this,struct nvme_ns_ids * ids)3710 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
3711 struct nvme_ns_ids *ids)
3712 {
3713 struct nvme_subsystem *s;
3714 int ret = 0;
3715
3716 /*
3717 * Note that this check is racy as we try to avoid holding the global
3718 * lock over the whole ns_head creation. But it is only intended as
3719 * a sanity check anyway.
3720 */
3721 mutex_lock(&nvme_subsystems_lock);
3722 list_for_each_entry(s, &nvme_subsystems, entry) {
3723 if (s == this)
3724 continue;
3725 mutex_lock(&s->lock);
3726 ret = nvme_subsys_check_duplicate_ids(s, ids);
3727 mutex_unlock(&s->lock);
3728 if (ret)
3729 break;
3730 }
3731 mutex_unlock(&nvme_subsystems_lock);
3732
3733 return ret;
3734 }
3735
nvme_init_ns_head(struct nvme_ns * ns,struct nvme_ns_info * info)3736 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
3737 {
3738 struct nvme_ctrl *ctrl = ns->ctrl;
3739 struct nvme_ns_head *head = NULL;
3740 int ret;
3741
3742 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
3743 if (ret) {
3744 /*
3745 * We've found two different namespaces on two different
3746 * subsystems that report the same ID. This is pretty nasty
3747 * for anything that actually requires unique device
3748 * identification. In the kernel we need this for multipathing,
3749 * and in user space the /dev/disk/by-id/ links rely on it.
3750 *
3751 * If the device also claims to be multi-path capable back off
3752 * here now and refuse the probe the second device as this is a
3753 * recipe for data corruption. If not this is probably a
3754 * cheap consumer device if on the PCIe bus, so let the user
3755 * proceed and use the shiny toy, but warn that with changing
3756 * probing order (which due to our async probing could just be
3757 * device taking longer to startup) the other device could show
3758 * up at any time.
3759 */
3760 nvme_print_device_info(ctrl);
3761 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */
3762 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) &&
3763 info->is_shared)) {
3764 dev_err(ctrl->device,
3765 "ignoring nsid %d because of duplicate IDs\n",
3766 info->nsid);
3767 return ret;
3768 }
3769
3770 dev_err(ctrl->device,
3771 "clearing duplicate IDs for nsid %d\n", info->nsid);
3772 dev_err(ctrl->device,
3773 "use of /dev/disk/by-id/ may cause data corruption\n");
3774 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid));
3775 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid));
3776 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64));
3777 ctrl->quirks |= NVME_QUIRK_BOGUS_NID;
3778 }
3779
3780 mutex_lock(&ctrl->subsys->lock);
3781 head = nvme_find_ns_head(ctrl, info->nsid);
3782 if (!head) {
3783 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
3784 if (ret) {
3785 dev_err(ctrl->device,
3786 "duplicate IDs in subsystem for nsid %d\n",
3787 info->nsid);
3788 goto out_unlock;
3789 }
3790 head = nvme_alloc_ns_head(ctrl, info);
3791 if (IS_ERR(head)) {
3792 ret = PTR_ERR(head);
3793 goto out_unlock;
3794 }
3795 } else {
3796 ret = -EINVAL;
3797 if (!info->is_shared || !head->shared) {
3798 dev_err(ctrl->device,
3799 "Duplicate unshared namespace %d\n",
3800 info->nsid);
3801 goto out_put_ns_head;
3802 }
3803 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
3804 dev_err(ctrl->device,
3805 "IDs don't match for shared namespace %d\n",
3806 info->nsid);
3807 goto out_put_ns_head;
3808 }
3809
3810 if (!multipath) {
3811 dev_warn(ctrl->device,
3812 "Found shared namespace %d, but multipathing not supported.\n",
3813 info->nsid);
3814 dev_warn_once(ctrl->device,
3815 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0.\n");
3816 }
3817 }
3818
3819 list_add_tail_rcu(&ns->siblings, &head->list);
3820 ns->head = head;
3821 mutex_unlock(&ctrl->subsys->lock);
3822 return 0;
3823
3824 out_put_ns_head:
3825 nvme_put_ns_head(head);
3826 out_unlock:
3827 mutex_unlock(&ctrl->subsys->lock);
3828 return ret;
3829 }
3830
nvme_find_get_ns(struct nvme_ctrl * ctrl,unsigned nsid)3831 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3832 {
3833 struct nvme_ns *ns, *ret = NULL;
3834 int srcu_idx;
3835
3836 srcu_idx = srcu_read_lock(&ctrl->srcu);
3837 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
3838 srcu_read_lock_held(&ctrl->srcu)) {
3839 if (ns->head->ns_id == nsid) {
3840 if (!nvme_get_ns(ns))
3841 continue;
3842 ret = ns;
3843 break;
3844 }
3845 if (ns->head->ns_id > nsid)
3846 break;
3847 }
3848 srcu_read_unlock(&ctrl->srcu, srcu_idx);
3849 return ret;
3850 }
3851 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU);
3852
3853 /*
3854 * Add the namespace to the controller list while keeping the list ordered.
3855 */
nvme_ns_add_to_ctrl_list(struct nvme_ns * ns)3856 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
3857 {
3858 struct nvme_ns *tmp;
3859
3860 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
3861 if (tmp->head->ns_id < ns->head->ns_id) {
3862 list_add_rcu(&ns->list, &tmp->list);
3863 return;
3864 }
3865 }
3866 list_add_rcu(&ns->list, &ns->ctrl->namespaces);
3867 }
3868
nvme_alloc_ns(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)3869 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
3870 {
3871 struct queue_limits lim = { };
3872 struct nvme_ns *ns;
3873 struct gendisk *disk;
3874 int node = ctrl->numa_node;
3875
3876 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
3877 if (!ns)
3878 return;
3879
3880 if (ctrl->opts && ctrl->opts->data_digest)
3881 lim.features |= BLK_FEAT_STABLE_WRITES;
3882 if (ctrl->ops->supports_pci_p2pdma &&
3883 ctrl->ops->supports_pci_p2pdma(ctrl))
3884 lim.features |= BLK_FEAT_PCI_P2PDMA;
3885
3886 disk = blk_mq_alloc_disk(ctrl->tagset, &lim, ns);
3887 if (IS_ERR(disk))
3888 goto out_free_ns;
3889 disk->fops = &nvme_bdev_ops;
3890 disk->private_data = ns;
3891
3892 ns->disk = disk;
3893 ns->queue = disk->queue;
3894 ns->ctrl = ctrl;
3895 kref_init(&ns->kref);
3896
3897 if (nvme_init_ns_head(ns, info))
3898 goto out_cleanup_disk;
3899
3900 /*
3901 * If multipathing is enabled, the device name for all disks and not
3902 * just those that represent shared namespaces needs to be based on the
3903 * subsystem instance. Using the controller instance for private
3904 * namespaces could lead to naming collisions between shared and private
3905 * namespaces if they don't use a common numbering scheme.
3906 *
3907 * If multipathing is not enabled, disk names must use the controller
3908 * instance as shared namespaces will show up as multiple block
3909 * devices.
3910 */
3911 if (nvme_ns_head_multipath(ns->head)) {
3912 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
3913 ctrl->instance, ns->head->instance);
3914 disk->flags |= GENHD_FL_HIDDEN;
3915 } else if (multipath) {
3916 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
3917 ns->head->instance);
3918 } else {
3919 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
3920 ns->head->instance);
3921 }
3922
3923 if (nvme_update_ns_info(ns, info))
3924 goto out_unlink_ns;
3925
3926 mutex_lock(&ctrl->namespaces_lock);
3927 /*
3928 * Ensure that no namespaces are added to the ctrl list after the queues
3929 * are frozen, thereby avoiding a deadlock between scan and reset.
3930 */
3931 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) {
3932 mutex_unlock(&ctrl->namespaces_lock);
3933 goto out_unlink_ns;
3934 }
3935 nvme_ns_add_to_ctrl_list(ns);
3936 mutex_unlock(&ctrl->namespaces_lock);
3937 synchronize_srcu(&ctrl->srcu);
3938 nvme_get_ctrl(ctrl);
3939
3940 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups))
3941 goto out_cleanup_ns_from_list;
3942
3943 if (!nvme_ns_head_multipath(ns->head))
3944 nvme_add_ns_cdev(ns);
3945
3946 nvme_mpath_add_disk(ns, info->anagrpid);
3947 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
3948
3949 /*
3950 * Set ns->disk->device->driver_data to ns so we can access
3951 * ns->head->passthru_err_log_enabled in
3952 * nvme_io_passthru_err_log_enabled_[store | show]().
3953 */
3954 dev_set_drvdata(disk_to_dev(ns->disk), ns);
3955
3956 return;
3957
3958 out_cleanup_ns_from_list:
3959 nvme_put_ctrl(ctrl);
3960 mutex_lock(&ctrl->namespaces_lock);
3961 list_del_rcu(&ns->list);
3962 mutex_unlock(&ctrl->namespaces_lock);
3963 synchronize_srcu(&ctrl->srcu);
3964 out_unlink_ns:
3965 mutex_lock(&ctrl->subsys->lock);
3966 list_del_rcu(&ns->siblings);
3967 if (list_empty(&ns->head->list))
3968 list_del_init(&ns->head->entry);
3969 mutex_unlock(&ctrl->subsys->lock);
3970 nvme_put_ns_head(ns->head);
3971 out_cleanup_disk:
3972 put_disk(disk);
3973 out_free_ns:
3974 kfree(ns);
3975 }
3976
nvme_ns_remove(struct nvme_ns * ns)3977 static void nvme_ns_remove(struct nvme_ns *ns)
3978 {
3979 bool last_path = false;
3980
3981 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
3982 return;
3983
3984 clear_bit(NVME_NS_READY, &ns->flags);
3985 set_capacity(ns->disk, 0);
3986 nvme_fault_inject_fini(&ns->fault_inject);
3987
3988 /*
3989 * Ensure that !NVME_NS_READY is seen by other threads to prevent
3990 * this ns going back into current_path.
3991 */
3992 synchronize_srcu(&ns->head->srcu);
3993
3994 /* wait for concurrent submissions */
3995 if (nvme_mpath_clear_current_path(ns))
3996 synchronize_srcu(&ns->head->srcu);
3997
3998 mutex_lock(&ns->ctrl->subsys->lock);
3999 list_del_rcu(&ns->siblings);
4000 if (list_empty(&ns->head->list)) {
4001 list_del_init(&ns->head->entry);
4002 last_path = true;
4003 }
4004 mutex_unlock(&ns->ctrl->subsys->lock);
4005
4006 /* guarantee not available in head->list */
4007 synchronize_srcu(&ns->head->srcu);
4008
4009 if (!nvme_ns_head_multipath(ns->head))
4010 nvme_cdev_del(&ns->cdev, &ns->cdev_device);
4011 del_gendisk(ns->disk);
4012
4013 mutex_lock(&ns->ctrl->namespaces_lock);
4014 list_del_rcu(&ns->list);
4015 mutex_unlock(&ns->ctrl->namespaces_lock);
4016 synchronize_srcu(&ns->ctrl->srcu);
4017
4018 if (last_path)
4019 nvme_mpath_shutdown_disk(ns->head);
4020 nvme_put_ns(ns);
4021 }
4022
nvme_ns_remove_by_nsid(struct nvme_ctrl * ctrl,u32 nsid)4023 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
4024 {
4025 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
4026
4027 if (ns) {
4028 nvme_ns_remove(ns);
4029 nvme_put_ns(ns);
4030 }
4031 }
4032
nvme_validate_ns(struct nvme_ns * ns,struct nvme_ns_info * info)4033 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
4034 {
4035 int ret = NVME_SC_INVALID_NS | NVME_STATUS_DNR;
4036
4037 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
4038 dev_err(ns->ctrl->device,
4039 "identifiers changed for nsid %d\n", ns->head->ns_id);
4040 goto out;
4041 }
4042
4043 ret = nvme_update_ns_info(ns, info);
4044 out:
4045 /*
4046 * Only remove the namespace if we got a fatal error back from the
4047 * device, otherwise ignore the error and just move on.
4048 *
4049 * TODO: we should probably schedule a delayed retry here.
4050 */
4051 if (ret > 0 && (ret & NVME_STATUS_DNR))
4052 nvme_ns_remove(ns);
4053 }
4054
nvme_scan_ns(struct nvme_ctrl * ctrl,unsigned nsid)4055 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
4056 {
4057 struct nvme_ns_info info = { .nsid = nsid };
4058 struct nvme_ns *ns;
4059 int ret;
4060
4061 if (nvme_identify_ns_descs(ctrl, &info))
4062 return;
4063
4064 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
4065 dev_warn(ctrl->device,
4066 "command set not reported for nsid: %d\n", nsid);
4067 return;
4068 }
4069
4070 /*
4071 * If available try to use the Command Set Idependent Identify Namespace
4072 * data structure to find all the generic information that is needed to
4073 * set up a namespace. If not fall back to the legacy version.
4074 */
4075 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
4076 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS))
4077 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
4078 else
4079 ret = nvme_ns_info_from_identify(ctrl, &info);
4080
4081 if (info.is_removed)
4082 nvme_ns_remove_by_nsid(ctrl, nsid);
4083
4084 /*
4085 * Ignore the namespace if it is not ready. We will get an AEN once it
4086 * becomes ready and restart the scan.
4087 */
4088 if (ret || !info.is_ready)
4089 return;
4090
4091 ns = nvme_find_get_ns(ctrl, nsid);
4092 if (ns) {
4093 nvme_validate_ns(ns, &info);
4094 nvme_put_ns(ns);
4095 } else {
4096 nvme_alloc_ns(ctrl, &info);
4097 }
4098 }
4099
4100 /**
4101 * struct async_scan_info - keeps track of controller & NSIDs to scan
4102 * @ctrl: Controller on which namespaces are being scanned
4103 * @next_nsid: Index of next NSID to scan in ns_list
4104 * @ns_list: Pointer to list of NSIDs to scan
4105 *
4106 * Note: There is a single async_scan_info structure shared by all instances
4107 * of nvme_scan_ns_async() scanning a given controller, so the atomic
4108 * operations on next_nsid are critical to ensure each instance scans a unique
4109 * NSID.
4110 */
4111 struct async_scan_info {
4112 struct nvme_ctrl *ctrl;
4113 atomic_t next_nsid;
4114 __le32 *ns_list;
4115 };
4116
nvme_scan_ns_async(void * data,async_cookie_t cookie)4117 static void nvme_scan_ns_async(void *data, async_cookie_t cookie)
4118 {
4119 struct async_scan_info *scan_info = data;
4120 int idx;
4121 u32 nsid;
4122
4123 idx = (u32)atomic_fetch_inc(&scan_info->next_nsid);
4124 nsid = le32_to_cpu(scan_info->ns_list[idx]);
4125
4126 nvme_scan_ns(scan_info->ctrl, nsid);
4127 }
4128
nvme_remove_invalid_namespaces(struct nvme_ctrl * ctrl,unsigned nsid)4129 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
4130 unsigned nsid)
4131 {
4132 struct nvme_ns *ns, *next;
4133 LIST_HEAD(rm_list);
4134
4135 mutex_lock(&ctrl->namespaces_lock);
4136 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
4137 if (ns->head->ns_id > nsid) {
4138 list_del_rcu(&ns->list);
4139 synchronize_srcu(&ctrl->srcu);
4140 list_add_tail_rcu(&ns->list, &rm_list);
4141 }
4142 }
4143 mutex_unlock(&ctrl->namespaces_lock);
4144
4145 list_for_each_entry_safe(ns, next, &rm_list, list)
4146 nvme_ns_remove(ns);
4147 }
4148
nvme_scan_ns_list(struct nvme_ctrl * ctrl)4149 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
4150 {
4151 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
4152 __le32 *ns_list;
4153 u32 prev = 0;
4154 int ret = 0, i;
4155 ASYNC_DOMAIN(domain);
4156 struct async_scan_info scan_info;
4157
4158 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
4159 if (!ns_list)
4160 return -ENOMEM;
4161
4162 scan_info.ctrl = ctrl;
4163 scan_info.ns_list = ns_list;
4164 for (;;) {
4165 struct nvme_command cmd = {
4166 .identify.opcode = nvme_admin_identify,
4167 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST,
4168 .identify.nsid = cpu_to_le32(prev),
4169 };
4170
4171 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
4172 NVME_IDENTIFY_DATA_SIZE);
4173 if (ret) {
4174 dev_warn(ctrl->device,
4175 "Identify NS List failed (status=0x%x)\n", ret);
4176 goto free;
4177 }
4178
4179 atomic_set(&scan_info.next_nsid, 0);
4180 for (i = 0; i < nr_entries; i++) {
4181 u32 nsid = le32_to_cpu(ns_list[i]);
4182
4183 if (!nsid) /* end of the list? */
4184 goto out;
4185 async_schedule_domain(nvme_scan_ns_async, &scan_info,
4186 &domain);
4187 while (++prev < nsid)
4188 nvme_ns_remove_by_nsid(ctrl, prev);
4189 }
4190 async_synchronize_full_domain(&domain);
4191 }
4192 out:
4193 nvme_remove_invalid_namespaces(ctrl, prev);
4194 free:
4195 async_synchronize_full_domain(&domain);
4196 kfree(ns_list);
4197 return ret;
4198 }
4199
nvme_scan_ns_sequential(struct nvme_ctrl * ctrl)4200 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
4201 {
4202 struct nvme_id_ctrl *id;
4203 u32 nn, i;
4204
4205 if (nvme_identify_ctrl(ctrl, &id))
4206 return;
4207 nn = le32_to_cpu(id->nn);
4208 kfree(id);
4209
4210 for (i = 1; i <= nn; i++)
4211 nvme_scan_ns(ctrl, i);
4212
4213 nvme_remove_invalid_namespaces(ctrl, nn);
4214 }
4215
nvme_clear_changed_ns_log(struct nvme_ctrl * ctrl)4216 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
4217 {
4218 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
4219 __le32 *log;
4220 int error;
4221
4222 log = kzalloc(log_size, GFP_KERNEL);
4223 if (!log)
4224 return;
4225
4226 /*
4227 * We need to read the log to clear the AEN, but we don't want to rely
4228 * on it for the changed namespace information as userspace could have
4229 * raced with us in reading the log page, which could cause us to miss
4230 * updates.
4231 */
4232 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
4233 NVME_CSI_NVM, log, log_size, 0);
4234 if (error)
4235 dev_warn(ctrl->device,
4236 "reading changed ns log failed: %d\n", error);
4237
4238 kfree(log);
4239 }
4240
nvme_scan_work(struct work_struct * work)4241 static void nvme_scan_work(struct work_struct *work)
4242 {
4243 struct nvme_ctrl *ctrl =
4244 container_of(work, struct nvme_ctrl, scan_work);
4245 int ret;
4246
4247 /* No tagset on a live ctrl means IO queues could not created */
4248 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset)
4249 return;
4250
4251 /*
4252 * Identify controller limits can change at controller reset due to
4253 * new firmware download, even though it is not common we cannot ignore
4254 * such scenario. Controller's non-mdts limits are reported in the unit
4255 * of logical blocks that is dependent on the format of attached
4256 * namespace. Hence re-read the limits at the time of ns allocation.
4257 */
4258 ret = nvme_init_non_mdts_limits(ctrl);
4259 if (ret < 0) {
4260 dev_warn(ctrl->device,
4261 "reading non-mdts-limits failed: %d\n", ret);
4262 return;
4263 }
4264
4265 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
4266 dev_info(ctrl->device, "rescanning namespaces.\n");
4267 nvme_clear_changed_ns_log(ctrl);
4268 }
4269
4270 mutex_lock(&ctrl->scan_lock);
4271 if (!nvme_id_cns_ok(ctrl, NVME_ID_CNS_NS_ACTIVE_LIST)) {
4272 nvme_scan_ns_sequential(ctrl);
4273 } else {
4274 /*
4275 * Fall back to sequential scan if DNR is set to handle broken
4276 * devices which should support Identify NS List (as per the VS
4277 * they report) but don't actually support it.
4278 */
4279 ret = nvme_scan_ns_list(ctrl);
4280 if (ret > 0 && ret & NVME_STATUS_DNR)
4281 nvme_scan_ns_sequential(ctrl);
4282 }
4283 mutex_unlock(&ctrl->scan_lock);
4284
4285 /* Requeue if we have missed AENs */
4286 if (test_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events))
4287 nvme_queue_scan(ctrl);
4288 #ifdef CONFIG_NVME_MULTIPATH
4289 else if (ctrl->ana_log_buf)
4290 /* Re-read the ANA log page to not miss updates */
4291 queue_work(nvme_wq, &ctrl->ana_work);
4292 #endif
4293 }
4294
4295 /*
4296 * This function iterates the namespace list unlocked to allow recovery from
4297 * controller failure. It is up to the caller to ensure the namespace list is
4298 * not modified by scan work while this function is executing.
4299 */
nvme_remove_namespaces(struct nvme_ctrl * ctrl)4300 void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
4301 {
4302 struct nvme_ns *ns, *next;
4303 LIST_HEAD(ns_list);
4304
4305 /*
4306 * make sure to requeue I/O to all namespaces as these
4307 * might result from the scan itself and must complete
4308 * for the scan_work to make progress
4309 */
4310 nvme_mpath_clear_ctrl_paths(ctrl);
4311
4312 /*
4313 * Unquiesce io queues so any pending IO won't hang, especially
4314 * those submitted from scan work
4315 */
4316 nvme_unquiesce_io_queues(ctrl);
4317
4318 /* prevent racing with ns scanning */
4319 flush_work(&ctrl->scan_work);
4320
4321 /*
4322 * The dead states indicates the controller was not gracefully
4323 * disconnected. In that case, we won't be able to flush any data while
4324 * removing the namespaces' disks; fail all the queues now to avoid
4325 * potentially having to clean up the failed sync later.
4326 */
4327 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD)
4328 nvme_mark_namespaces_dead(ctrl);
4329
4330 /* this is a no-op when called from the controller reset handler */
4331 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4332
4333 mutex_lock(&ctrl->namespaces_lock);
4334 list_splice_init_rcu(&ctrl->namespaces, &ns_list, synchronize_rcu);
4335 mutex_unlock(&ctrl->namespaces_lock);
4336 synchronize_srcu(&ctrl->srcu);
4337
4338 list_for_each_entry_safe(ns, next, &ns_list, list)
4339 nvme_ns_remove(ns);
4340 }
4341 EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4342
nvme_class_uevent(const struct device * dev,struct kobj_uevent_env * env)4343 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4344 {
4345 const struct nvme_ctrl *ctrl =
4346 container_of(dev, struct nvme_ctrl, ctrl_device);
4347 struct nvmf_ctrl_options *opts = ctrl->opts;
4348 int ret;
4349
4350 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4351 if (ret)
4352 return ret;
4353
4354 if (opts) {
4355 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4356 if (ret)
4357 return ret;
4358
4359 ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4360 opts->trsvcid ?: "none");
4361 if (ret)
4362 return ret;
4363
4364 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4365 opts->host_traddr ?: "none");
4366 if (ret)
4367 return ret;
4368
4369 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4370 opts->host_iface ?: "none");
4371 }
4372 return ret;
4373 }
4374
nvme_change_uevent(struct nvme_ctrl * ctrl,char * envdata)4375 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4376 {
4377 char *envp[2] = { envdata, NULL };
4378
4379 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4380 }
4381
nvme_aen_uevent(struct nvme_ctrl * ctrl)4382 static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4383 {
4384 char *envp[2] = { NULL, NULL };
4385 u32 aen_result = ctrl->aen_result;
4386
4387 ctrl->aen_result = 0;
4388 if (!aen_result)
4389 return;
4390
4391 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4392 if (!envp[0])
4393 return;
4394 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4395 kfree(envp[0]);
4396 }
4397
nvme_async_event_work(struct work_struct * work)4398 static void nvme_async_event_work(struct work_struct *work)
4399 {
4400 struct nvme_ctrl *ctrl =
4401 container_of(work, struct nvme_ctrl, async_event_work);
4402
4403 nvme_aen_uevent(ctrl);
4404
4405 /*
4406 * The transport drivers must guarantee AER submission here is safe by
4407 * flushing ctrl async_event_work after changing the controller state
4408 * from LIVE and before freeing the admin queue.
4409 */
4410 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
4411 ctrl->ops->submit_async_event(ctrl);
4412 }
4413
nvme_ctrl_pp_status(struct nvme_ctrl * ctrl)4414 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4415 {
4416
4417 u32 csts;
4418
4419 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4420 return false;
4421
4422 if (csts == ~0)
4423 return false;
4424
4425 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4426 }
4427
nvme_get_fw_slot_info(struct nvme_ctrl * ctrl)4428 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4429 {
4430 struct nvme_fw_slot_info_log *log;
4431 u8 next_fw_slot, cur_fw_slot;
4432
4433 log = kmalloc(sizeof(*log), GFP_KERNEL);
4434 if (!log)
4435 return;
4436
4437 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4438 log, sizeof(*log), 0)) {
4439 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4440 goto out_free_log;
4441 }
4442
4443 cur_fw_slot = log->afi & 0x7;
4444 next_fw_slot = (log->afi & 0x70) >> 4;
4445 if (!cur_fw_slot || (next_fw_slot && (cur_fw_slot != next_fw_slot))) {
4446 dev_info(ctrl->device,
4447 "Firmware is activated after next Controller Level Reset\n");
4448 goto out_free_log;
4449 }
4450
4451 memcpy(ctrl->subsys->firmware_rev, &log->frs[cur_fw_slot - 1],
4452 sizeof(ctrl->subsys->firmware_rev));
4453
4454 out_free_log:
4455 kfree(log);
4456 }
4457
nvme_fw_act_work(struct work_struct * work)4458 static void nvme_fw_act_work(struct work_struct *work)
4459 {
4460 struct nvme_ctrl *ctrl = container_of(work,
4461 struct nvme_ctrl, fw_act_work);
4462 unsigned long fw_act_timeout;
4463
4464 nvme_auth_stop(ctrl);
4465
4466 if (ctrl->mtfa)
4467 fw_act_timeout = jiffies +
4468 msecs_to_jiffies(ctrl->mtfa * 100);
4469 else
4470 fw_act_timeout = jiffies +
4471 msecs_to_jiffies(admin_timeout * 1000);
4472
4473 nvme_quiesce_io_queues(ctrl);
4474 while (nvme_ctrl_pp_status(ctrl)) {
4475 if (time_after(jiffies, fw_act_timeout)) {
4476 dev_warn(ctrl->device,
4477 "Fw activation timeout, reset controller\n");
4478 nvme_try_sched_reset(ctrl);
4479 return;
4480 }
4481 msleep(100);
4482 }
4483
4484 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_CONNECTING) ||
4485 !nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4486 return;
4487
4488 nvme_unquiesce_io_queues(ctrl);
4489 /* read FW slot information to clear the AER */
4490 nvme_get_fw_slot_info(ctrl);
4491
4492 queue_work(nvme_wq, &ctrl->async_event_work);
4493 }
4494
nvme_aer_type(u32 result)4495 static u32 nvme_aer_type(u32 result)
4496 {
4497 return result & 0x7;
4498 }
4499
nvme_aer_subtype(u32 result)4500 static u32 nvme_aer_subtype(u32 result)
4501 {
4502 return (result & 0xff00) >> 8;
4503 }
4504
nvme_handle_aen_notice(struct nvme_ctrl * ctrl,u32 result)4505 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4506 {
4507 u32 aer_notice_type = nvme_aer_subtype(result);
4508 bool requeue = true;
4509
4510 switch (aer_notice_type) {
4511 case NVME_AER_NOTICE_NS_CHANGED:
4512 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4513 nvme_queue_scan(ctrl);
4514 break;
4515 case NVME_AER_NOTICE_FW_ACT_STARTING:
4516 /*
4517 * We are (ab)using the RESETTING state to prevent subsequent
4518 * recovery actions from interfering with the controller's
4519 * firmware activation.
4520 */
4521 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4522 requeue = false;
4523 queue_work(nvme_wq, &ctrl->fw_act_work);
4524 }
4525 break;
4526 #ifdef CONFIG_NVME_MULTIPATH
4527 case NVME_AER_NOTICE_ANA:
4528 if (!ctrl->ana_log_buf)
4529 break;
4530 queue_work(nvme_wq, &ctrl->ana_work);
4531 break;
4532 #endif
4533 case NVME_AER_NOTICE_DISC_CHANGED:
4534 ctrl->aen_result = result;
4535 break;
4536 default:
4537 dev_warn(ctrl->device, "async event result %08x\n", result);
4538 }
4539 return requeue;
4540 }
4541
nvme_handle_aer_persistent_error(struct nvme_ctrl * ctrl)4542 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4543 {
4544 dev_warn(ctrl->device,
4545 "resetting controller due to persistent internal error\n");
4546 nvme_reset_ctrl(ctrl);
4547 }
4548
nvme_complete_async_event(struct nvme_ctrl * ctrl,__le16 status,volatile union nvme_result * res)4549 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4550 volatile union nvme_result *res)
4551 {
4552 u32 result = le32_to_cpu(res->u32);
4553 u32 aer_type = nvme_aer_type(result);
4554 u32 aer_subtype = nvme_aer_subtype(result);
4555 bool requeue = true;
4556
4557 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4558 return;
4559
4560 trace_nvme_async_event(ctrl, result);
4561 switch (aer_type) {
4562 case NVME_AER_NOTICE:
4563 requeue = nvme_handle_aen_notice(ctrl, result);
4564 break;
4565 case NVME_AER_ERROR:
4566 /*
4567 * For a persistent internal error, don't run async_event_work
4568 * to submit a new AER. The controller reset will do it.
4569 */
4570 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4571 nvme_handle_aer_persistent_error(ctrl);
4572 return;
4573 }
4574 fallthrough;
4575 case NVME_AER_SMART:
4576 case NVME_AER_CSS:
4577 case NVME_AER_VS:
4578 ctrl->aen_result = result;
4579 break;
4580 default:
4581 break;
4582 }
4583
4584 if (requeue)
4585 queue_work(nvme_wq, &ctrl->async_event_work);
4586 }
4587 EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4588
nvme_alloc_admin_tag_set(struct nvme_ctrl * ctrl,struct blk_mq_tag_set * set,const struct blk_mq_ops * ops,unsigned int cmd_size)4589 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4590 const struct blk_mq_ops *ops, unsigned int cmd_size)
4591 {
4592 struct queue_limits lim = {};
4593 int ret;
4594
4595 memset(set, 0, sizeof(*set));
4596 set->ops = ops;
4597 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4598 if (ctrl->ops->flags & NVME_F_FABRICS)
4599 /* Reserved for fabric connect and keep alive */
4600 set->reserved_tags = 2;
4601 set->numa_node = ctrl->numa_node;
4602 set->flags = BLK_MQ_F_NO_SCHED;
4603 if (ctrl->ops->flags & NVME_F_BLOCKING)
4604 set->flags |= BLK_MQ_F_BLOCKING;
4605 set->cmd_size = cmd_size;
4606 set->driver_data = ctrl;
4607 set->nr_hw_queues = 1;
4608 set->timeout = NVME_ADMIN_TIMEOUT;
4609 ret = blk_mq_alloc_tag_set(set);
4610 if (ret)
4611 return ret;
4612
4613 ctrl->admin_q = blk_mq_alloc_queue(set, &lim, NULL);
4614 if (IS_ERR(ctrl->admin_q)) {
4615 ret = PTR_ERR(ctrl->admin_q);
4616 goto out_free_tagset;
4617 }
4618
4619 if (ctrl->ops->flags & NVME_F_FABRICS) {
4620 ctrl->fabrics_q = blk_mq_alloc_queue(set, NULL, NULL);
4621 if (IS_ERR(ctrl->fabrics_q)) {
4622 ret = PTR_ERR(ctrl->fabrics_q);
4623 goto out_cleanup_admin_q;
4624 }
4625 }
4626
4627 ctrl->admin_tagset = set;
4628 return 0;
4629
4630 out_cleanup_admin_q:
4631 blk_mq_destroy_queue(ctrl->admin_q);
4632 blk_put_queue(ctrl->admin_q);
4633 out_free_tagset:
4634 blk_mq_free_tag_set(set);
4635 ctrl->admin_q = NULL;
4636 ctrl->fabrics_q = NULL;
4637 return ret;
4638 }
4639 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4640
nvme_remove_admin_tag_set(struct nvme_ctrl * ctrl)4641 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4642 {
4643 /*
4644 * As we're about to destroy the queue and free tagset
4645 * we can not have keep-alive work running.
4646 */
4647 nvme_stop_keep_alive(ctrl);
4648 blk_mq_destroy_queue(ctrl->admin_q);
4649 blk_put_queue(ctrl->admin_q);
4650 if (ctrl->ops->flags & NVME_F_FABRICS) {
4651 blk_mq_destroy_queue(ctrl->fabrics_q);
4652 blk_put_queue(ctrl->fabrics_q);
4653 }
4654 blk_mq_free_tag_set(ctrl->admin_tagset);
4655 }
4656 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
4657
nvme_alloc_io_tag_set(struct nvme_ctrl * ctrl,struct blk_mq_tag_set * set,const struct blk_mq_ops * ops,unsigned int nr_maps,unsigned int cmd_size)4658 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4659 const struct blk_mq_ops *ops, unsigned int nr_maps,
4660 unsigned int cmd_size)
4661 {
4662 int ret;
4663
4664 memset(set, 0, sizeof(*set));
4665 set->ops = ops;
4666 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
4667 /*
4668 * Some Apple controllers requires tags to be unique across admin and
4669 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
4670 */
4671 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
4672 set->reserved_tags = NVME_AQ_DEPTH;
4673 else if (ctrl->ops->flags & NVME_F_FABRICS)
4674 /* Reserved for fabric connect */
4675 set->reserved_tags = 1;
4676 set->numa_node = ctrl->numa_node;
4677 set->flags = BLK_MQ_F_SHOULD_MERGE;
4678 if (ctrl->ops->flags & NVME_F_BLOCKING)
4679 set->flags |= BLK_MQ_F_BLOCKING;
4680 set->cmd_size = cmd_size;
4681 set->driver_data = ctrl;
4682 set->nr_hw_queues = ctrl->queue_count - 1;
4683 set->timeout = NVME_IO_TIMEOUT;
4684 set->nr_maps = nr_maps;
4685 ret = blk_mq_alloc_tag_set(set);
4686 if (ret)
4687 return ret;
4688
4689 if (ctrl->ops->flags & NVME_F_FABRICS) {
4690 struct queue_limits lim = {
4691 .features = BLK_FEAT_SKIP_TAGSET_QUIESCE,
4692 };
4693
4694 ctrl->connect_q = blk_mq_alloc_queue(set, &lim, NULL);
4695 if (IS_ERR(ctrl->connect_q)) {
4696 ret = PTR_ERR(ctrl->connect_q);
4697 goto out_free_tag_set;
4698 }
4699 }
4700
4701 ctrl->tagset = set;
4702 return 0;
4703
4704 out_free_tag_set:
4705 blk_mq_free_tag_set(set);
4706 ctrl->connect_q = NULL;
4707 return ret;
4708 }
4709 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
4710
nvme_remove_io_tag_set(struct nvme_ctrl * ctrl)4711 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
4712 {
4713 if (ctrl->ops->flags & NVME_F_FABRICS) {
4714 blk_mq_destroy_queue(ctrl->connect_q);
4715 blk_put_queue(ctrl->connect_q);
4716 }
4717 blk_mq_free_tag_set(ctrl->tagset);
4718 }
4719 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
4720
nvme_stop_ctrl(struct nvme_ctrl * ctrl)4721 void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
4722 {
4723 nvme_mpath_stop(ctrl);
4724 nvme_auth_stop(ctrl);
4725 nvme_stop_failfast_work(ctrl);
4726 flush_work(&ctrl->async_event_work);
4727 cancel_work_sync(&ctrl->fw_act_work);
4728 if (ctrl->ops->stop_ctrl)
4729 ctrl->ops->stop_ctrl(ctrl);
4730 }
4731 EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
4732
nvme_start_ctrl(struct nvme_ctrl * ctrl)4733 void nvme_start_ctrl(struct nvme_ctrl *ctrl)
4734 {
4735 nvme_enable_aen(ctrl);
4736
4737 /*
4738 * persistent discovery controllers need to send indication to userspace
4739 * to re-read the discovery log page to learn about possible changes
4740 * that were missed. We identify persistent discovery controllers by
4741 * checking that they started once before, hence are reconnecting back.
4742 */
4743 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
4744 nvme_discovery_ctrl(ctrl))
4745 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
4746
4747 if (ctrl->queue_count > 1) {
4748 nvme_queue_scan(ctrl);
4749 nvme_unquiesce_io_queues(ctrl);
4750 nvme_mpath_update(ctrl);
4751 }
4752
4753 nvme_change_uevent(ctrl, "NVME_EVENT=connected");
4754 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
4755 }
4756 EXPORT_SYMBOL_GPL(nvme_start_ctrl);
4757
nvme_uninit_ctrl(struct nvme_ctrl * ctrl)4758 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
4759 {
4760 nvme_stop_keep_alive(ctrl);
4761 nvme_hwmon_exit(ctrl);
4762 nvme_fault_inject_fini(&ctrl->fault_inject);
4763 dev_pm_qos_hide_latency_tolerance(ctrl->device);
4764 cdev_device_del(&ctrl->cdev, ctrl->device);
4765 nvme_put_ctrl(ctrl);
4766 }
4767 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
4768
nvme_free_cels(struct nvme_ctrl * ctrl)4769 static void nvme_free_cels(struct nvme_ctrl *ctrl)
4770 {
4771 struct nvme_effects_log *cel;
4772 unsigned long i;
4773
4774 xa_for_each(&ctrl->cels, i, cel) {
4775 xa_erase(&ctrl->cels, i);
4776 kfree(cel);
4777 }
4778
4779 xa_destroy(&ctrl->cels);
4780 }
4781
nvme_free_ctrl(struct device * dev)4782 static void nvme_free_ctrl(struct device *dev)
4783 {
4784 struct nvme_ctrl *ctrl =
4785 container_of(dev, struct nvme_ctrl, ctrl_device);
4786 struct nvme_subsystem *subsys = ctrl->subsys;
4787
4788 if (!subsys || ctrl->instance != subsys->instance)
4789 ida_free(&nvme_instance_ida, ctrl->instance);
4790 nvme_free_cels(ctrl);
4791 nvme_mpath_uninit(ctrl);
4792 cleanup_srcu_struct(&ctrl->srcu);
4793 nvme_auth_stop(ctrl);
4794 nvme_auth_free(ctrl);
4795 __free_page(ctrl->discard_page);
4796 free_opal_dev(ctrl->opal_dev);
4797
4798 if (subsys) {
4799 mutex_lock(&nvme_subsystems_lock);
4800 list_del(&ctrl->subsys_entry);
4801 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
4802 mutex_unlock(&nvme_subsystems_lock);
4803 }
4804
4805 ctrl->ops->free_ctrl(ctrl);
4806
4807 if (subsys)
4808 nvme_put_subsystem(subsys);
4809 }
4810
4811 /*
4812 * Initialize a NVMe controller structures. This needs to be called during
4813 * earliest initialization so that we have the initialized structured around
4814 * during probing.
4815 *
4816 * On success, the caller must use the nvme_put_ctrl() to release this when
4817 * needed, which also invokes the ops->free_ctrl() callback.
4818 */
nvme_init_ctrl(struct nvme_ctrl * ctrl,struct device * dev,const struct nvme_ctrl_ops * ops,unsigned long quirks)4819 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
4820 const struct nvme_ctrl_ops *ops, unsigned long quirks)
4821 {
4822 int ret;
4823
4824 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
4825 ctrl->passthru_err_log_enabled = false;
4826 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
4827 spin_lock_init(&ctrl->lock);
4828 mutex_init(&ctrl->namespaces_lock);
4829
4830 ret = init_srcu_struct(&ctrl->srcu);
4831 if (ret)
4832 return ret;
4833
4834 mutex_init(&ctrl->scan_lock);
4835 INIT_LIST_HEAD(&ctrl->namespaces);
4836 xa_init(&ctrl->cels);
4837 ctrl->dev = dev;
4838 ctrl->ops = ops;
4839 ctrl->quirks = quirks;
4840 ctrl->numa_node = NUMA_NO_NODE;
4841 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
4842 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
4843 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
4844 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
4845 init_waitqueue_head(&ctrl->state_wq);
4846
4847 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
4848 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
4849 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
4850 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
4851 ctrl->ka_last_check_time = jiffies;
4852
4853 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
4854 PAGE_SIZE);
4855 ctrl->discard_page = alloc_page(GFP_KERNEL);
4856 if (!ctrl->discard_page) {
4857 ret = -ENOMEM;
4858 goto out;
4859 }
4860
4861 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
4862 if (ret < 0)
4863 goto out;
4864 ctrl->instance = ret;
4865
4866 ret = nvme_auth_init_ctrl(ctrl);
4867 if (ret)
4868 goto out_release_instance;
4869
4870 nvme_mpath_init_ctrl(ctrl);
4871
4872 device_initialize(&ctrl->ctrl_device);
4873 ctrl->device = &ctrl->ctrl_device;
4874 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
4875 ctrl->instance);
4876 ctrl->device->class = &nvme_class;
4877 ctrl->device->parent = ctrl->dev;
4878 if (ops->dev_attr_groups)
4879 ctrl->device->groups = ops->dev_attr_groups;
4880 else
4881 ctrl->device->groups = nvme_dev_attr_groups;
4882 ctrl->device->release = nvme_free_ctrl;
4883 dev_set_drvdata(ctrl->device, ctrl);
4884
4885 return ret;
4886
4887 out_release_instance:
4888 ida_free(&nvme_instance_ida, ctrl->instance);
4889 out:
4890 if (ctrl->discard_page)
4891 __free_page(ctrl->discard_page);
4892 cleanup_srcu_struct(&ctrl->srcu);
4893 return ret;
4894 }
4895 EXPORT_SYMBOL_GPL(nvme_init_ctrl);
4896
4897 /*
4898 * On success, returns with an elevated controller reference and caller must
4899 * use nvme_uninit_ctrl() to properly free resources associated with the ctrl.
4900 */
nvme_add_ctrl(struct nvme_ctrl * ctrl)4901 int nvme_add_ctrl(struct nvme_ctrl *ctrl)
4902 {
4903 int ret;
4904
4905 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
4906 if (ret)
4907 return ret;
4908
4909 cdev_init(&ctrl->cdev, &nvme_dev_fops);
4910 ctrl->cdev.owner = ctrl->ops->module;
4911 ret = cdev_device_add(&ctrl->cdev, ctrl->device);
4912 if (ret)
4913 return ret;
4914
4915 /*
4916 * Initialize latency tolerance controls. The sysfs files won't
4917 * be visible to userspace unless the device actually supports APST.
4918 */
4919 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
4920 dev_pm_qos_update_user_latency_tolerance(ctrl->device,
4921 min(default_ps_max_latency_us, (unsigned long)S32_MAX));
4922
4923 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
4924 nvme_get_ctrl(ctrl);
4925
4926 return 0;
4927 }
4928 EXPORT_SYMBOL_GPL(nvme_add_ctrl);
4929
4930 /* let I/O to all namespaces fail in preparation for surprise removal */
nvme_mark_namespaces_dead(struct nvme_ctrl * ctrl)4931 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
4932 {
4933 struct nvme_ns *ns;
4934 int srcu_idx;
4935
4936 srcu_idx = srcu_read_lock(&ctrl->srcu);
4937 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4938 srcu_read_lock_held(&ctrl->srcu))
4939 blk_mark_disk_dead(ns->disk);
4940 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4941 }
4942 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
4943
nvme_unfreeze(struct nvme_ctrl * ctrl)4944 void nvme_unfreeze(struct nvme_ctrl *ctrl)
4945 {
4946 struct nvme_ns *ns;
4947 int srcu_idx;
4948
4949 srcu_idx = srcu_read_lock(&ctrl->srcu);
4950 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4951 srcu_read_lock_held(&ctrl->srcu))
4952 blk_mq_unfreeze_queue(ns->queue);
4953 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4954 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4955 }
4956 EXPORT_SYMBOL_GPL(nvme_unfreeze);
4957
nvme_wait_freeze_timeout(struct nvme_ctrl * ctrl,long timeout)4958 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
4959 {
4960 struct nvme_ns *ns;
4961 int srcu_idx;
4962
4963 srcu_idx = srcu_read_lock(&ctrl->srcu);
4964 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4965 srcu_read_lock_held(&ctrl->srcu)) {
4966 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
4967 if (timeout <= 0)
4968 break;
4969 }
4970 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4971 return timeout;
4972 }
4973 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
4974
nvme_wait_freeze(struct nvme_ctrl * ctrl)4975 void nvme_wait_freeze(struct nvme_ctrl *ctrl)
4976 {
4977 struct nvme_ns *ns;
4978 int srcu_idx;
4979
4980 srcu_idx = srcu_read_lock(&ctrl->srcu);
4981 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4982 srcu_read_lock_held(&ctrl->srcu))
4983 blk_mq_freeze_queue_wait(ns->queue);
4984 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4985 }
4986 EXPORT_SYMBOL_GPL(nvme_wait_freeze);
4987
nvme_start_freeze(struct nvme_ctrl * ctrl)4988 void nvme_start_freeze(struct nvme_ctrl *ctrl)
4989 {
4990 struct nvme_ns *ns;
4991 int srcu_idx;
4992
4993 set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4994 srcu_idx = srcu_read_lock(&ctrl->srcu);
4995 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4996 srcu_read_lock_held(&ctrl->srcu))
4997 blk_freeze_queue_start(ns->queue);
4998 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4999 }
5000 EXPORT_SYMBOL_GPL(nvme_start_freeze);
5001
nvme_quiesce_io_queues(struct nvme_ctrl * ctrl)5002 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
5003 {
5004 if (!ctrl->tagset)
5005 return;
5006 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
5007 blk_mq_quiesce_tagset(ctrl->tagset);
5008 else
5009 blk_mq_wait_quiesce_done(ctrl->tagset);
5010 }
5011 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
5012
nvme_unquiesce_io_queues(struct nvme_ctrl * ctrl)5013 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
5014 {
5015 if (!ctrl->tagset)
5016 return;
5017 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
5018 blk_mq_unquiesce_tagset(ctrl->tagset);
5019 }
5020 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
5021
nvme_quiesce_admin_queue(struct nvme_ctrl * ctrl)5022 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
5023 {
5024 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
5025 blk_mq_quiesce_queue(ctrl->admin_q);
5026 else
5027 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
5028 }
5029 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
5030
nvme_unquiesce_admin_queue(struct nvme_ctrl * ctrl)5031 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
5032 {
5033 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
5034 blk_mq_unquiesce_queue(ctrl->admin_q);
5035 }
5036 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
5037
nvme_sync_io_queues(struct nvme_ctrl * ctrl)5038 void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
5039 {
5040 struct nvme_ns *ns;
5041 int srcu_idx;
5042
5043 srcu_idx = srcu_read_lock(&ctrl->srcu);
5044 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5045 srcu_read_lock_held(&ctrl->srcu))
5046 blk_sync_queue(ns->queue);
5047 srcu_read_unlock(&ctrl->srcu, srcu_idx);
5048 }
5049 EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
5050
nvme_sync_queues(struct nvme_ctrl * ctrl)5051 void nvme_sync_queues(struct nvme_ctrl *ctrl)
5052 {
5053 nvme_sync_io_queues(ctrl);
5054 if (ctrl->admin_q)
5055 blk_sync_queue(ctrl->admin_q);
5056 }
5057 EXPORT_SYMBOL_GPL(nvme_sync_queues);
5058
nvme_ctrl_from_file(struct file * file)5059 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
5060 {
5061 if (file->f_op != &nvme_dev_fops)
5062 return NULL;
5063 return file->private_data;
5064 }
5065 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU);
5066
5067 /*
5068 * Check we didn't inadvertently grow the command structure sizes:
5069 */
_nvme_check_size(void)5070 static inline void _nvme_check_size(void)
5071 {
5072 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
5073 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
5074 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
5075 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
5076 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
5077 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
5078 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
5079 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
5080 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
5081 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
5082 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
5083 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
5084 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
5085 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
5086 NVME_IDENTIFY_DATA_SIZE);
5087 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
5088 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
5089 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
5090 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
5091 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
5092 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
5093 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
5094 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
5095 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
5096 }
5097
5098
nvme_core_init(void)5099 static int __init nvme_core_init(void)
5100 {
5101 int result = -ENOMEM;
5102
5103 _nvme_check_size();
5104
5105 nvme_wq = alloc_workqueue("nvme-wq",
5106 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
5107 if (!nvme_wq)
5108 goto out;
5109
5110 nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
5111 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
5112 if (!nvme_reset_wq)
5113 goto destroy_wq;
5114
5115 nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
5116 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
5117 if (!nvme_delete_wq)
5118 goto destroy_reset_wq;
5119
5120 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
5121 NVME_MINORS, "nvme");
5122 if (result < 0)
5123 goto destroy_delete_wq;
5124
5125 result = class_register(&nvme_class);
5126 if (result)
5127 goto unregister_chrdev;
5128
5129 result = class_register(&nvme_subsys_class);
5130 if (result)
5131 goto destroy_class;
5132
5133 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
5134 "nvme-generic");
5135 if (result < 0)
5136 goto destroy_subsys_class;
5137
5138 result = class_register(&nvme_ns_chr_class);
5139 if (result)
5140 goto unregister_generic_ns;
5141
5142 result = nvme_init_auth();
5143 if (result)
5144 goto destroy_ns_chr;
5145 return 0;
5146
5147 destroy_ns_chr:
5148 class_unregister(&nvme_ns_chr_class);
5149 unregister_generic_ns:
5150 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5151 destroy_subsys_class:
5152 class_unregister(&nvme_subsys_class);
5153 destroy_class:
5154 class_unregister(&nvme_class);
5155 unregister_chrdev:
5156 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5157 destroy_delete_wq:
5158 destroy_workqueue(nvme_delete_wq);
5159 destroy_reset_wq:
5160 destroy_workqueue(nvme_reset_wq);
5161 destroy_wq:
5162 destroy_workqueue(nvme_wq);
5163 out:
5164 return result;
5165 }
5166
nvme_core_exit(void)5167 static void __exit nvme_core_exit(void)
5168 {
5169 nvme_exit_auth();
5170 class_unregister(&nvme_ns_chr_class);
5171 class_unregister(&nvme_subsys_class);
5172 class_unregister(&nvme_class);
5173 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5174 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5175 destroy_workqueue(nvme_delete_wq);
5176 destroy_workqueue(nvme_reset_wq);
5177 destroy_workqueue(nvme_wq);
5178 ida_destroy(&nvme_ns_chr_minor_ida);
5179 ida_destroy(&nvme_instance_ida);
5180 }
5181
5182 MODULE_LICENSE("GPL");
5183 MODULE_VERSION("1.0");
5184 MODULE_DESCRIPTION("NVMe host core framework");
5185 module_init(nvme_core_init);
5186 module_exit(nvme_core_exit);
5187