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1# SPDX-License-Identifier: GPL-2.0
2#
3# PCI configuration
4#
5
6# select this to offer the PCI prompt
7config HAVE_PCI
8	bool
9
10# select this to unconditionally force on PCI support
11config FORCE_PCI
12	bool
13	select HAVE_PCI
14	select PCI
15
16# select this to provide a generic PCI iomap,
17# without PCI itself having to be defined
18config GENERIC_PCI_IOMAP
19	bool
20
21menuconfig PCI
22	bool "PCI support"
23	depends on HAVE_PCI
24	help
25	  This option enables support for the PCI local bus, including
26	  support for PCI-X and the foundations for PCI Express support.
27	  Say 'Y' here unless you know what you are doing.
28
29if PCI
30
31config PCI_DOMAINS
32	bool
33	depends on PCI
34
35config PCI_DOMAINS_GENERIC
36	bool
37	select PCI_DOMAINS
38
39config PCI_SYSCALL
40	bool
41
42source "drivers/pci/pcie/Kconfig"
43
44config PCI_MSI
45	bool "Message Signaled Interrupts (MSI and MSI-X)"
46	select GENERIC_MSI_IRQ
47	help
48	   This allows device drivers to enable MSI (Message Signaled
49	   Interrupts).  Message Signaled Interrupts enable a device to
50	   generate an interrupt using an inbound Memory Write on its
51	   PCI bus instead of asserting a device IRQ pin.
52
53	   Use of PCI MSI interrupts can be disabled at kernel boot time
54	   by using the 'pci=nomsi' option.  This disables MSI for the
55	   entire system.
56
57	   If you don't know what to do here, say Y.
58
59config PCI_MSI_ARCH_FALLBACKS
60	bool
61
62config PCI_QUIRKS
63	default y
64	bool "Enable PCI quirk workarounds" if EXPERT
65	help
66	  This enables workarounds for various PCI chipset bugs/quirks.
67	  Disable this only if your target machine is unaffected by PCI
68	  quirks.
69
70config PCI_DEBUG
71	bool "PCI Debugging"
72	depends on DEBUG_KERNEL
73	help
74	  Say Y here if you want the PCI core to produce a bunch of debug
75	  messages to the system log.  Select this if you are having a
76	  problem with PCI support and want to see more of what is going on.
77
78	  When in doubt, say N.
79
80config PCI_REALLOC_ENABLE_AUTO
81	bool "Enable PCI resource re-allocation detection"
82	depends on PCI_IOV
83	help
84	  Say Y here if you want the PCI core to detect if PCI resource
85	  re-allocation needs to be enabled. You can always use pci=realloc=on
86	  or pci=realloc=off to override it.  It will automatically
87	  re-allocate PCI resources if SR-IOV BARs have not been allocated by
88	  the BIOS.
89
90	  When in doubt, say N.
91
92config PCI_STUB
93	tristate "PCI Stub driver"
94	help
95	  Say Y or M here if you want be able to reserve a PCI device
96	  when it is going to be assigned to a guest operating system.
97
98	  When in doubt, say N.
99
100config PCI_PF_STUB
101	tristate "PCI PF Stub driver"
102	depends on PCI_IOV
103	help
104	  Say Y or M here if you want to enable support for devices that
105	  require SR-IOV support, while at the same time the PF (Physical
106	  Function) itself is not providing any actual services on the
107	  host itself such as storage or networking.
108
109	  When in doubt, say N.
110
111config XEN_PCIDEV_FRONTEND
112	tristate "Xen PCI Frontend"
113	depends on XEN_PV
114	select PCI_XEN
115	select XEN_XENBUS_FRONTEND
116	default y
117	help
118	  The PCI device frontend driver allows the kernel to import arbitrary
119	  PCI devices from a PCI backend to support PCI driver domains.
120
121config PCI_ATS
122	bool
123
124config PCI_DOE
125	bool
126
127config PCI_ECAM
128	bool
129
130config PCI_LOCKLESS_CONFIG
131	bool
132
133config PCI_BRIDGE_EMUL
134	bool
135
136config PCI_IOV
137	bool "PCI IOV support"
138	select PCI_ATS
139	help
140	  I/O Virtualization is a PCI feature supported by some devices
141	  which allows them to create virtual devices which share their
142	  physical resources.
143
144	  If unsure, say N.
145
146config PCI_NPEM
147	bool "Native PCIe Enclosure Management"
148	depends on LEDS_CLASS=y
149	help
150	  Support for Native PCIe Enclosure Management. It allows managing LED
151	  indications in storage enclosures. Enclosure must support following
152	  indications: OK, Locate, Fail, Rebuild, other indications are
153	  optional.
154
155config PCI_PRI
156	bool "PCI PRI support"
157	select PCI_ATS
158	help
159	  PRI is the PCI Page Request Interface. It allows PCI devices that are
160	  behind an IOMMU to recover from page faults.
161
162	  If unsure, say N.
163
164config PCI_PASID
165	bool "PCI PASID support"
166	select PCI_ATS
167	help
168	  Process Address Space Identifiers (PASIDs) can be used by PCI devices
169	  to access more than one IO address space at the same time. To make
170	  use of this feature an IOMMU is required which also supports PASIDs.
171	  Select this option if you have such an IOMMU and want to compile the
172	  driver for it into your kernel.
173
174	  If unsure, say N.
175
176config PCI_P2PDMA
177	bool "PCI peer-to-peer transfer support"
178	depends on ZONE_DEVICE
179	#
180	# The need for the scatterlist DMA bus address flag means PCI P2PDMA
181	# requires 64bit
182	#
183	depends on 64BIT
184	select GENERIC_ALLOCATOR
185	select NEED_SG_DMA_FLAGS
186	help
187	  Enables drivers to do PCI peer-to-peer transactions to and from
188	  BARs that are exposed in other devices that are the part of
189	  the hierarchy where peer-to-peer DMA is guaranteed by the PCI
190	  specification to work (ie. anything below a single PCI bridge).
191
192	  Many PCIe root complexes do not support P2P transactions and
193	  it's hard to tell which support it at all, so at this time,
194	  P2P DMA transactions must be between devices behind the same root
195	  port.
196
197	  Enabling this option will reduce the entropy of x86 KASLR memory
198	  regions. For example - on a 46 bit system, the entropy goes down
199	  from 16 bits to 15 bits. The actual reduction in entropy depends
200	  on the physical address bits, on processor features, kernel config
201	  (5 level page table) and physical memory present on the system.
202
203	  If unsure, say N.
204
205config PCI_LABEL
206	def_bool y if (DMI || ACPI)
207	select NLS
208
209config PCI_HYPERV
210	tristate "Hyper-V PCI Frontend"
211	depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && SYSFS
212	select PCI_HYPERV_INTERFACE
213	help
214	  The PCI device frontend driver allows the kernel to import arbitrary
215	  PCI devices from a PCI backend to support PCI driver domains.
216
217config PCI_DYNAMIC_OF_NODES
218	bool "Create Device tree nodes for PCI devices"
219	depends on OF_IRQ
220	select OF_DYNAMIC
221	help
222	  This option enables support for generating device tree nodes for some
223	  PCI devices. Thus, the driver of this kind can load and overlay
224	  flattened device tree for its downstream devices.
225
226	  Once this option is selected, the device tree nodes will be generated
227	  for all PCI bridges.
228
229choice
230	prompt "PCI Express hierarchy optimization setting"
231	default PCIE_BUS_DEFAULT
232	depends on PCI && EXPERT
233	help
234	  MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
235	  device parameters that affect performance and the ability to
236	  support hotplug and peer-to-peer DMA.
237
238	  The following choices set the MPS and MRRS optimization strategy
239	  at compile-time.  The choices are the same as those offered for
240	  the kernel command-line parameter 'pci', i.e.,
241	  'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe',
242	  'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'.
243
244	  This is a compile-time setting and can be overridden by the above
245	  command-line parameters.  If unsure, choose PCIE_BUS_DEFAULT.
246
247config PCIE_BUS_TUNE_OFF
248	bool "Tune Off"
249	depends on PCI
250	help
251	  Use the BIOS defaults; don't touch MPS at all.  This is the same
252	  as booting with 'pci=pcie_bus_tune_off'.
253
254config PCIE_BUS_DEFAULT
255	bool "Default"
256	depends on PCI
257	help
258	  Default choice; ensure that the MPS matches upstream bridge.
259
260config PCIE_BUS_SAFE
261	bool "Safe"
262	depends on PCI
263	help
264	  Use largest MPS that boot-time devices support.  If you have a
265	  closed system with no possibility of adding new devices, this
266	  will use the largest MPS that's supported by all devices.  This
267	  is the same as booting with 'pci=pcie_bus_safe'.
268
269config PCIE_BUS_PERFORMANCE
270	bool "Performance"
271	depends on PCI
272	help
273	  Use MPS and MRRS for best performance.  Ensure that a given
274	  device's MPS is no larger than its parent MPS, which allows us to
275	  keep all switches/bridges to the max MPS supported by their
276	  parent.  This is the same as booting with 'pci=pcie_bus_perf'.
277
278config PCIE_BUS_PEER2PEER
279	bool "Peer2peer"
280	depends on PCI
281	help
282	  Set MPS = 128 for all devices.  MPS configuration effected by the
283	  other options could cause the MPS on one root port to be
284	  different than that of the MPS on another, which may cause
285	  hot-added devices or peer-to-peer DMA to fail.  Set MPS to the
286	  smallest possible value (128B) system-wide to avoid these issues.
287	  This is the same as booting with 'pci=pcie_bus_peer2peer'.
288
289endchoice
290
291config VGA_ARB
292	bool "VGA Arbitration" if EXPERT
293	default y
294	depends on (PCI && !S390)
295	help
296	  Some "legacy" VGA devices implemented on PCI typically have the same
297	  hard-decoded addresses as they did on ISA. When multiple PCI devices
298	  are accessed at same time they need some kind of coordination. Please
299	  see Documentation/gpu/vgaarbiter.rst for more details. Select this to
300	  enable VGA arbiter.
301
302config VGA_ARB_MAX_GPUS
303	int "Maximum number of GPUs"
304	default 16
305	depends on VGA_ARB
306	help
307	  Reserves space in the kernel to maintain resource locking for
308	  multiple GPUS.  The overhead for each GPU is very small.
309
310source "drivers/pci/hotplug/Kconfig"
311source "drivers/pci/controller/Kconfig"
312source "drivers/pci/endpoint/Kconfig"
313source "drivers/pci/switch/Kconfig"
314source "drivers/pci/pwrctrl/Kconfig"
315
316endif
317