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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Renesas R-Car Gen3 for USB2.0 PHY driver
4  *
5  * Copyright (C) 2015-2017 Renesas Electronics Corporation
6  *
7  * This is based on the phy-rcar-gen2 driver:
8  * Copyright (C) 2014 Renesas Solutions Corp.
9  * Copyright (C) 2014 Cogent Embedded, Inc.
10  */
11 
12 #include <linux/cleanup.h>
13 #include <linux/extcon-provider.h>
14 #include <linux/interrupt.h>
15 #include <linux/io.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <linux/of.h>
19 #include <linux/phy/phy.h>
20 #include <linux/platform_device.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/reset.h>
24 #include <linux/string.h>
25 #include <linux/usb/of.h>
26 #include <linux/workqueue.h>
27 
28 /******* USB2.0 Host registers (original offset is +0x200) *******/
29 #define USB2_INT_ENABLE		0x000
30 #define USB2_AHB_BUS_CTR	0x008
31 #define USB2_USBCTR		0x00c
32 #define USB2_SPD_RSM_TIMSET	0x10c
33 #define USB2_OC_TIMSET		0x110
34 #define USB2_COMMCTRL		0x600
35 #define USB2_OBINTSTA		0x604
36 #define USB2_OBINTEN		0x608
37 #define USB2_VBCTRL		0x60c
38 #define USB2_LINECTRL1		0x610
39 #define USB2_ADPCTRL		0x630
40 
41 /* INT_ENABLE */
42 #define USB2_INT_ENABLE_UCOM_INTEN	BIT(3)
43 #define USB2_INT_ENABLE_USBH_INTB_EN	BIT(2)	/* For EHCI */
44 #define USB2_INT_ENABLE_USBH_INTA_EN	BIT(1)	/* For OHCI */
45 
46 /* AHB_BUS_CTR */
47 #define USB2_AHB_BUS_CTR_MBL_MASK	GENMASK(1, 0)
48 #define USB2_AHB_BUS_CTR_MBL_INCR4	2
49 
50 /* USBCTR */
51 #define USB2_USBCTR_DIRPD	BIT(2)
52 #define USB2_USBCTR_PLL_RST	BIT(1)
53 
54 /* SPD_RSM_TIMSET */
55 #define USB2_SPD_RSM_TIMSET_INIT	0x014e029b
56 
57 /* OC_TIMSET */
58 #define USB2_OC_TIMSET_INIT		0x000209ab
59 
60 /* COMMCTRL */
61 #define USB2_COMMCTRL_OTG_PERI		BIT(31)	/* 1 = Peripheral mode */
62 
63 /* OBINTSTA and OBINTEN */
64 #define USB2_OBINT_SESSVLDCHG		BIT(12)
65 #define USB2_OBINT_IDDIGCHG		BIT(11)
66 #define USB2_OBINT_BITS			(USB2_OBINT_SESSVLDCHG | \
67 					 USB2_OBINT_IDDIGCHG)
68 
69 /* VBCTRL */
70 #define USB2_VBCTRL_OCCLREN		BIT(16)
71 #define USB2_VBCTRL_DRVVBUSSEL		BIT(8)
72 #define USB2_VBCTRL_VBOUT		BIT(0)
73 
74 /* LINECTRL1 */
75 #define USB2_LINECTRL1_DPRPD_EN		BIT(19)
76 #define USB2_LINECTRL1_DP_RPD		BIT(18)
77 #define USB2_LINECTRL1_DMRPD_EN		BIT(17)
78 #define USB2_LINECTRL1_DM_RPD		BIT(16)
79 #define USB2_LINECTRL1_OPMODE_NODRV	BIT(6)
80 
81 /* ADPCTRL */
82 #define USB2_ADPCTRL_OTGSESSVLD		BIT(20)
83 #define USB2_ADPCTRL_IDDIG		BIT(19)
84 #define USB2_ADPCTRL_IDPULLUP		BIT(5)	/* 1 = ID sampling is enabled */
85 #define USB2_ADPCTRL_DRVVBUS		BIT(4)
86 
87 /*  RZ/G2L specific */
88 #define USB2_OBINT_IDCHG_EN		BIT(0)
89 #define USB2_LINECTRL1_USB2_IDMON	BIT(0)
90 
91 #define NUM_OF_PHYS			4
92 enum rcar_gen3_phy_index {
93 	PHY_INDEX_BOTH_HC,
94 	PHY_INDEX_OHCI,
95 	PHY_INDEX_EHCI,
96 	PHY_INDEX_HSUSB
97 };
98 
99 static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = {
100 	USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN,
101 	USB2_INT_ENABLE_USBH_INTA_EN,
102 	USB2_INT_ENABLE_USBH_INTB_EN,
103 	0
104 };
105 
106 struct rcar_gen3_phy {
107 	struct phy *phy;
108 	struct rcar_gen3_chan *ch;
109 	u32 int_enable_bits;
110 	bool initialized;
111 	bool powered;
112 };
113 
114 struct rcar_gen3_chan {
115 	void __iomem *base;
116 	struct device *dev;	/* platform_device's device */
117 	struct extcon_dev *extcon;
118 	struct rcar_gen3_phy rphys[NUM_OF_PHYS];
119 	struct regulator *vbus;
120 	struct reset_control *rstc;
121 	struct work_struct work;
122 	spinlock_t lock;	/* protects access to hardware and driver data structure. */
123 	enum usb_dr_mode dr_mode;
124 	u32 obint_enable_bits;
125 	bool extcon_host;
126 	bool is_otg_channel;
127 	bool uses_otg_pins;
128 	bool soc_no_adp_ctrl;
129 };
130 
131 struct rcar_gen3_phy_drv_data {
132 	const struct phy_ops *phy_usb2_ops;
133 	bool no_adp_ctrl;
134 	bool init_bus;
135 };
136 
137 /*
138  * Combination about is_otg_channel and uses_otg_pins:
139  *
140  * Parameters				|| Behaviors
141  * is_otg_channel	| uses_otg_pins	|| irqs		| role sysfs
142  * ---------------------+---------------++--------------+------------
143  * true			| true		|| enabled	| enabled
144  * true                 | false		|| disabled	| enabled
145  * false                | any		|| disabled	| disabled
146  */
147 
rcar_gen3_phy_usb2_work(struct work_struct * work)148 static void rcar_gen3_phy_usb2_work(struct work_struct *work)
149 {
150 	struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
151 						 work);
152 
153 	if (ch->extcon_host) {
154 		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
155 		extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
156 	} else {
157 		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
158 		extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
159 	}
160 }
161 
rcar_gen3_set_host_mode(struct rcar_gen3_chan * ch,int host)162 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
163 {
164 	void __iomem *usb2_base = ch->base;
165 	u32 val = readl(usb2_base + USB2_COMMCTRL);
166 
167 	dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
168 	if (host)
169 		val &= ~USB2_COMMCTRL_OTG_PERI;
170 	else
171 		val |= USB2_COMMCTRL_OTG_PERI;
172 	writel(val, usb2_base + USB2_COMMCTRL);
173 }
174 
rcar_gen3_set_linectrl(struct rcar_gen3_chan * ch,int dp,int dm)175 static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
176 {
177 	void __iomem *usb2_base = ch->base;
178 	u32 val = readl(usb2_base + USB2_LINECTRL1);
179 
180 	dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
181 	val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
182 	if (dp)
183 		val |= USB2_LINECTRL1_DP_RPD;
184 	if (dm)
185 		val |= USB2_LINECTRL1_DM_RPD;
186 	writel(val, usb2_base + USB2_LINECTRL1);
187 }
188 
rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan * ch,int vbus)189 static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
190 {
191 	void __iomem *usb2_base = ch->base;
192 	u32 vbus_ctrl_reg = USB2_ADPCTRL;
193 	u32 vbus_ctrl_val = USB2_ADPCTRL_DRVVBUS;
194 	u32 val;
195 
196 	dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus);
197 	if (ch->soc_no_adp_ctrl) {
198 		if (ch->vbus)
199 			regulator_hardware_enable(ch->vbus, vbus);
200 
201 		vbus_ctrl_reg = USB2_VBCTRL;
202 		vbus_ctrl_val = USB2_VBCTRL_VBOUT;
203 	}
204 
205 	val = readl(usb2_base + vbus_ctrl_reg);
206 	if (vbus)
207 		val |= vbus_ctrl_val;
208 	else
209 		val &= ~vbus_ctrl_val;
210 	writel(val, usb2_base + vbus_ctrl_reg);
211 }
212 
rcar_gen3_control_otg_irq(struct rcar_gen3_chan * ch,int enable)213 static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
214 {
215 	void __iomem *usb2_base = ch->base;
216 	u32 val = readl(usb2_base + USB2_OBINTEN);
217 
218 	if (ch->uses_otg_pins && enable)
219 		val |= ch->obint_enable_bits;
220 	else
221 		val &= ~ch->obint_enable_bits;
222 	writel(val, usb2_base + USB2_OBINTEN);
223 }
224 
rcar_gen3_init_for_host(struct rcar_gen3_chan * ch)225 static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
226 {
227 	rcar_gen3_set_linectrl(ch, 1, 1);
228 	rcar_gen3_set_host_mode(ch, 1);
229 	rcar_gen3_enable_vbus_ctrl(ch, 1);
230 
231 	ch->extcon_host = true;
232 	schedule_work(&ch->work);
233 }
234 
rcar_gen3_init_for_peri(struct rcar_gen3_chan * ch)235 static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
236 {
237 	rcar_gen3_set_linectrl(ch, 0, 1);
238 	rcar_gen3_set_host_mode(ch, 0);
239 	rcar_gen3_enable_vbus_ctrl(ch, 0);
240 
241 	ch->extcon_host = false;
242 	schedule_work(&ch->work);
243 }
244 
rcar_gen3_init_for_b_host(struct rcar_gen3_chan * ch)245 static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
246 {
247 	void __iomem *usb2_base = ch->base;
248 	u32 val;
249 
250 	val = readl(usb2_base + USB2_LINECTRL1);
251 	writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
252 
253 	rcar_gen3_set_linectrl(ch, 1, 1);
254 	rcar_gen3_set_host_mode(ch, 1);
255 	rcar_gen3_enable_vbus_ctrl(ch, 0);
256 
257 	val = readl(usb2_base + USB2_LINECTRL1);
258 	writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
259 }
260 
rcar_gen3_init_for_a_peri(struct rcar_gen3_chan * ch)261 static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
262 {
263 	rcar_gen3_set_linectrl(ch, 0, 1);
264 	rcar_gen3_set_host_mode(ch, 0);
265 	rcar_gen3_enable_vbus_ctrl(ch, 1);
266 }
267 
rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan * ch)268 static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
269 {
270 	rcar_gen3_control_otg_irq(ch, 0);
271 
272 	rcar_gen3_enable_vbus_ctrl(ch, 1);
273 	rcar_gen3_init_for_host(ch);
274 
275 	rcar_gen3_control_otg_irq(ch, 1);
276 }
277 
rcar_gen3_check_id(struct rcar_gen3_chan * ch)278 static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
279 {
280 	if (!ch->uses_otg_pins)
281 		return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true;
282 
283 	if (ch->soc_no_adp_ctrl)
284 		return !!(readl(ch->base + USB2_LINECTRL1) & USB2_LINECTRL1_USB2_IDMON);
285 
286 	return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
287 }
288 
rcar_gen3_device_recognition(struct rcar_gen3_chan * ch)289 static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
290 {
291 	if (!rcar_gen3_check_id(ch))
292 		rcar_gen3_init_for_host(ch);
293 	else
294 		rcar_gen3_init_for_peri(ch);
295 }
296 
rcar_gen3_is_host(struct rcar_gen3_chan * ch)297 static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
298 {
299 	return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
300 }
301 
rcar_gen3_get_phy_mode(struct rcar_gen3_chan * ch)302 static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
303 {
304 	if (rcar_gen3_is_host(ch))
305 		return PHY_MODE_USB_HOST;
306 
307 	return PHY_MODE_USB_DEVICE;
308 }
309 
rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan * ch)310 static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch)
311 {
312 	int i;
313 
314 	for (i = 0; i < NUM_OF_PHYS; i++) {
315 		if (ch->rphys[i].initialized)
316 			return true;
317 	}
318 
319 	return false;
320 }
321 
rcar_gen3_is_any_otg_rphy_initialized(struct rcar_gen3_chan * ch)322 static bool rcar_gen3_is_any_otg_rphy_initialized(struct rcar_gen3_chan *ch)
323 {
324 	for (enum rcar_gen3_phy_index i = PHY_INDEX_BOTH_HC; i <= PHY_INDEX_EHCI;
325 	     i++) {
326 		if (ch->rphys[i].initialized)
327 			return true;
328 	}
329 
330 	return false;
331 }
332 
rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan * ch)333 static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch)
334 {
335 	int i;
336 
337 	for (i = 0; i < NUM_OF_PHYS; i++) {
338 		if (ch->rphys[i].powered)
339 			return false;
340 	}
341 
342 	return true;
343 }
344 
role_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)345 static ssize_t role_store(struct device *dev, struct device_attribute *attr,
346 			  const char *buf, size_t count)
347 {
348 	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
349 	bool is_b_device;
350 	enum phy_mode cur_mode, new_mode;
351 
352 	guard(spinlock_irqsave)(&ch->lock);
353 
354 	if (!ch->is_otg_channel || !rcar_gen3_is_any_otg_rphy_initialized(ch))
355 		return -EIO;
356 
357 	if (sysfs_streq(buf, "host"))
358 		new_mode = PHY_MODE_USB_HOST;
359 	else if (sysfs_streq(buf, "peripheral"))
360 		new_mode = PHY_MODE_USB_DEVICE;
361 	else
362 		return -EINVAL;
363 
364 	/* is_b_device: true is B-Device. false is A-Device. */
365 	is_b_device = rcar_gen3_check_id(ch);
366 	cur_mode = rcar_gen3_get_phy_mode(ch);
367 
368 	/* If current and new mode is the same, this returns the error */
369 	if (cur_mode == new_mode)
370 		return -EINVAL;
371 
372 	if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
373 		if (!is_b_device)	/* A-Peripheral */
374 			rcar_gen3_init_from_a_peri_to_a_host(ch);
375 		else			/* B-Peripheral */
376 			rcar_gen3_init_for_b_host(ch);
377 	} else {			/* And is_host must be true */
378 		if (!is_b_device)	/* A-Host */
379 			rcar_gen3_init_for_a_peri(ch);
380 		else			/* B-Host */
381 			rcar_gen3_init_for_peri(ch);
382 	}
383 
384 	return count;
385 }
386 
role_show(struct device * dev,struct device_attribute * attr,char * buf)387 static ssize_t role_show(struct device *dev, struct device_attribute *attr,
388 			 char *buf)
389 {
390 	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
391 
392 	if (!ch->is_otg_channel || !rcar_gen3_is_any_otg_rphy_initialized(ch))
393 		return -EIO;
394 
395 	return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
396 							    "peripheral");
397 }
398 static DEVICE_ATTR_RW(role);
399 
rcar_gen3_init_otg(struct rcar_gen3_chan * ch)400 static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
401 {
402 	void __iomem *usb2_base = ch->base;
403 	u32 val;
404 
405 	if (!ch->is_otg_channel || rcar_gen3_is_any_otg_rphy_initialized(ch))
406 		return;
407 
408 	/* Should not use functions of read-modify-write a register */
409 	val = readl(usb2_base + USB2_LINECTRL1);
410 	val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN |
411 	      USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD;
412 	writel(val, usb2_base + USB2_LINECTRL1);
413 
414 	if (!ch->soc_no_adp_ctrl) {
415 		val = readl(usb2_base + USB2_VBCTRL);
416 		val &= ~USB2_VBCTRL_OCCLREN;
417 		writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
418 		val = readl(usb2_base + USB2_ADPCTRL);
419 		writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
420 	}
421 	mdelay(20);
422 
423 	writel(0xffffffff, usb2_base + USB2_OBINTSTA);
424 	writel(ch->obint_enable_bits, usb2_base + USB2_OBINTEN);
425 
426 	rcar_gen3_device_recognition(ch);
427 }
428 
rcar_gen3_phy_usb2_irq(int irq,void * _ch)429 static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
430 {
431 	struct rcar_gen3_chan *ch = _ch;
432 	void __iomem *usb2_base = ch->base;
433 	struct device *dev = ch->dev;
434 	irqreturn_t ret = IRQ_NONE;
435 	u32 status;
436 
437 	pm_runtime_get_noresume(dev);
438 
439 	if (pm_runtime_suspended(dev))
440 		goto rpm_put;
441 
442 	scoped_guard(spinlock, &ch->lock) {
443 		status = readl(usb2_base + USB2_OBINTSTA);
444 		if (status & ch->obint_enable_bits) {
445 			dev_vdbg(dev, "%s: %08x\n", __func__, status);
446 			writel(ch->obint_enable_bits, usb2_base + USB2_OBINTSTA);
447 			rcar_gen3_device_recognition(ch);
448 			ret = IRQ_HANDLED;
449 		}
450 	}
451 
452 rpm_put:
453 	pm_runtime_put_noidle(dev);
454 	return ret;
455 }
456 
rcar_gen3_phy_usb2_init(struct phy * p)457 static int rcar_gen3_phy_usb2_init(struct phy *p)
458 {
459 	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
460 	struct rcar_gen3_chan *channel = rphy->ch;
461 	void __iomem *usb2_base = channel->base;
462 	u32 val;
463 
464 	guard(spinlock_irqsave)(&channel->lock);
465 
466 	/* Initialize USB2 part */
467 	val = readl(usb2_base + USB2_INT_ENABLE);
468 	val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits;
469 	writel(val, usb2_base + USB2_INT_ENABLE);
470 
471 	if (!rcar_gen3_is_any_rphy_initialized(channel)) {
472 		writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
473 		writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
474 	}
475 
476 	/* Initialize otg part (only if we initialize a PHY with IRQs). */
477 	if (rphy->int_enable_bits)
478 		rcar_gen3_init_otg(channel);
479 
480 	rphy->initialized = true;
481 
482 	return 0;
483 }
484 
rcar_gen3_phy_usb2_exit(struct phy * p)485 static int rcar_gen3_phy_usb2_exit(struct phy *p)
486 {
487 	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
488 	struct rcar_gen3_chan *channel = rphy->ch;
489 	void __iomem *usb2_base = channel->base;
490 	u32 val;
491 
492 	guard(spinlock_irqsave)(&channel->lock);
493 
494 	rphy->initialized = false;
495 
496 	val = readl(usb2_base + USB2_INT_ENABLE);
497 	val &= ~rphy->int_enable_bits;
498 	if (!rcar_gen3_is_any_rphy_initialized(channel))
499 		val &= ~USB2_INT_ENABLE_UCOM_INTEN;
500 	writel(val, usb2_base + USB2_INT_ENABLE);
501 
502 	return 0;
503 }
504 
rcar_gen3_phy_usb2_power_on(struct phy * p)505 static int rcar_gen3_phy_usb2_power_on(struct phy *p)
506 {
507 	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
508 	struct rcar_gen3_chan *channel = rphy->ch;
509 	void __iomem *usb2_base = channel->base;
510 	u32 val;
511 	int ret = 0;
512 
513 	if (channel->vbus) {
514 		ret = regulator_enable(channel->vbus);
515 		if (ret)
516 			return ret;
517 	}
518 
519 	guard(spinlock_irqsave)(&channel->lock);
520 
521 	if (!rcar_gen3_are_all_rphys_power_off(channel))
522 		goto out;
523 
524 	val = readl(usb2_base + USB2_USBCTR);
525 	val |= USB2_USBCTR_PLL_RST;
526 	writel(val, usb2_base + USB2_USBCTR);
527 	val &= ~USB2_USBCTR_PLL_RST;
528 	writel(val, usb2_base + USB2_USBCTR);
529 
530 out:
531 	/* The powered flag should be set for any other phys anyway */
532 	rphy->powered = true;
533 
534 	return 0;
535 }
536 
rcar_gen3_phy_usb2_power_off(struct phy * p)537 static int rcar_gen3_phy_usb2_power_off(struct phy *p)
538 {
539 	struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
540 	struct rcar_gen3_chan *channel = rphy->ch;
541 	int ret = 0;
542 
543 	scoped_guard(spinlock_irqsave, &channel->lock) {
544 		rphy->powered = false;
545 
546 		if (rcar_gen3_are_all_rphys_power_off(channel)) {
547 			u32 val = readl(channel->base + USB2_USBCTR);
548 
549 			val |= USB2_USBCTR_PLL_RST;
550 			writel(val, channel->base + USB2_USBCTR);
551 		}
552 	}
553 
554 	if (channel->vbus)
555 		ret = regulator_disable(channel->vbus);
556 
557 	return ret;
558 }
559 
560 static const struct phy_ops rcar_gen3_phy_usb2_ops = {
561 	.init		= rcar_gen3_phy_usb2_init,
562 	.exit		= rcar_gen3_phy_usb2_exit,
563 	.power_on	= rcar_gen3_phy_usb2_power_on,
564 	.power_off	= rcar_gen3_phy_usb2_power_off,
565 	.owner		= THIS_MODULE,
566 };
567 
568 static const struct phy_ops rz_g1c_phy_usb2_ops = {
569 	.init		= rcar_gen3_phy_usb2_init,
570 	.exit		= rcar_gen3_phy_usb2_exit,
571 	.owner		= THIS_MODULE,
572 };
573 
574 static const struct rcar_gen3_phy_drv_data rcar_gen3_phy_usb2_data = {
575 	.phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
576 	.no_adp_ctrl = false,
577 };
578 
579 static const struct rcar_gen3_phy_drv_data rz_g1c_phy_usb2_data = {
580 	.phy_usb2_ops = &rz_g1c_phy_usb2_ops,
581 	.no_adp_ctrl = false,
582 };
583 
584 static const struct rcar_gen3_phy_drv_data rz_g2l_phy_usb2_data = {
585 	.phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
586 	.no_adp_ctrl = true,
587 };
588 
589 static const struct rcar_gen3_phy_drv_data rz_g3s_phy_usb2_data = {
590 	.phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
591 	.no_adp_ctrl = true,
592 	.init_bus = true,
593 };
594 
595 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
596 	{
597 		.compatible = "renesas,usb2-phy-r8a77470",
598 		.data = &rz_g1c_phy_usb2_data,
599 	},
600 	{
601 		.compatible = "renesas,usb2-phy-r8a7795",
602 		.data = &rcar_gen3_phy_usb2_data,
603 	},
604 	{
605 		.compatible = "renesas,usb2-phy-r8a7796",
606 		.data = &rcar_gen3_phy_usb2_data,
607 	},
608 	{
609 		.compatible = "renesas,usb2-phy-r8a77965",
610 		.data = &rcar_gen3_phy_usb2_data,
611 	},
612 	{
613 		.compatible = "renesas,rzg2l-usb2-phy",
614 		.data = &rz_g2l_phy_usb2_data,
615 	},
616 	{
617 		.compatible = "renesas,usb2-phy-r9a08g045",
618 		.data = &rz_g3s_phy_usb2_data,
619 	},
620 	{
621 		.compatible = "renesas,rcar-gen3-usb2-phy",
622 		.data = &rcar_gen3_phy_usb2_data,
623 	},
624 	{ /* sentinel */ },
625 };
626 MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
627 
628 static const unsigned int rcar_gen3_phy_cable[] = {
629 	EXTCON_USB,
630 	EXTCON_USB_HOST,
631 	EXTCON_NONE,
632 };
633 
rcar_gen3_phy_usb2_xlate(struct device * dev,const struct of_phandle_args * args)634 static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev,
635 					    const struct of_phandle_args *args)
636 {
637 	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
638 
639 	if (args->args_count == 0)	/* For old version dts */
640 		return ch->rphys[PHY_INDEX_BOTH_HC].phy;
641 	else if (args->args_count > 1)	/* Prevent invalid args count */
642 		return ERR_PTR(-ENODEV);
643 
644 	if (args->args[0] >= NUM_OF_PHYS)
645 		return ERR_PTR(-ENODEV);
646 
647 	return ch->rphys[args->args[0]].phy;
648 }
649 
rcar_gen3_get_dr_mode(struct device_node * np)650 static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
651 {
652 	enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN;
653 	int i;
654 
655 	/*
656 	 * If one of device nodes has other dr_mode except UNKNOWN,
657 	 * this function returns UNKNOWN. To achieve backward compatibility,
658 	 * this loop starts the index as 0.
659 	 */
660 	for (i = 0; i < NUM_OF_PHYS; i++) {
661 		enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i);
662 
663 		if (mode != USB_DR_MODE_UNKNOWN) {
664 			if (candidate == USB_DR_MODE_UNKNOWN)
665 				candidate = mode;
666 			else if (candidate != mode)
667 				return USB_DR_MODE_UNKNOWN;
668 		}
669 	}
670 
671 	return candidate;
672 }
673 
rcar_gen3_phy_usb2_init_bus(struct rcar_gen3_chan * channel)674 static int rcar_gen3_phy_usb2_init_bus(struct rcar_gen3_chan *channel)
675 {
676 	struct device *dev = channel->dev;
677 	int ret;
678 	u32 val;
679 
680 	channel->rstc = devm_reset_control_array_get_shared(dev);
681 	if (IS_ERR(channel->rstc))
682 		return PTR_ERR(channel->rstc);
683 
684 	ret = pm_runtime_resume_and_get(dev);
685 	if (ret)
686 		return ret;
687 
688 	ret = reset_control_deassert(channel->rstc);
689 	if (ret)
690 		goto rpm_put;
691 
692 	val = readl(channel->base + USB2_AHB_BUS_CTR);
693 	val &= ~USB2_AHB_BUS_CTR_MBL_MASK;
694 	val |= USB2_AHB_BUS_CTR_MBL_INCR4;
695 	writel(val, channel->base + USB2_AHB_BUS_CTR);
696 
697 rpm_put:
698 	pm_runtime_put(dev);
699 
700 	return ret;
701 }
702 
rcar_gen3_phy_usb2_probe(struct platform_device * pdev)703 static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
704 {
705 	const struct rcar_gen3_phy_drv_data *phy_data;
706 	struct device *dev = &pdev->dev;
707 	struct rcar_gen3_chan *channel;
708 	struct phy_provider *provider;
709 	int ret = 0, i, irq;
710 
711 	if (!dev->of_node) {
712 		dev_err(dev, "This driver needs device tree\n");
713 		return -EINVAL;
714 	}
715 
716 	channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
717 	if (!channel)
718 		return -ENOMEM;
719 
720 	channel->base = devm_platform_ioremap_resource(pdev, 0);
721 	if (IS_ERR(channel->base))
722 		return PTR_ERR(channel->base);
723 
724 	channel->obint_enable_bits = USB2_OBINT_BITS;
725 	channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node);
726 	if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
727 		channel->is_otg_channel = true;
728 		channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
729 							"renesas,no-otg-pins");
730 		channel->extcon = devm_extcon_dev_allocate(dev,
731 							rcar_gen3_phy_cable);
732 		if (IS_ERR(channel->extcon))
733 			return PTR_ERR(channel->extcon);
734 
735 		ret = devm_extcon_dev_register(dev, channel->extcon);
736 		if (ret < 0) {
737 			dev_err(dev, "Failed to register extcon\n");
738 			return ret;
739 		}
740 	}
741 
742 	/*
743 	 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
744 	 * And then, phy-core will manage runtime pm for this device.
745 	 */
746 	pm_runtime_enable(dev);
747 
748 	phy_data = of_device_get_match_data(dev);
749 	if (!phy_data) {
750 		ret = -EINVAL;
751 		goto error;
752 	}
753 
754 	platform_set_drvdata(pdev, channel);
755 	channel->dev = dev;
756 
757 	if (phy_data->init_bus) {
758 		ret = rcar_gen3_phy_usb2_init_bus(channel);
759 		if (ret)
760 			goto error;
761 	}
762 
763 	channel->soc_no_adp_ctrl = phy_data->no_adp_ctrl;
764 	if (phy_data->no_adp_ctrl)
765 		channel->obint_enable_bits = USB2_OBINT_IDCHG_EN;
766 
767 	spin_lock_init(&channel->lock);
768 	for (i = 0; i < NUM_OF_PHYS; i++) {
769 		channel->rphys[i].phy = devm_phy_create(dev, NULL,
770 							phy_data->phy_usb2_ops);
771 		if (IS_ERR(channel->rphys[i].phy)) {
772 			dev_err(dev, "Failed to create USB2 PHY\n");
773 			ret = PTR_ERR(channel->rphys[i].phy);
774 			goto error;
775 		}
776 		channel->rphys[i].ch = channel;
777 		channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i];
778 		phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]);
779 	}
780 
781 	if (channel->soc_no_adp_ctrl && channel->is_otg_channel)
782 		channel->vbus = devm_regulator_get_exclusive(dev, "vbus");
783 	else
784 		channel->vbus = devm_regulator_get_optional(dev, "vbus");
785 	if (IS_ERR(channel->vbus)) {
786 		if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
787 			ret = PTR_ERR(channel->vbus);
788 			goto error;
789 		}
790 		channel->vbus = NULL;
791 	}
792 
793 	irq = platform_get_irq_optional(pdev, 0);
794 	if (irq < 0 && irq != -ENXIO) {
795 		ret = irq;
796 		goto error;
797 	} else if (irq > 0) {
798 		INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
799 		ret = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
800 				       IRQF_SHARED, dev_name(dev), channel);
801 		if (ret < 0) {
802 			dev_err(dev, "Failed to request irq (%d)\n", irq);
803 			goto error;
804 		}
805 	}
806 
807 	provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
808 	if (IS_ERR(provider)) {
809 		dev_err(dev, "Failed to register PHY provider\n");
810 		ret = PTR_ERR(provider);
811 		goto error;
812 	} else if (channel->is_otg_channel) {
813 		ret = device_create_file(dev, &dev_attr_role);
814 		if (ret < 0)
815 			goto error;
816 	}
817 
818 	return 0;
819 
820 error:
821 	pm_runtime_disable(dev);
822 
823 	return ret;
824 }
825 
rcar_gen3_phy_usb2_remove(struct platform_device * pdev)826 static void rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
827 {
828 	struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
829 
830 	if (channel->is_otg_channel)
831 		device_remove_file(&pdev->dev, &dev_attr_role);
832 
833 	reset_control_assert(channel->rstc);
834 	pm_runtime_disable(&pdev->dev);
835 };
836 
837 static struct platform_driver rcar_gen3_phy_usb2_driver = {
838 	.driver = {
839 		.name		= "phy_rcar_gen3_usb2",
840 		.of_match_table	= rcar_gen3_phy_usb2_match_table,
841 	},
842 	.probe	= rcar_gen3_phy_usb2_probe,
843 	.remove_new = rcar_gen3_phy_usb2_remove,
844 };
845 module_platform_driver(rcar_gen3_phy_usb2_driver);
846 
847 MODULE_LICENSE("GPL v2");
848 MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
849 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
850