1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ZynqMP pin controller
4 *
5 * Copyright (C) 2020, 2021 Xilinx, Inc.
6 *
7 * Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
8 * Rajan Vaja <rajan.vaja@xilinx.com>
9 */
10
11 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
12
13 #include <linux/bitmap.h>
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/of_address.h>
17 #include <linux/platform_device.h>
18
19 #include <linux/firmware/xlnx-zynqmp.h>
20
21 #include <linux/pinctrl/pinconf-generic.h>
22 #include <linux/pinctrl/pinconf.h>
23 #include <linux/pinctrl/pinctrl.h>
24 #include <linux/pinctrl/pinmux.h>
25
26 #include "core.h"
27 #include "pinctrl-utils.h"
28
29 #define ZYNQMP_PIN_PREFIX "MIO"
30 #define PINCTRL_GET_FUNC_NAME_RESP_LEN 16
31 #define MAX_FUNC_NAME_LEN 16
32 #define MAX_GROUP_PIN 50
33 #define MAX_PIN_GROUPS 50
34 #define END_OF_FUNCTIONS "END_OF_FUNCTIONS"
35 #define NUM_GROUPS_PER_RESP 6
36
37 #define PINCTRL_GET_FUNC_GROUPS_RESP_LEN 12
38 #define PINCTRL_GET_PIN_GROUPS_RESP_LEN 12
39 #define NA_GROUP 0xFFFF
40 #define RESERVED_GROUP 0xFFFE
41
42 #define DRIVE_STRENGTH_2MA 2
43 #define DRIVE_STRENGTH_4MA 4
44 #define DRIVE_STRENGTH_8MA 8
45 #define DRIVE_STRENGTH_12MA 12
46
47 /**
48 * struct zynqmp_pmux_function - a pinmux function
49 * @name: Name of the pin mux function
50 * @groups: List of pin groups for this function
51 * @ngroups: Number of entries in @groups
52 *
53 * This structure holds information about pin control function
54 * and function group names supporting that function.
55 */
56 struct zynqmp_pmux_function {
57 char name[MAX_FUNC_NAME_LEN];
58 const char * const *groups;
59 unsigned int ngroups;
60 };
61
62 /**
63 * struct zynqmp_pinctrl - driver data
64 * @pctrl: Pin control device
65 * @groups: Pin groups
66 * @ngroups: Number of @groups
67 * @funcs: Pin mux functions
68 * @nfuncs: Number of @funcs
69 *
70 * This struct is stored as driver data and used to retrieve
71 * information regarding pin control functions, groups and
72 * group pins.
73 */
74 struct zynqmp_pinctrl {
75 struct pinctrl_dev *pctrl;
76 const struct zynqmp_pctrl_group *groups;
77 unsigned int ngroups;
78 const struct zynqmp_pmux_function *funcs;
79 unsigned int nfuncs;
80 };
81
82 /**
83 * struct zynqmp_pctrl_group - Pin control group info
84 * @name: Group name
85 * @pins: Group pin numbers
86 * @npins: Number of pins in the group
87 */
88 struct zynqmp_pctrl_group {
89 const char *name;
90 unsigned int pins[MAX_GROUP_PIN];
91 unsigned int npins;
92 };
93
94 static struct pinctrl_desc zynqmp_desc;
95
zynqmp_pctrl_get_groups_count(struct pinctrl_dev * pctldev)96 static int zynqmp_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
97 {
98 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
99
100 return pctrl->ngroups + zynqmp_desc.npins;
101 }
102
zynqmp_pctrl_get_group_name(struct pinctrl_dev * pctldev,unsigned int selector)103 static const char *zynqmp_pctrl_get_group_name(struct pinctrl_dev *pctldev,
104 unsigned int selector)
105 {
106 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
107
108 if (selector < pctrl->ngroups)
109 return pctrl->groups[selector].name;
110
111 return zynqmp_desc.pins[selector - pctrl->ngroups].name;
112 }
113
zynqmp_pctrl_get_group_pins(struct pinctrl_dev * pctldev,unsigned int selector,const unsigned int ** pins,unsigned int * npins)114 static int zynqmp_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
115 unsigned int selector,
116 const unsigned int **pins,
117 unsigned int *npins)
118 {
119 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
120
121 if (selector < pctrl->ngroups) {
122 *pins = pctrl->groups[selector].pins;
123 *npins = pctrl->groups[selector].npins;
124 } else {
125 *pins = &zynqmp_desc.pins[selector - pctrl->ngroups].number;
126 *npins = 1;
127 }
128
129 return 0;
130 }
131
132 static const struct pinctrl_ops zynqmp_pctrl_ops = {
133 .get_groups_count = zynqmp_pctrl_get_groups_count,
134 .get_group_name = zynqmp_pctrl_get_group_name,
135 .get_group_pins = zynqmp_pctrl_get_group_pins,
136 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
137 .dt_free_map = pinctrl_utils_free_map,
138 };
139
zynqmp_pinmux_request_pin(struct pinctrl_dev * pctldev,unsigned int pin)140 static int zynqmp_pinmux_request_pin(struct pinctrl_dev *pctldev,
141 unsigned int pin)
142 {
143 int ret;
144
145 ret = zynqmp_pm_pinctrl_request(pin);
146 if (ret) {
147 dev_err(pctldev->dev, "request failed for pin %u\n", pin);
148 return ret;
149 }
150
151 return 0;
152 }
153
zynqmp_pmux_get_functions_count(struct pinctrl_dev * pctldev)154 static int zynqmp_pmux_get_functions_count(struct pinctrl_dev *pctldev)
155 {
156 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
157
158 return pctrl->nfuncs;
159 }
160
zynqmp_pmux_get_function_name(struct pinctrl_dev * pctldev,unsigned int selector)161 static const char *zynqmp_pmux_get_function_name(struct pinctrl_dev *pctldev,
162 unsigned int selector)
163 {
164 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
165
166 return pctrl->funcs[selector].name;
167 }
168
169 /**
170 * zynqmp_pmux_get_function_groups() - Get groups for the function
171 * @pctldev: Pincontrol device pointer.
172 * @selector: Function ID
173 * @groups: Group names.
174 * @num_groups: Number of function groups.
175 *
176 * Get function's group count and group names.
177 *
178 * Return: 0
179 */
zynqmp_pmux_get_function_groups(struct pinctrl_dev * pctldev,unsigned int selector,const char * const ** groups,unsigned * const num_groups)180 static int zynqmp_pmux_get_function_groups(struct pinctrl_dev *pctldev,
181 unsigned int selector,
182 const char * const **groups,
183 unsigned * const num_groups)
184 {
185 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
186
187 *groups = pctrl->funcs[selector].groups;
188 *num_groups = pctrl->funcs[selector].ngroups;
189
190 return 0;
191 }
192
193 /**
194 * zynqmp_pinmux_set_mux() - Set requested function for the group
195 * @pctldev: Pincontrol device pointer.
196 * @function: Function ID.
197 * @group: Group ID.
198 *
199 * Loop through all pins of the group and call firmware API
200 * to set requested function for all pins in the group.
201 *
202 * Return: 0 on success else error code.
203 */
zynqmp_pinmux_set_mux(struct pinctrl_dev * pctldev,unsigned int function,unsigned int group)204 static int zynqmp_pinmux_set_mux(struct pinctrl_dev *pctldev,
205 unsigned int function,
206 unsigned int group)
207 {
208 const unsigned int *pins;
209 unsigned int npins;
210 int ret, i;
211
212 zynqmp_pctrl_get_group_pins(pctldev, group, &pins, &npins);
213 for (i = 0; i < npins; i++) {
214 ret = zynqmp_pm_pinctrl_set_function(pins[i], function);
215 if (ret) {
216 dev_err(pctldev->dev, "set mux failed for pin %u\n",
217 pins[i]);
218 return ret;
219 }
220 }
221
222 return 0;
223 }
224
zynqmp_pinmux_release_pin(struct pinctrl_dev * pctldev,unsigned int pin)225 static int zynqmp_pinmux_release_pin(struct pinctrl_dev *pctldev,
226 unsigned int pin)
227 {
228 int ret;
229
230 ret = zynqmp_pm_pinctrl_release(pin);
231 if (ret) {
232 dev_err(pctldev->dev, "free pin failed for pin %u\n",
233 pin);
234 return ret;
235 }
236
237 return 0;
238 }
239
240 static const struct pinmux_ops zynqmp_pinmux_ops = {
241 .request = zynqmp_pinmux_request_pin,
242 .get_functions_count = zynqmp_pmux_get_functions_count,
243 .get_function_name = zynqmp_pmux_get_function_name,
244 .get_function_groups = zynqmp_pmux_get_function_groups,
245 .set_mux = zynqmp_pinmux_set_mux,
246 .free = zynqmp_pinmux_release_pin,
247 };
248
249 /**
250 * zynqmp_pinconf_cfg_get() - get config value for the pin
251 * @pctldev: Pin control device pointer.
252 * @pin: Pin number.
253 * @config: Value of config param.
254 *
255 * Get value of the requested configuration parameter for the
256 * given pin.
257 *
258 * Return: 0 on success else error code.
259 */
zynqmp_pinconf_cfg_get(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * config)260 static int zynqmp_pinconf_cfg_get(struct pinctrl_dev *pctldev,
261 unsigned int pin,
262 unsigned long *config)
263 {
264 unsigned int arg, param = pinconf_to_config_param(*config);
265 int ret;
266
267 switch (param) {
268 case PIN_CONFIG_SLEW_RATE:
269 param = PM_PINCTRL_CONFIG_SLEW_RATE;
270 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
271 break;
272 case PIN_CONFIG_BIAS_PULL_UP:
273 param = PM_PINCTRL_CONFIG_PULL_CTRL;
274 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
275 if (arg != PM_PINCTRL_BIAS_PULL_UP)
276 return -EINVAL;
277
278 arg = 1;
279 break;
280 case PIN_CONFIG_BIAS_PULL_DOWN:
281 param = PM_PINCTRL_CONFIG_PULL_CTRL;
282 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
283 if (arg != PM_PINCTRL_BIAS_PULL_DOWN)
284 return -EINVAL;
285
286 arg = 1;
287 break;
288 case PIN_CONFIG_BIAS_DISABLE:
289 param = PM_PINCTRL_CONFIG_BIAS_STATUS;
290 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
291 if (arg != PM_PINCTRL_BIAS_DISABLE)
292 return -EINVAL;
293
294 arg = 1;
295 break;
296 case PIN_CONFIG_POWER_SOURCE:
297 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
298 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
299 break;
300 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
301 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
302 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
303 break;
304 case PIN_CONFIG_DRIVE_STRENGTH:
305 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
306 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
307 switch (arg) {
308 case PM_PINCTRL_DRIVE_STRENGTH_2MA:
309 arg = DRIVE_STRENGTH_2MA;
310 break;
311 case PM_PINCTRL_DRIVE_STRENGTH_4MA:
312 arg = DRIVE_STRENGTH_4MA;
313 break;
314 case PM_PINCTRL_DRIVE_STRENGTH_8MA:
315 arg = DRIVE_STRENGTH_8MA;
316 break;
317 case PM_PINCTRL_DRIVE_STRENGTH_12MA:
318 arg = DRIVE_STRENGTH_12MA;
319 break;
320 default:
321 /* Invalid drive strength */
322 dev_warn(pctldev->dev,
323 "Invalid drive strength for pin %d\n",
324 pin);
325 return -EINVAL;
326 }
327 break;
328 default:
329 ret = -ENOTSUPP;
330 break;
331 }
332
333 if (ret)
334 return ret;
335
336 param = pinconf_to_config_param(*config);
337 *config = pinconf_to_config_packed(param, arg);
338
339 return 0;
340 }
341
342 /**
343 * zynqmp_pinconf_cfg_set() - Set requested config for the pin
344 * @pctldev: Pincontrol device pointer.
345 * @pin: Pin number.
346 * @configs: Configuration to set.
347 * @num_configs: Number of configurations.
348 *
349 * Loop through all configurations and call firmware API
350 * to set requested configurations for the pin.
351 *
352 * Return: 0 on success else error code.
353 */
zynqmp_pinconf_cfg_set(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * configs,unsigned int num_configs)354 static int zynqmp_pinconf_cfg_set(struct pinctrl_dev *pctldev,
355 unsigned int pin, unsigned long *configs,
356 unsigned int num_configs)
357 {
358 int i, ret;
359
360 for (i = 0; i < num_configs; i++) {
361 unsigned int param = pinconf_to_config_param(configs[i]);
362 unsigned int arg = pinconf_to_config_argument(configs[i]);
363 unsigned int value;
364
365 switch (param) {
366 case PIN_CONFIG_SLEW_RATE:
367 param = PM_PINCTRL_CONFIG_SLEW_RATE;
368 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
369 break;
370 case PIN_CONFIG_BIAS_PULL_UP:
371 param = PM_PINCTRL_CONFIG_PULL_CTRL;
372 arg = PM_PINCTRL_BIAS_PULL_UP;
373 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
374 break;
375 case PIN_CONFIG_BIAS_PULL_DOWN:
376 param = PM_PINCTRL_CONFIG_PULL_CTRL;
377 arg = PM_PINCTRL_BIAS_PULL_DOWN;
378 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
379 break;
380 case PIN_CONFIG_BIAS_DISABLE:
381 param = PM_PINCTRL_CONFIG_BIAS_STATUS;
382 arg = PM_PINCTRL_BIAS_DISABLE;
383 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
384 break;
385 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
386 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
387 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
388 break;
389 case PIN_CONFIG_DRIVE_STRENGTH:
390 switch (arg) {
391 case DRIVE_STRENGTH_2MA:
392 value = PM_PINCTRL_DRIVE_STRENGTH_2MA;
393 break;
394 case DRIVE_STRENGTH_4MA:
395 value = PM_PINCTRL_DRIVE_STRENGTH_4MA;
396 break;
397 case DRIVE_STRENGTH_8MA:
398 value = PM_PINCTRL_DRIVE_STRENGTH_8MA;
399 break;
400 case DRIVE_STRENGTH_12MA:
401 value = PM_PINCTRL_DRIVE_STRENGTH_12MA;
402 break;
403 default:
404 /* Invalid drive strength */
405 dev_warn(pctldev->dev,
406 "Invalid drive strength for pin %d\n",
407 pin);
408 return -EINVAL;
409 }
410
411 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
412 ret = zynqmp_pm_pinctrl_set_config(pin, param, value);
413 break;
414 case PIN_CONFIG_POWER_SOURCE:
415 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
416 ret = zynqmp_pm_pinctrl_get_config(pin, param, &value);
417
418 if (arg != value)
419 dev_warn(pctldev->dev,
420 "Invalid IO Standard requested for pin %d\n",
421 pin);
422
423 break;
424 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
425 param = PM_PINCTRL_CONFIG_TRI_STATE;
426 arg = PM_PINCTRL_TRI_STATE_ENABLE;
427 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
428 break;
429 case PIN_CONFIG_MODE_LOW_POWER:
430 /*
431 * These cases are mentioned in dts but configurable
432 * registers are unknown. So falling through to ignore
433 * boot time warnings as of now.
434 */
435 ret = 0;
436 break;
437 case PIN_CONFIG_OUTPUT_ENABLE:
438 param = PM_PINCTRL_CONFIG_TRI_STATE;
439 arg = PM_PINCTRL_TRI_STATE_DISABLE;
440 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
441 break;
442 default:
443 dev_warn(pctldev->dev,
444 "unsupported configuration parameter '%u'\n",
445 param);
446 ret = -ENOTSUPP;
447 break;
448 }
449
450 param = pinconf_to_config_param(configs[i]);
451 arg = pinconf_to_config_argument(configs[i]);
452 if (ret)
453 dev_warn(pctldev->dev,
454 "failed to set: pin %u param %u value %u\n",
455 pin, param, arg);
456 }
457
458 return 0;
459 }
460
461 /**
462 * zynqmp_pinconf_group_set() - Set requested config for the group
463 * @pctldev: Pincontrol device pointer.
464 * @selector: Group ID.
465 * @configs: Configuration to set.
466 * @num_configs: Number of configurations.
467 *
468 * Call function to set configs for each pin in the group.
469 *
470 * Return: 0 on success else error code.
471 */
zynqmp_pinconf_group_set(struct pinctrl_dev * pctldev,unsigned int selector,unsigned long * configs,unsigned int num_configs)472 static int zynqmp_pinconf_group_set(struct pinctrl_dev *pctldev,
473 unsigned int selector,
474 unsigned long *configs,
475 unsigned int num_configs)
476 {
477 const unsigned int *pins;
478 unsigned int npins;
479 int i, ret;
480
481 zynqmp_pctrl_get_group_pins(pctldev, selector, &pins, &npins);
482 for (i = 0; i < npins; i++) {
483 ret = zynqmp_pinconf_cfg_set(pctldev, pins[i], configs,
484 num_configs);
485 if (ret)
486 return ret;
487 }
488
489 return 0;
490 }
491
492 static const struct pinconf_ops zynqmp_pinconf_ops = {
493 .is_generic = true,
494 .pin_config_get = zynqmp_pinconf_cfg_get,
495 .pin_config_set = zynqmp_pinconf_cfg_set,
496 .pin_config_group_set = zynqmp_pinconf_group_set,
497 };
498
499 static struct pinctrl_desc zynqmp_desc = {
500 .name = "zynqmp_pinctrl",
501 .owner = THIS_MODULE,
502 .pctlops = &zynqmp_pctrl_ops,
503 .pmxops = &zynqmp_pinmux_ops,
504 .confops = &zynqmp_pinconf_ops,
505 };
506
zynqmp_pinctrl_get_function_groups(u32 fid,u32 index,u16 * groups)507 static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups)
508 {
509 struct zynqmp_pm_query_data qdata = {0};
510 u32 payload[PAYLOAD_ARG_CNT];
511 int ret;
512
513 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_GROUPS;
514 qdata.arg1 = fid;
515 qdata.arg2 = index;
516
517 ret = zynqmp_pm_query_data(qdata, payload);
518 if (ret)
519 return ret;
520
521 memcpy(groups, &payload[1], PINCTRL_GET_FUNC_GROUPS_RESP_LEN);
522
523 return 0;
524 }
525
zynqmp_pinctrl_get_func_num_groups(u32 fid,unsigned int * ngroups)526 static int zynqmp_pinctrl_get_func_num_groups(u32 fid, unsigned int *ngroups)
527 {
528 struct zynqmp_pm_query_data qdata = {0};
529 u32 payload[PAYLOAD_ARG_CNT];
530 int ret;
531
532 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS;
533 qdata.arg1 = fid;
534
535 ret = zynqmp_pm_query_data(qdata, payload);
536 if (ret)
537 return ret;
538
539 *ngroups = payload[1];
540
541 return 0;
542 }
543
544 /**
545 * zynqmp_pinctrl_prepare_func_groups() - prepare function and groups data
546 * @dev: Device pointer.
547 * @fid: Function ID.
548 * @func: Function data.
549 * @groups: Groups data.
550 *
551 * Query firmware to get group IDs for each function. Firmware returns
552 * group IDs. Based on the group index for the function, group names in
553 * the function are stored. For example, the first group in "eth0" function
554 * is named as "eth0_0" and the second group as "eth0_1" and so on.
555 *
556 * Based on the group ID received from the firmware, function stores name of
557 * the group for that group ID. For example, if "eth0" first group ID
558 * is x, groups[x] name will be stored as "eth0_0".
559 *
560 * Once done for each function, each function would have its group names
561 * and each group would also have their names.
562 *
563 * Return: 0 on success else error code.
564 */
zynqmp_pinctrl_prepare_func_groups(struct device * dev,u32 fid,struct zynqmp_pmux_function * func,struct zynqmp_pctrl_group * groups)565 static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid,
566 struct zynqmp_pmux_function *func,
567 struct zynqmp_pctrl_group *groups)
568 {
569 u16 resp[NUM_GROUPS_PER_RESP] = {0};
570 const char **fgroups;
571 int ret, index, i, pin;
572 unsigned int npins;
573 unsigned long *used_pins __free(bitmap) =
574 bitmap_zalloc(zynqmp_desc.npins, GFP_KERNEL);
575
576 if (!used_pins)
577 return -ENOMEM;
578
579 for (index = 0; index < func->ngroups; index += NUM_GROUPS_PER_RESP) {
580 ret = zynqmp_pinctrl_get_function_groups(fid, index, resp);
581 if (ret)
582 return ret;
583
584 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
585 if (resp[i] == NA_GROUP)
586 goto done;
587
588 if (resp[i] == RESERVED_GROUP)
589 continue;
590
591 groups[resp[i]].name = devm_kasprintf(dev, GFP_KERNEL,
592 "%s_%d_grp",
593 func->name,
594 index + i);
595 if (!groups[resp[i]].name)
596 return -ENOMEM;
597
598 for (pin = 0; pin < groups[resp[i]].npins; pin++)
599 __set_bit(groups[resp[i]].pins[pin], used_pins);
600 }
601 }
602 done:
603 npins = bitmap_weight(used_pins, zynqmp_desc.npins);
604 fgroups = devm_kcalloc(dev, size_add(func->ngroups, npins),
605 sizeof(*fgroups), GFP_KERNEL);
606 if (!fgroups)
607 return -ENOMEM;
608
609 for (i = 0; i < func->ngroups; i++) {
610 fgroups[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%d_grp",
611 func->name, i);
612 if (!fgroups[i])
613 return -ENOMEM;
614 }
615
616 pin = 0;
617 for_each_set_bit(pin, used_pins, zynqmp_desc.npins)
618 fgroups[i++] = zynqmp_desc.pins[pin].name;
619
620 func->groups = fgroups;
621 func->ngroups += npins;
622
623 return 0;
624 }
625
zynqmp_pinctrl_get_function_name(u32 fid,char * name)626 static void zynqmp_pinctrl_get_function_name(u32 fid, char *name)
627 {
628 struct zynqmp_pm_query_data qdata = {0};
629 u32 payload[PAYLOAD_ARG_CNT];
630
631 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_NAME;
632 qdata.arg1 = fid;
633
634 /*
635 * Name of the function is maximum 16 bytes and cannot
636 * accommodate the return value in SMC buffers, hence ignoring
637 * the return value for this specific qid.
638 */
639 zynqmp_pm_query_data(qdata, payload);
640 memcpy(name, payload, PINCTRL_GET_FUNC_NAME_RESP_LEN);
641 }
642
zynqmp_pinctrl_get_num_functions(unsigned int * nfuncs)643 static int zynqmp_pinctrl_get_num_functions(unsigned int *nfuncs)
644 {
645 struct zynqmp_pm_query_data qdata = {0};
646 u32 payload[PAYLOAD_ARG_CNT];
647 int ret;
648
649 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTIONS;
650
651 ret = zynqmp_pm_query_data(qdata, payload);
652 if (ret)
653 return ret;
654
655 *nfuncs = payload[1];
656
657 return 0;
658 }
659
zynqmp_pinctrl_get_pin_groups(u32 pin,u32 index,u16 * groups)660 static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups)
661 {
662 struct zynqmp_pm_query_data qdata = {0};
663 u32 payload[PAYLOAD_ARG_CNT];
664 int ret;
665
666 qdata.qid = PM_QID_PINCTRL_GET_PIN_GROUPS;
667 qdata.arg1 = pin;
668 qdata.arg2 = index;
669
670 ret = zynqmp_pm_query_data(qdata, payload);
671 if (ret)
672 return ret;
673
674 memcpy(groups, &payload[1], PINCTRL_GET_PIN_GROUPS_RESP_LEN);
675
676 return 0;
677 }
678
zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group * group,unsigned int pin)679 static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group,
680 unsigned int pin)
681 {
682 group->pins[group->npins++] = pin;
683 }
684
685 /**
686 * zynqmp_pinctrl_create_pin_groups() - assign pins to respective groups
687 * @dev: Device pointer.
688 * @groups: Groups data.
689 * @pin: Pin number.
690 *
691 * Query firmware to get groups available for the given pin.
692 * Based on the firmware response(group IDs for the pin), add
693 * pin number to the respective group's pin array.
694 *
695 * Once all pins are queries, each group would have its number
696 * of pins and pin numbers data.
697 *
698 * Return: 0 on success else error code.
699 */
zynqmp_pinctrl_create_pin_groups(struct device * dev,struct zynqmp_pctrl_group * groups,unsigned int pin)700 static int zynqmp_pinctrl_create_pin_groups(struct device *dev,
701 struct zynqmp_pctrl_group *groups,
702 unsigned int pin)
703 {
704 u16 resp[NUM_GROUPS_PER_RESP] = {0};
705 int ret, i, index = 0;
706
707 do {
708 ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp);
709 if (ret)
710 return ret;
711
712 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
713 if (resp[i] == NA_GROUP)
714 return ret;
715
716 if (resp[i] == RESERVED_GROUP)
717 continue;
718
719 zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin);
720 }
721 index += NUM_GROUPS_PER_RESP;
722 } while (index <= MAX_PIN_GROUPS);
723
724 return 0;
725 }
726
727 /**
728 * zynqmp_pinctrl_prepare_group_pins() - prepare each group's pin data
729 * @dev: Device pointer.
730 * @groups: Groups data.
731 * @ngroups: Number of groups.
732 *
733 * Prepare pin number and number of pins data for each pins.
734 *
735 * Return: 0 on success else error code.
736 */
zynqmp_pinctrl_prepare_group_pins(struct device * dev,struct zynqmp_pctrl_group * groups,unsigned int ngroups)737 static int zynqmp_pinctrl_prepare_group_pins(struct device *dev,
738 struct zynqmp_pctrl_group *groups,
739 unsigned int ngroups)
740 {
741 unsigned int pin;
742 int ret;
743
744 for (pin = 0; pin < zynqmp_desc.npins; pin++) {
745 ret = zynqmp_pinctrl_create_pin_groups(dev, groups, zynqmp_desc.pins[pin].number);
746 if (ret)
747 return ret;
748 }
749
750 return 0;
751 }
752
753 /**
754 * zynqmp_pinctrl_prepare_function_info() - prepare function info
755 * @dev: Device pointer.
756 * @pctrl: Pin control driver data.
757 *
758 * Query firmware for functions, groups and pin information and
759 * prepare pin control driver data.
760 *
761 * Query number of functions and number of function groups (number
762 * of groups in the given function) to allocate required memory buffers
763 * for functions and groups. Once buffers are allocated to store
764 * functions and groups data, query and store required information
765 * (number of groups and group names for each function, number of
766 * pins and pin numbers for each group).
767 *
768 * Return: 0 on success else error code.
769 */
zynqmp_pinctrl_prepare_function_info(struct device * dev,struct zynqmp_pinctrl * pctrl)770 static int zynqmp_pinctrl_prepare_function_info(struct device *dev,
771 struct zynqmp_pinctrl *pctrl)
772 {
773 struct zynqmp_pmux_function *funcs;
774 struct zynqmp_pctrl_group *groups;
775 int ret, i;
776
777 ret = zynqmp_pinctrl_get_num_functions(&pctrl->nfuncs);
778 if (ret)
779 return ret;
780
781 funcs = devm_kcalloc(dev, pctrl->nfuncs, sizeof(*funcs), GFP_KERNEL);
782 if (!funcs)
783 return -ENOMEM;
784
785 for (i = 0; i < pctrl->nfuncs; i++) {
786 zynqmp_pinctrl_get_function_name(i, funcs[i].name);
787
788 ret = zynqmp_pinctrl_get_func_num_groups(i, &funcs[i].ngroups);
789 if (ret)
790 return ret;
791
792 pctrl->ngroups += funcs[i].ngroups;
793 }
794
795 groups = devm_kcalloc(dev, pctrl->ngroups, sizeof(*groups), GFP_KERNEL);
796 if (!groups)
797 return -ENOMEM;
798
799 ret = zynqmp_pinctrl_prepare_group_pins(dev, groups, pctrl->ngroups);
800 if (ret)
801 return ret;
802
803 for (i = 0; i < pctrl->nfuncs; i++) {
804 ret = zynqmp_pinctrl_prepare_func_groups(dev, i, &funcs[i],
805 groups);
806 if (ret)
807 return ret;
808 }
809
810 pctrl->funcs = funcs;
811 pctrl->groups = groups;
812
813 return 0;
814 }
815
zynqmp_pinctrl_get_num_pins(unsigned int * npins)816 static int zynqmp_pinctrl_get_num_pins(unsigned int *npins)
817 {
818 struct zynqmp_pm_query_data qdata = {0};
819 u32 payload[PAYLOAD_ARG_CNT];
820 int ret;
821
822 qdata.qid = PM_QID_PINCTRL_GET_NUM_PINS;
823
824 ret = zynqmp_pm_query_data(qdata, payload);
825 if (ret)
826 return ret;
827
828 *npins = payload[1];
829
830 return 0;
831 }
832
833 /**
834 * zynqmp_pinctrl_prepare_pin_desc() - prepare pin description info
835 * @dev: Device pointer.
836 * @zynqmp_pins: Pin information.
837 * @npins: Number of pins.
838 *
839 * Query number of pins information from firmware and prepare pin
840 * description containing pin number and pin name.
841 *
842 * Return: 0 on success else error code.
843 */
zynqmp_pinctrl_prepare_pin_desc(struct device * dev,const struct pinctrl_pin_desc ** zynqmp_pins,unsigned int * npins)844 static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev,
845 const struct pinctrl_pin_desc
846 **zynqmp_pins,
847 unsigned int *npins)
848 {
849 struct pinctrl_pin_desc *pins, *pin;
850 int ret;
851 int i;
852
853 ret = zynqmp_pinctrl_get_num_pins(npins);
854 if (ret)
855 return ret;
856
857 pins = devm_kcalloc(dev, *npins, sizeof(*pins), GFP_KERNEL);
858 if (!pins)
859 return -ENOMEM;
860
861 for (i = 0; i < *npins; i++) {
862 pin = &pins[i];
863 pin->number = i;
864 pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d",
865 ZYNQMP_PIN_PREFIX, i);
866 if (!pin->name)
867 return -ENOMEM;
868 }
869
870 *zynqmp_pins = pins;
871
872 return 0;
873 }
874
zynqmp_pinctrl_probe(struct platform_device * pdev)875 static int zynqmp_pinctrl_probe(struct platform_device *pdev)
876 {
877 struct zynqmp_pinctrl *pctrl;
878 int ret;
879
880 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
881 if (!pctrl)
882 return -ENOMEM;
883
884 ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev,
885 &zynqmp_desc.pins,
886 &zynqmp_desc.npins);
887 if (ret) {
888 dev_err(&pdev->dev, "pin desc prepare fail with %d\n", ret);
889 return ret;
890 }
891
892 ret = zynqmp_pinctrl_prepare_function_info(&pdev->dev, pctrl);
893 if (ret) {
894 dev_err(&pdev->dev, "function info prepare fail with %d\n", ret);
895 return ret;
896 }
897
898 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &zynqmp_desc, pctrl);
899 if (IS_ERR(pctrl->pctrl))
900 return PTR_ERR(pctrl->pctrl);
901
902 platform_set_drvdata(pdev, pctrl);
903
904 return ret;
905 }
906
907 static const struct of_device_id zynqmp_pinctrl_of_match[] = {
908 { .compatible = "xlnx,zynqmp-pinctrl" },
909 { }
910 };
911 MODULE_DEVICE_TABLE(of, zynqmp_pinctrl_of_match);
912
913 static struct platform_driver zynqmp_pinctrl_driver = {
914 .driver = {
915 .name = "zynqmp-pinctrl",
916 .of_match_table = zynqmp_pinctrl_of_match,
917 },
918 .probe = zynqmp_pinctrl_probe,
919 };
920 module_platform_driver(zynqmp_pinctrl_driver);
921
922 MODULE_AUTHOR("Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>");
923 MODULE_DESCRIPTION("ZynqMP Pin Controller Driver");
924 MODULE_LICENSE("GPL v2");
925