1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
4 *
5 * Copyright (C) 2016 Linaro Ltd
6 * Copyright (C) 2014 Sony Mobile Communications AB
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
8 */
9
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/firmware.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/of_address.h>
18 #include <linux/of_reserved_mem.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm_domain.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/firmware/qcom/qcom_scm.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/remoteproc.h>
25 #include <linux/soc/qcom/mdt_loader.h>
26 #include <linux/soc/qcom/smem.h>
27 #include <linux/soc/qcom/smem_state.h>
28
29 #include "qcom_common.h"
30 #include "qcom_pil_info.h"
31 #include "qcom_q6v5.h"
32 #include "remoteproc_internal.h"
33
34 #define ADSP_DECRYPT_SHUTDOWN_DELAY_MS 100
35
36 #define MAX_ASSIGN_COUNT 3
37
38 struct adsp_data {
39 int crash_reason_smem;
40 const char *firmware_name;
41 const char *dtb_firmware_name;
42 int pas_id;
43 int dtb_pas_id;
44 int lite_pas_id;
45 unsigned int minidump_id;
46 bool auto_boot;
47 bool decrypt_shutdown;
48
49 char **proxy_pd_names;
50
51 const char *load_state;
52 const char *ssr_name;
53 const char *sysmon_name;
54 int ssctl_id;
55 unsigned int smem_host_id;
56
57 int region_assign_idx;
58 int region_assign_count;
59 bool region_assign_shared;
60 int region_assign_vmid;
61 };
62
63 struct qcom_adsp {
64 struct device *dev;
65 struct rproc *rproc;
66
67 struct qcom_q6v5 q6v5;
68
69 struct clk *xo;
70 struct clk *aggre2_clk;
71
72 struct regulator *cx_supply;
73 struct regulator *px_supply;
74
75 struct device *proxy_pds[3];
76
77 int proxy_pd_count;
78
79 const char *dtb_firmware_name;
80 int pas_id;
81 int dtb_pas_id;
82 int lite_pas_id;
83 unsigned int minidump_id;
84 int crash_reason_smem;
85 unsigned int smem_host_id;
86 bool decrypt_shutdown;
87 const char *info_name;
88
89 const struct firmware *firmware;
90 const struct firmware *dtb_firmware;
91
92 struct completion start_done;
93 struct completion stop_done;
94
95 phys_addr_t mem_phys;
96 phys_addr_t dtb_mem_phys;
97 phys_addr_t mem_reloc;
98 phys_addr_t dtb_mem_reloc;
99 phys_addr_t region_assign_phys[MAX_ASSIGN_COUNT];
100 void *mem_region;
101 void *dtb_mem_region;
102 size_t mem_size;
103 size_t dtb_mem_size;
104 size_t region_assign_size[MAX_ASSIGN_COUNT];
105
106 int region_assign_idx;
107 int region_assign_count;
108 bool region_assign_shared;
109 int region_assign_vmid;
110 u64 region_assign_owners[MAX_ASSIGN_COUNT];
111
112 struct qcom_rproc_glink glink_subdev;
113 struct qcom_rproc_subdev smd_subdev;
114 struct qcom_rproc_pdm pdm_subdev;
115 struct qcom_rproc_ssr ssr_subdev;
116 struct qcom_sysmon *sysmon;
117
118 struct qcom_scm_pas_metadata pas_metadata;
119 struct qcom_scm_pas_metadata dtb_pas_metadata;
120 };
121
adsp_segment_dump(struct rproc * rproc,struct rproc_dump_segment * segment,void * dest,size_t offset,size_t size)122 static void adsp_segment_dump(struct rproc *rproc, struct rproc_dump_segment *segment,
123 void *dest, size_t offset, size_t size)
124 {
125 struct qcom_adsp *adsp = rproc->priv;
126 int total_offset;
127
128 total_offset = segment->da + segment->offset + offset - adsp->mem_phys;
129 if (total_offset < 0 || total_offset + size > adsp->mem_size) {
130 dev_err(adsp->dev,
131 "invalid copy request for segment %pad with offset %zu and size %zu)\n",
132 &segment->da, offset, size);
133 memset(dest, 0xff, size);
134 return;
135 }
136
137 memcpy_fromio(dest, adsp->mem_region + total_offset, size);
138 }
139
adsp_minidump(struct rproc * rproc)140 static void adsp_minidump(struct rproc *rproc)
141 {
142 struct qcom_adsp *adsp = rproc->priv;
143
144 if (rproc->dump_conf == RPROC_COREDUMP_DISABLED)
145 return;
146
147 qcom_minidump(rproc, adsp->minidump_id, adsp_segment_dump);
148 }
149
adsp_pds_enable(struct qcom_adsp * adsp,struct device ** pds,size_t pd_count)150 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
151 size_t pd_count)
152 {
153 int ret;
154 int i;
155
156 for (i = 0; i < pd_count; i++) {
157 dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
158 ret = pm_runtime_get_sync(pds[i]);
159 if (ret < 0) {
160 pm_runtime_put_noidle(pds[i]);
161 dev_pm_genpd_set_performance_state(pds[i], 0);
162 goto unroll_pd_votes;
163 }
164 }
165
166 return 0;
167
168 unroll_pd_votes:
169 for (i--; i >= 0; i--) {
170 dev_pm_genpd_set_performance_state(pds[i], 0);
171 pm_runtime_put(pds[i]);
172 }
173
174 return ret;
175 };
176
adsp_pds_disable(struct qcom_adsp * adsp,struct device ** pds,size_t pd_count)177 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
178 size_t pd_count)
179 {
180 int i;
181
182 for (i = 0; i < pd_count; i++) {
183 dev_pm_genpd_set_performance_state(pds[i], 0);
184 pm_runtime_put(pds[i]);
185 }
186 }
187
adsp_shutdown_poll_decrypt(struct qcom_adsp * adsp)188 static int adsp_shutdown_poll_decrypt(struct qcom_adsp *adsp)
189 {
190 unsigned int retry_num = 50;
191 int ret;
192
193 do {
194 msleep(ADSP_DECRYPT_SHUTDOWN_DELAY_MS);
195 ret = qcom_scm_pas_shutdown(adsp->pas_id);
196 } while (ret == -EINVAL && --retry_num);
197
198 return ret;
199 }
200
adsp_unprepare(struct rproc * rproc)201 static int adsp_unprepare(struct rproc *rproc)
202 {
203 struct qcom_adsp *adsp = rproc->priv;
204
205 /*
206 * adsp_load() did pass pas_metadata to the SCM driver for storing
207 * metadata context. It might have been released already if
208 * auth_and_reset() was successful, but in other cases clean it up
209 * here.
210 */
211 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
212 if (adsp->dtb_pas_id)
213 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
214
215 return 0;
216 }
217
adsp_load(struct rproc * rproc,const struct firmware * fw)218 static int adsp_load(struct rproc *rproc, const struct firmware *fw)
219 {
220 struct qcom_adsp *adsp = rproc->priv;
221 int ret;
222
223 /* Store firmware handle to be used in adsp_start() */
224 adsp->firmware = fw;
225
226 if (adsp->lite_pas_id)
227 ret = qcom_scm_pas_shutdown(adsp->lite_pas_id);
228
229 if (adsp->dtb_pas_id) {
230 ret = request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, adsp->dev);
231 if (ret) {
232 dev_err(adsp->dev, "request_firmware failed for %s: %d\n",
233 adsp->dtb_firmware_name, ret);
234 return ret;
235 }
236
237 ret = qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
238 adsp->dtb_pas_id, adsp->dtb_mem_phys,
239 &adsp->dtb_pas_metadata);
240 if (ret)
241 goto release_dtb_firmware;
242
243 ret = qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
244 adsp->dtb_pas_id, adsp->dtb_mem_region,
245 adsp->dtb_mem_phys, adsp->dtb_mem_size,
246 &adsp->dtb_mem_reloc);
247 if (ret)
248 goto release_dtb_metadata;
249 }
250
251 return 0;
252
253 release_dtb_metadata:
254 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
255
256 release_dtb_firmware:
257 release_firmware(adsp->dtb_firmware);
258
259 return ret;
260 }
261
adsp_start(struct rproc * rproc)262 static int adsp_start(struct rproc *rproc)
263 {
264 struct qcom_adsp *adsp = rproc->priv;
265 int ret;
266
267 ret = qcom_q6v5_prepare(&adsp->q6v5);
268 if (ret)
269 return ret;
270
271 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
272 if (ret < 0)
273 goto disable_irqs;
274
275 ret = clk_prepare_enable(adsp->xo);
276 if (ret)
277 goto disable_proxy_pds;
278
279 ret = clk_prepare_enable(adsp->aggre2_clk);
280 if (ret)
281 goto disable_xo_clk;
282
283 if (adsp->cx_supply) {
284 ret = regulator_enable(adsp->cx_supply);
285 if (ret)
286 goto disable_aggre2_clk;
287 }
288
289 if (adsp->px_supply) {
290 ret = regulator_enable(adsp->px_supply);
291 if (ret)
292 goto disable_cx_supply;
293 }
294
295 if (adsp->dtb_pas_id) {
296 ret = qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id);
297 if (ret) {
298 dev_err(adsp->dev,
299 "failed to authenticate dtb image and release reset\n");
300 goto disable_px_supply;
301 }
302 }
303
304 ret = qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
305 adsp->mem_phys, &adsp->pas_metadata);
306 if (ret)
307 goto disable_px_supply;
308
309 ret = qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
310 adsp->mem_region, adsp->mem_phys, adsp->mem_size,
311 &adsp->mem_reloc);
312 if (ret)
313 goto release_pas_metadata;
314
315 qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
316
317 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
318 if (ret) {
319 dev_err(adsp->dev,
320 "failed to authenticate image and release reset\n");
321 goto release_pas_metadata;
322 }
323
324 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
325 if (ret == -ETIMEDOUT) {
326 dev_err(adsp->dev, "start timed out\n");
327 qcom_scm_pas_shutdown(adsp->pas_id);
328 goto release_pas_metadata;
329 }
330
331 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
332 if (adsp->dtb_pas_id)
333 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
334
335 /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */
336 adsp->firmware = NULL;
337
338 return 0;
339
340 release_pas_metadata:
341 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
342 if (adsp->dtb_pas_id)
343 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
344 disable_px_supply:
345 if (adsp->px_supply)
346 regulator_disable(adsp->px_supply);
347 disable_cx_supply:
348 if (adsp->cx_supply)
349 regulator_disable(adsp->cx_supply);
350 disable_aggre2_clk:
351 clk_disable_unprepare(adsp->aggre2_clk);
352 disable_xo_clk:
353 clk_disable_unprepare(adsp->xo);
354 disable_proxy_pds:
355 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
356 disable_irqs:
357 qcom_q6v5_unprepare(&adsp->q6v5);
358
359 /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */
360 adsp->firmware = NULL;
361
362 return ret;
363 }
364
qcom_pas_handover(struct qcom_q6v5 * q6v5)365 static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
366 {
367 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
368
369 if (adsp->px_supply)
370 regulator_disable(adsp->px_supply);
371 if (adsp->cx_supply)
372 regulator_disable(adsp->cx_supply);
373 clk_disable_unprepare(adsp->aggre2_clk);
374 clk_disable_unprepare(adsp->xo);
375 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
376 }
377
adsp_stop(struct rproc * rproc)378 static int adsp_stop(struct rproc *rproc)
379 {
380 struct qcom_adsp *adsp = rproc->priv;
381 int handover;
382 int ret;
383
384 ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
385 if (ret == -ETIMEDOUT)
386 dev_err(adsp->dev, "timed out on wait\n");
387
388 ret = qcom_scm_pas_shutdown(adsp->pas_id);
389 if (ret && adsp->decrypt_shutdown)
390 ret = adsp_shutdown_poll_decrypt(adsp);
391
392 if (ret)
393 dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
394
395 if (adsp->dtb_pas_id) {
396 ret = qcom_scm_pas_shutdown(adsp->dtb_pas_id);
397 if (ret)
398 dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret);
399 }
400
401 handover = qcom_q6v5_unprepare(&adsp->q6v5);
402 if (handover)
403 qcom_pas_handover(&adsp->q6v5);
404
405 if (adsp->smem_host_id)
406 ret = qcom_smem_bust_hwspin_lock_by_host(adsp->smem_host_id);
407
408 return ret;
409 }
410
adsp_da_to_va(struct rproc * rproc,u64 da,size_t len,bool * is_iomem)411 static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
412 {
413 struct qcom_adsp *adsp = rproc->priv;
414 int offset;
415
416 offset = da - adsp->mem_reloc;
417 if (offset < 0 || offset + len > adsp->mem_size)
418 return NULL;
419
420 if (is_iomem)
421 *is_iomem = true;
422
423 return adsp->mem_region + offset;
424 }
425
adsp_panic(struct rproc * rproc)426 static unsigned long adsp_panic(struct rproc *rproc)
427 {
428 struct qcom_adsp *adsp = rproc->priv;
429
430 return qcom_q6v5_panic(&adsp->q6v5);
431 }
432
433 static const struct rproc_ops adsp_ops = {
434 .unprepare = adsp_unprepare,
435 .start = adsp_start,
436 .stop = adsp_stop,
437 .da_to_va = adsp_da_to_va,
438 .parse_fw = qcom_register_dump_segments,
439 .load = adsp_load,
440 .panic = adsp_panic,
441 };
442
443 static const struct rproc_ops adsp_minidump_ops = {
444 .unprepare = adsp_unprepare,
445 .start = adsp_start,
446 .stop = adsp_stop,
447 .da_to_va = adsp_da_to_va,
448 .parse_fw = qcom_register_dump_segments,
449 .load = adsp_load,
450 .panic = adsp_panic,
451 .coredump = adsp_minidump,
452 };
453
adsp_init_clock(struct qcom_adsp * adsp)454 static int adsp_init_clock(struct qcom_adsp *adsp)
455 {
456 int ret;
457
458 adsp->xo = devm_clk_get(adsp->dev, "xo");
459 if (IS_ERR(adsp->xo)) {
460 ret = PTR_ERR(adsp->xo);
461 if (ret != -EPROBE_DEFER)
462 dev_err(adsp->dev, "failed to get xo clock");
463 return ret;
464 }
465
466 adsp->aggre2_clk = devm_clk_get_optional(adsp->dev, "aggre2");
467 if (IS_ERR(adsp->aggre2_clk)) {
468 ret = PTR_ERR(adsp->aggre2_clk);
469 if (ret != -EPROBE_DEFER)
470 dev_err(adsp->dev,
471 "failed to get aggre2 clock");
472 return ret;
473 }
474
475 return 0;
476 }
477
adsp_init_regulator(struct qcom_adsp * adsp)478 static int adsp_init_regulator(struct qcom_adsp *adsp)
479 {
480 adsp->cx_supply = devm_regulator_get_optional(adsp->dev, "cx");
481 if (IS_ERR(adsp->cx_supply)) {
482 if (PTR_ERR(adsp->cx_supply) == -ENODEV)
483 adsp->cx_supply = NULL;
484 else
485 return PTR_ERR(adsp->cx_supply);
486 }
487
488 if (adsp->cx_supply)
489 regulator_set_load(adsp->cx_supply, 100000);
490
491 adsp->px_supply = devm_regulator_get_optional(adsp->dev, "px");
492 if (IS_ERR(adsp->px_supply)) {
493 if (PTR_ERR(adsp->px_supply) == -ENODEV)
494 adsp->px_supply = NULL;
495 else
496 return PTR_ERR(adsp->px_supply);
497 }
498
499 return 0;
500 }
501
adsp_pds_attach(struct device * dev,struct device ** devs,char ** pd_names)502 static int adsp_pds_attach(struct device *dev, struct device **devs,
503 char **pd_names)
504 {
505 size_t num_pds = 0;
506 int ret;
507 int i;
508
509 if (!pd_names)
510 return 0;
511
512 while (pd_names[num_pds])
513 num_pds++;
514
515 /* Handle single power domain */
516 if (num_pds == 1 && dev->pm_domain) {
517 devs[0] = dev;
518 pm_runtime_enable(dev);
519 return 1;
520 }
521
522 for (i = 0; i < num_pds; i++) {
523 devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
524 if (IS_ERR_OR_NULL(devs[i])) {
525 ret = PTR_ERR(devs[i]) ? : -ENODATA;
526 goto unroll_attach;
527 }
528 }
529
530 return num_pds;
531
532 unroll_attach:
533 for (i--; i >= 0; i--)
534 dev_pm_domain_detach(devs[i], false);
535
536 return ret;
537 };
538
adsp_pds_detach(struct qcom_adsp * adsp,struct device ** pds,size_t pd_count)539 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
540 size_t pd_count)
541 {
542 struct device *dev = adsp->dev;
543 int i;
544
545 /* Handle single power domain */
546 if (pd_count == 1 && dev->pm_domain) {
547 pm_runtime_disable(dev);
548 return;
549 }
550
551 for (i = 0; i < pd_count; i++)
552 dev_pm_domain_detach(pds[i], false);
553 }
554
adsp_alloc_memory_region(struct qcom_adsp * adsp)555 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
556 {
557 struct reserved_mem *rmem;
558 struct device_node *node;
559
560 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
561 if (!node) {
562 dev_err(adsp->dev, "no memory-region specified\n");
563 return -EINVAL;
564 }
565
566 rmem = of_reserved_mem_lookup(node);
567 of_node_put(node);
568 if (!rmem) {
569 dev_err(adsp->dev, "unable to resolve memory-region\n");
570 return -EINVAL;
571 }
572
573 adsp->mem_phys = adsp->mem_reloc = rmem->base;
574 adsp->mem_size = rmem->size;
575 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
576 if (!adsp->mem_region) {
577 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
578 &rmem->base, adsp->mem_size);
579 return -EBUSY;
580 }
581
582 if (!adsp->dtb_pas_id)
583 return 0;
584
585 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 1);
586 if (!node) {
587 dev_err(adsp->dev, "no dtb memory-region specified\n");
588 return -EINVAL;
589 }
590
591 rmem = of_reserved_mem_lookup(node);
592 of_node_put(node);
593 if (!rmem) {
594 dev_err(adsp->dev, "unable to resolve dtb memory-region\n");
595 return -EINVAL;
596 }
597
598 adsp->dtb_mem_phys = adsp->dtb_mem_reloc = rmem->base;
599 adsp->dtb_mem_size = rmem->size;
600 adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size);
601 if (!adsp->dtb_mem_region) {
602 dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n",
603 &rmem->base, adsp->dtb_mem_size);
604 return -EBUSY;
605 }
606
607 return 0;
608 }
609
adsp_assign_memory_region(struct qcom_adsp * adsp)610 static int adsp_assign_memory_region(struct qcom_adsp *adsp)
611 {
612 struct qcom_scm_vmperm perm[MAX_ASSIGN_COUNT];
613 struct device_node *node;
614 unsigned int perm_size;
615 int offset;
616 int ret;
617
618 if (!adsp->region_assign_idx)
619 return 0;
620
621 for (offset = 0; offset < adsp->region_assign_count; ++offset) {
622 struct reserved_mem *rmem = NULL;
623
624 node = of_parse_phandle(adsp->dev->of_node, "memory-region",
625 adsp->region_assign_idx + offset);
626 if (node)
627 rmem = of_reserved_mem_lookup(node);
628 of_node_put(node);
629 if (!rmem) {
630 dev_err(adsp->dev, "unable to resolve shareable memory-region index %d\n",
631 offset);
632 return -EINVAL;
633 }
634
635 if (adsp->region_assign_shared) {
636 perm[0].vmid = QCOM_SCM_VMID_HLOS;
637 perm[0].perm = QCOM_SCM_PERM_RW;
638 perm[1].vmid = adsp->region_assign_vmid;
639 perm[1].perm = QCOM_SCM_PERM_RW;
640 perm_size = 2;
641 } else {
642 perm[0].vmid = adsp->region_assign_vmid;
643 perm[0].perm = QCOM_SCM_PERM_RW;
644 perm_size = 1;
645 }
646
647 adsp->region_assign_phys[offset] = rmem->base;
648 adsp->region_assign_size[offset] = rmem->size;
649 adsp->region_assign_owners[offset] = BIT(QCOM_SCM_VMID_HLOS);
650
651 ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset],
652 adsp->region_assign_size[offset],
653 &adsp->region_assign_owners[offset],
654 perm, perm_size);
655 if (ret < 0) {
656 dev_err(adsp->dev, "assign memory %d failed\n", offset);
657 return ret;
658 }
659 }
660
661 return 0;
662 }
663
adsp_unassign_memory_region(struct qcom_adsp * adsp)664 static void adsp_unassign_memory_region(struct qcom_adsp *adsp)
665 {
666 struct qcom_scm_vmperm perm;
667 int offset;
668 int ret;
669
670 if (!adsp->region_assign_idx || adsp->region_assign_shared)
671 return;
672
673 for (offset = 0; offset < adsp->region_assign_count; ++offset) {
674 perm.vmid = QCOM_SCM_VMID_HLOS;
675 perm.perm = QCOM_SCM_PERM_RW;
676
677 ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset],
678 adsp->region_assign_size[offset],
679 &adsp->region_assign_owners[offset],
680 &perm, 1);
681 if (ret < 0)
682 dev_err(adsp->dev, "unassign memory %d failed\n", offset);
683 }
684 }
685
adsp_probe(struct platform_device * pdev)686 static int adsp_probe(struct platform_device *pdev)
687 {
688 const struct adsp_data *desc;
689 struct qcom_adsp *adsp;
690 struct rproc *rproc;
691 const char *fw_name, *dtb_fw_name = NULL;
692 const struct rproc_ops *ops = &adsp_ops;
693 int ret;
694
695 desc = of_device_get_match_data(&pdev->dev);
696 if (!desc)
697 return -EINVAL;
698
699 if (!qcom_scm_is_available())
700 return -EPROBE_DEFER;
701
702 fw_name = desc->firmware_name;
703 ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
704 &fw_name);
705 if (ret < 0 && ret != -EINVAL)
706 return ret;
707
708 if (desc->dtb_firmware_name) {
709 dtb_fw_name = desc->dtb_firmware_name;
710 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", 1,
711 &dtb_fw_name);
712 if (ret < 0 && ret != -EINVAL)
713 return ret;
714 }
715
716 if (desc->minidump_id)
717 ops = &adsp_minidump_ops;
718
719 rproc = devm_rproc_alloc(&pdev->dev, pdev->name, ops, fw_name, sizeof(*adsp));
720
721 if (!rproc) {
722 dev_err(&pdev->dev, "unable to allocate remoteproc\n");
723 return -ENOMEM;
724 }
725
726 rproc->auto_boot = desc->auto_boot;
727 rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
728
729 adsp = rproc->priv;
730 adsp->dev = &pdev->dev;
731 adsp->rproc = rproc;
732 adsp->minidump_id = desc->minidump_id;
733 adsp->pas_id = desc->pas_id;
734 adsp->lite_pas_id = desc->lite_pas_id;
735 adsp->info_name = desc->sysmon_name;
736 adsp->smem_host_id = desc->smem_host_id;
737 adsp->decrypt_shutdown = desc->decrypt_shutdown;
738 adsp->region_assign_idx = desc->region_assign_idx;
739 adsp->region_assign_count = min_t(int, MAX_ASSIGN_COUNT, desc->region_assign_count);
740 adsp->region_assign_vmid = desc->region_assign_vmid;
741 adsp->region_assign_shared = desc->region_assign_shared;
742 if (dtb_fw_name) {
743 adsp->dtb_firmware_name = dtb_fw_name;
744 adsp->dtb_pas_id = desc->dtb_pas_id;
745 }
746 platform_set_drvdata(pdev, adsp);
747
748 ret = device_init_wakeup(adsp->dev, true);
749 if (ret)
750 goto free_rproc;
751
752 ret = adsp_alloc_memory_region(adsp);
753 if (ret)
754 goto free_rproc;
755
756 ret = adsp_assign_memory_region(adsp);
757 if (ret)
758 goto free_rproc;
759
760 ret = adsp_init_clock(adsp);
761 if (ret)
762 goto unassign_mem;
763
764 ret = adsp_init_regulator(adsp);
765 if (ret)
766 goto unassign_mem;
767
768 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
769 desc->proxy_pd_names);
770 if (ret < 0)
771 goto unassign_mem;
772 adsp->proxy_pd_count = ret;
773
774 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state,
775 qcom_pas_handover);
776 if (ret)
777 goto detach_proxy_pds;
778
779 qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
780 qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
781 qcom_add_pdm_subdev(rproc, &adsp->pdm_subdev);
782 adsp->sysmon = qcom_add_sysmon_subdev(rproc,
783 desc->sysmon_name,
784 desc->ssctl_id);
785 if (IS_ERR(adsp->sysmon)) {
786 ret = PTR_ERR(adsp->sysmon);
787 goto deinit_remove_pdm_smd_glink;
788 }
789
790 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
791 ret = rproc_add(rproc);
792 if (ret)
793 goto remove_ssr_sysmon;
794
795 return 0;
796
797 remove_ssr_sysmon:
798 qcom_remove_ssr_subdev(rproc, &adsp->ssr_subdev);
799 qcom_remove_sysmon_subdev(adsp->sysmon);
800 deinit_remove_pdm_smd_glink:
801 qcom_remove_pdm_subdev(rproc, &adsp->pdm_subdev);
802 qcom_remove_smd_subdev(rproc, &adsp->smd_subdev);
803 qcom_remove_glink_subdev(rproc, &adsp->glink_subdev);
804 qcom_q6v5_deinit(&adsp->q6v5);
805 detach_proxy_pds:
806 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
807 unassign_mem:
808 adsp_unassign_memory_region(adsp);
809 free_rproc:
810 device_init_wakeup(adsp->dev, false);
811
812 return ret;
813 }
814
adsp_remove(struct platform_device * pdev)815 static void adsp_remove(struct platform_device *pdev)
816 {
817 struct qcom_adsp *adsp = platform_get_drvdata(pdev);
818
819 rproc_del(adsp->rproc);
820
821 qcom_q6v5_deinit(&adsp->q6v5);
822 adsp_unassign_memory_region(adsp);
823 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
824 qcom_remove_sysmon_subdev(adsp->sysmon);
825 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
826 qcom_remove_pdm_subdev(adsp->rproc, &adsp->pdm_subdev);
827 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
828 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
829 device_init_wakeup(adsp->dev, false);
830 }
831
832 static const struct adsp_data adsp_resource_init = {
833 .crash_reason_smem = 423,
834 .firmware_name = "adsp.mdt",
835 .pas_id = 1,
836 .auto_boot = true,
837 .ssr_name = "lpass",
838 .sysmon_name = "adsp",
839 .ssctl_id = 0x14,
840 };
841
842 static const struct adsp_data sa8775p_adsp_resource = {
843 .crash_reason_smem = 423,
844 .firmware_name = "adsp.mbn",
845 .pas_id = 1,
846 .minidump_id = 5,
847 .auto_boot = true,
848 .proxy_pd_names = (char*[]){
849 "lcx",
850 "lmx",
851 NULL
852 },
853 .load_state = "adsp",
854 .ssr_name = "lpass",
855 .sysmon_name = "adsp",
856 .ssctl_id = 0x14,
857 };
858
859 static const struct adsp_data sdm845_adsp_resource_init = {
860 .crash_reason_smem = 423,
861 .firmware_name = "adsp.mdt",
862 .pas_id = 1,
863 .auto_boot = true,
864 .load_state = "adsp",
865 .ssr_name = "lpass",
866 .sysmon_name = "adsp",
867 .ssctl_id = 0x14,
868 };
869
870 static const struct adsp_data sm6350_adsp_resource = {
871 .crash_reason_smem = 423,
872 .firmware_name = "adsp.mdt",
873 .pas_id = 1,
874 .auto_boot = true,
875 .proxy_pd_names = (char*[]){
876 "lcx",
877 "lmx",
878 NULL
879 },
880 .load_state = "adsp",
881 .ssr_name = "lpass",
882 .sysmon_name = "adsp",
883 .ssctl_id = 0x14,
884 };
885
886 static const struct adsp_data sm6375_mpss_resource = {
887 .crash_reason_smem = 421,
888 .firmware_name = "modem.mdt",
889 .pas_id = 4,
890 .minidump_id = 3,
891 .auto_boot = false,
892 .proxy_pd_names = (char*[]){
893 "cx",
894 NULL
895 },
896 .ssr_name = "mpss",
897 .sysmon_name = "modem",
898 .ssctl_id = 0x12,
899 };
900
901 static const struct adsp_data sm8150_adsp_resource = {
902 .crash_reason_smem = 423,
903 .firmware_name = "adsp.mdt",
904 .pas_id = 1,
905 .auto_boot = true,
906 .proxy_pd_names = (char*[]){
907 "cx",
908 NULL
909 },
910 .load_state = "adsp",
911 .ssr_name = "lpass",
912 .sysmon_name = "adsp",
913 .ssctl_id = 0x14,
914 };
915
916 static const struct adsp_data sm8250_adsp_resource = {
917 .crash_reason_smem = 423,
918 .firmware_name = "adsp.mdt",
919 .pas_id = 1,
920 .minidump_id = 5,
921 .auto_boot = true,
922 .proxy_pd_names = (char*[]){
923 "lcx",
924 "lmx",
925 NULL
926 },
927 .load_state = "adsp",
928 .ssr_name = "lpass",
929 .sysmon_name = "adsp",
930 .ssctl_id = 0x14,
931 };
932
933 static const struct adsp_data sm8350_adsp_resource = {
934 .crash_reason_smem = 423,
935 .firmware_name = "adsp.mdt",
936 .pas_id = 1,
937 .auto_boot = true,
938 .proxy_pd_names = (char*[]){
939 "lcx",
940 "lmx",
941 NULL
942 },
943 .load_state = "adsp",
944 .ssr_name = "lpass",
945 .sysmon_name = "adsp",
946 .ssctl_id = 0x14,
947 };
948
949 static const struct adsp_data msm8996_adsp_resource = {
950 .crash_reason_smem = 423,
951 .firmware_name = "adsp.mdt",
952 .pas_id = 1,
953 .auto_boot = true,
954 .proxy_pd_names = (char*[]){
955 "cx",
956 NULL
957 },
958 .ssr_name = "lpass",
959 .sysmon_name = "adsp",
960 .ssctl_id = 0x14,
961 };
962
963 static const struct adsp_data cdsp_resource_init = {
964 .crash_reason_smem = 601,
965 .firmware_name = "cdsp.mdt",
966 .pas_id = 18,
967 .auto_boot = true,
968 .ssr_name = "cdsp",
969 .sysmon_name = "cdsp",
970 .ssctl_id = 0x17,
971 };
972
973 static const struct adsp_data sa8775p_cdsp0_resource = {
974 .crash_reason_smem = 601,
975 .firmware_name = "cdsp0.mbn",
976 .pas_id = 18,
977 .minidump_id = 7,
978 .auto_boot = true,
979 .proxy_pd_names = (char*[]){
980 "cx",
981 "mxc",
982 "nsp",
983 NULL
984 },
985 .load_state = "cdsp",
986 .ssr_name = "cdsp",
987 .sysmon_name = "cdsp",
988 .ssctl_id = 0x17,
989 };
990
991 static const struct adsp_data sa8775p_cdsp1_resource = {
992 .crash_reason_smem = 633,
993 .firmware_name = "cdsp1.mbn",
994 .pas_id = 30,
995 .minidump_id = 20,
996 .auto_boot = true,
997 .proxy_pd_names = (char*[]){
998 "cx",
999 "mxc",
1000 "nsp",
1001 NULL
1002 },
1003 .load_state = "nsp",
1004 .ssr_name = "cdsp1",
1005 .sysmon_name = "cdsp1",
1006 .ssctl_id = 0x20,
1007 };
1008
1009 static const struct adsp_data sdm845_cdsp_resource_init = {
1010 .crash_reason_smem = 601,
1011 .firmware_name = "cdsp.mdt",
1012 .pas_id = 18,
1013 .auto_boot = true,
1014 .load_state = "cdsp",
1015 .ssr_name = "cdsp",
1016 .sysmon_name = "cdsp",
1017 .ssctl_id = 0x17,
1018 };
1019
1020 static const struct adsp_data sm6350_cdsp_resource = {
1021 .crash_reason_smem = 601,
1022 .firmware_name = "cdsp.mdt",
1023 .pas_id = 18,
1024 .auto_boot = true,
1025 .proxy_pd_names = (char*[]){
1026 "cx",
1027 "mx",
1028 NULL
1029 },
1030 .load_state = "cdsp",
1031 .ssr_name = "cdsp",
1032 .sysmon_name = "cdsp",
1033 .ssctl_id = 0x17,
1034 };
1035
1036 static const struct adsp_data sm8150_cdsp_resource = {
1037 .crash_reason_smem = 601,
1038 .firmware_name = "cdsp.mdt",
1039 .pas_id = 18,
1040 .auto_boot = true,
1041 .proxy_pd_names = (char*[]){
1042 "cx",
1043 NULL
1044 },
1045 .load_state = "cdsp",
1046 .ssr_name = "cdsp",
1047 .sysmon_name = "cdsp",
1048 .ssctl_id = 0x17,
1049 };
1050
1051 static const struct adsp_data sm8250_cdsp_resource = {
1052 .crash_reason_smem = 601,
1053 .firmware_name = "cdsp.mdt",
1054 .pas_id = 18,
1055 .auto_boot = true,
1056 .proxy_pd_names = (char*[]){
1057 "cx",
1058 NULL
1059 },
1060 .load_state = "cdsp",
1061 .ssr_name = "cdsp",
1062 .sysmon_name = "cdsp",
1063 .ssctl_id = 0x17,
1064 };
1065
1066 static const struct adsp_data sc8280xp_nsp0_resource = {
1067 .crash_reason_smem = 601,
1068 .firmware_name = "cdsp.mdt",
1069 .pas_id = 18,
1070 .auto_boot = true,
1071 .proxy_pd_names = (char*[]){
1072 "nsp",
1073 NULL
1074 },
1075 .ssr_name = "cdsp0",
1076 .sysmon_name = "cdsp",
1077 .ssctl_id = 0x17,
1078 };
1079
1080 static const struct adsp_data sc8280xp_nsp1_resource = {
1081 .crash_reason_smem = 633,
1082 .firmware_name = "cdsp.mdt",
1083 .pas_id = 30,
1084 .auto_boot = true,
1085 .proxy_pd_names = (char*[]){
1086 "nsp",
1087 NULL
1088 },
1089 .ssr_name = "cdsp1",
1090 .sysmon_name = "cdsp1",
1091 .ssctl_id = 0x20,
1092 };
1093
1094 static const struct adsp_data x1e80100_adsp_resource = {
1095 .crash_reason_smem = 423,
1096 .firmware_name = "adsp.mdt",
1097 .dtb_firmware_name = "adsp_dtb.mdt",
1098 .pas_id = 1,
1099 .dtb_pas_id = 0x24,
1100 .lite_pas_id = 0x1f,
1101 .minidump_id = 5,
1102 .auto_boot = true,
1103 .proxy_pd_names = (char*[]){
1104 "lcx",
1105 "lmx",
1106 NULL
1107 },
1108 .load_state = "adsp",
1109 .ssr_name = "lpass",
1110 .sysmon_name = "adsp",
1111 .ssctl_id = 0x14,
1112 };
1113
1114 static const struct adsp_data x1e80100_cdsp_resource = {
1115 .crash_reason_smem = 601,
1116 .firmware_name = "cdsp.mdt",
1117 .dtb_firmware_name = "cdsp_dtb.mdt",
1118 .pas_id = 18,
1119 .dtb_pas_id = 0x25,
1120 .minidump_id = 7,
1121 .auto_boot = true,
1122 .proxy_pd_names = (char*[]){
1123 "cx",
1124 "mxc",
1125 "nsp",
1126 NULL
1127 },
1128 .load_state = "cdsp",
1129 .ssr_name = "cdsp",
1130 .sysmon_name = "cdsp",
1131 .ssctl_id = 0x17,
1132 };
1133
1134 static const struct adsp_data sm8350_cdsp_resource = {
1135 .crash_reason_smem = 601,
1136 .firmware_name = "cdsp.mdt",
1137 .pas_id = 18,
1138 .minidump_id = 7,
1139 .auto_boot = true,
1140 .proxy_pd_names = (char*[]){
1141 "cx",
1142 "mxc",
1143 NULL
1144 },
1145 .load_state = "cdsp",
1146 .ssr_name = "cdsp",
1147 .sysmon_name = "cdsp",
1148 .ssctl_id = 0x17,
1149 };
1150
1151 static const struct adsp_data sa8775p_gpdsp0_resource = {
1152 .crash_reason_smem = 640,
1153 .firmware_name = "gpdsp0.mbn",
1154 .pas_id = 39,
1155 .minidump_id = 21,
1156 .auto_boot = true,
1157 .proxy_pd_names = (char*[]){
1158 "cx",
1159 "mxc",
1160 NULL
1161 },
1162 .load_state = "gpdsp0",
1163 .ssr_name = "gpdsp0",
1164 .sysmon_name = "gpdsp0",
1165 .ssctl_id = 0x21,
1166 };
1167
1168 static const struct adsp_data sa8775p_gpdsp1_resource = {
1169 .crash_reason_smem = 641,
1170 .firmware_name = "gpdsp1.mbn",
1171 .pas_id = 40,
1172 .minidump_id = 22,
1173 .auto_boot = true,
1174 .proxy_pd_names = (char*[]){
1175 "cx",
1176 "mxc",
1177 NULL
1178 },
1179 .load_state = "gpdsp1",
1180 .ssr_name = "gpdsp1",
1181 .sysmon_name = "gpdsp1",
1182 .ssctl_id = 0x22,
1183 };
1184
1185 static const struct adsp_data mpss_resource_init = {
1186 .crash_reason_smem = 421,
1187 .firmware_name = "modem.mdt",
1188 .pas_id = 4,
1189 .minidump_id = 3,
1190 .auto_boot = false,
1191 .proxy_pd_names = (char*[]){
1192 "cx",
1193 "mss",
1194 NULL
1195 },
1196 .load_state = "modem",
1197 .ssr_name = "mpss",
1198 .sysmon_name = "modem",
1199 .ssctl_id = 0x12,
1200 };
1201
1202 static const struct adsp_data sc8180x_mpss_resource = {
1203 .crash_reason_smem = 421,
1204 .firmware_name = "modem.mdt",
1205 .pas_id = 4,
1206 .auto_boot = false,
1207 .proxy_pd_names = (char*[]){
1208 "cx",
1209 NULL
1210 },
1211 .load_state = "modem",
1212 .ssr_name = "mpss",
1213 .sysmon_name = "modem",
1214 .ssctl_id = 0x12,
1215 };
1216
1217 static const struct adsp_data msm8996_slpi_resource_init = {
1218 .crash_reason_smem = 424,
1219 .firmware_name = "slpi.mdt",
1220 .pas_id = 12,
1221 .auto_boot = true,
1222 .proxy_pd_names = (char*[]){
1223 "ssc_cx",
1224 NULL
1225 },
1226 .ssr_name = "dsps",
1227 .sysmon_name = "slpi",
1228 .ssctl_id = 0x16,
1229 };
1230
1231 static const struct adsp_data sdm845_slpi_resource_init = {
1232 .crash_reason_smem = 424,
1233 .firmware_name = "slpi.mdt",
1234 .pas_id = 12,
1235 .auto_boot = true,
1236 .proxy_pd_names = (char*[]){
1237 "lcx",
1238 "lmx",
1239 NULL
1240 },
1241 .load_state = "slpi",
1242 .ssr_name = "dsps",
1243 .sysmon_name = "slpi",
1244 .ssctl_id = 0x16,
1245 };
1246
1247 static const struct adsp_data wcss_resource_init = {
1248 .crash_reason_smem = 421,
1249 .firmware_name = "wcnss.mdt",
1250 .pas_id = 6,
1251 .auto_boot = true,
1252 .ssr_name = "mpss",
1253 .sysmon_name = "wcnss",
1254 .ssctl_id = 0x12,
1255 };
1256
1257 static const struct adsp_data sdx55_mpss_resource = {
1258 .crash_reason_smem = 421,
1259 .firmware_name = "modem.mdt",
1260 .pas_id = 4,
1261 .auto_boot = true,
1262 .proxy_pd_names = (char*[]){
1263 "cx",
1264 "mss",
1265 NULL
1266 },
1267 .ssr_name = "mpss",
1268 .sysmon_name = "modem",
1269 .ssctl_id = 0x22,
1270 };
1271
1272 static const struct adsp_data sm8450_mpss_resource = {
1273 .crash_reason_smem = 421,
1274 .firmware_name = "modem.mdt",
1275 .pas_id = 4,
1276 .minidump_id = 3,
1277 .auto_boot = false,
1278 .decrypt_shutdown = true,
1279 .proxy_pd_names = (char*[]){
1280 "cx",
1281 "mss",
1282 NULL
1283 },
1284 .load_state = "modem",
1285 .ssr_name = "mpss",
1286 .sysmon_name = "modem",
1287 .ssctl_id = 0x12,
1288 };
1289
1290 static const struct adsp_data sm8550_adsp_resource = {
1291 .crash_reason_smem = 423,
1292 .firmware_name = "adsp.mdt",
1293 .dtb_firmware_name = "adsp_dtb.mdt",
1294 .pas_id = 1,
1295 .dtb_pas_id = 0x24,
1296 .minidump_id = 5,
1297 .auto_boot = true,
1298 .proxy_pd_names = (char*[]){
1299 "lcx",
1300 "lmx",
1301 NULL
1302 },
1303 .load_state = "adsp",
1304 .ssr_name = "lpass",
1305 .sysmon_name = "adsp",
1306 .ssctl_id = 0x14,
1307 .smem_host_id = 2,
1308 };
1309
1310 static const struct adsp_data sm8550_cdsp_resource = {
1311 .crash_reason_smem = 601,
1312 .firmware_name = "cdsp.mdt",
1313 .dtb_firmware_name = "cdsp_dtb.mdt",
1314 .pas_id = 18,
1315 .dtb_pas_id = 0x25,
1316 .minidump_id = 7,
1317 .auto_boot = true,
1318 .proxy_pd_names = (char*[]){
1319 "cx",
1320 "mxc",
1321 "nsp",
1322 NULL
1323 },
1324 .load_state = "cdsp",
1325 .ssr_name = "cdsp",
1326 .sysmon_name = "cdsp",
1327 .ssctl_id = 0x17,
1328 .smem_host_id = 5,
1329 };
1330
1331 static const struct adsp_data sm8550_mpss_resource = {
1332 .crash_reason_smem = 421,
1333 .firmware_name = "modem.mdt",
1334 .dtb_firmware_name = "modem_dtb.mdt",
1335 .pas_id = 4,
1336 .dtb_pas_id = 0x26,
1337 .minidump_id = 3,
1338 .auto_boot = false,
1339 .decrypt_shutdown = true,
1340 .proxy_pd_names = (char*[]){
1341 "cx",
1342 "mss",
1343 NULL
1344 },
1345 .load_state = "modem",
1346 .ssr_name = "mpss",
1347 .sysmon_name = "modem",
1348 .ssctl_id = 0x12,
1349 .smem_host_id = 1,
1350 .region_assign_idx = 2,
1351 .region_assign_count = 1,
1352 .region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
1353 };
1354
1355 static const struct adsp_data sc7280_wpss_resource = {
1356 .crash_reason_smem = 626,
1357 .firmware_name = "wpss.mdt",
1358 .pas_id = 6,
1359 .minidump_id = 4,
1360 .auto_boot = false,
1361 .proxy_pd_names = (char*[]){
1362 "cx",
1363 "mx",
1364 NULL
1365 },
1366 .load_state = "wpss",
1367 .ssr_name = "wpss",
1368 .sysmon_name = "wpss",
1369 .ssctl_id = 0x19,
1370 };
1371
1372 static const struct adsp_data sm8650_cdsp_resource = {
1373 .crash_reason_smem = 601,
1374 .firmware_name = "cdsp.mdt",
1375 .dtb_firmware_name = "cdsp_dtb.mdt",
1376 .pas_id = 18,
1377 .dtb_pas_id = 0x25,
1378 .minidump_id = 7,
1379 .auto_boot = true,
1380 .proxy_pd_names = (char*[]){
1381 "cx",
1382 "mxc",
1383 "nsp",
1384 NULL
1385 },
1386 .load_state = "cdsp",
1387 .ssr_name = "cdsp",
1388 .sysmon_name = "cdsp",
1389 .ssctl_id = 0x17,
1390 .smem_host_id = 5,
1391 .region_assign_idx = 2,
1392 .region_assign_count = 1,
1393 .region_assign_shared = true,
1394 .region_assign_vmid = QCOM_SCM_VMID_CDSP,
1395 };
1396
1397 static const struct adsp_data sm8650_mpss_resource = {
1398 .crash_reason_smem = 421,
1399 .firmware_name = "modem.mdt",
1400 .dtb_firmware_name = "modem_dtb.mdt",
1401 .pas_id = 4,
1402 .dtb_pas_id = 0x26,
1403 .minidump_id = 3,
1404 .auto_boot = false,
1405 .decrypt_shutdown = true,
1406 .proxy_pd_names = (char*[]){
1407 "cx",
1408 "mss",
1409 NULL
1410 },
1411 .load_state = "modem",
1412 .ssr_name = "mpss",
1413 .sysmon_name = "modem",
1414 .ssctl_id = 0x12,
1415 .smem_host_id = 1,
1416 .region_assign_idx = 2,
1417 .region_assign_count = 3,
1418 .region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
1419 };
1420
1421 static const struct of_device_id adsp_of_match[] = {
1422 { .compatible = "qcom,msm8226-adsp-pil", .data = &msm8996_adsp_resource},
1423 { .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource},
1424 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
1425 { .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource},
1426 { .compatible = "qcom,msm8996-slpi-pil", .data = &msm8996_slpi_resource_init},
1427 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource},
1428 { .compatible = "qcom,msm8998-slpi-pas", .data = &msm8996_slpi_resource_init},
1429 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
1430 { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init },
1431 { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
1432 { .compatible = "qcom,sa8775p-adsp-pas", .data = &sa8775p_adsp_resource},
1433 { .compatible = "qcom,sa8775p-cdsp0-pas", .data = &sa8775p_cdsp0_resource},
1434 { .compatible = "qcom,sa8775p-cdsp1-pas", .data = &sa8775p_cdsp1_resource},
1435 { .compatible = "qcom,sa8775p-gpdsp0-pas", .data = &sa8775p_gpdsp0_resource},
1436 { .compatible = "qcom,sa8775p-gpdsp1-pas", .data = &sa8775p_gpdsp1_resource},
1437 { .compatible = "qcom,sar2130p-adsp-pas", .data = &sm8350_adsp_resource},
1438 { .compatible = "qcom,sc7180-adsp-pas", .data = &sm8250_adsp_resource},
1439 { .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init},
1440 { .compatible = "qcom,sc7280-adsp-pas", .data = &sm8350_adsp_resource},
1441 { .compatible = "qcom,sc7280-cdsp-pas", .data = &sm6350_cdsp_resource},
1442 { .compatible = "qcom,sc7280-mpss-pas", .data = &mpss_resource_init},
1443 { .compatible = "qcom,sc7280-wpss-pas", .data = &sc7280_wpss_resource},
1444 { .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource},
1445 { .compatible = "qcom,sc8180x-cdsp-pas", .data = &sm8150_cdsp_resource},
1446 { .compatible = "qcom,sc8180x-mpss-pas", .data = &sc8180x_mpss_resource},
1447 { .compatible = "qcom,sc8280xp-adsp-pas", .data = &sm8250_adsp_resource},
1448 { .compatible = "qcom,sc8280xp-nsp0-pas", .data = &sc8280xp_nsp0_resource},
1449 { .compatible = "qcom,sc8280xp-nsp1-pas", .data = &sc8280xp_nsp1_resource},
1450 { .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init},
1451 { .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init},
1452 { .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init},
1453 { .compatible = "qcom,sdm845-slpi-pas", .data = &sdm845_slpi_resource_init},
1454 { .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource},
1455 { .compatible = "qcom,sdx75-mpss-pas", .data = &sm8650_mpss_resource},
1456 { .compatible = "qcom,sm6115-adsp-pas", .data = &adsp_resource_init},
1457 { .compatible = "qcom,sm6115-cdsp-pas", .data = &cdsp_resource_init},
1458 { .compatible = "qcom,sm6115-mpss-pas", .data = &sc8180x_mpss_resource},
1459 { .compatible = "qcom,sm6350-adsp-pas", .data = &sm6350_adsp_resource},
1460 { .compatible = "qcom,sm6350-cdsp-pas", .data = &sm6350_cdsp_resource},
1461 { .compatible = "qcom,sm6350-mpss-pas", .data = &mpss_resource_init},
1462 { .compatible = "qcom,sm6375-adsp-pas", .data = &sm6350_adsp_resource},
1463 { .compatible = "qcom,sm6375-cdsp-pas", .data = &sm8150_cdsp_resource},
1464 { .compatible = "qcom,sm6375-mpss-pas", .data = &sm6375_mpss_resource},
1465 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
1466 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
1467 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
1468 { .compatible = "qcom,sm8150-slpi-pas", .data = &sdm845_slpi_resource_init},
1469 { .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
1470 { .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource},
1471 { .compatible = "qcom,sm8250-slpi-pas", .data = &sdm845_slpi_resource_init},
1472 { .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource},
1473 { .compatible = "qcom,sm8350-cdsp-pas", .data = &sm8350_cdsp_resource},
1474 { .compatible = "qcom,sm8350-slpi-pas", .data = &sdm845_slpi_resource_init},
1475 { .compatible = "qcom,sm8350-mpss-pas", .data = &mpss_resource_init},
1476 { .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource},
1477 { .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource},
1478 { .compatible = "qcom,sm8450-slpi-pas", .data = &sdm845_slpi_resource_init},
1479 { .compatible = "qcom,sm8450-mpss-pas", .data = &sm8450_mpss_resource},
1480 { .compatible = "qcom,sm8550-adsp-pas", .data = &sm8550_adsp_resource},
1481 { .compatible = "qcom,sm8550-cdsp-pas", .data = &sm8550_cdsp_resource},
1482 { .compatible = "qcom,sm8550-mpss-pas", .data = &sm8550_mpss_resource},
1483 { .compatible = "qcom,sm8650-adsp-pas", .data = &sm8550_adsp_resource},
1484 { .compatible = "qcom,sm8650-cdsp-pas", .data = &sm8650_cdsp_resource},
1485 { .compatible = "qcom,sm8650-mpss-pas", .data = &sm8650_mpss_resource},
1486 { .compatible = "qcom,x1e80100-adsp-pas", .data = &x1e80100_adsp_resource},
1487 { .compatible = "qcom,x1e80100-cdsp-pas", .data = &x1e80100_cdsp_resource},
1488 { },
1489 };
1490 MODULE_DEVICE_TABLE(of, adsp_of_match);
1491
1492 static struct platform_driver adsp_driver = {
1493 .probe = adsp_probe,
1494 .remove_new = adsp_remove,
1495 .driver = {
1496 .name = "qcom_q6v5_pas",
1497 .of_match_table = adsp_of_match,
1498 },
1499 };
1500
1501 module_platform_driver(adsp_driver);
1502 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver");
1503 MODULE_LICENSE("GPL v2");
1504