1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
4 * Author: Alex Williamson <alex.williamson@redhat.com>
5 *
6 * Derived from original vfio:
7 * Copyright 2010 Cisco Systems, Inc. All rights reserved.
8 * Author: Tom Lyon, pugs@cisco.com
9 */
10
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13 #include <linux/aperture.h>
14 #include <linux/device.h>
15 #include <linux/eventfd.h>
16 #include <linux/file.h>
17 #include <linux/interrupt.h>
18 #include <linux/iommu.h>
19 #include <linux/module.h>
20 #include <linux/mutex.h>
21 #include <linux/notifier.h>
22 #include <linux/pci.h>
23 #include <linux/pfn_t.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/slab.h>
26 #include <linux/types.h>
27 #include <linux/uaccess.h>
28 #include <linux/vgaarb.h>
29 #include <linux/nospec.h>
30 #include <linux/sched/mm.h>
31 #include <linux/iommufd.h>
32 #if IS_ENABLED(CONFIG_EEH)
33 #include <asm/eeh.h>
34 #endif
35
36 #include "vfio_pci_priv.h"
37
38 #define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
39 #define DRIVER_DESC "core driver for VFIO based PCI devices"
40
41 static bool nointxmask;
42 static bool disable_vga;
43 static bool disable_idle_d3;
44
45 /* List of PF's that vfio_pci_core_sriov_configure() has been called on */
46 static DEFINE_MUTEX(vfio_pci_sriov_pfs_mutex);
47 static LIST_HEAD(vfio_pci_sriov_pfs);
48
49 struct vfio_pci_dummy_resource {
50 struct resource resource;
51 int index;
52 struct list_head res_next;
53 };
54
55 struct vfio_pci_vf_token {
56 struct mutex lock;
57 uuid_t uuid;
58 int users;
59 };
60
vfio_vga_disabled(void)61 static inline bool vfio_vga_disabled(void)
62 {
63 #ifdef CONFIG_VFIO_PCI_VGA
64 return disable_vga;
65 #else
66 return true;
67 #endif
68 }
69
70 /*
71 * Our VGA arbiter participation is limited since we don't know anything
72 * about the device itself. However, if the device is the only VGA device
73 * downstream of a bridge and VFIO VGA support is disabled, then we can
74 * safely return legacy VGA IO and memory as not decoded since the user
75 * has no way to get to it and routing can be disabled externally at the
76 * bridge.
77 */
vfio_pci_set_decode(struct pci_dev * pdev,bool single_vga)78 static unsigned int vfio_pci_set_decode(struct pci_dev *pdev, bool single_vga)
79 {
80 struct pci_dev *tmp = NULL;
81 unsigned char max_busnr;
82 unsigned int decodes;
83
84 if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
85 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
86 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
87
88 max_busnr = pci_bus_max_busnr(pdev->bus);
89 decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
90
91 while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
92 if (tmp == pdev ||
93 pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
94 pci_is_root_bus(tmp->bus))
95 continue;
96
97 if (tmp->bus->number >= pdev->bus->number &&
98 tmp->bus->number <= max_busnr) {
99 pci_dev_put(tmp);
100 decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
101 break;
102 }
103 }
104
105 return decodes;
106 }
107
vfio_pci_probe_mmaps(struct vfio_pci_core_device * vdev)108 static void vfio_pci_probe_mmaps(struct vfio_pci_core_device *vdev)
109 {
110 struct resource *res;
111 int i;
112 struct vfio_pci_dummy_resource *dummy_res;
113
114 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
115 int bar = i + PCI_STD_RESOURCES;
116
117 res = &vdev->pdev->resource[bar];
118
119 if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP))
120 goto no_mmap;
121
122 if (!(res->flags & IORESOURCE_MEM))
123 goto no_mmap;
124
125 /*
126 * The PCI core shouldn't set up a resource with a
127 * type but zero size. But there may be bugs that
128 * cause us to do that.
129 */
130 if (!resource_size(res))
131 goto no_mmap;
132
133 if (resource_size(res) >= PAGE_SIZE) {
134 vdev->bar_mmap_supported[bar] = true;
135 continue;
136 }
137
138 if (!(res->start & ~PAGE_MASK)) {
139 /*
140 * Add a dummy resource to reserve the remainder
141 * of the exclusive page in case that hot-add
142 * device's bar is assigned into it.
143 */
144 dummy_res =
145 kzalloc(sizeof(*dummy_res), GFP_KERNEL_ACCOUNT);
146 if (dummy_res == NULL)
147 goto no_mmap;
148
149 dummy_res->resource.name = "vfio sub-page reserved";
150 dummy_res->resource.start = res->end + 1;
151 dummy_res->resource.end = res->start + PAGE_SIZE - 1;
152 dummy_res->resource.flags = res->flags;
153 if (request_resource(res->parent,
154 &dummy_res->resource)) {
155 kfree(dummy_res);
156 goto no_mmap;
157 }
158 dummy_res->index = bar;
159 list_add(&dummy_res->res_next,
160 &vdev->dummy_resources_list);
161 vdev->bar_mmap_supported[bar] = true;
162 continue;
163 }
164 /*
165 * Here we don't handle the case when the BAR is not page
166 * aligned because we can't expect the BAR will be
167 * assigned into the same location in a page in guest
168 * when we passthrough the BAR. And it's hard to access
169 * this BAR in userspace because we have no way to get
170 * the BAR's location in a page.
171 */
172 no_mmap:
173 vdev->bar_mmap_supported[bar] = false;
174 }
175 }
176
177 struct vfio_pci_group_info;
178 static void vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set);
179 static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set,
180 struct vfio_pci_group_info *groups,
181 struct iommufd_ctx *iommufd_ctx);
182
183 /*
184 * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
185 * _and_ the ability detect when the device is asserting INTx via PCI_STATUS.
186 * If a device implements the former but not the latter we would typically
187 * expect broken_intx_masking be set and require an exclusive interrupt.
188 * However since we do have control of the device's ability to assert INTx,
189 * we can instead pretend that the device does not implement INTx, virtualizing
190 * the pin register to report zero and maintaining DisINTx set on the host.
191 */
vfio_pci_nointx(struct pci_dev * pdev)192 static bool vfio_pci_nointx(struct pci_dev *pdev)
193 {
194 switch (pdev->vendor) {
195 case PCI_VENDOR_ID_INTEL:
196 switch (pdev->device) {
197 /* All i40e (XL710/X710/XXV710) 10/20/25/40GbE NICs */
198 case 0x1572:
199 case 0x1574:
200 case 0x1580 ... 0x1581:
201 case 0x1583 ... 0x158b:
202 case 0x37d0 ... 0x37d2:
203 /* X550 */
204 case 0x1563:
205 return true;
206 default:
207 return false;
208 }
209 }
210
211 return false;
212 }
213
vfio_pci_probe_power_state(struct vfio_pci_core_device * vdev)214 static void vfio_pci_probe_power_state(struct vfio_pci_core_device *vdev)
215 {
216 struct pci_dev *pdev = vdev->pdev;
217 u16 pmcsr;
218
219 if (!pdev->pm_cap)
220 return;
221
222 pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmcsr);
223
224 vdev->needs_pm_restore = !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET);
225 }
226
227 /*
228 * pci_set_power_state() wrapper handling devices which perform a soft reset on
229 * D3->D0 transition. Save state prior to D0/1/2->D3, stash it on the vdev,
230 * restore when returned to D0. Saved separately from pci_saved_state for use
231 * by PM capability emulation and separately from pci_dev internal saved state
232 * to avoid it being overwritten and consumed around other resets.
233 */
vfio_pci_set_power_state(struct vfio_pci_core_device * vdev,pci_power_t state)234 int vfio_pci_set_power_state(struct vfio_pci_core_device *vdev, pci_power_t state)
235 {
236 struct pci_dev *pdev = vdev->pdev;
237 bool needs_restore = false, needs_save = false;
238 int ret;
239
240 /* Prevent changing power state for PFs with VFs enabled */
241 if (pci_num_vf(pdev) && state > PCI_D0)
242 return -EBUSY;
243
244 if (vdev->needs_pm_restore) {
245 if (pdev->current_state < PCI_D3hot && state >= PCI_D3hot) {
246 pci_save_state(pdev);
247 needs_save = true;
248 }
249
250 if (pdev->current_state >= PCI_D3hot && state <= PCI_D0)
251 needs_restore = true;
252 }
253
254 ret = pci_set_power_state(pdev, state);
255
256 if (!ret) {
257 /* D3 might be unsupported via quirk, skip unless in D3 */
258 if (needs_save && pdev->current_state >= PCI_D3hot) {
259 /*
260 * The current PCI state will be saved locally in
261 * 'pm_save' during the D3hot transition. When the
262 * device state is changed to D0 again with the current
263 * function, then pci_store_saved_state() will restore
264 * the state and will free the memory pointed by
265 * 'pm_save'. There are few cases where the PCI power
266 * state can be changed to D0 without the involvement
267 * of the driver. For these cases, free the earlier
268 * allocated memory first before overwriting 'pm_save'
269 * to prevent the memory leak.
270 */
271 kfree(vdev->pm_save);
272 vdev->pm_save = pci_store_saved_state(pdev);
273 } else if (needs_restore) {
274 pci_load_and_free_saved_state(pdev, &vdev->pm_save);
275 pci_restore_state(pdev);
276 }
277 }
278
279 return ret;
280 }
281
vfio_pci_runtime_pm_entry(struct vfio_pci_core_device * vdev,struct eventfd_ctx * efdctx)282 static int vfio_pci_runtime_pm_entry(struct vfio_pci_core_device *vdev,
283 struct eventfd_ctx *efdctx)
284 {
285 /*
286 * The vdev power related flags are protected with 'memory_lock'
287 * semaphore.
288 */
289 vfio_pci_zap_and_down_write_memory_lock(vdev);
290 if (vdev->pm_runtime_engaged) {
291 up_write(&vdev->memory_lock);
292 return -EINVAL;
293 }
294
295 vdev->pm_runtime_engaged = true;
296 vdev->pm_wake_eventfd_ctx = efdctx;
297 pm_runtime_put_noidle(&vdev->pdev->dev);
298 up_write(&vdev->memory_lock);
299
300 return 0;
301 }
302
vfio_pci_core_pm_entry(struct vfio_device * device,u32 flags,void __user * arg,size_t argsz)303 static int vfio_pci_core_pm_entry(struct vfio_device *device, u32 flags,
304 void __user *arg, size_t argsz)
305 {
306 struct vfio_pci_core_device *vdev =
307 container_of(device, struct vfio_pci_core_device, vdev);
308 int ret;
309
310 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET, 0);
311 if (ret != 1)
312 return ret;
313
314 /*
315 * Inside vfio_pci_runtime_pm_entry(), only the runtime PM usage count
316 * will be decremented. The pm_runtime_put() will be invoked again
317 * while returning from the ioctl and then the device can go into
318 * runtime suspended state.
319 */
320 return vfio_pci_runtime_pm_entry(vdev, NULL);
321 }
322
vfio_pci_core_pm_entry_with_wakeup(struct vfio_device * device,u32 flags,struct vfio_device_low_power_entry_with_wakeup __user * arg,size_t argsz)323 static int vfio_pci_core_pm_entry_with_wakeup(
324 struct vfio_device *device, u32 flags,
325 struct vfio_device_low_power_entry_with_wakeup __user *arg,
326 size_t argsz)
327 {
328 struct vfio_pci_core_device *vdev =
329 container_of(device, struct vfio_pci_core_device, vdev);
330 struct vfio_device_low_power_entry_with_wakeup entry;
331 struct eventfd_ctx *efdctx;
332 int ret;
333
334 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET,
335 sizeof(entry));
336 if (ret != 1)
337 return ret;
338
339 if (copy_from_user(&entry, arg, sizeof(entry)))
340 return -EFAULT;
341
342 if (entry.wakeup_eventfd < 0)
343 return -EINVAL;
344
345 efdctx = eventfd_ctx_fdget(entry.wakeup_eventfd);
346 if (IS_ERR(efdctx))
347 return PTR_ERR(efdctx);
348
349 ret = vfio_pci_runtime_pm_entry(vdev, efdctx);
350 if (ret)
351 eventfd_ctx_put(efdctx);
352
353 return ret;
354 }
355
__vfio_pci_runtime_pm_exit(struct vfio_pci_core_device * vdev)356 static void __vfio_pci_runtime_pm_exit(struct vfio_pci_core_device *vdev)
357 {
358 if (vdev->pm_runtime_engaged) {
359 vdev->pm_runtime_engaged = false;
360 pm_runtime_get_noresume(&vdev->pdev->dev);
361
362 if (vdev->pm_wake_eventfd_ctx) {
363 eventfd_ctx_put(vdev->pm_wake_eventfd_ctx);
364 vdev->pm_wake_eventfd_ctx = NULL;
365 }
366 }
367 }
368
vfio_pci_runtime_pm_exit(struct vfio_pci_core_device * vdev)369 static void vfio_pci_runtime_pm_exit(struct vfio_pci_core_device *vdev)
370 {
371 /*
372 * The vdev power related flags are protected with 'memory_lock'
373 * semaphore.
374 */
375 down_write(&vdev->memory_lock);
376 __vfio_pci_runtime_pm_exit(vdev);
377 up_write(&vdev->memory_lock);
378 }
379
vfio_pci_core_pm_exit(struct vfio_device * device,u32 flags,void __user * arg,size_t argsz)380 static int vfio_pci_core_pm_exit(struct vfio_device *device, u32 flags,
381 void __user *arg, size_t argsz)
382 {
383 struct vfio_pci_core_device *vdev =
384 container_of(device, struct vfio_pci_core_device, vdev);
385 int ret;
386
387 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET, 0);
388 if (ret != 1)
389 return ret;
390
391 /*
392 * The device is always in the active state here due to pm wrappers
393 * around ioctls. If the device had entered a low power state and
394 * pm_wake_eventfd_ctx is valid, vfio_pci_core_runtime_resume() has
395 * already signaled the eventfd and exited low power mode itself.
396 * pm_runtime_engaged protects the redundant call here.
397 */
398 vfio_pci_runtime_pm_exit(vdev);
399 return 0;
400 }
401
402 #ifdef CONFIG_PM
vfio_pci_core_runtime_suspend(struct device * dev)403 static int vfio_pci_core_runtime_suspend(struct device *dev)
404 {
405 struct vfio_pci_core_device *vdev = dev_get_drvdata(dev);
406
407 down_write(&vdev->memory_lock);
408 /*
409 * The user can move the device into D3hot state before invoking
410 * power management IOCTL. Move the device into D0 state here and then
411 * the pci-driver core runtime PM suspend function will move the device
412 * into the low power state. Also, for the devices which have
413 * NoSoftRst-, it will help in restoring the original state
414 * (saved locally in 'vdev->pm_save').
415 */
416 vfio_pci_set_power_state(vdev, PCI_D0);
417 up_write(&vdev->memory_lock);
418
419 /*
420 * If INTx is enabled, then mask INTx before going into the runtime
421 * suspended state and unmask the same in the runtime resume.
422 * If INTx has already been masked by the user, then
423 * vfio_pci_intx_mask() will return false and in that case, INTx
424 * should not be unmasked in the runtime resume.
425 */
426 vdev->pm_intx_masked = ((vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX) &&
427 vfio_pci_intx_mask(vdev));
428
429 return 0;
430 }
431
vfio_pci_core_runtime_resume(struct device * dev)432 static int vfio_pci_core_runtime_resume(struct device *dev)
433 {
434 struct vfio_pci_core_device *vdev = dev_get_drvdata(dev);
435
436 /*
437 * Resume with a pm_wake_eventfd_ctx signals the eventfd and exit
438 * low power mode.
439 */
440 down_write(&vdev->memory_lock);
441 if (vdev->pm_wake_eventfd_ctx) {
442 eventfd_signal(vdev->pm_wake_eventfd_ctx);
443 __vfio_pci_runtime_pm_exit(vdev);
444 }
445 up_write(&vdev->memory_lock);
446
447 if (vdev->pm_intx_masked)
448 vfio_pci_intx_unmask(vdev);
449
450 return 0;
451 }
452 #endif /* CONFIG_PM */
453
454 /*
455 * The pci-driver core runtime PM routines always save the device state
456 * before going into suspended state. If the device is going into low power
457 * state with only with runtime PM ops, then no explicit handling is needed
458 * for the devices which have NoSoftRst-.
459 */
460 static const struct dev_pm_ops vfio_pci_core_pm_ops = {
461 SET_RUNTIME_PM_OPS(vfio_pci_core_runtime_suspend,
462 vfio_pci_core_runtime_resume,
463 NULL)
464 };
465
vfio_pci_core_enable(struct vfio_pci_core_device * vdev)466 int vfio_pci_core_enable(struct vfio_pci_core_device *vdev)
467 {
468 struct pci_dev *pdev = vdev->pdev;
469 int ret;
470 u16 cmd;
471 u8 msix_pos;
472
473 if (!disable_idle_d3) {
474 ret = pm_runtime_resume_and_get(&pdev->dev);
475 if (ret < 0)
476 return ret;
477 }
478
479 /* Don't allow our initial saved state to include busmaster */
480 pci_clear_master(pdev);
481
482 ret = pci_enable_device(pdev);
483 if (ret)
484 goto out_power;
485
486 /* If reset fails because of the device lock, fail this path entirely */
487 ret = pci_try_reset_function(pdev);
488 if (ret == -EAGAIN)
489 goto out_disable_device;
490
491 vdev->reset_works = !ret;
492 pci_save_state(pdev);
493 vdev->pci_saved_state = pci_store_saved_state(pdev);
494 if (!vdev->pci_saved_state)
495 pci_dbg(pdev, "%s: Couldn't store saved state\n", __func__);
496
497 if (likely(!nointxmask)) {
498 if (vfio_pci_nointx(pdev)) {
499 pci_info(pdev, "Masking broken INTx support\n");
500 vdev->nointx = true;
501 pci_intx(pdev, 0);
502 } else
503 vdev->pci_2_3 = pci_intx_mask_supported(pdev);
504 }
505
506 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
507 if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
508 cmd &= ~PCI_COMMAND_INTX_DISABLE;
509 pci_write_config_word(pdev, PCI_COMMAND, cmd);
510 }
511
512 ret = vfio_pci_zdev_open_device(vdev);
513 if (ret)
514 goto out_free_state;
515
516 ret = vfio_config_init(vdev);
517 if (ret)
518 goto out_free_zdev;
519
520 msix_pos = pdev->msix_cap;
521 if (msix_pos) {
522 u16 flags;
523 u32 table;
524
525 pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
526 pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
527
528 vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
529 vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
530 vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
531 vdev->has_dyn_msix = pci_msix_can_alloc_dyn(pdev);
532 } else {
533 vdev->msix_bar = 0xFF;
534 vdev->has_dyn_msix = false;
535 }
536
537 if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
538 vdev->has_vga = true;
539
540
541 return 0;
542
543 out_free_zdev:
544 vfio_pci_zdev_close_device(vdev);
545 out_free_state:
546 kfree(vdev->pci_saved_state);
547 vdev->pci_saved_state = NULL;
548 out_disable_device:
549 pci_disable_device(pdev);
550 out_power:
551 if (!disable_idle_d3)
552 pm_runtime_put(&pdev->dev);
553 return ret;
554 }
555 EXPORT_SYMBOL_GPL(vfio_pci_core_enable);
556
vfio_pci_core_disable(struct vfio_pci_core_device * vdev)557 void vfio_pci_core_disable(struct vfio_pci_core_device *vdev)
558 {
559 struct pci_dev *pdev = vdev->pdev;
560 struct vfio_pci_dummy_resource *dummy_res, *tmp;
561 struct vfio_pci_ioeventfd *ioeventfd, *ioeventfd_tmp;
562 int i, bar;
563
564 /* For needs_reset */
565 lockdep_assert_held(&vdev->vdev.dev_set->lock);
566
567 /*
568 * This function can be invoked while the power state is non-D0.
569 * This non-D0 power state can be with or without runtime PM.
570 * vfio_pci_runtime_pm_exit() will internally increment the usage
571 * count corresponding to pm_runtime_put() called during low power
572 * feature entry and then pm_runtime_resume() will wake up the device,
573 * if the device has already gone into the suspended state. Otherwise,
574 * the vfio_pci_set_power_state() will change the device power state
575 * to D0.
576 */
577 vfio_pci_runtime_pm_exit(vdev);
578 pm_runtime_resume(&pdev->dev);
579
580 /*
581 * This function calls __pci_reset_function_locked() which internally
582 * can use pci_pm_reset() for the function reset. pci_pm_reset() will
583 * fail if the power state is non-D0. Also, for the devices which
584 * have NoSoftRst-, the reset function can cause the PCI config space
585 * reset without restoring the original state (saved locally in
586 * 'vdev->pm_save').
587 */
588 vfio_pci_set_power_state(vdev, PCI_D0);
589
590 /* Stop the device from further DMA */
591 pci_clear_master(pdev);
592
593 vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
594 VFIO_IRQ_SET_ACTION_TRIGGER,
595 vdev->irq_type, 0, 0, NULL);
596
597 /* Device closed, don't need mutex here */
598 list_for_each_entry_safe(ioeventfd, ioeventfd_tmp,
599 &vdev->ioeventfds_list, next) {
600 vfio_virqfd_disable(&ioeventfd->virqfd);
601 list_del(&ioeventfd->next);
602 kfree(ioeventfd);
603 }
604 vdev->ioeventfds_nr = 0;
605
606 vdev->virq_disabled = false;
607
608 for (i = 0; i < vdev->num_regions; i++)
609 vdev->region[i].ops->release(vdev, &vdev->region[i]);
610
611 vdev->num_regions = 0;
612 kfree(vdev->region);
613 vdev->region = NULL; /* don't krealloc a freed pointer */
614
615 vfio_config_free(vdev);
616
617 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
618 bar = i + PCI_STD_RESOURCES;
619 if (!vdev->barmap[bar])
620 continue;
621 pci_iounmap(pdev, vdev->barmap[bar]);
622 pci_release_selected_regions(pdev, 1 << bar);
623 vdev->barmap[bar] = NULL;
624 }
625
626 list_for_each_entry_safe(dummy_res, tmp,
627 &vdev->dummy_resources_list, res_next) {
628 list_del(&dummy_res->res_next);
629 release_resource(&dummy_res->resource);
630 kfree(dummy_res);
631 }
632
633 vdev->needs_reset = true;
634
635 vfio_pci_zdev_close_device(vdev);
636
637 /*
638 * If we have saved state, restore it. If we can reset the device,
639 * even better. Resetting with current state seems better than
640 * nothing, but saving and restoring current state without reset
641 * is just busy work.
642 */
643 if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
644 pci_info(pdev, "%s: Couldn't reload saved state\n", __func__);
645
646 if (!vdev->reset_works)
647 goto out;
648
649 pci_save_state(pdev);
650 }
651
652 /*
653 * Disable INTx and MSI, presumably to avoid spurious interrupts
654 * during reset. Stolen from pci_reset_function()
655 */
656 pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
657
658 /*
659 * Try to get the locks ourselves to prevent a deadlock. The
660 * success of this is dependent on being able to lock the device,
661 * which is not always possible.
662 * We can not use the "try" reset interface here, which will
663 * overwrite the previously restored configuration information.
664 */
665 if (vdev->reset_works && pci_dev_trylock(pdev)) {
666 if (!__pci_reset_function_locked(pdev))
667 vdev->needs_reset = false;
668 pci_dev_unlock(pdev);
669 }
670
671 pci_restore_state(pdev);
672 out:
673 pci_disable_device(pdev);
674
675 vfio_pci_dev_set_try_reset(vdev->vdev.dev_set);
676
677 /* Put the pm-runtime usage counter acquired during enable */
678 if (!disable_idle_d3)
679 pm_runtime_put(&pdev->dev);
680 }
681 EXPORT_SYMBOL_GPL(vfio_pci_core_disable);
682
vfio_pci_core_close_device(struct vfio_device * core_vdev)683 void vfio_pci_core_close_device(struct vfio_device *core_vdev)
684 {
685 struct vfio_pci_core_device *vdev =
686 container_of(core_vdev, struct vfio_pci_core_device, vdev);
687
688 if (vdev->sriov_pf_core_dev) {
689 mutex_lock(&vdev->sriov_pf_core_dev->vf_token->lock);
690 WARN_ON(!vdev->sriov_pf_core_dev->vf_token->users);
691 vdev->sriov_pf_core_dev->vf_token->users--;
692 mutex_unlock(&vdev->sriov_pf_core_dev->vf_token->lock);
693 }
694 #if IS_ENABLED(CONFIG_EEH)
695 eeh_dev_release(vdev->pdev);
696 #endif
697 vfio_pci_core_disable(vdev);
698
699 mutex_lock(&vdev->igate);
700 if (vdev->err_trigger) {
701 eventfd_ctx_put(vdev->err_trigger);
702 vdev->err_trigger = NULL;
703 }
704 if (vdev->req_trigger) {
705 eventfd_ctx_put(vdev->req_trigger);
706 vdev->req_trigger = NULL;
707 }
708 mutex_unlock(&vdev->igate);
709 }
710 EXPORT_SYMBOL_GPL(vfio_pci_core_close_device);
711
vfio_pci_core_finish_enable(struct vfio_pci_core_device * vdev)712 void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev)
713 {
714 vfio_pci_probe_mmaps(vdev);
715 #if IS_ENABLED(CONFIG_EEH)
716 eeh_dev_open(vdev->pdev);
717 #endif
718
719 if (vdev->sriov_pf_core_dev) {
720 mutex_lock(&vdev->sriov_pf_core_dev->vf_token->lock);
721 vdev->sriov_pf_core_dev->vf_token->users++;
722 mutex_unlock(&vdev->sriov_pf_core_dev->vf_token->lock);
723 }
724 }
725 EXPORT_SYMBOL_GPL(vfio_pci_core_finish_enable);
726
vfio_pci_get_irq_count(struct vfio_pci_core_device * vdev,int irq_type)727 static int vfio_pci_get_irq_count(struct vfio_pci_core_device *vdev, int irq_type)
728 {
729 if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
730 return vdev->vconfig[PCI_INTERRUPT_PIN] ? 1 : 0;
731 } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
732 u8 pos;
733 u16 flags;
734
735 pos = vdev->pdev->msi_cap;
736 if (pos) {
737 pci_read_config_word(vdev->pdev,
738 pos + PCI_MSI_FLAGS, &flags);
739 return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
740 }
741 } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
742 u8 pos;
743 u16 flags;
744
745 pos = vdev->pdev->msix_cap;
746 if (pos) {
747 pci_read_config_word(vdev->pdev,
748 pos + PCI_MSIX_FLAGS, &flags);
749
750 return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
751 }
752 } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
753 if (pci_is_pcie(vdev->pdev))
754 return 1;
755 } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
756 return 1;
757 }
758
759 return 0;
760 }
761
vfio_pci_count_devs(struct pci_dev * pdev,void * data)762 static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
763 {
764 (*(int *)data)++;
765 return 0;
766 }
767
768 struct vfio_pci_fill_info {
769 struct vfio_device *vdev;
770 struct vfio_pci_dependent_device *devices;
771 int nr_devices;
772 u32 count;
773 u32 flags;
774 };
775
vfio_pci_fill_devs(struct pci_dev * pdev,void * data)776 static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
777 {
778 struct vfio_pci_dependent_device *info;
779 struct vfio_pci_fill_info *fill = data;
780
781 /* The topology changed since we counted devices */
782 if (fill->count >= fill->nr_devices)
783 return -EAGAIN;
784
785 info = &fill->devices[fill->count++];
786 info->segment = pci_domain_nr(pdev->bus);
787 info->bus = pdev->bus->number;
788 info->devfn = pdev->devfn;
789
790 if (fill->flags & VFIO_PCI_HOT_RESET_FLAG_DEV_ID) {
791 struct iommufd_ctx *iommufd = vfio_iommufd_device_ictx(fill->vdev);
792 struct vfio_device_set *dev_set = fill->vdev->dev_set;
793 struct vfio_device *vdev;
794
795 /*
796 * hot-reset requires all affected devices be represented in
797 * the dev_set.
798 */
799 vdev = vfio_find_device_in_devset(dev_set, &pdev->dev);
800 if (!vdev) {
801 info->devid = VFIO_PCI_DEVID_NOT_OWNED;
802 } else {
803 int id = vfio_iommufd_get_dev_id(vdev, iommufd);
804
805 if (id > 0)
806 info->devid = id;
807 else if (id == -ENOENT)
808 info->devid = VFIO_PCI_DEVID_OWNED;
809 else
810 info->devid = VFIO_PCI_DEVID_NOT_OWNED;
811 }
812 /* If devid is VFIO_PCI_DEVID_NOT_OWNED, clear owned flag. */
813 if (info->devid == VFIO_PCI_DEVID_NOT_OWNED)
814 fill->flags &= ~VFIO_PCI_HOT_RESET_FLAG_DEV_ID_OWNED;
815 } else {
816 struct iommu_group *iommu_group;
817
818 iommu_group = iommu_group_get(&pdev->dev);
819 if (!iommu_group)
820 return -EPERM; /* Cannot reset non-isolated devices */
821
822 info->group_id = iommu_group_id(iommu_group);
823 iommu_group_put(iommu_group);
824 }
825
826 return 0;
827 }
828
829 struct vfio_pci_group_info {
830 int count;
831 struct file **files;
832 };
833
vfio_pci_dev_below_slot(struct pci_dev * pdev,struct pci_slot * slot)834 static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
835 {
836 for (; pdev; pdev = pdev->bus->self)
837 if (pdev->bus == slot->bus)
838 return (pdev->slot == slot);
839 return false;
840 }
841
842 struct vfio_pci_walk_info {
843 int (*fn)(struct pci_dev *pdev, void *data);
844 void *data;
845 struct pci_dev *pdev;
846 bool slot;
847 int ret;
848 };
849
vfio_pci_walk_wrapper(struct pci_dev * pdev,void * data)850 static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
851 {
852 struct vfio_pci_walk_info *walk = data;
853
854 if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
855 walk->ret = walk->fn(pdev, walk->data);
856
857 return walk->ret;
858 }
859
vfio_pci_for_each_slot_or_bus(struct pci_dev * pdev,int (* fn)(struct pci_dev *,void * data),void * data,bool slot)860 static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
861 int (*fn)(struct pci_dev *,
862 void *data), void *data,
863 bool slot)
864 {
865 struct vfio_pci_walk_info walk = {
866 .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
867 };
868
869 pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
870
871 return walk.ret;
872 }
873
msix_mmappable_cap(struct vfio_pci_core_device * vdev,struct vfio_info_cap * caps)874 static int msix_mmappable_cap(struct vfio_pci_core_device *vdev,
875 struct vfio_info_cap *caps)
876 {
877 struct vfio_info_cap_header header = {
878 .id = VFIO_REGION_INFO_CAP_MSIX_MAPPABLE,
879 .version = 1
880 };
881
882 return vfio_info_add_capability(caps, &header, sizeof(header));
883 }
884
vfio_pci_core_register_dev_region(struct vfio_pci_core_device * vdev,unsigned int type,unsigned int subtype,const struct vfio_pci_regops * ops,size_t size,u32 flags,void * data)885 int vfio_pci_core_register_dev_region(struct vfio_pci_core_device *vdev,
886 unsigned int type, unsigned int subtype,
887 const struct vfio_pci_regops *ops,
888 size_t size, u32 flags, void *data)
889 {
890 struct vfio_pci_region *region;
891
892 region = krealloc(vdev->region,
893 (vdev->num_regions + 1) * sizeof(*region),
894 GFP_KERNEL_ACCOUNT);
895 if (!region)
896 return -ENOMEM;
897
898 vdev->region = region;
899 vdev->region[vdev->num_regions].type = type;
900 vdev->region[vdev->num_regions].subtype = subtype;
901 vdev->region[vdev->num_regions].ops = ops;
902 vdev->region[vdev->num_regions].size = size;
903 vdev->region[vdev->num_regions].flags = flags;
904 vdev->region[vdev->num_regions].data = data;
905
906 vdev->num_regions++;
907
908 return 0;
909 }
910 EXPORT_SYMBOL_GPL(vfio_pci_core_register_dev_region);
911
vfio_pci_info_atomic_cap(struct vfio_pci_core_device * vdev,struct vfio_info_cap * caps)912 static int vfio_pci_info_atomic_cap(struct vfio_pci_core_device *vdev,
913 struct vfio_info_cap *caps)
914 {
915 struct vfio_device_info_cap_pci_atomic_comp cap = {
916 .header.id = VFIO_DEVICE_INFO_CAP_PCI_ATOMIC_COMP,
917 .header.version = 1
918 };
919 struct pci_dev *pdev = pci_physfn(vdev->pdev);
920 u32 devcap2;
921
922 pcie_capability_read_dword(pdev, PCI_EXP_DEVCAP2, &devcap2);
923
924 if ((devcap2 & PCI_EXP_DEVCAP2_ATOMIC_COMP32) &&
925 !pci_enable_atomic_ops_to_root(pdev, PCI_EXP_DEVCAP2_ATOMIC_COMP32))
926 cap.flags |= VFIO_PCI_ATOMIC_COMP32;
927
928 if ((devcap2 & PCI_EXP_DEVCAP2_ATOMIC_COMP64) &&
929 !pci_enable_atomic_ops_to_root(pdev, PCI_EXP_DEVCAP2_ATOMIC_COMP64))
930 cap.flags |= VFIO_PCI_ATOMIC_COMP64;
931
932 if ((devcap2 & PCI_EXP_DEVCAP2_ATOMIC_COMP128) &&
933 !pci_enable_atomic_ops_to_root(pdev,
934 PCI_EXP_DEVCAP2_ATOMIC_COMP128))
935 cap.flags |= VFIO_PCI_ATOMIC_COMP128;
936
937 if (!cap.flags)
938 return -ENODEV;
939
940 return vfio_info_add_capability(caps, &cap.header, sizeof(cap));
941 }
942
vfio_pci_ioctl_get_info(struct vfio_pci_core_device * vdev,struct vfio_device_info __user * arg)943 static int vfio_pci_ioctl_get_info(struct vfio_pci_core_device *vdev,
944 struct vfio_device_info __user *arg)
945 {
946 unsigned long minsz = offsetofend(struct vfio_device_info, num_irqs);
947 struct vfio_device_info info = {};
948 struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
949 int ret;
950
951 if (copy_from_user(&info, arg, minsz))
952 return -EFAULT;
953
954 if (info.argsz < minsz)
955 return -EINVAL;
956
957 minsz = min_t(size_t, info.argsz, sizeof(info));
958
959 info.flags = VFIO_DEVICE_FLAGS_PCI;
960
961 if (vdev->reset_works)
962 info.flags |= VFIO_DEVICE_FLAGS_RESET;
963
964 info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
965 info.num_irqs = VFIO_PCI_NUM_IRQS;
966
967 ret = vfio_pci_info_zdev_add_caps(vdev, &caps);
968 if (ret && ret != -ENODEV) {
969 pci_warn(vdev->pdev,
970 "Failed to setup zPCI info capabilities\n");
971 return ret;
972 }
973
974 ret = vfio_pci_info_atomic_cap(vdev, &caps);
975 if (ret && ret != -ENODEV) {
976 pci_warn(vdev->pdev,
977 "Failed to setup AtomicOps info capability\n");
978 return ret;
979 }
980
981 if (caps.size) {
982 info.flags |= VFIO_DEVICE_FLAGS_CAPS;
983 if (info.argsz < sizeof(info) + caps.size) {
984 info.argsz = sizeof(info) + caps.size;
985 } else {
986 vfio_info_cap_shift(&caps, sizeof(info));
987 if (copy_to_user(arg + 1, caps.buf, caps.size)) {
988 kfree(caps.buf);
989 return -EFAULT;
990 }
991 info.cap_offset = sizeof(*arg);
992 }
993
994 kfree(caps.buf);
995 }
996
997 return copy_to_user(arg, &info, minsz) ? -EFAULT : 0;
998 }
999
vfio_pci_ioctl_get_region_info(struct vfio_pci_core_device * vdev,struct vfio_region_info __user * arg)1000 static int vfio_pci_ioctl_get_region_info(struct vfio_pci_core_device *vdev,
1001 struct vfio_region_info __user *arg)
1002 {
1003 unsigned long minsz = offsetofend(struct vfio_region_info, offset);
1004 struct pci_dev *pdev = vdev->pdev;
1005 struct vfio_region_info info;
1006 struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
1007 int i, ret;
1008
1009 if (copy_from_user(&info, arg, minsz))
1010 return -EFAULT;
1011
1012 if (info.argsz < minsz)
1013 return -EINVAL;
1014
1015 switch (info.index) {
1016 case VFIO_PCI_CONFIG_REGION_INDEX:
1017 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
1018 info.size = pdev->cfg_size;
1019 info.flags = VFIO_REGION_INFO_FLAG_READ |
1020 VFIO_REGION_INFO_FLAG_WRITE;
1021 break;
1022 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
1023 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
1024 info.size = pci_resource_len(pdev, info.index);
1025 if (!info.size) {
1026 info.flags = 0;
1027 break;
1028 }
1029
1030 info.flags = VFIO_REGION_INFO_FLAG_READ |
1031 VFIO_REGION_INFO_FLAG_WRITE;
1032 if (vdev->bar_mmap_supported[info.index]) {
1033 info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
1034 if (info.index == vdev->msix_bar) {
1035 ret = msix_mmappable_cap(vdev, &caps);
1036 if (ret)
1037 return ret;
1038 }
1039 }
1040
1041 break;
1042 case VFIO_PCI_ROM_REGION_INDEX: {
1043 void __iomem *io;
1044 size_t size;
1045 u16 cmd;
1046
1047 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
1048 info.flags = 0;
1049
1050 /* Report the BAR size, not the ROM size */
1051 info.size = pci_resource_len(pdev, info.index);
1052 if (!info.size) {
1053 /* Shadow ROMs appear as PCI option ROMs */
1054 if (pdev->resource[PCI_ROM_RESOURCE].flags &
1055 IORESOURCE_ROM_SHADOW)
1056 info.size = 0x20000;
1057 else
1058 break;
1059 }
1060
1061 /*
1062 * Is it really there? Enable memory decode for implicit access
1063 * in pci_map_rom().
1064 */
1065 cmd = vfio_pci_memory_lock_and_enable(vdev);
1066 io = pci_map_rom(pdev, &size);
1067 if (io) {
1068 info.flags = VFIO_REGION_INFO_FLAG_READ;
1069 pci_unmap_rom(pdev, io);
1070 } else {
1071 info.size = 0;
1072 }
1073 vfio_pci_memory_unlock_and_restore(vdev, cmd);
1074
1075 break;
1076 }
1077 case VFIO_PCI_VGA_REGION_INDEX:
1078 if (!vdev->has_vga)
1079 return -EINVAL;
1080
1081 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
1082 info.size = 0xc0000;
1083 info.flags = VFIO_REGION_INFO_FLAG_READ |
1084 VFIO_REGION_INFO_FLAG_WRITE;
1085
1086 break;
1087 default: {
1088 struct vfio_region_info_cap_type cap_type = {
1089 .header.id = VFIO_REGION_INFO_CAP_TYPE,
1090 .header.version = 1
1091 };
1092
1093 if (info.index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
1094 return -EINVAL;
1095 info.index = array_index_nospec(
1096 info.index, VFIO_PCI_NUM_REGIONS + vdev->num_regions);
1097
1098 i = info.index - VFIO_PCI_NUM_REGIONS;
1099
1100 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
1101 info.size = vdev->region[i].size;
1102 info.flags = vdev->region[i].flags;
1103
1104 cap_type.type = vdev->region[i].type;
1105 cap_type.subtype = vdev->region[i].subtype;
1106
1107 ret = vfio_info_add_capability(&caps, &cap_type.header,
1108 sizeof(cap_type));
1109 if (ret)
1110 return ret;
1111
1112 if (vdev->region[i].ops->add_capability) {
1113 ret = vdev->region[i].ops->add_capability(
1114 vdev, &vdev->region[i], &caps);
1115 if (ret)
1116 return ret;
1117 }
1118 }
1119 }
1120
1121 if (caps.size) {
1122 info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
1123 if (info.argsz < sizeof(info) + caps.size) {
1124 info.argsz = sizeof(info) + caps.size;
1125 info.cap_offset = 0;
1126 } else {
1127 vfio_info_cap_shift(&caps, sizeof(info));
1128 if (copy_to_user(arg + 1, caps.buf, caps.size)) {
1129 kfree(caps.buf);
1130 return -EFAULT;
1131 }
1132 info.cap_offset = sizeof(*arg);
1133 }
1134
1135 kfree(caps.buf);
1136 }
1137
1138 return copy_to_user(arg, &info, minsz) ? -EFAULT : 0;
1139 }
1140
vfio_pci_ioctl_get_irq_info(struct vfio_pci_core_device * vdev,struct vfio_irq_info __user * arg)1141 static int vfio_pci_ioctl_get_irq_info(struct vfio_pci_core_device *vdev,
1142 struct vfio_irq_info __user *arg)
1143 {
1144 unsigned long minsz = offsetofend(struct vfio_irq_info, count);
1145 struct vfio_irq_info info;
1146
1147 if (copy_from_user(&info, arg, minsz))
1148 return -EFAULT;
1149
1150 if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
1151 return -EINVAL;
1152
1153 switch (info.index) {
1154 case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
1155 case VFIO_PCI_REQ_IRQ_INDEX:
1156 break;
1157 case VFIO_PCI_ERR_IRQ_INDEX:
1158 if (pci_is_pcie(vdev->pdev))
1159 break;
1160 fallthrough;
1161 default:
1162 return -EINVAL;
1163 }
1164
1165 info.flags = VFIO_IRQ_INFO_EVENTFD;
1166
1167 info.count = vfio_pci_get_irq_count(vdev, info.index);
1168
1169 if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
1170 info.flags |=
1171 (VFIO_IRQ_INFO_MASKABLE | VFIO_IRQ_INFO_AUTOMASKED);
1172 else if (info.index != VFIO_PCI_MSIX_IRQ_INDEX || !vdev->has_dyn_msix)
1173 info.flags |= VFIO_IRQ_INFO_NORESIZE;
1174
1175 return copy_to_user(arg, &info, minsz) ? -EFAULT : 0;
1176 }
1177
vfio_pci_ioctl_set_irqs(struct vfio_pci_core_device * vdev,struct vfio_irq_set __user * arg)1178 static int vfio_pci_ioctl_set_irqs(struct vfio_pci_core_device *vdev,
1179 struct vfio_irq_set __user *arg)
1180 {
1181 unsigned long minsz = offsetofend(struct vfio_irq_set, count);
1182 struct vfio_irq_set hdr;
1183 u8 *data = NULL;
1184 int max, ret = 0;
1185 size_t data_size = 0;
1186
1187 if (copy_from_user(&hdr, arg, minsz))
1188 return -EFAULT;
1189
1190 max = vfio_pci_get_irq_count(vdev, hdr.index);
1191
1192 ret = vfio_set_irqs_validate_and_prepare(&hdr, max, VFIO_PCI_NUM_IRQS,
1193 &data_size);
1194 if (ret)
1195 return ret;
1196
1197 if (data_size) {
1198 data = memdup_user(&arg->data, data_size);
1199 if (IS_ERR(data))
1200 return PTR_ERR(data);
1201 }
1202
1203 mutex_lock(&vdev->igate);
1204
1205 ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index, hdr.start,
1206 hdr.count, data);
1207
1208 mutex_unlock(&vdev->igate);
1209 kfree(data);
1210
1211 return ret;
1212 }
1213
vfio_pci_ioctl_reset(struct vfio_pci_core_device * vdev,void __user * arg)1214 static int vfio_pci_ioctl_reset(struct vfio_pci_core_device *vdev,
1215 void __user *arg)
1216 {
1217 int ret;
1218
1219 if (!vdev->reset_works)
1220 return -EINVAL;
1221
1222 vfio_pci_zap_and_down_write_memory_lock(vdev);
1223
1224 /*
1225 * This function can be invoked while the power state is non-D0. If
1226 * pci_try_reset_function() has been called while the power state is
1227 * non-D0, then pci_try_reset_function() will internally set the power
1228 * state to D0 without vfio driver involvement. For the devices which
1229 * have NoSoftRst-, the reset function can cause the PCI config space
1230 * reset without restoring the original state (saved locally in
1231 * 'vdev->pm_save').
1232 */
1233 vfio_pci_set_power_state(vdev, PCI_D0);
1234
1235 ret = pci_try_reset_function(vdev->pdev);
1236 up_write(&vdev->memory_lock);
1237
1238 return ret;
1239 }
1240
vfio_pci_ioctl_get_pci_hot_reset_info(struct vfio_pci_core_device * vdev,struct vfio_pci_hot_reset_info __user * arg)1241 static int vfio_pci_ioctl_get_pci_hot_reset_info(
1242 struct vfio_pci_core_device *vdev,
1243 struct vfio_pci_hot_reset_info __user *arg)
1244 {
1245 unsigned long minsz =
1246 offsetofend(struct vfio_pci_hot_reset_info, count);
1247 struct vfio_pci_dependent_device *devices = NULL;
1248 struct vfio_pci_hot_reset_info hdr;
1249 struct vfio_pci_fill_info fill = {};
1250 bool slot = false;
1251 int ret, count = 0;
1252
1253 if (copy_from_user(&hdr, arg, minsz))
1254 return -EFAULT;
1255
1256 if (hdr.argsz < minsz)
1257 return -EINVAL;
1258
1259 hdr.flags = 0;
1260
1261 /* Can we do a slot or bus reset or neither? */
1262 if (!pci_probe_reset_slot(vdev->pdev->slot))
1263 slot = true;
1264 else if (pci_probe_reset_bus(vdev->pdev->bus))
1265 return -ENODEV;
1266
1267 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
1268 &count, slot);
1269 if (ret)
1270 return ret;
1271
1272 if (WARN_ON(!count)) /* Should always be at least one */
1273 return -ERANGE;
1274
1275 if (count > (hdr.argsz - sizeof(hdr)) / sizeof(*devices)) {
1276 hdr.count = count;
1277 ret = -ENOSPC;
1278 goto header;
1279 }
1280
1281 devices = kcalloc(count, sizeof(*devices), GFP_KERNEL);
1282 if (!devices)
1283 return -ENOMEM;
1284
1285 fill.devices = devices;
1286 fill.nr_devices = count;
1287 fill.vdev = &vdev->vdev;
1288
1289 if (vfio_device_cdev_opened(&vdev->vdev))
1290 fill.flags |= VFIO_PCI_HOT_RESET_FLAG_DEV_ID |
1291 VFIO_PCI_HOT_RESET_FLAG_DEV_ID_OWNED;
1292
1293 mutex_lock(&vdev->vdev.dev_set->lock);
1294 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_fill_devs,
1295 &fill, slot);
1296 mutex_unlock(&vdev->vdev.dev_set->lock);
1297 if (ret)
1298 goto out;
1299
1300 if (copy_to_user(arg->devices, devices,
1301 sizeof(*devices) * fill.count)) {
1302 ret = -EFAULT;
1303 goto out;
1304 }
1305
1306 hdr.count = fill.count;
1307 hdr.flags = fill.flags;
1308
1309 header:
1310 if (copy_to_user(arg, &hdr, minsz))
1311 ret = -EFAULT;
1312 out:
1313 kfree(devices);
1314 return ret;
1315 }
1316
1317 static int
vfio_pci_ioctl_pci_hot_reset_groups(struct vfio_pci_core_device * vdev,u32 array_count,bool slot,struct vfio_pci_hot_reset __user * arg)1318 vfio_pci_ioctl_pci_hot_reset_groups(struct vfio_pci_core_device *vdev,
1319 u32 array_count, bool slot,
1320 struct vfio_pci_hot_reset __user *arg)
1321 {
1322 int32_t *group_fds;
1323 struct file **files;
1324 struct vfio_pci_group_info info;
1325 int file_idx, count = 0, ret = 0;
1326
1327 /*
1328 * We can't let userspace give us an arbitrarily large buffer to copy,
1329 * so verify how many we think there could be. Note groups can have
1330 * multiple devices so one group per device is the max.
1331 */
1332 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
1333 &count, slot);
1334 if (ret)
1335 return ret;
1336
1337 if (array_count > count)
1338 return -EINVAL;
1339
1340 group_fds = kcalloc(array_count, sizeof(*group_fds), GFP_KERNEL);
1341 files = kcalloc(array_count, sizeof(*files), GFP_KERNEL);
1342 if (!group_fds || !files) {
1343 kfree(group_fds);
1344 kfree(files);
1345 return -ENOMEM;
1346 }
1347
1348 if (copy_from_user(group_fds, arg->group_fds,
1349 array_count * sizeof(*group_fds))) {
1350 kfree(group_fds);
1351 kfree(files);
1352 return -EFAULT;
1353 }
1354
1355 /*
1356 * Get the group file for each fd to ensure the group is held across
1357 * the reset
1358 */
1359 for (file_idx = 0; file_idx < array_count; file_idx++) {
1360 struct file *file = fget(group_fds[file_idx]);
1361
1362 if (!file) {
1363 ret = -EBADF;
1364 break;
1365 }
1366
1367 /* Ensure the FD is a vfio group FD.*/
1368 if (!vfio_file_is_group(file)) {
1369 fput(file);
1370 ret = -EINVAL;
1371 break;
1372 }
1373
1374 files[file_idx] = file;
1375 }
1376
1377 kfree(group_fds);
1378
1379 /* release reference to groups on error */
1380 if (ret)
1381 goto hot_reset_release;
1382
1383 info.count = array_count;
1384 info.files = files;
1385
1386 ret = vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, &info, NULL);
1387
1388 hot_reset_release:
1389 for (file_idx--; file_idx >= 0; file_idx--)
1390 fput(files[file_idx]);
1391
1392 kfree(files);
1393 return ret;
1394 }
1395
vfio_pci_ioctl_pci_hot_reset(struct vfio_pci_core_device * vdev,struct vfio_pci_hot_reset __user * arg)1396 static int vfio_pci_ioctl_pci_hot_reset(struct vfio_pci_core_device *vdev,
1397 struct vfio_pci_hot_reset __user *arg)
1398 {
1399 unsigned long minsz = offsetofend(struct vfio_pci_hot_reset, count);
1400 struct vfio_pci_hot_reset hdr;
1401 bool slot = false;
1402
1403 if (copy_from_user(&hdr, arg, minsz))
1404 return -EFAULT;
1405
1406 if (hdr.argsz < minsz || hdr.flags)
1407 return -EINVAL;
1408
1409 /* zero-length array is only for cdev opened devices */
1410 if (!!hdr.count == vfio_device_cdev_opened(&vdev->vdev))
1411 return -EINVAL;
1412
1413 /* Can we do a slot or bus reset or neither? */
1414 if (!pci_probe_reset_slot(vdev->pdev->slot))
1415 slot = true;
1416 else if (pci_probe_reset_bus(vdev->pdev->bus))
1417 return -ENODEV;
1418
1419 if (hdr.count)
1420 return vfio_pci_ioctl_pci_hot_reset_groups(vdev, hdr.count, slot, arg);
1421
1422 return vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, NULL,
1423 vfio_iommufd_device_ictx(&vdev->vdev));
1424 }
1425
vfio_pci_ioctl_ioeventfd(struct vfio_pci_core_device * vdev,struct vfio_device_ioeventfd __user * arg)1426 static int vfio_pci_ioctl_ioeventfd(struct vfio_pci_core_device *vdev,
1427 struct vfio_device_ioeventfd __user *arg)
1428 {
1429 unsigned long minsz = offsetofend(struct vfio_device_ioeventfd, fd);
1430 struct vfio_device_ioeventfd ioeventfd;
1431 int count;
1432
1433 if (copy_from_user(&ioeventfd, arg, minsz))
1434 return -EFAULT;
1435
1436 if (ioeventfd.argsz < minsz)
1437 return -EINVAL;
1438
1439 if (ioeventfd.flags & ~VFIO_DEVICE_IOEVENTFD_SIZE_MASK)
1440 return -EINVAL;
1441
1442 count = ioeventfd.flags & VFIO_DEVICE_IOEVENTFD_SIZE_MASK;
1443
1444 if (hweight8(count) != 1 || ioeventfd.fd < -1)
1445 return -EINVAL;
1446
1447 return vfio_pci_ioeventfd(vdev, ioeventfd.offset, ioeventfd.data, count,
1448 ioeventfd.fd);
1449 }
1450
vfio_pci_core_ioctl(struct vfio_device * core_vdev,unsigned int cmd,unsigned long arg)1451 long vfio_pci_core_ioctl(struct vfio_device *core_vdev, unsigned int cmd,
1452 unsigned long arg)
1453 {
1454 struct vfio_pci_core_device *vdev =
1455 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1456 void __user *uarg = (void __user *)arg;
1457
1458 switch (cmd) {
1459 case VFIO_DEVICE_GET_INFO:
1460 return vfio_pci_ioctl_get_info(vdev, uarg);
1461 case VFIO_DEVICE_GET_IRQ_INFO:
1462 return vfio_pci_ioctl_get_irq_info(vdev, uarg);
1463 case VFIO_DEVICE_GET_PCI_HOT_RESET_INFO:
1464 return vfio_pci_ioctl_get_pci_hot_reset_info(vdev, uarg);
1465 case VFIO_DEVICE_GET_REGION_INFO:
1466 return vfio_pci_ioctl_get_region_info(vdev, uarg);
1467 case VFIO_DEVICE_IOEVENTFD:
1468 return vfio_pci_ioctl_ioeventfd(vdev, uarg);
1469 case VFIO_DEVICE_PCI_HOT_RESET:
1470 return vfio_pci_ioctl_pci_hot_reset(vdev, uarg);
1471 case VFIO_DEVICE_RESET:
1472 return vfio_pci_ioctl_reset(vdev, uarg);
1473 case VFIO_DEVICE_SET_IRQS:
1474 return vfio_pci_ioctl_set_irqs(vdev, uarg);
1475 default:
1476 return -ENOTTY;
1477 }
1478 }
1479 EXPORT_SYMBOL_GPL(vfio_pci_core_ioctl);
1480
vfio_pci_core_feature_token(struct vfio_device * device,u32 flags,uuid_t __user * arg,size_t argsz)1481 static int vfio_pci_core_feature_token(struct vfio_device *device, u32 flags,
1482 uuid_t __user *arg, size_t argsz)
1483 {
1484 struct vfio_pci_core_device *vdev =
1485 container_of(device, struct vfio_pci_core_device, vdev);
1486 uuid_t uuid;
1487 int ret;
1488
1489 if (!vdev->vf_token)
1490 return -ENOTTY;
1491 /*
1492 * We do not support GET of the VF Token UUID as this could
1493 * expose the token of the previous device user.
1494 */
1495 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET,
1496 sizeof(uuid));
1497 if (ret != 1)
1498 return ret;
1499
1500 if (copy_from_user(&uuid, arg, sizeof(uuid)))
1501 return -EFAULT;
1502
1503 mutex_lock(&vdev->vf_token->lock);
1504 uuid_copy(&vdev->vf_token->uuid, &uuid);
1505 mutex_unlock(&vdev->vf_token->lock);
1506 return 0;
1507 }
1508
vfio_pci_core_ioctl_feature(struct vfio_device * device,u32 flags,void __user * arg,size_t argsz)1509 int vfio_pci_core_ioctl_feature(struct vfio_device *device, u32 flags,
1510 void __user *arg, size_t argsz)
1511 {
1512 switch (flags & VFIO_DEVICE_FEATURE_MASK) {
1513 case VFIO_DEVICE_FEATURE_LOW_POWER_ENTRY:
1514 return vfio_pci_core_pm_entry(device, flags, arg, argsz);
1515 case VFIO_DEVICE_FEATURE_LOW_POWER_ENTRY_WITH_WAKEUP:
1516 return vfio_pci_core_pm_entry_with_wakeup(device, flags,
1517 arg, argsz);
1518 case VFIO_DEVICE_FEATURE_LOW_POWER_EXIT:
1519 return vfio_pci_core_pm_exit(device, flags, arg, argsz);
1520 case VFIO_DEVICE_FEATURE_PCI_VF_TOKEN:
1521 return vfio_pci_core_feature_token(device, flags, arg, argsz);
1522 default:
1523 return -ENOTTY;
1524 }
1525 }
1526 EXPORT_SYMBOL_GPL(vfio_pci_core_ioctl_feature);
1527
vfio_pci_rw(struct vfio_pci_core_device * vdev,char __user * buf,size_t count,loff_t * ppos,bool iswrite)1528 static ssize_t vfio_pci_rw(struct vfio_pci_core_device *vdev, char __user *buf,
1529 size_t count, loff_t *ppos, bool iswrite)
1530 {
1531 unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
1532 int ret;
1533
1534 if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
1535 return -EINVAL;
1536
1537 ret = pm_runtime_resume_and_get(&vdev->pdev->dev);
1538 if (ret) {
1539 pci_info_ratelimited(vdev->pdev, "runtime resume failed %d\n",
1540 ret);
1541 return -EIO;
1542 }
1543
1544 switch (index) {
1545 case VFIO_PCI_CONFIG_REGION_INDEX:
1546 ret = vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
1547 break;
1548
1549 case VFIO_PCI_ROM_REGION_INDEX:
1550 if (iswrite)
1551 ret = -EINVAL;
1552 else
1553 ret = vfio_pci_bar_rw(vdev, buf, count, ppos, false);
1554 break;
1555
1556 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
1557 ret = vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
1558 break;
1559
1560 case VFIO_PCI_VGA_REGION_INDEX:
1561 ret = vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
1562 break;
1563
1564 default:
1565 index -= VFIO_PCI_NUM_REGIONS;
1566 ret = vdev->region[index].ops->rw(vdev, buf,
1567 count, ppos, iswrite);
1568 break;
1569 }
1570
1571 pm_runtime_put(&vdev->pdev->dev);
1572 return ret;
1573 }
1574
vfio_pci_core_read(struct vfio_device * core_vdev,char __user * buf,size_t count,loff_t * ppos)1575 ssize_t vfio_pci_core_read(struct vfio_device *core_vdev, char __user *buf,
1576 size_t count, loff_t *ppos)
1577 {
1578 struct vfio_pci_core_device *vdev =
1579 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1580
1581 if (!count)
1582 return 0;
1583
1584 return vfio_pci_rw(vdev, buf, count, ppos, false);
1585 }
1586 EXPORT_SYMBOL_GPL(vfio_pci_core_read);
1587
vfio_pci_core_write(struct vfio_device * core_vdev,const char __user * buf,size_t count,loff_t * ppos)1588 ssize_t vfio_pci_core_write(struct vfio_device *core_vdev, const char __user *buf,
1589 size_t count, loff_t *ppos)
1590 {
1591 struct vfio_pci_core_device *vdev =
1592 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1593
1594 if (!count)
1595 return 0;
1596
1597 return vfio_pci_rw(vdev, (char __user *)buf, count, ppos, true);
1598 }
1599 EXPORT_SYMBOL_GPL(vfio_pci_core_write);
1600
vfio_pci_zap_bars(struct vfio_pci_core_device * vdev)1601 static void vfio_pci_zap_bars(struct vfio_pci_core_device *vdev)
1602 {
1603 struct vfio_device *core_vdev = &vdev->vdev;
1604 loff_t start = VFIO_PCI_INDEX_TO_OFFSET(VFIO_PCI_BAR0_REGION_INDEX);
1605 loff_t end = VFIO_PCI_INDEX_TO_OFFSET(VFIO_PCI_ROM_REGION_INDEX);
1606 loff_t len = end - start;
1607
1608 unmap_mapping_range(core_vdev->inode->i_mapping, start, len, true);
1609 }
1610
vfio_pci_zap_and_down_write_memory_lock(struct vfio_pci_core_device * vdev)1611 void vfio_pci_zap_and_down_write_memory_lock(struct vfio_pci_core_device *vdev)
1612 {
1613 down_write(&vdev->memory_lock);
1614 vfio_pci_zap_bars(vdev);
1615 }
1616
vfio_pci_memory_lock_and_enable(struct vfio_pci_core_device * vdev)1617 u16 vfio_pci_memory_lock_and_enable(struct vfio_pci_core_device *vdev)
1618 {
1619 u16 cmd;
1620
1621 down_write(&vdev->memory_lock);
1622 pci_read_config_word(vdev->pdev, PCI_COMMAND, &cmd);
1623 if (!(cmd & PCI_COMMAND_MEMORY))
1624 pci_write_config_word(vdev->pdev, PCI_COMMAND,
1625 cmd | PCI_COMMAND_MEMORY);
1626
1627 return cmd;
1628 }
1629
vfio_pci_memory_unlock_and_restore(struct vfio_pci_core_device * vdev,u16 cmd)1630 void vfio_pci_memory_unlock_and_restore(struct vfio_pci_core_device *vdev, u16 cmd)
1631 {
1632 pci_write_config_word(vdev->pdev, PCI_COMMAND, cmd);
1633 up_write(&vdev->memory_lock);
1634 }
1635
vma_to_pfn(struct vm_area_struct * vma)1636 static unsigned long vma_to_pfn(struct vm_area_struct *vma)
1637 {
1638 struct vfio_pci_core_device *vdev = vma->vm_private_data;
1639 int index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
1640 u64 pgoff;
1641
1642 pgoff = vma->vm_pgoff &
1643 ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
1644
1645 return (pci_resource_start(vdev->pdev, index) >> PAGE_SHIFT) + pgoff;
1646 }
1647
vfio_pci_mmap_huge_fault(struct vm_fault * vmf,unsigned int order)1648 static vm_fault_t vfio_pci_mmap_huge_fault(struct vm_fault *vmf,
1649 unsigned int order)
1650 {
1651 struct vm_area_struct *vma = vmf->vma;
1652 struct vfio_pci_core_device *vdev = vma->vm_private_data;
1653 unsigned long addr = vmf->address & ~((PAGE_SIZE << order) - 1);
1654 unsigned long pgoff = (addr - vma->vm_start) >> PAGE_SHIFT;
1655 unsigned long pfn = vma_to_pfn(vma) + pgoff;
1656 vm_fault_t ret = VM_FAULT_SIGBUS;
1657
1658 if (order && (addr < vma->vm_start ||
1659 addr + (PAGE_SIZE << order) > vma->vm_end ||
1660 pfn & ((1 << order) - 1))) {
1661 ret = VM_FAULT_FALLBACK;
1662 goto out;
1663 }
1664
1665 down_read(&vdev->memory_lock);
1666
1667 if (vdev->pm_runtime_engaged || !__vfio_pci_memory_enabled(vdev))
1668 goto out_unlock;
1669
1670 switch (order) {
1671 case 0:
1672 ret = vmf_insert_pfn(vma, vmf->address, pfn);
1673 break;
1674 #ifdef CONFIG_ARCH_SUPPORTS_PMD_PFNMAP
1675 case PMD_ORDER:
1676 ret = vmf_insert_pfn_pmd(vmf,
1677 __pfn_to_pfn_t(pfn, PFN_DEV), false);
1678 break;
1679 #endif
1680 #ifdef CONFIG_ARCH_SUPPORTS_PUD_PFNMAP
1681 case PUD_ORDER:
1682 ret = vmf_insert_pfn_pud(vmf,
1683 __pfn_to_pfn_t(pfn, PFN_DEV), false);
1684 break;
1685 #endif
1686 default:
1687 ret = VM_FAULT_FALLBACK;
1688 }
1689
1690 out_unlock:
1691 up_read(&vdev->memory_lock);
1692 out:
1693 dev_dbg_ratelimited(&vdev->pdev->dev,
1694 "%s(,order = %d) BAR %ld page offset 0x%lx: 0x%x\n",
1695 __func__, order,
1696 vma->vm_pgoff >>
1697 (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT),
1698 pgoff, (unsigned int)ret);
1699
1700 return ret;
1701 }
1702
vfio_pci_mmap_page_fault(struct vm_fault * vmf)1703 static vm_fault_t vfio_pci_mmap_page_fault(struct vm_fault *vmf)
1704 {
1705 return vfio_pci_mmap_huge_fault(vmf, 0);
1706 }
1707
1708 static const struct vm_operations_struct vfio_pci_mmap_ops = {
1709 .fault = vfio_pci_mmap_page_fault,
1710 #ifdef CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP
1711 .huge_fault = vfio_pci_mmap_huge_fault,
1712 #endif
1713 };
1714
vfio_pci_core_mmap(struct vfio_device * core_vdev,struct vm_area_struct * vma)1715 int vfio_pci_core_mmap(struct vfio_device *core_vdev, struct vm_area_struct *vma)
1716 {
1717 struct vfio_pci_core_device *vdev =
1718 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1719 struct pci_dev *pdev = vdev->pdev;
1720 unsigned int index;
1721 u64 phys_len, req_len, pgoff, req_start;
1722 int ret;
1723
1724 index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
1725
1726 if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
1727 return -EINVAL;
1728 if (vma->vm_end < vma->vm_start)
1729 return -EINVAL;
1730 if ((vma->vm_flags & VM_SHARED) == 0)
1731 return -EINVAL;
1732 if (index >= VFIO_PCI_NUM_REGIONS) {
1733 int regnum = index - VFIO_PCI_NUM_REGIONS;
1734 struct vfio_pci_region *region = vdev->region + regnum;
1735
1736 if (region->ops && region->ops->mmap &&
1737 (region->flags & VFIO_REGION_INFO_FLAG_MMAP))
1738 return region->ops->mmap(vdev, region, vma);
1739 return -EINVAL;
1740 }
1741 if (index >= VFIO_PCI_ROM_REGION_INDEX)
1742 return -EINVAL;
1743 if (!vdev->bar_mmap_supported[index])
1744 return -EINVAL;
1745
1746 phys_len = PAGE_ALIGN(pci_resource_len(pdev, index));
1747 req_len = vma->vm_end - vma->vm_start;
1748 pgoff = vma->vm_pgoff &
1749 ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
1750 req_start = pgoff << PAGE_SHIFT;
1751
1752 if (req_start + req_len > phys_len)
1753 return -EINVAL;
1754
1755 /*
1756 * Even though we don't make use of the barmap for the mmap,
1757 * we need to request the region and the barmap tracks that.
1758 */
1759 if (!vdev->barmap[index]) {
1760 ret = pci_request_selected_regions(pdev,
1761 1 << index, "vfio-pci");
1762 if (ret)
1763 return ret;
1764
1765 vdev->barmap[index] = pci_iomap(pdev, index, 0);
1766 if (!vdev->barmap[index]) {
1767 pci_release_selected_regions(pdev, 1 << index);
1768 return -ENOMEM;
1769 }
1770 }
1771
1772 vma->vm_private_data = vdev;
1773 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1774 vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot);
1775
1776 /*
1777 * Set vm_flags now, they should not be changed in the fault handler.
1778 * We want the same flags and page protection (decrypted above) as
1779 * io_remap_pfn_range() would set.
1780 *
1781 * VM_ALLOW_ANY_UNCACHED: The VMA flag is implemented for ARM64,
1782 * allowing KVM stage 2 device mapping attributes to use Normal-NC
1783 * rather than DEVICE_nGnRE, which allows guest mappings
1784 * supporting write-combining attributes (WC). ARM does not
1785 * architecturally guarantee this is safe, and indeed some MMIO
1786 * regions like the GICv2 VCPU interface can trigger uncontained
1787 * faults if Normal-NC is used.
1788 *
1789 * To safely use VFIO in KVM the platform must guarantee full
1790 * safety in the guest where no action taken against a MMIO
1791 * mapping can trigger an uncontained failure. The assumption is
1792 * that most VFIO PCI platforms support this for both mapping types,
1793 * at least in common flows, based on some expectations of how
1794 * PCI IP is integrated. Hence VM_ALLOW_ANY_UNCACHED is set in
1795 * the VMA flags.
1796 */
1797 vm_flags_set(vma, VM_ALLOW_ANY_UNCACHED | VM_IO | VM_PFNMAP |
1798 VM_DONTEXPAND | VM_DONTDUMP);
1799 vma->vm_ops = &vfio_pci_mmap_ops;
1800
1801 return 0;
1802 }
1803 EXPORT_SYMBOL_GPL(vfio_pci_core_mmap);
1804
vfio_pci_core_request(struct vfio_device * core_vdev,unsigned int count)1805 void vfio_pci_core_request(struct vfio_device *core_vdev, unsigned int count)
1806 {
1807 struct vfio_pci_core_device *vdev =
1808 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1809 struct pci_dev *pdev = vdev->pdev;
1810
1811 mutex_lock(&vdev->igate);
1812
1813 if (vdev->req_trigger) {
1814 if (!(count % 10))
1815 pci_notice_ratelimited(pdev,
1816 "Relaying device request to user (#%u)\n",
1817 count);
1818 eventfd_signal(vdev->req_trigger);
1819 } else if (count == 0) {
1820 pci_warn(pdev,
1821 "No device request channel registered, blocked until released by user\n");
1822 }
1823
1824 mutex_unlock(&vdev->igate);
1825 }
1826 EXPORT_SYMBOL_GPL(vfio_pci_core_request);
1827
vfio_pci_validate_vf_token(struct vfio_pci_core_device * vdev,bool vf_token,uuid_t * uuid)1828 static int vfio_pci_validate_vf_token(struct vfio_pci_core_device *vdev,
1829 bool vf_token, uuid_t *uuid)
1830 {
1831 /*
1832 * There's always some degree of trust or collaboration between SR-IOV
1833 * PF and VFs, even if just that the PF hosts the SR-IOV capability and
1834 * can disrupt VFs with a reset, but often the PF has more explicit
1835 * access to deny service to the VF or access data passed through the
1836 * VF. We therefore require an opt-in via a shared VF token (UUID) to
1837 * represent this trust. This both prevents that a VF driver might
1838 * assume the PF driver is a trusted, in-kernel driver, and also that
1839 * a PF driver might be replaced with a rogue driver, unknown to in-use
1840 * VF drivers.
1841 *
1842 * Therefore when presented with a VF, if the PF is a vfio device and
1843 * it is bound to the vfio-pci driver, the user needs to provide a VF
1844 * token to access the device, in the form of appending a vf_token to
1845 * the device name, for example:
1846 *
1847 * "0000:04:10.0 vf_token=bd8d9d2b-5a5f-4f5a-a211-f591514ba1f3"
1848 *
1849 * When presented with a PF which has VFs in use, the user must also
1850 * provide the current VF token to prove collaboration with existing
1851 * VF users. If VFs are not in use, the VF token provided for the PF
1852 * device will act to set the VF token.
1853 *
1854 * If the VF token is provided but unused, an error is generated.
1855 */
1856 if (vdev->pdev->is_virtfn) {
1857 struct vfio_pci_core_device *pf_vdev = vdev->sriov_pf_core_dev;
1858 bool match;
1859
1860 if (!pf_vdev) {
1861 if (!vf_token)
1862 return 0; /* PF is not vfio-pci, no VF token */
1863
1864 pci_info_ratelimited(vdev->pdev,
1865 "VF token incorrectly provided, PF not bound to vfio-pci\n");
1866 return -EINVAL;
1867 }
1868
1869 if (!vf_token) {
1870 pci_info_ratelimited(vdev->pdev,
1871 "VF token required to access device\n");
1872 return -EACCES;
1873 }
1874
1875 mutex_lock(&pf_vdev->vf_token->lock);
1876 match = uuid_equal(uuid, &pf_vdev->vf_token->uuid);
1877 mutex_unlock(&pf_vdev->vf_token->lock);
1878
1879 if (!match) {
1880 pci_info_ratelimited(vdev->pdev,
1881 "Incorrect VF token provided for device\n");
1882 return -EACCES;
1883 }
1884 } else if (vdev->vf_token) {
1885 mutex_lock(&vdev->vf_token->lock);
1886 if (vdev->vf_token->users) {
1887 if (!vf_token) {
1888 mutex_unlock(&vdev->vf_token->lock);
1889 pci_info_ratelimited(vdev->pdev,
1890 "VF token required to access device\n");
1891 return -EACCES;
1892 }
1893
1894 if (!uuid_equal(uuid, &vdev->vf_token->uuid)) {
1895 mutex_unlock(&vdev->vf_token->lock);
1896 pci_info_ratelimited(vdev->pdev,
1897 "Incorrect VF token provided for device\n");
1898 return -EACCES;
1899 }
1900 } else if (vf_token) {
1901 uuid_copy(&vdev->vf_token->uuid, uuid);
1902 }
1903
1904 mutex_unlock(&vdev->vf_token->lock);
1905 } else if (vf_token) {
1906 pci_info_ratelimited(vdev->pdev,
1907 "VF token incorrectly provided, not a PF or VF\n");
1908 return -EINVAL;
1909 }
1910
1911 return 0;
1912 }
1913
1914 #define VF_TOKEN_ARG "vf_token="
1915
vfio_pci_core_match(struct vfio_device * core_vdev,char * buf)1916 int vfio_pci_core_match(struct vfio_device *core_vdev, char *buf)
1917 {
1918 struct vfio_pci_core_device *vdev =
1919 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1920 bool vf_token = false;
1921 uuid_t uuid;
1922 int ret;
1923
1924 if (strncmp(pci_name(vdev->pdev), buf, strlen(pci_name(vdev->pdev))))
1925 return 0; /* No match */
1926
1927 if (strlen(buf) > strlen(pci_name(vdev->pdev))) {
1928 buf += strlen(pci_name(vdev->pdev));
1929
1930 if (*buf != ' ')
1931 return 0; /* No match: non-whitespace after name */
1932
1933 while (*buf) {
1934 if (*buf == ' ') {
1935 buf++;
1936 continue;
1937 }
1938
1939 if (!vf_token && !strncmp(buf, VF_TOKEN_ARG,
1940 strlen(VF_TOKEN_ARG))) {
1941 buf += strlen(VF_TOKEN_ARG);
1942
1943 if (strlen(buf) < UUID_STRING_LEN)
1944 return -EINVAL;
1945
1946 ret = uuid_parse(buf, &uuid);
1947 if (ret)
1948 return ret;
1949
1950 vf_token = true;
1951 buf += UUID_STRING_LEN;
1952 } else {
1953 /* Unknown/duplicate option */
1954 return -EINVAL;
1955 }
1956 }
1957 }
1958
1959 ret = vfio_pci_validate_vf_token(vdev, vf_token, &uuid);
1960 if (ret)
1961 return ret;
1962
1963 return 1; /* Match */
1964 }
1965 EXPORT_SYMBOL_GPL(vfio_pci_core_match);
1966
vfio_pci_bus_notifier(struct notifier_block * nb,unsigned long action,void * data)1967 static int vfio_pci_bus_notifier(struct notifier_block *nb,
1968 unsigned long action, void *data)
1969 {
1970 struct vfio_pci_core_device *vdev = container_of(nb,
1971 struct vfio_pci_core_device, nb);
1972 struct device *dev = data;
1973 struct pci_dev *pdev = to_pci_dev(dev);
1974 struct pci_dev *physfn = pci_physfn(pdev);
1975
1976 if (action == BUS_NOTIFY_ADD_DEVICE &&
1977 pdev->is_virtfn && physfn == vdev->pdev) {
1978 pci_info(vdev->pdev, "Captured SR-IOV VF %s driver_override\n",
1979 pci_name(pdev));
1980 pdev->driver_override = kasprintf(GFP_KERNEL, "%s",
1981 vdev->vdev.ops->name);
1982 WARN_ON(!pdev->driver_override);
1983 } else if (action == BUS_NOTIFY_BOUND_DRIVER &&
1984 pdev->is_virtfn && physfn == vdev->pdev) {
1985 struct pci_driver *drv = pci_dev_driver(pdev);
1986
1987 if (drv && drv != pci_dev_driver(vdev->pdev))
1988 pci_warn(vdev->pdev,
1989 "VF %s bound to driver %s while PF bound to driver %s\n",
1990 pci_name(pdev), drv->name,
1991 pci_dev_driver(vdev->pdev)->name);
1992 }
1993
1994 return 0;
1995 }
1996
vfio_pci_vf_init(struct vfio_pci_core_device * vdev)1997 static int vfio_pci_vf_init(struct vfio_pci_core_device *vdev)
1998 {
1999 struct pci_dev *pdev = vdev->pdev;
2000 struct vfio_pci_core_device *cur;
2001 struct pci_dev *physfn;
2002 int ret;
2003
2004 if (pdev->is_virtfn) {
2005 /*
2006 * If this VF was created by our vfio_pci_core_sriov_configure()
2007 * then we can find the PF vfio_pci_core_device now, and due to
2008 * the locking in pci_disable_sriov() it cannot change until
2009 * this VF device driver is removed.
2010 */
2011 physfn = pci_physfn(vdev->pdev);
2012 mutex_lock(&vfio_pci_sriov_pfs_mutex);
2013 list_for_each_entry(cur, &vfio_pci_sriov_pfs, sriov_pfs_item) {
2014 if (cur->pdev == physfn) {
2015 vdev->sriov_pf_core_dev = cur;
2016 break;
2017 }
2018 }
2019 mutex_unlock(&vfio_pci_sriov_pfs_mutex);
2020 return 0;
2021 }
2022
2023 /* Not a SRIOV PF */
2024 if (!pdev->is_physfn)
2025 return 0;
2026
2027 vdev->vf_token = kzalloc(sizeof(*vdev->vf_token), GFP_KERNEL);
2028 if (!vdev->vf_token)
2029 return -ENOMEM;
2030
2031 mutex_init(&vdev->vf_token->lock);
2032 uuid_gen(&vdev->vf_token->uuid);
2033
2034 vdev->nb.notifier_call = vfio_pci_bus_notifier;
2035 ret = bus_register_notifier(&pci_bus_type, &vdev->nb);
2036 if (ret) {
2037 kfree(vdev->vf_token);
2038 return ret;
2039 }
2040 return 0;
2041 }
2042
vfio_pci_vf_uninit(struct vfio_pci_core_device * vdev)2043 static void vfio_pci_vf_uninit(struct vfio_pci_core_device *vdev)
2044 {
2045 if (!vdev->vf_token)
2046 return;
2047
2048 bus_unregister_notifier(&pci_bus_type, &vdev->nb);
2049 WARN_ON(vdev->vf_token->users);
2050 mutex_destroy(&vdev->vf_token->lock);
2051 kfree(vdev->vf_token);
2052 }
2053
vfio_pci_vga_init(struct vfio_pci_core_device * vdev)2054 static int vfio_pci_vga_init(struct vfio_pci_core_device *vdev)
2055 {
2056 struct pci_dev *pdev = vdev->pdev;
2057 int ret;
2058
2059 if (!vfio_pci_is_vga(pdev))
2060 return 0;
2061
2062 ret = aperture_remove_conflicting_pci_devices(pdev, vdev->vdev.ops->name);
2063 if (ret)
2064 return ret;
2065
2066 ret = vga_client_register(pdev, vfio_pci_set_decode);
2067 if (ret)
2068 return ret;
2069 vga_set_legacy_decoding(pdev, vfio_pci_set_decode(pdev, false));
2070 return 0;
2071 }
2072
vfio_pci_vga_uninit(struct vfio_pci_core_device * vdev)2073 static void vfio_pci_vga_uninit(struct vfio_pci_core_device *vdev)
2074 {
2075 struct pci_dev *pdev = vdev->pdev;
2076
2077 if (!vfio_pci_is_vga(pdev))
2078 return;
2079 vga_client_unregister(pdev);
2080 vga_set_legacy_decoding(pdev, VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
2081 VGA_RSRC_LEGACY_IO |
2082 VGA_RSRC_LEGACY_MEM);
2083 }
2084
vfio_pci_core_init_dev(struct vfio_device * core_vdev)2085 int vfio_pci_core_init_dev(struct vfio_device *core_vdev)
2086 {
2087 struct vfio_pci_core_device *vdev =
2088 container_of(core_vdev, struct vfio_pci_core_device, vdev);
2089
2090 vdev->pdev = to_pci_dev(core_vdev->dev);
2091 vdev->irq_type = VFIO_PCI_NUM_IRQS;
2092 mutex_init(&vdev->igate);
2093 spin_lock_init(&vdev->irqlock);
2094 mutex_init(&vdev->ioeventfds_lock);
2095 INIT_LIST_HEAD(&vdev->dummy_resources_list);
2096 INIT_LIST_HEAD(&vdev->ioeventfds_list);
2097 INIT_LIST_HEAD(&vdev->sriov_pfs_item);
2098 init_rwsem(&vdev->memory_lock);
2099 xa_init(&vdev->ctx);
2100
2101 return 0;
2102 }
2103 EXPORT_SYMBOL_GPL(vfio_pci_core_init_dev);
2104
vfio_pci_core_release_dev(struct vfio_device * core_vdev)2105 void vfio_pci_core_release_dev(struct vfio_device *core_vdev)
2106 {
2107 struct vfio_pci_core_device *vdev =
2108 container_of(core_vdev, struct vfio_pci_core_device, vdev);
2109
2110 mutex_destroy(&vdev->igate);
2111 mutex_destroy(&vdev->ioeventfds_lock);
2112 kfree(vdev->region);
2113 kfree(vdev->pm_save);
2114 }
2115 EXPORT_SYMBOL_GPL(vfio_pci_core_release_dev);
2116
vfio_pci_core_register_device(struct vfio_pci_core_device * vdev)2117 int vfio_pci_core_register_device(struct vfio_pci_core_device *vdev)
2118 {
2119 struct pci_dev *pdev = vdev->pdev;
2120 struct device *dev = &pdev->dev;
2121 int ret;
2122
2123 /* Drivers must set the vfio_pci_core_device to their drvdata */
2124 if (WARN_ON(vdev != dev_get_drvdata(dev)))
2125 return -EINVAL;
2126
2127 if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
2128 return -EINVAL;
2129
2130 if (vdev->vdev.mig_ops) {
2131 if (!(vdev->vdev.mig_ops->migration_get_state &&
2132 vdev->vdev.mig_ops->migration_set_state &&
2133 vdev->vdev.mig_ops->migration_get_data_size) ||
2134 !(vdev->vdev.migration_flags & VFIO_MIGRATION_STOP_COPY))
2135 return -EINVAL;
2136 }
2137
2138 if (vdev->vdev.log_ops && !(vdev->vdev.log_ops->log_start &&
2139 vdev->vdev.log_ops->log_stop &&
2140 vdev->vdev.log_ops->log_read_and_clear))
2141 return -EINVAL;
2142
2143 /*
2144 * Prevent binding to PFs with VFs enabled, the VFs might be in use
2145 * by the host or other users. We cannot capture the VFs if they
2146 * already exist, nor can we track VF users. Disabling SR-IOV here
2147 * would initiate removing the VFs, which would unbind the driver,
2148 * which is prone to blocking if that VF is also in use by vfio-pci.
2149 * Just reject these PFs and let the user sort it out.
2150 */
2151 if (pci_num_vf(pdev)) {
2152 pci_warn(pdev, "Cannot bind to PF with SR-IOV enabled\n");
2153 return -EBUSY;
2154 }
2155
2156 if (pci_is_root_bus(pdev->bus) || pdev->is_virtfn) {
2157 ret = vfio_assign_device_set(&vdev->vdev, vdev);
2158 } else if (!pci_probe_reset_slot(pdev->slot)) {
2159 ret = vfio_assign_device_set(&vdev->vdev, pdev->slot);
2160 } else {
2161 /*
2162 * If there is no slot reset support for this device, the whole
2163 * bus needs to be grouped together to support bus-wide resets.
2164 */
2165 ret = vfio_assign_device_set(&vdev->vdev, pdev->bus);
2166 }
2167
2168 if (ret)
2169 return ret;
2170 ret = vfio_pci_vf_init(vdev);
2171 if (ret)
2172 return ret;
2173 ret = vfio_pci_vga_init(vdev);
2174 if (ret)
2175 goto out_vf;
2176
2177 vfio_pci_probe_power_state(vdev);
2178
2179 /*
2180 * pci-core sets the device power state to an unknown value at
2181 * bootup and after being removed from a driver. The only
2182 * transition it allows from this unknown state is to D0, which
2183 * typically happens when a driver calls pci_enable_device().
2184 * We're not ready to enable the device yet, but we do want to
2185 * be able to get to D3. Therefore first do a D0 transition
2186 * before enabling runtime PM.
2187 */
2188 vfio_pci_set_power_state(vdev, PCI_D0);
2189
2190 dev->driver->pm = &vfio_pci_core_pm_ops;
2191 pm_runtime_allow(dev);
2192 if (!disable_idle_d3)
2193 pm_runtime_put(dev);
2194
2195 ret = vfio_register_group_dev(&vdev->vdev);
2196 if (ret)
2197 goto out_power;
2198 return 0;
2199
2200 out_power:
2201 if (!disable_idle_d3)
2202 pm_runtime_get_noresume(dev);
2203
2204 pm_runtime_forbid(dev);
2205 out_vf:
2206 vfio_pci_vf_uninit(vdev);
2207 return ret;
2208 }
2209 EXPORT_SYMBOL_GPL(vfio_pci_core_register_device);
2210
vfio_pci_core_unregister_device(struct vfio_pci_core_device * vdev)2211 void vfio_pci_core_unregister_device(struct vfio_pci_core_device *vdev)
2212 {
2213 vfio_pci_core_sriov_configure(vdev, 0);
2214
2215 vfio_unregister_group_dev(&vdev->vdev);
2216
2217 vfio_pci_vf_uninit(vdev);
2218 vfio_pci_vga_uninit(vdev);
2219
2220 if (!disable_idle_d3)
2221 pm_runtime_get_noresume(&vdev->pdev->dev);
2222
2223 pm_runtime_forbid(&vdev->pdev->dev);
2224 }
2225 EXPORT_SYMBOL_GPL(vfio_pci_core_unregister_device);
2226
vfio_pci_core_aer_err_detected(struct pci_dev * pdev,pci_channel_state_t state)2227 pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev,
2228 pci_channel_state_t state)
2229 {
2230 struct vfio_pci_core_device *vdev = dev_get_drvdata(&pdev->dev);
2231
2232 mutex_lock(&vdev->igate);
2233
2234 if (vdev->err_trigger)
2235 eventfd_signal(vdev->err_trigger);
2236
2237 mutex_unlock(&vdev->igate);
2238
2239 return PCI_ERS_RESULT_CAN_RECOVER;
2240 }
2241 EXPORT_SYMBOL_GPL(vfio_pci_core_aer_err_detected);
2242
vfio_pci_core_sriov_configure(struct vfio_pci_core_device * vdev,int nr_virtfn)2243 int vfio_pci_core_sriov_configure(struct vfio_pci_core_device *vdev,
2244 int nr_virtfn)
2245 {
2246 struct pci_dev *pdev = vdev->pdev;
2247 int ret = 0;
2248
2249 device_lock_assert(&pdev->dev);
2250
2251 if (nr_virtfn) {
2252 mutex_lock(&vfio_pci_sriov_pfs_mutex);
2253 /*
2254 * The thread that adds the vdev to the list is the only thread
2255 * that gets to call pci_enable_sriov() and we will only allow
2256 * it to be called once without going through
2257 * pci_disable_sriov()
2258 */
2259 if (!list_empty(&vdev->sriov_pfs_item)) {
2260 ret = -EINVAL;
2261 goto out_unlock;
2262 }
2263 list_add_tail(&vdev->sriov_pfs_item, &vfio_pci_sriov_pfs);
2264 mutex_unlock(&vfio_pci_sriov_pfs_mutex);
2265
2266 /*
2267 * The PF power state should always be higher than the VF power
2268 * state. The PF can be in low power state either with runtime
2269 * power management (when there is no user) or PCI_PM_CTRL
2270 * register write by the user. If PF is in the low power state,
2271 * then change the power state to D0 first before enabling
2272 * SR-IOV. Also, this function can be called at any time, and
2273 * userspace PCI_PM_CTRL write can race against this code path,
2274 * so protect the same with 'memory_lock'.
2275 */
2276 ret = pm_runtime_resume_and_get(&pdev->dev);
2277 if (ret)
2278 goto out_del;
2279
2280 down_write(&vdev->memory_lock);
2281 vfio_pci_set_power_state(vdev, PCI_D0);
2282 ret = pci_enable_sriov(pdev, nr_virtfn);
2283 up_write(&vdev->memory_lock);
2284 if (ret) {
2285 pm_runtime_put(&pdev->dev);
2286 goto out_del;
2287 }
2288 return nr_virtfn;
2289 }
2290
2291 if (pci_num_vf(pdev)) {
2292 pci_disable_sriov(pdev);
2293 pm_runtime_put(&pdev->dev);
2294 }
2295
2296 out_del:
2297 mutex_lock(&vfio_pci_sriov_pfs_mutex);
2298 list_del_init(&vdev->sriov_pfs_item);
2299 out_unlock:
2300 mutex_unlock(&vfio_pci_sriov_pfs_mutex);
2301 return ret;
2302 }
2303 EXPORT_SYMBOL_GPL(vfio_pci_core_sriov_configure);
2304
2305 const struct pci_error_handlers vfio_pci_core_err_handlers = {
2306 .error_detected = vfio_pci_core_aer_err_detected,
2307 };
2308 EXPORT_SYMBOL_GPL(vfio_pci_core_err_handlers);
2309
vfio_dev_in_groups(struct vfio_device * vdev,struct vfio_pci_group_info * groups)2310 static bool vfio_dev_in_groups(struct vfio_device *vdev,
2311 struct vfio_pci_group_info *groups)
2312 {
2313 unsigned int i;
2314
2315 if (!groups)
2316 return false;
2317
2318 for (i = 0; i < groups->count; i++)
2319 if (vfio_file_has_dev(groups->files[i], vdev))
2320 return true;
2321 return false;
2322 }
2323
vfio_pci_is_device_in_set(struct pci_dev * pdev,void * data)2324 static int vfio_pci_is_device_in_set(struct pci_dev *pdev, void *data)
2325 {
2326 struct vfio_device_set *dev_set = data;
2327
2328 return vfio_find_device_in_devset(dev_set, &pdev->dev) ? 0 : -ENODEV;
2329 }
2330
2331 /*
2332 * vfio-core considers a group to be viable and will create a vfio_device even
2333 * if some devices are bound to drivers like pci-stub or pcieport. Here we
2334 * require all PCI devices to be inside our dev_set since that ensures they stay
2335 * put and that every driver controlling the device can co-ordinate with the
2336 * device reset.
2337 *
2338 * Returns the pci_dev to pass to pci_reset_bus() if every PCI device to be
2339 * reset is inside the dev_set, and pci_reset_bus() can succeed. NULL otherwise.
2340 */
2341 static struct pci_dev *
vfio_pci_dev_set_resettable(struct vfio_device_set * dev_set)2342 vfio_pci_dev_set_resettable(struct vfio_device_set *dev_set)
2343 {
2344 struct pci_dev *pdev;
2345
2346 lockdep_assert_held(&dev_set->lock);
2347
2348 /*
2349 * By definition all PCI devices in the dev_set share the same PCI
2350 * reset, so any pci_dev will have the same outcomes for
2351 * pci_probe_reset_*() and pci_reset_bus().
2352 */
2353 pdev = list_first_entry(&dev_set->device_list,
2354 struct vfio_pci_core_device,
2355 vdev.dev_set_list)->pdev;
2356
2357 /* pci_reset_bus() is supported */
2358 if (pci_probe_reset_slot(pdev->slot) && pci_probe_reset_bus(pdev->bus))
2359 return NULL;
2360
2361 if (vfio_pci_for_each_slot_or_bus(pdev, vfio_pci_is_device_in_set,
2362 dev_set,
2363 !pci_probe_reset_slot(pdev->slot)))
2364 return NULL;
2365 return pdev;
2366 }
2367
vfio_pci_dev_set_pm_runtime_get(struct vfio_device_set * dev_set)2368 static int vfio_pci_dev_set_pm_runtime_get(struct vfio_device_set *dev_set)
2369 {
2370 struct vfio_pci_core_device *cur;
2371 int ret;
2372
2373 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list) {
2374 ret = pm_runtime_resume_and_get(&cur->pdev->dev);
2375 if (ret)
2376 goto unwind;
2377 }
2378
2379 return 0;
2380
2381 unwind:
2382 list_for_each_entry_continue_reverse(cur, &dev_set->device_list,
2383 vdev.dev_set_list)
2384 pm_runtime_put(&cur->pdev->dev);
2385
2386 return ret;
2387 }
2388
vfio_pci_dev_set_hot_reset(struct vfio_device_set * dev_set,struct vfio_pci_group_info * groups,struct iommufd_ctx * iommufd_ctx)2389 static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set,
2390 struct vfio_pci_group_info *groups,
2391 struct iommufd_ctx *iommufd_ctx)
2392 {
2393 struct vfio_pci_core_device *vdev;
2394 struct pci_dev *pdev;
2395 int ret;
2396
2397 mutex_lock(&dev_set->lock);
2398
2399 pdev = vfio_pci_dev_set_resettable(dev_set);
2400 if (!pdev) {
2401 ret = -EINVAL;
2402 goto err_unlock;
2403 }
2404
2405 /*
2406 * Some of the devices in the dev_set can be in the runtime suspended
2407 * state. Increment the usage count for all the devices in the dev_set
2408 * before reset and decrement the same after reset.
2409 */
2410 ret = vfio_pci_dev_set_pm_runtime_get(dev_set);
2411 if (ret)
2412 goto err_unlock;
2413
2414 list_for_each_entry(vdev, &dev_set->device_list, vdev.dev_set_list) {
2415 bool owned;
2416
2417 /*
2418 * Test whether all the affected devices can be reset by the
2419 * user.
2420 *
2421 * If called from a group opened device and the user provides
2422 * a set of groups, all the devices in the dev_set should be
2423 * contained by the set of groups provided by the user.
2424 *
2425 * If called from a cdev opened device and the user provides
2426 * a zero-length array, all the devices in the dev_set must
2427 * be bound to the same iommufd_ctx as the input iommufd_ctx.
2428 * If there is any device that has not been bound to any
2429 * iommufd_ctx yet, check if its iommu_group has any device
2430 * bound to the input iommufd_ctx. Such devices can be
2431 * considered owned by the input iommufd_ctx as the device
2432 * cannot be owned by another iommufd_ctx when its iommu_group
2433 * is owned.
2434 *
2435 * Otherwise, reset is not allowed.
2436 */
2437 if (iommufd_ctx) {
2438 int devid = vfio_iommufd_get_dev_id(&vdev->vdev,
2439 iommufd_ctx);
2440
2441 owned = (devid > 0 || devid == -ENOENT);
2442 } else {
2443 owned = vfio_dev_in_groups(&vdev->vdev, groups);
2444 }
2445
2446 if (!owned) {
2447 ret = -EINVAL;
2448 break;
2449 }
2450
2451 /*
2452 * Take the memory write lock for each device and zap BAR
2453 * mappings to prevent the user accessing the device while in
2454 * reset. Locking multiple devices is prone to deadlock,
2455 * runaway and unwind if we hit contention.
2456 */
2457 if (!down_write_trylock(&vdev->memory_lock)) {
2458 ret = -EBUSY;
2459 break;
2460 }
2461
2462 vfio_pci_zap_bars(vdev);
2463 }
2464
2465 if (!list_entry_is_head(vdev,
2466 &dev_set->device_list, vdev.dev_set_list)) {
2467 vdev = list_prev_entry(vdev, vdev.dev_set_list);
2468 goto err_undo;
2469 }
2470
2471 /*
2472 * The pci_reset_bus() will reset all the devices in the bus.
2473 * The power state can be non-D0 for some of the devices in the bus.
2474 * For these devices, the pci_reset_bus() will internally set
2475 * the power state to D0 without vfio driver involvement.
2476 * For the devices which have NoSoftRst-, the reset function can
2477 * cause the PCI config space reset without restoring the original
2478 * state (saved locally in 'vdev->pm_save').
2479 */
2480 list_for_each_entry(vdev, &dev_set->device_list, vdev.dev_set_list)
2481 vfio_pci_set_power_state(vdev, PCI_D0);
2482
2483 ret = pci_reset_bus(pdev);
2484
2485 vdev = list_last_entry(&dev_set->device_list,
2486 struct vfio_pci_core_device, vdev.dev_set_list);
2487
2488 err_undo:
2489 list_for_each_entry_from_reverse(vdev, &dev_set->device_list,
2490 vdev.dev_set_list)
2491 up_write(&vdev->memory_lock);
2492
2493 list_for_each_entry(vdev, &dev_set->device_list, vdev.dev_set_list)
2494 pm_runtime_put(&vdev->pdev->dev);
2495
2496 err_unlock:
2497 mutex_unlock(&dev_set->lock);
2498 return ret;
2499 }
2500
vfio_pci_dev_set_needs_reset(struct vfio_device_set * dev_set)2501 static bool vfio_pci_dev_set_needs_reset(struct vfio_device_set *dev_set)
2502 {
2503 struct vfio_pci_core_device *cur;
2504 bool needs_reset = false;
2505
2506 /* No other VFIO device in the set can be open. */
2507 if (vfio_device_set_open_count(dev_set) > 1)
2508 return false;
2509
2510 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list)
2511 needs_reset |= cur->needs_reset;
2512 return needs_reset;
2513 }
2514
2515 /*
2516 * If a bus or slot reset is available for the provided dev_set and:
2517 * - All of the devices affected by that bus or slot reset are unused
2518 * - At least one of the affected devices is marked dirty via
2519 * needs_reset (such as by lack of FLR support)
2520 * Then attempt to perform that bus or slot reset.
2521 */
vfio_pci_dev_set_try_reset(struct vfio_device_set * dev_set)2522 static void vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set)
2523 {
2524 struct vfio_pci_core_device *cur;
2525 struct pci_dev *pdev;
2526 bool reset_done = false;
2527
2528 if (!vfio_pci_dev_set_needs_reset(dev_set))
2529 return;
2530
2531 pdev = vfio_pci_dev_set_resettable(dev_set);
2532 if (!pdev)
2533 return;
2534
2535 /*
2536 * Some of the devices in the bus can be in the runtime suspended
2537 * state. Increment the usage count for all the devices in the dev_set
2538 * before reset and decrement the same after reset.
2539 */
2540 if (!disable_idle_d3 && vfio_pci_dev_set_pm_runtime_get(dev_set))
2541 return;
2542
2543 if (!pci_reset_bus(pdev))
2544 reset_done = true;
2545
2546 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list) {
2547 if (reset_done)
2548 cur->needs_reset = false;
2549
2550 if (!disable_idle_d3)
2551 pm_runtime_put(&cur->pdev->dev);
2552 }
2553 }
2554
vfio_pci_core_set_params(bool is_nointxmask,bool is_disable_vga,bool is_disable_idle_d3)2555 void vfio_pci_core_set_params(bool is_nointxmask, bool is_disable_vga,
2556 bool is_disable_idle_d3)
2557 {
2558 nointxmask = is_nointxmask;
2559 disable_vga = is_disable_vga;
2560 disable_idle_d3 = is_disable_idle_d3;
2561 }
2562 EXPORT_SYMBOL_GPL(vfio_pci_core_set_params);
2563
vfio_pci_core_cleanup(void)2564 static void vfio_pci_core_cleanup(void)
2565 {
2566 vfio_pci_uninit_perm_bits();
2567 }
2568
vfio_pci_core_init(void)2569 static int __init vfio_pci_core_init(void)
2570 {
2571 /* Allocate shared config space permission data used by all devices */
2572 return vfio_pci_init_perm_bits();
2573 }
2574
2575 module_init(vfio_pci_core_init);
2576 module_exit(vfio_pci_core_cleanup);
2577
2578 MODULE_LICENSE("GPL v2");
2579 MODULE_AUTHOR(DRIVER_AUTHOR);
2580 MODULE_DESCRIPTION(DRIVER_DESC);
2581