1 // SPDX-License-Identifier: GPL-2.0-only
2 /* linux/drivers/video/sm501fb.c
3 *
4 * Copyright (c) 2006 Simtec Electronics
5 * Vincent Sanders <vince@simtec.co.uk>
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * Framebuffer driver for the Silicon Motion SM501
9 */
10
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/errno.h>
14 #include <linux/string.h>
15 #include <linux/mm.h>
16 #include <linux/tty.h>
17 #include <linux/slab.h>
18 #include <linux/delay.h>
19 #include <linux/fb.h>
20 #include <linux/init.h>
21 #include <linux/vmalloc.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/interrupt.h>
24 #include <linux/workqueue.h>
25 #include <linux/wait.h>
26 #include <linux/platform_device.h>
27 #include <linux/clk.h>
28 #include <linux/console.h>
29 #include <linux/io.h>
30
31 #include <linux/uaccess.h>
32 #include <asm/div64.h>
33
34 #ifdef CONFIG_PM
35 #include <linux/pm.h>
36 #endif
37
38 #include <linux/sm501.h>
39 #include <linux/sm501-regs.h>
40
41 #include "edid.h"
42
43 static char *fb_mode = "640x480-16@60";
44 static unsigned long default_bpp = 16;
45
46 static const struct fb_videomode sm501_default_mode = {
47 .refresh = 60,
48 .xres = 640,
49 .yres = 480,
50 .pixclock = 20833,
51 .left_margin = 142,
52 .right_margin = 13,
53 .upper_margin = 21,
54 .lower_margin = 1,
55 .hsync_len = 69,
56 .vsync_len = 3,
57 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
58 .vmode = FB_VMODE_NONINTERLACED
59 };
60
61 #define NR_PALETTE 256
62
63 enum sm501_controller {
64 HEAD_CRT = 0,
65 HEAD_PANEL = 1,
66 };
67
68 /* SM501 memory address.
69 *
70 * This structure is used to track memory usage within the SM501 framebuffer
71 * allocation. The sm_addr field is stored as an offset as it is often used
72 * against both the physical and mapped addresses.
73 */
74 struct sm501_mem {
75 unsigned long size;
76 unsigned long sm_addr; /* offset from base of sm501 fb. */
77 void __iomem *k_addr;
78 };
79
80 /* private data that is shared between all frambuffers* */
81 struct sm501fb_info {
82 struct device *dev;
83 struct fb_info *fb[2]; /* fb info for both heads */
84 struct resource *fbmem_res; /* framebuffer resource */
85 struct resource *regs_res; /* registers resource */
86 struct resource *regs2d_res; /* 2d registers resource */
87 struct sm501_platdata_fb *pdata; /* our platform data */
88
89 unsigned long pm_crt_ctrl; /* pm: crt ctrl save */
90
91 int irq;
92 int swap_endian; /* set to swap rgb=>bgr */
93 void __iomem *regs; /* remapped registers */
94 void __iomem *regs2d; /* 2d remapped registers */
95 void __iomem *fbmem; /* remapped framebuffer */
96 size_t fbmem_len; /* length of remapped region */
97 u8 *edid_data;
98 };
99
100 /* per-framebuffer private data */
101 struct sm501fb_par {
102 u32 pseudo_palette[16];
103
104 enum sm501_controller head;
105 struct sm501_mem cursor;
106 struct sm501_mem screen;
107 struct fb_ops ops;
108
109 void *store_fb;
110 void *store_cursor;
111 void __iomem *cursor_regs;
112 struct sm501fb_info *info;
113 };
114
115 /* Helper functions */
116
h_total(struct fb_var_screeninfo * var)117 static inline int h_total(struct fb_var_screeninfo *var)
118 {
119 return var->xres + var->left_margin +
120 var->right_margin + var->hsync_len;
121 }
122
v_total(struct fb_var_screeninfo * var)123 static inline int v_total(struct fb_var_screeninfo *var)
124 {
125 return var->yres + var->upper_margin +
126 var->lower_margin + var->vsync_len;
127 }
128
129 /* sm501fb_sync_regs()
130 *
131 * This call is mainly for PCI bus systems where we need to
132 * ensure that any writes to the bus are completed before the
133 * next phase, or after completing a function.
134 */
135
sm501fb_sync_regs(struct sm501fb_info * info)136 static inline void sm501fb_sync_regs(struct sm501fb_info *info)
137 {
138 smc501_readl(info->regs);
139 }
140
141 /* sm501_alloc_mem
142 *
143 * This is an attempt to lay out memory for the two framebuffers and
144 * everything else
145 *
146 * |fbmem_res->start fbmem_res->end|
147 * | |
148 * |fb[0].fix.smem_start | |fb[1].fix.smem_start | 2K |
149 * |-> fb[0].fix.smem_len <-| spare |-> fb[1].fix.smem_len <-|-> cursors <-|
150 *
151 * The "spare" space is for the 2d engine data
152 * the fixed is space for the cursors (2x1Kbyte)
153 *
154 * we need to allocate memory for the 2D acceleration engine
155 * command list and the data for the engine to deal with.
156 *
157 * - all allocations must be 128bit aligned
158 * - cursors are 64x64x2 bits (1Kbyte)
159 *
160 */
161
162 #define SM501_MEMF_CURSOR (1)
163 #define SM501_MEMF_PANEL (2)
164 #define SM501_MEMF_CRT (4)
165 #define SM501_MEMF_ACCEL (8)
166
sm501_alloc_mem(struct sm501fb_info * inf,struct sm501_mem * mem,unsigned int why,size_t size,u32 smem_len)167 static int sm501_alloc_mem(struct sm501fb_info *inf, struct sm501_mem *mem,
168 unsigned int why, size_t size, u32 smem_len)
169 {
170 struct sm501fb_par *par;
171 struct fb_info *fbi;
172 unsigned int ptr;
173 unsigned int end;
174
175 switch (why) {
176 case SM501_MEMF_CURSOR:
177 ptr = inf->fbmem_len - size;
178 inf->fbmem_len = ptr; /* adjust available memory. */
179 break;
180
181 case SM501_MEMF_PANEL:
182 if (size > inf->fbmem_len)
183 return -ENOMEM;
184
185 ptr = inf->fbmem_len - size;
186 fbi = inf->fb[HEAD_CRT];
187
188 /* round down, some programs such as directfb do not draw
189 * 0,0 correctly unless the start is aligned to a page start.
190 */
191
192 if (ptr > 0)
193 ptr &= ~(PAGE_SIZE - 1);
194
195 if (fbi && ptr < smem_len)
196 return -ENOMEM;
197
198 break;
199
200 case SM501_MEMF_CRT:
201 ptr = 0;
202
203 /* check to see if we have panel memory allocated
204 * which would put an limit on available memory. */
205
206 fbi = inf->fb[HEAD_PANEL];
207 if (fbi) {
208 par = fbi->par;
209 end = par->screen.k_addr ? par->screen.sm_addr : inf->fbmem_len;
210 } else
211 end = inf->fbmem_len;
212
213 if ((ptr + size) > end)
214 return -ENOMEM;
215
216 break;
217
218 case SM501_MEMF_ACCEL:
219 fbi = inf->fb[HEAD_CRT];
220 ptr = fbi ? smem_len : 0;
221
222 fbi = inf->fb[HEAD_PANEL];
223 if (fbi) {
224 par = fbi->par;
225 end = par->screen.sm_addr;
226 } else
227 end = inf->fbmem_len;
228
229 if ((ptr + size) > end)
230 return -ENOMEM;
231
232 break;
233
234 default:
235 return -EINVAL;
236 }
237
238 mem->size = size;
239 mem->sm_addr = ptr;
240 mem->k_addr = inf->fbmem + ptr;
241
242 dev_dbg(inf->dev, "%s: result %08lx, %p - %u, %zd\n",
243 __func__, mem->sm_addr, mem->k_addr, why, size);
244
245 return 0;
246 }
247
248 /* sm501fb_ps_to_hz
249 *
250 * Converts a period in picoseconds to Hz.
251 *
252 * Note, we try to keep this in Hz to minimise rounding with
253 * the limited PLL settings on the SM501.
254 */
255
sm501fb_ps_to_hz(unsigned long psvalue)256 static unsigned long sm501fb_ps_to_hz(unsigned long psvalue)
257 {
258 unsigned long long numerator=1000000000000ULL;
259
260 /* 10^12 / picosecond period gives frequency in Hz */
261 do_div(numerator, psvalue);
262 return (unsigned long)numerator;
263 }
264
265 /* sm501fb_hz_to_ps is identical to the opposite transform */
266
267 #define sm501fb_hz_to_ps(x) sm501fb_ps_to_hz(x)
268
269 /* sm501fb_setup_gamma
270 *
271 * Programs a linear 1.0 gamma ramp in case the gamma
272 * correction is enabled without programming anything else.
273 */
274
sm501fb_setup_gamma(struct sm501fb_info * fbi,unsigned long palette)275 static void sm501fb_setup_gamma(struct sm501fb_info *fbi,
276 unsigned long palette)
277 {
278 unsigned long value = 0;
279 int offset;
280
281 /* set gamma values */
282 for (offset = 0; offset < 256 * 4; offset += 4) {
283 smc501_writel(value, fbi->regs + palette + offset);
284 value += 0x010101; /* Advance RGB by 1,1,1.*/
285 }
286 }
287
288 /* sm501fb_check_var
289 *
290 * check common variables for both panel and crt
291 */
292
sm501fb_check_var(struct fb_var_screeninfo * var,struct fb_info * info)293 static int sm501fb_check_var(struct fb_var_screeninfo *var,
294 struct fb_info *info)
295 {
296 struct sm501fb_par *par = info->par;
297 struct sm501fb_info *sm = par->info;
298 unsigned long tmp;
299
300 /* check we can fit these values into the registers */
301
302 if (var->hsync_len > 255 || var->vsync_len > 63)
303 return -EINVAL;
304
305 /* hdisplay end and hsync start */
306 if ((var->xres + var->right_margin) > 4096)
307 return -EINVAL;
308
309 /* vdisplay end and vsync start */
310 if ((var->yres + var->lower_margin) > 2048)
311 return -EINVAL;
312
313 /* hard limits of device */
314
315 if (h_total(var) > 4096 || v_total(var) > 2048)
316 return -EINVAL;
317
318 /* check our line length is going to be 128 bit aligned */
319
320 tmp = (var->xres * var->bits_per_pixel) / 8;
321 if ((tmp & 15) != 0)
322 return -EINVAL;
323
324 /* check the virtual size */
325
326 if (var->xres_virtual > 4096 || var->yres_virtual > 2048)
327 return -EINVAL;
328
329 /* geometry sanity checks */
330 if (var->xres + var->xoffset > var->xres_virtual)
331 return -EINVAL;
332
333 if (var->yres + var->yoffset > var->yres_virtual)
334 return -EINVAL;
335
336 /* can cope with 8,16 or 32bpp */
337
338 if (var->bits_per_pixel <= 8)
339 var->bits_per_pixel = 8;
340 else if (var->bits_per_pixel <= 16)
341 var->bits_per_pixel = 16;
342 else if (var->bits_per_pixel == 24)
343 var->bits_per_pixel = 32;
344
345 /* set r/g/b positions and validate bpp */
346 switch(var->bits_per_pixel) {
347 case 8:
348 var->red.length = var->bits_per_pixel;
349 var->red.offset = 0;
350 var->green.length = var->bits_per_pixel;
351 var->green.offset = 0;
352 var->blue.length = var->bits_per_pixel;
353 var->blue.offset = 0;
354 var->transp.length = 0;
355 var->transp.offset = 0;
356
357 break;
358
359 case 16:
360 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
361 var->blue.offset = 11;
362 var->green.offset = 5;
363 var->red.offset = 0;
364 } else {
365 var->red.offset = 11;
366 var->green.offset = 5;
367 var->blue.offset = 0;
368 }
369 var->transp.offset = 0;
370
371 var->red.length = 5;
372 var->green.length = 6;
373 var->blue.length = 5;
374 var->transp.length = 0;
375 break;
376
377 case 32:
378 if (sm->pdata->flags & SM501_FBPD_SWAP_FB_ENDIAN) {
379 var->transp.offset = 0;
380 var->red.offset = 8;
381 var->green.offset = 16;
382 var->blue.offset = 24;
383 } else {
384 var->transp.offset = 24;
385 var->red.offset = 16;
386 var->green.offset = 8;
387 var->blue.offset = 0;
388 }
389
390 var->red.length = 8;
391 var->green.length = 8;
392 var->blue.length = 8;
393 var->transp.length = 0;
394 break;
395
396 default:
397 return -EINVAL;
398 }
399
400 return 0;
401 }
402
403 /*
404 * sm501fb_check_var_crt():
405 *
406 * check the parameters for the CRT head, and either bring them
407 * back into range, or return -EINVAL.
408 */
409
sm501fb_check_var_crt(struct fb_var_screeninfo * var,struct fb_info * info)410 static int sm501fb_check_var_crt(struct fb_var_screeninfo *var,
411 struct fb_info *info)
412 {
413 return sm501fb_check_var(var, info);
414 }
415
416 /* sm501fb_check_var_pnl():
417 *
418 * check the parameters for the CRT head, and either bring them
419 * back into range, or return -EINVAL.
420 */
421
sm501fb_check_var_pnl(struct fb_var_screeninfo * var,struct fb_info * info)422 static int sm501fb_check_var_pnl(struct fb_var_screeninfo *var,
423 struct fb_info *info)
424 {
425 return sm501fb_check_var(var, info);
426 }
427
428 /* sm501fb_set_par_common
429 *
430 * set common registers for framebuffers
431 */
432
sm501fb_set_par_common(struct fb_info * info,struct fb_var_screeninfo * var)433 static int sm501fb_set_par_common(struct fb_info *info,
434 struct fb_var_screeninfo *var)
435 {
436 struct sm501fb_par *par = info->par;
437 struct sm501fb_info *fbi = par->info;
438 unsigned long pixclock; /* pixelclock in Hz */
439 unsigned long sm501pixclock; /* pixelclock the 501 can achieve in Hz */
440 unsigned int mem_type;
441 unsigned int clock_type;
442 unsigned int head_addr;
443 unsigned int smem_len;
444
445 dev_dbg(fbi->dev, "%s: %dx%d, bpp = %d, virtual %dx%d\n",
446 __func__, var->xres, var->yres, var->bits_per_pixel,
447 var->xres_virtual, var->yres_virtual);
448
449 switch (par->head) {
450 case HEAD_CRT:
451 mem_type = SM501_MEMF_CRT;
452 clock_type = SM501_CLOCK_V2XCLK;
453 head_addr = SM501_DC_CRT_FB_ADDR;
454 break;
455
456 case HEAD_PANEL:
457 mem_type = SM501_MEMF_PANEL;
458 clock_type = SM501_CLOCK_P2XCLK;
459 head_addr = SM501_DC_PANEL_FB_ADDR;
460 break;
461
462 default:
463 mem_type = 0; /* stop compiler warnings */
464 head_addr = 0;
465 clock_type = 0;
466 }
467
468 switch (var->bits_per_pixel) {
469 case 8:
470 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
471 break;
472
473 case 16:
474 info->fix.visual = FB_VISUAL_TRUECOLOR;
475 break;
476
477 case 32:
478 info->fix.visual = FB_VISUAL_TRUECOLOR;
479 break;
480 }
481
482 /* allocate fb memory within 501 */
483 info->fix.line_length = (var->xres_virtual * var->bits_per_pixel)/8;
484 smem_len = info->fix.line_length * var->yres_virtual;
485
486 dev_dbg(fbi->dev, "%s: line length = %u\n", __func__,
487 info->fix.line_length);
488
489 if (sm501_alloc_mem(fbi, &par->screen, mem_type, smem_len, smem_len)) {
490 dev_err(fbi->dev, "no memory available\n");
491 return -ENOMEM;
492 }
493
494 mutex_lock(&info->mm_lock);
495 info->fix.smem_start = fbi->fbmem_res->start + par->screen.sm_addr;
496 info->fix.smem_len = smem_len;
497 mutex_unlock(&info->mm_lock);
498
499 info->screen_base = fbi->fbmem + par->screen.sm_addr;
500 info->screen_size = info->fix.smem_len;
501
502 /* set start of framebuffer to the screen */
503
504 smc501_writel(par->screen.sm_addr | SM501_ADDR_FLIP,
505 fbi->regs + head_addr);
506
507 /* program CRT clock */
508
509 pixclock = sm501fb_ps_to_hz(var->pixclock);
510
511 sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type,
512 pixclock);
513
514 /* update fb layer with actual clock used */
515 var->pixclock = sm501fb_hz_to_ps(sm501pixclock);
516
517 dev_dbg(fbi->dev, "%s: pixclock(ps) = %u, pixclock(Hz) = %lu, "
518 "sm501pixclock = %lu, error = %ld%%\n",
519 __func__, var->pixclock, pixclock, sm501pixclock,
520 ((pixclock - sm501pixclock)*100)/pixclock);
521
522 return 0;
523 }
524
525 /* sm501fb_set_par_geometry
526 *
527 * set the geometry registers for specified framebuffer.
528 */
529
sm501fb_set_par_geometry(struct fb_info * info,struct fb_var_screeninfo * var)530 static void sm501fb_set_par_geometry(struct fb_info *info,
531 struct fb_var_screeninfo *var)
532 {
533 struct sm501fb_par *par = info->par;
534 struct sm501fb_info *fbi = par->info;
535 void __iomem *base = fbi->regs;
536 unsigned long reg;
537
538 if (par->head == HEAD_CRT)
539 base += SM501_DC_CRT_H_TOT;
540 else
541 base += SM501_DC_PANEL_H_TOT;
542
543 /* set framebuffer width and display width */
544
545 reg = info->fix.line_length;
546 reg |= ((var->xres * var->bits_per_pixel)/8) << 16;
547
548 smc501_writel(reg, fbi->regs + (par->head == HEAD_CRT ?
549 SM501_DC_CRT_FB_OFFSET : SM501_DC_PANEL_FB_OFFSET));
550
551 /* program horizontal total */
552
553 reg = (h_total(var) - 1) << 16;
554 reg |= (var->xres - 1);
555
556 smc501_writel(reg, base + SM501_OFF_DC_H_TOT);
557
558 /* program horizontal sync */
559
560 reg = var->hsync_len << 16;
561 reg |= var->xres + var->right_margin - 1;
562
563 smc501_writel(reg, base + SM501_OFF_DC_H_SYNC);
564
565 /* program vertical total */
566
567 reg = (v_total(var) - 1) << 16;
568 reg |= (var->yres - 1);
569
570 smc501_writel(reg, base + SM501_OFF_DC_V_TOT);
571
572 /* program vertical sync */
573 reg = var->vsync_len << 16;
574 reg |= var->yres + var->lower_margin - 1;
575
576 smc501_writel(reg, base + SM501_OFF_DC_V_SYNC);
577 }
578
579 /* sm501fb_pan_crt
580 *
581 * pan the CRT display output within an virtual framebuffer
582 */
583
sm501fb_pan_crt(struct fb_var_screeninfo * var,struct fb_info * info)584 static int sm501fb_pan_crt(struct fb_var_screeninfo *var,
585 struct fb_info *info)
586 {
587 struct sm501fb_par *par = info->par;
588 struct sm501fb_info *fbi = par->info;
589 unsigned int bytes_pixel = info->var.bits_per_pixel / 8;
590 unsigned long reg;
591 unsigned long xoffs;
592
593 xoffs = var->xoffset * bytes_pixel;
594
595 reg = smc501_readl(fbi->regs + SM501_DC_CRT_CONTROL);
596
597 reg &= ~SM501_DC_CRT_CONTROL_PIXEL_MASK;
598 reg |= ((xoffs & 15) / bytes_pixel) << 4;
599 smc501_writel(reg, fbi->regs + SM501_DC_CRT_CONTROL);
600
601 reg = (par->screen.sm_addr + xoffs +
602 var->yoffset * info->fix.line_length);
603 smc501_writel(reg | SM501_ADDR_FLIP, fbi->regs + SM501_DC_CRT_FB_ADDR);
604
605 sm501fb_sync_regs(fbi);
606 return 0;
607 }
608
609 /* sm501fb_pan_pnl
610 *
611 * pan the panel display output within an virtual framebuffer
612 */
613
sm501fb_pan_pnl(struct fb_var_screeninfo * var,struct fb_info * info)614 static int sm501fb_pan_pnl(struct fb_var_screeninfo *var,
615 struct fb_info *info)
616 {
617 struct sm501fb_par *par = info->par;
618 struct sm501fb_info *fbi = par->info;
619 unsigned long reg;
620
621 reg = var->xoffset | (info->var.xres_virtual << 16);
622 smc501_writel(reg, fbi->regs + SM501_DC_PANEL_FB_WIDTH);
623
624 reg = var->yoffset | (info->var.yres_virtual << 16);
625 smc501_writel(reg, fbi->regs + SM501_DC_PANEL_FB_HEIGHT);
626
627 sm501fb_sync_regs(fbi);
628 return 0;
629 }
630
631 /* sm501fb_set_par_crt
632 *
633 * Set the CRT video mode from the fb_info structure
634 */
635
sm501fb_set_par_crt(struct fb_info * info)636 static int sm501fb_set_par_crt(struct fb_info *info)
637 {
638 struct sm501fb_par *par = info->par;
639 struct sm501fb_info *fbi = par->info;
640 struct fb_var_screeninfo *var = &info->var;
641 unsigned long control; /* control register */
642 int ret;
643
644 /* activate new configuration */
645
646 dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
647
648 /* enable CRT DAC - note 0 is on!*/
649 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
650
651 control = smc501_readl(fbi->regs + SM501_DC_CRT_CONTROL);
652
653 control &= (SM501_DC_CRT_CONTROL_PIXEL_MASK |
654 SM501_DC_CRT_CONTROL_GAMMA |
655 SM501_DC_CRT_CONTROL_BLANK |
656 SM501_DC_CRT_CONTROL_SEL |
657 SM501_DC_CRT_CONTROL_CP |
658 SM501_DC_CRT_CONTROL_TVP);
659
660 /* set the sync polarities before we check data source */
661
662 if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
663 control |= SM501_DC_CRT_CONTROL_HSP;
664
665 if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
666 control |= SM501_DC_CRT_CONTROL_VSP;
667
668 if ((control & SM501_DC_CRT_CONTROL_SEL) == 0) {
669 /* the head is displaying panel data... */
670
671 sm501_alloc_mem(fbi, &par->screen, SM501_MEMF_CRT, 0,
672 info->fix.smem_len);
673 goto out_update;
674 }
675
676 ret = sm501fb_set_par_common(info, var);
677 if (ret) {
678 dev_err(fbi->dev, "failed to set common parameters\n");
679 return ret;
680 }
681
682 sm501fb_pan_crt(var, info);
683 sm501fb_set_par_geometry(info, var);
684
685 control |= SM501_FIFO_3; /* fill if >3 free slots */
686
687 switch(var->bits_per_pixel) {
688 case 8:
689 control |= SM501_DC_CRT_CONTROL_8BPP;
690 break;
691
692 case 16:
693 control |= SM501_DC_CRT_CONTROL_16BPP;
694 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
695 break;
696
697 case 32:
698 control |= SM501_DC_CRT_CONTROL_32BPP;
699 sm501fb_setup_gamma(fbi, SM501_DC_CRT_PALETTE);
700 break;
701
702 default:
703 BUG();
704 }
705
706 control |= SM501_DC_CRT_CONTROL_SEL; /* CRT displays CRT data */
707 control |= SM501_DC_CRT_CONTROL_TE; /* enable CRT timing */
708 control |= SM501_DC_CRT_CONTROL_ENABLE; /* enable CRT plane */
709
710 out_update:
711 dev_dbg(fbi->dev, "new control is %08lx\n", control);
712
713 smc501_writel(control, fbi->regs + SM501_DC_CRT_CONTROL);
714 sm501fb_sync_regs(fbi);
715
716 return 0;
717 }
718
sm501fb_panel_power(struct sm501fb_info * fbi,int to)719 static void sm501fb_panel_power(struct sm501fb_info *fbi, int to)
720 {
721 unsigned long control;
722 void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL;
723 struct sm501_platdata_fbsub *pd = fbi->pdata->fb_pnl;
724
725 control = smc501_readl(ctrl_reg);
726
727 if (to && (control & SM501_DC_PANEL_CONTROL_VDD) == 0) {
728 /* enable panel power */
729
730 control |= SM501_DC_PANEL_CONTROL_VDD; /* FPVDDEN */
731 smc501_writel(control, ctrl_reg);
732 sm501fb_sync_regs(fbi);
733 mdelay(10);
734
735 control |= SM501_DC_PANEL_CONTROL_DATA; /* DATA */
736 smc501_writel(control, ctrl_reg);
737 sm501fb_sync_regs(fbi);
738 mdelay(10);
739
740 /* VBIASEN */
741
742 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_VBIASEN)) {
743 if (pd->flags & SM501FB_FLAG_PANEL_INV_VBIASEN)
744 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
745 else
746 control |= SM501_DC_PANEL_CONTROL_BIAS;
747
748 smc501_writel(control, ctrl_reg);
749 sm501fb_sync_regs(fbi);
750 mdelay(10);
751 }
752
753 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_FPEN)) {
754 if (pd->flags & SM501FB_FLAG_PANEL_INV_FPEN)
755 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
756 else
757 control |= SM501_DC_PANEL_CONTROL_FPEN;
758
759 smc501_writel(control, ctrl_reg);
760 sm501fb_sync_regs(fbi);
761 mdelay(10);
762 }
763 } else if (!to && (control & SM501_DC_PANEL_CONTROL_VDD) != 0) {
764 /* disable panel power */
765 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_FPEN)) {
766 if (pd->flags & SM501FB_FLAG_PANEL_INV_FPEN)
767 control |= SM501_DC_PANEL_CONTROL_FPEN;
768 else
769 control &= ~SM501_DC_PANEL_CONTROL_FPEN;
770
771 smc501_writel(control, ctrl_reg);
772 sm501fb_sync_regs(fbi);
773 mdelay(10);
774 }
775
776 if (!(pd->flags & SM501FB_FLAG_PANEL_NO_VBIASEN)) {
777 if (pd->flags & SM501FB_FLAG_PANEL_INV_VBIASEN)
778 control |= SM501_DC_PANEL_CONTROL_BIAS;
779 else
780 control &= ~SM501_DC_PANEL_CONTROL_BIAS;
781
782 smc501_writel(control, ctrl_reg);
783 sm501fb_sync_regs(fbi);
784 mdelay(10);
785 }
786
787 control &= ~SM501_DC_PANEL_CONTROL_DATA;
788 smc501_writel(control, ctrl_reg);
789 sm501fb_sync_regs(fbi);
790 mdelay(10);
791
792 control &= ~SM501_DC_PANEL_CONTROL_VDD;
793 smc501_writel(control, ctrl_reg);
794 sm501fb_sync_regs(fbi);
795 mdelay(10);
796 }
797
798 sm501fb_sync_regs(fbi);
799 }
800
801 /* sm501fb_set_par_pnl
802 *
803 * Set the panel video mode from the fb_info structure
804 */
805
sm501fb_set_par_pnl(struct fb_info * info)806 static int sm501fb_set_par_pnl(struct fb_info *info)
807 {
808 struct sm501fb_par *par = info->par;
809 struct sm501fb_info *fbi = par->info;
810 struct fb_var_screeninfo *var = &info->var;
811 unsigned long control;
812 unsigned long reg;
813 int ret;
814
815 dev_dbg(fbi->dev, "%s(%p)\n", __func__, info);
816
817 /* activate this new configuration */
818
819 ret = sm501fb_set_par_common(info, var);
820 if (ret)
821 return ret;
822
823 sm501fb_pan_pnl(var, info);
824 sm501fb_set_par_geometry(info, var);
825
826 /* update control register */
827
828 control = smc501_readl(fbi->regs + SM501_DC_PANEL_CONTROL);
829 control &= (SM501_DC_PANEL_CONTROL_GAMMA |
830 SM501_DC_PANEL_CONTROL_VDD |
831 SM501_DC_PANEL_CONTROL_DATA |
832 SM501_DC_PANEL_CONTROL_BIAS |
833 SM501_DC_PANEL_CONTROL_FPEN |
834 SM501_DC_PANEL_CONTROL_CP |
835 SM501_DC_PANEL_CONTROL_CK |
836 SM501_DC_PANEL_CONTROL_HP |
837 SM501_DC_PANEL_CONTROL_VP |
838 SM501_DC_PANEL_CONTROL_HPD |
839 SM501_DC_PANEL_CONTROL_VPD);
840
841 control |= SM501_FIFO_3; /* fill if >3 free slots */
842
843 switch(var->bits_per_pixel) {
844 case 8:
845 control |= SM501_DC_PANEL_CONTROL_8BPP;
846 break;
847
848 case 16:
849 control |= SM501_DC_PANEL_CONTROL_16BPP;
850 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
851 break;
852
853 case 32:
854 control |= SM501_DC_PANEL_CONTROL_32BPP;
855 sm501fb_setup_gamma(fbi, SM501_DC_PANEL_PALETTE);
856 break;
857
858 default:
859 BUG();
860 }
861
862 smc501_writel(0x0, fbi->regs + SM501_DC_PANEL_PANNING_CONTROL);
863
864 /* panel plane top left and bottom right location */
865
866 smc501_writel(0x00, fbi->regs + SM501_DC_PANEL_TL_LOC);
867
868 reg = var->xres - 1;
869 reg |= (var->yres - 1) << 16;
870
871 smc501_writel(reg, fbi->regs + SM501_DC_PANEL_BR_LOC);
872
873 /* program panel control register */
874
875 control |= SM501_DC_PANEL_CONTROL_TE; /* enable PANEL timing */
876 control |= SM501_DC_PANEL_CONTROL_EN; /* enable PANEL gfx plane */
877
878 if ((var->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
879 control |= SM501_DC_PANEL_CONTROL_HSP;
880
881 if ((var->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
882 control |= SM501_DC_PANEL_CONTROL_VSP;
883
884 smc501_writel(control, fbi->regs + SM501_DC_PANEL_CONTROL);
885 sm501fb_sync_regs(fbi);
886
887 /* ensure the panel interface is not tristated at this point */
888
889 sm501_modify_reg(fbi->dev->parent, SM501_SYSTEM_CONTROL,
890 0, SM501_SYSCTRL_PANEL_TRISTATE);
891
892 /* power the panel up */
893 sm501fb_panel_power(fbi, 1);
894 return 0;
895 }
896
897
898 /* chan_to_field
899 *
900 * convert a colour value into a field position
901 *
902 * from pxafb.c
903 */
904
chan_to_field(unsigned int chan,struct fb_bitfield * bf)905 static inline unsigned int chan_to_field(unsigned int chan,
906 struct fb_bitfield *bf)
907 {
908 chan &= 0xffff;
909 chan >>= 16 - bf->length;
910 return chan << bf->offset;
911 }
912
913 /* sm501fb_setcolreg
914 *
915 * set the colour mapping for modes that support palettised data
916 */
917
sm501fb_setcolreg(unsigned regno,unsigned red,unsigned green,unsigned blue,unsigned transp,struct fb_info * info)918 static int sm501fb_setcolreg(unsigned regno,
919 unsigned red, unsigned green, unsigned blue,
920 unsigned transp, struct fb_info *info)
921 {
922 struct sm501fb_par *par = info->par;
923 struct sm501fb_info *fbi = par->info;
924 void __iomem *base = fbi->regs;
925 unsigned int val;
926
927 if (par->head == HEAD_CRT)
928 base += SM501_DC_CRT_PALETTE;
929 else
930 base += SM501_DC_PANEL_PALETTE;
931
932 switch (info->fix.visual) {
933 case FB_VISUAL_TRUECOLOR:
934 /* true-colour, use pseuo-palette */
935
936 if (regno < 16) {
937 u32 *pal = par->pseudo_palette;
938
939 val = chan_to_field(red, &info->var.red);
940 val |= chan_to_field(green, &info->var.green);
941 val |= chan_to_field(blue, &info->var.blue);
942
943 pal[regno] = val;
944 }
945 break;
946
947 case FB_VISUAL_PSEUDOCOLOR:
948 if (regno < 256) {
949 val = (red >> 8) << 16;
950 val |= (green >> 8) << 8;
951 val |= blue >> 8;
952
953 smc501_writel(val, base + (regno * 4));
954 }
955
956 break;
957
958 default:
959 return 1; /* unknown type */
960 }
961
962 return 0;
963 }
964
965 /* sm501fb_blank_pnl
966 *
967 * Blank or un-blank the panel interface
968 */
969
sm501fb_blank_pnl(int blank_mode,struct fb_info * info)970 static int sm501fb_blank_pnl(int blank_mode, struct fb_info *info)
971 {
972 struct sm501fb_par *par = info->par;
973 struct sm501fb_info *fbi = par->info;
974
975 dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
976
977 switch (blank_mode) {
978 case FB_BLANK_POWERDOWN:
979 sm501fb_panel_power(fbi, 0);
980 break;
981
982 case FB_BLANK_UNBLANK:
983 sm501fb_panel_power(fbi, 1);
984 break;
985
986 case FB_BLANK_NORMAL:
987 case FB_BLANK_VSYNC_SUSPEND:
988 case FB_BLANK_HSYNC_SUSPEND:
989 default:
990 return 1;
991 }
992
993 return 0;
994 }
995
996 /* sm501fb_blank_crt
997 *
998 * Blank or un-blank the crt interface
999 */
1000
sm501fb_blank_crt(int blank_mode,struct fb_info * info)1001 static int sm501fb_blank_crt(int blank_mode, struct fb_info *info)
1002 {
1003 struct sm501fb_par *par = info->par;
1004 struct sm501fb_info *fbi = par->info;
1005 unsigned long ctrl;
1006
1007 dev_dbg(fbi->dev, "%s(mode=%d, %p)\n", __func__, blank_mode, info);
1008
1009 ctrl = smc501_readl(fbi->regs + SM501_DC_CRT_CONTROL);
1010
1011 switch (blank_mode) {
1012 case FB_BLANK_POWERDOWN:
1013 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1014 sm501_misc_control(fbi->dev->parent, SM501_MISC_DAC_POWER, 0);
1015 fallthrough;
1016
1017 case FB_BLANK_NORMAL:
1018 ctrl |= SM501_DC_CRT_CONTROL_BLANK;
1019 break;
1020
1021 case FB_BLANK_UNBLANK:
1022 ctrl &= ~SM501_DC_CRT_CONTROL_BLANK;
1023 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1024 sm501_misc_control(fbi->dev->parent, 0, SM501_MISC_DAC_POWER);
1025 break;
1026
1027 case FB_BLANK_VSYNC_SUSPEND:
1028 case FB_BLANK_HSYNC_SUSPEND:
1029 default:
1030 return 1;
1031
1032 }
1033
1034 smc501_writel(ctrl, fbi->regs + SM501_DC_CRT_CONTROL);
1035 sm501fb_sync_regs(fbi);
1036
1037 return 0;
1038 }
1039
1040 /* sm501fb_cursor
1041 *
1042 * set or change the hardware cursor parameters
1043 */
1044
sm501fb_cursor(struct fb_info * info,struct fb_cursor * cursor)1045 static int sm501fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1046 {
1047 struct sm501fb_par *par = info->par;
1048 struct sm501fb_info *fbi = par->info;
1049 void __iomem *base = fbi->regs;
1050 unsigned long hwc_addr;
1051 unsigned long fg, bg;
1052
1053 dev_dbg(fbi->dev, "%s(%p,%p)\n", __func__, info, cursor);
1054
1055 if (par->head == HEAD_CRT)
1056 base += SM501_DC_CRT_HWC_BASE;
1057 else
1058 base += SM501_DC_PANEL_HWC_BASE;
1059
1060 /* check not being asked to exceed capabilities */
1061
1062 if (cursor->image.width > 64)
1063 return -EINVAL;
1064
1065 if (cursor->image.height > 64)
1066 return -EINVAL;
1067
1068 if (cursor->image.depth > 1)
1069 return -EINVAL;
1070
1071 hwc_addr = smc501_readl(base + SM501_OFF_HWC_ADDR);
1072
1073 if (cursor->enable)
1074 smc501_writel(hwc_addr | SM501_HWC_EN,
1075 base + SM501_OFF_HWC_ADDR);
1076 else
1077 smc501_writel(hwc_addr & ~SM501_HWC_EN,
1078 base + SM501_OFF_HWC_ADDR);
1079
1080 /* set data */
1081 if (cursor->set & FB_CUR_SETPOS) {
1082 unsigned int x = cursor->image.dx;
1083 unsigned int y = cursor->image.dy;
1084
1085 if (x >= 2048 || y >= 2048 )
1086 return -EINVAL;
1087
1088 dev_dbg(fbi->dev, "set position %d,%d\n", x, y);
1089
1090 //y += cursor->image.height;
1091
1092 smc501_writel(x | (y << 16), base + SM501_OFF_HWC_LOC);
1093 }
1094
1095 if (cursor->set & FB_CUR_SETCMAP) {
1096 unsigned int bg_col = cursor->image.bg_color;
1097 unsigned int fg_col = cursor->image.fg_color;
1098
1099 dev_dbg(fbi->dev, "%s: update cmap (%08x,%08x)\n",
1100 __func__, bg_col, fg_col);
1101
1102 bg = ((info->cmap.red[bg_col] & 0xF8) << 8) |
1103 ((info->cmap.green[bg_col] & 0xFC) << 3) |
1104 ((info->cmap.blue[bg_col] & 0xF8) >> 3);
1105
1106 fg = ((info->cmap.red[fg_col] & 0xF8) << 8) |
1107 ((info->cmap.green[fg_col] & 0xFC) << 3) |
1108 ((info->cmap.blue[fg_col] & 0xF8) >> 3);
1109
1110 dev_dbg(fbi->dev, "fgcol %08lx, bgcol %08lx\n", fg, bg);
1111
1112 smc501_writel(bg, base + SM501_OFF_HWC_COLOR_1_2);
1113 smc501_writel(fg, base + SM501_OFF_HWC_COLOR_3);
1114 }
1115
1116 if (cursor->set & FB_CUR_SETSIZE ||
1117 cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1118 /* SM501 cursor is a two bpp 64x64 bitmap this routine
1119 * clears it to transparent then combines the cursor
1120 * shape plane with the colour plane to set the
1121 * cursor */
1122 int x, y;
1123 const unsigned char *pcol = cursor->image.data;
1124 const unsigned char *pmsk = cursor->mask;
1125 void __iomem *dst = par->cursor.k_addr;
1126 unsigned char dcol = 0;
1127 unsigned char dmsk = 0;
1128 unsigned int op;
1129
1130 dev_dbg(fbi->dev, "%s: setting shape (%d,%d)\n",
1131 __func__, cursor->image.width, cursor->image.height);
1132
1133 for (op = 0; op < (64*64*2)/8; op+=4)
1134 smc501_writel(0x0, dst + op);
1135
1136 for (y = 0; y < cursor->image.height; y++) {
1137 for (x = 0; x < cursor->image.width; x++) {
1138 if ((x % 8) == 0) {
1139 dcol = *pcol++;
1140 dmsk = *pmsk++;
1141 } else {
1142 dcol >>= 1;
1143 dmsk >>= 1;
1144 }
1145
1146 if (dmsk & 1) {
1147 op = (dcol & 1) ? 1 : 3;
1148 op <<= ((x % 4) * 2);
1149
1150 op |= readb(dst + (x / 4));
1151 writeb(op, dst + (x / 4));
1152 }
1153 }
1154 dst += (64*2)/8;
1155 }
1156 }
1157
1158 sm501fb_sync_regs(fbi); /* ensure cursor data flushed */
1159 return 0;
1160 }
1161
1162 /* sm501fb_crtsrc_show
1163 *
1164 * device attribute code to show where the crt output is sourced from
1165 */
1166
sm501fb_crtsrc_show(struct device * dev,struct device_attribute * attr,char * buf)1167 static ssize_t sm501fb_crtsrc_show(struct device *dev,
1168 struct device_attribute *attr, char *buf)
1169 {
1170 struct sm501fb_info *info = dev_get_drvdata(dev);
1171 unsigned long ctrl;
1172
1173 ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL);
1174 ctrl &= SM501_DC_CRT_CONTROL_SEL;
1175
1176 return sysfs_emit(buf, "%s\n", ctrl ? "crt" : "panel");
1177 }
1178
1179 /* sm501fb_crtsrc_show
1180 *
1181 * device attribute code to set where the crt output is sourced from
1182 */
1183
sm501fb_crtsrc_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)1184 static ssize_t sm501fb_crtsrc_store(struct device *dev,
1185 struct device_attribute *attr,
1186 const char *buf, size_t len)
1187 {
1188 struct sm501fb_info *info = dev_get_drvdata(dev);
1189 enum sm501_controller head;
1190 unsigned long ctrl;
1191
1192 if (len < 1)
1193 return -EINVAL;
1194
1195 if (strncasecmp(buf, "crt", 3) == 0)
1196 head = HEAD_CRT;
1197 else if (strncasecmp(buf, "panel", 5) == 0)
1198 head = HEAD_PANEL;
1199 else
1200 return -EINVAL;
1201
1202 dev_info(dev, "setting crt source to head %d\n", head);
1203
1204 ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL);
1205
1206 if (head == HEAD_CRT) {
1207 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1208 ctrl |= SM501_DC_CRT_CONTROL_ENABLE;
1209 ctrl |= SM501_DC_CRT_CONTROL_TE;
1210 } else {
1211 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1212 ctrl &= ~SM501_DC_CRT_CONTROL_ENABLE;
1213 ctrl &= ~SM501_DC_CRT_CONTROL_TE;
1214 }
1215
1216 smc501_writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1217 sm501fb_sync_regs(info);
1218
1219 return len;
1220 }
1221
1222 /* Prepare the device_attr for registration with sysfs later */
1223 static DEVICE_ATTR(crt_src, 0664, sm501fb_crtsrc_show, sm501fb_crtsrc_store);
1224
1225 /* sm501fb_show_regs
1226 *
1227 * show the primary sm501 registers
1228 */
sm501fb_show_regs(struct sm501fb_info * info,char * ptr,unsigned int start,unsigned int len)1229 static int sm501fb_show_regs(struct sm501fb_info *info, char *ptr,
1230 unsigned int start, unsigned int len)
1231 {
1232 void __iomem *mem = info->regs;
1233 char *buf = ptr;
1234 unsigned int reg;
1235
1236 for (reg = start; reg < (len + start); reg += 4)
1237 ptr += sprintf(ptr, "%08x = %08x\n", reg,
1238 smc501_readl(mem + reg));
1239
1240 return ptr - buf;
1241 }
1242
1243 /* sm501fb_debug_show_crt
1244 *
1245 * show the crt control and cursor registers
1246 */
1247
sm501fb_debug_show_crt(struct device * dev,struct device_attribute * attr,char * buf)1248 static ssize_t sm501fb_debug_show_crt(struct device *dev,
1249 struct device_attribute *attr, char *buf)
1250 {
1251 struct sm501fb_info *info = dev_get_drvdata(dev);
1252 char *ptr = buf;
1253
1254 ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_CONTROL, 0x40);
1255 ptr += sm501fb_show_regs(info, ptr, SM501_DC_CRT_HWC_BASE, 0x10);
1256
1257 return ptr - buf;
1258 }
1259
1260 static DEVICE_ATTR(fbregs_crt, 0444, sm501fb_debug_show_crt, NULL);
1261
1262 /* sm501fb_debug_show_pnl
1263 *
1264 * show the panel control and cursor registers
1265 */
1266
sm501fb_debug_show_pnl(struct device * dev,struct device_attribute * attr,char * buf)1267 static ssize_t sm501fb_debug_show_pnl(struct device *dev,
1268 struct device_attribute *attr, char *buf)
1269 {
1270 struct sm501fb_info *info = dev_get_drvdata(dev);
1271 char *ptr = buf;
1272
1273 ptr += sm501fb_show_regs(info, ptr, 0x0, 0x40);
1274 ptr += sm501fb_show_regs(info, ptr, SM501_DC_PANEL_HWC_BASE, 0x10);
1275
1276 return ptr - buf;
1277 }
1278
1279 static DEVICE_ATTR(fbregs_pnl, 0444, sm501fb_debug_show_pnl, NULL);
1280
1281 static struct attribute *sm501fb_attrs[] = {
1282 &dev_attr_crt_src.attr,
1283 &dev_attr_fbregs_pnl.attr,
1284 &dev_attr_fbregs_crt.attr,
1285 NULL,
1286 };
1287 ATTRIBUTE_GROUPS(sm501fb);
1288
1289 /* acceleration operations */
sm501fb_sync(struct fb_info * info)1290 static int sm501fb_sync(struct fb_info *info)
1291 {
1292 int count = 1000000;
1293 struct sm501fb_par *par = info->par;
1294 struct sm501fb_info *fbi = par->info;
1295
1296 /* wait for the 2d engine to be ready */
1297 while ((count > 0) &&
1298 (smc501_readl(fbi->regs + SM501_SYSTEM_CONTROL) &
1299 SM501_SYSCTRL_2D_ENGINE_STATUS) != 0)
1300 count--;
1301
1302 if (count <= 0) {
1303 fb_err(info, "Timeout waiting for 2d engine sync\n");
1304 return 1;
1305 }
1306 return 0;
1307 }
1308
sm501fb_copyarea(struct fb_info * info,const struct fb_copyarea * area)1309 static void sm501fb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1310 {
1311 struct sm501fb_par *par = info->par;
1312 struct sm501fb_info *fbi = par->info;
1313 int width = area->width;
1314 int height = area->height;
1315 int sx = area->sx;
1316 int sy = area->sy;
1317 int dx = area->dx;
1318 int dy = area->dy;
1319 unsigned long rtl = 0;
1320
1321 /* source clip */
1322 if ((sx >= info->var.xres_virtual) ||
1323 (sy >= info->var.yres_virtual))
1324 /* source Area not within virtual screen, skipping */
1325 return;
1326 if ((sx + width) >= info->var.xres_virtual)
1327 width = info->var.xres_virtual - sx - 1;
1328 if ((sy + height) >= info->var.yres_virtual)
1329 height = info->var.yres_virtual - sy - 1;
1330
1331 /* dest clip */
1332 if ((dx >= info->var.xres_virtual) ||
1333 (dy >= info->var.yres_virtual))
1334 /* Destination Area not within virtual screen, skipping */
1335 return;
1336 if ((dx + width) >= info->var.xres_virtual)
1337 width = info->var.xres_virtual - dx - 1;
1338 if ((dy + height) >= info->var.yres_virtual)
1339 height = info->var.yres_virtual - dy - 1;
1340
1341 if ((sx < dx) || (sy < dy)) {
1342 rtl = 1 << 27;
1343 sx += width - 1;
1344 dx += width - 1;
1345 sy += height - 1;
1346 dy += height - 1;
1347 }
1348
1349 if (sm501fb_sync(info))
1350 return;
1351
1352 /* set the base addresses */
1353 smc501_writel(par->screen.sm_addr, fbi->regs2d + SM501_2D_SOURCE_BASE);
1354 smc501_writel(par->screen.sm_addr,
1355 fbi->regs2d + SM501_2D_DESTINATION_BASE);
1356
1357 /* set the window width */
1358 smc501_writel((info->var.xres << 16) | info->var.xres,
1359 fbi->regs2d + SM501_2D_WINDOW_WIDTH);
1360
1361 /* set window stride */
1362 smc501_writel((info->var.xres_virtual << 16) | info->var.xres_virtual,
1363 fbi->regs2d + SM501_2D_PITCH);
1364
1365 /* set data format */
1366 switch (info->var.bits_per_pixel) {
1367 case 8:
1368 smc501_writel(0, fbi->regs2d + SM501_2D_STRETCH);
1369 break;
1370 case 16:
1371 smc501_writel(0x00100000, fbi->regs2d + SM501_2D_STRETCH);
1372 break;
1373 case 32:
1374 smc501_writel(0x00200000, fbi->regs2d + SM501_2D_STRETCH);
1375 break;
1376 }
1377
1378 /* 2d compare mask */
1379 smc501_writel(0xffffffff, fbi->regs2d + SM501_2D_COLOR_COMPARE_MASK);
1380
1381 /* 2d mask */
1382 smc501_writel(0xffffffff, fbi->regs2d + SM501_2D_MASK);
1383
1384 /* source and destination x y */
1385 smc501_writel((sx << 16) | sy, fbi->regs2d + SM501_2D_SOURCE);
1386 smc501_writel((dx << 16) | dy, fbi->regs2d + SM501_2D_DESTINATION);
1387
1388 /* w/h */
1389 smc501_writel((width << 16) | height, fbi->regs2d + SM501_2D_DIMENSION);
1390
1391 /* do area move */
1392 smc501_writel(0x800000cc | rtl, fbi->regs2d + SM501_2D_CONTROL);
1393 }
1394
sm501fb_fillrect(struct fb_info * info,const struct fb_fillrect * rect)1395 static void sm501fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1396 {
1397 struct sm501fb_par *par = info->par;
1398 struct sm501fb_info *fbi = par->info;
1399 int width = rect->width, height = rect->height;
1400
1401 if ((rect->dx >= info->var.xres_virtual) ||
1402 (rect->dy >= info->var.yres_virtual))
1403 /* Rectangle not within virtual screen, skipping */
1404 return;
1405 if ((rect->dx + width) >= info->var.xres_virtual)
1406 width = info->var.xres_virtual - rect->dx - 1;
1407 if ((rect->dy + height) >= info->var.yres_virtual)
1408 height = info->var.yres_virtual - rect->dy - 1;
1409
1410 if (sm501fb_sync(info))
1411 return;
1412
1413 /* set the base addresses */
1414 smc501_writel(par->screen.sm_addr, fbi->regs2d + SM501_2D_SOURCE_BASE);
1415 smc501_writel(par->screen.sm_addr,
1416 fbi->regs2d + SM501_2D_DESTINATION_BASE);
1417
1418 /* set the window width */
1419 smc501_writel((info->var.xres << 16) | info->var.xres,
1420 fbi->regs2d + SM501_2D_WINDOW_WIDTH);
1421
1422 /* set window stride */
1423 smc501_writel((info->var.xres_virtual << 16) | info->var.xres_virtual,
1424 fbi->regs2d + SM501_2D_PITCH);
1425
1426 /* set data format */
1427 switch (info->var.bits_per_pixel) {
1428 case 8:
1429 smc501_writel(0, fbi->regs2d + SM501_2D_STRETCH);
1430 break;
1431 case 16:
1432 smc501_writel(0x00100000, fbi->regs2d + SM501_2D_STRETCH);
1433 break;
1434 case 32:
1435 smc501_writel(0x00200000, fbi->regs2d + SM501_2D_STRETCH);
1436 break;
1437 }
1438
1439 /* 2d compare mask */
1440 smc501_writel(0xffffffff, fbi->regs2d + SM501_2D_COLOR_COMPARE_MASK);
1441
1442 /* 2d mask */
1443 smc501_writel(0xffffffff, fbi->regs2d + SM501_2D_MASK);
1444
1445 /* colour */
1446 smc501_writel(rect->color, fbi->regs2d + SM501_2D_FOREGROUND);
1447
1448 /* x y */
1449 smc501_writel((rect->dx << 16) | rect->dy,
1450 fbi->regs2d + SM501_2D_DESTINATION);
1451
1452 /* w/h */
1453 smc501_writel((width << 16) | height, fbi->regs2d + SM501_2D_DIMENSION);
1454
1455 /* do rectangle fill */
1456 smc501_writel(0x800100cc, fbi->regs2d + SM501_2D_CONTROL);
1457 }
1458
1459
1460 static struct fb_ops sm501fb_ops_crt = {
1461 .owner = THIS_MODULE,
1462 __FB_DEFAULT_IOMEM_OPS_RDWR,
1463 .fb_check_var = sm501fb_check_var_crt,
1464 .fb_set_par = sm501fb_set_par_crt,
1465 .fb_blank = sm501fb_blank_crt,
1466 .fb_setcolreg = sm501fb_setcolreg,
1467 .fb_pan_display = sm501fb_pan_crt,
1468 .fb_cursor = sm501fb_cursor,
1469 .fb_fillrect = sm501fb_fillrect,
1470 .fb_copyarea = sm501fb_copyarea,
1471 .fb_imageblit = cfb_imageblit,
1472 .fb_sync = sm501fb_sync,
1473 __FB_DEFAULT_IOMEM_OPS_MMAP,
1474 };
1475
1476 static struct fb_ops sm501fb_ops_pnl = {
1477 .owner = THIS_MODULE,
1478 __FB_DEFAULT_IOMEM_OPS_RDWR,
1479 .fb_check_var = sm501fb_check_var_pnl,
1480 .fb_set_par = sm501fb_set_par_pnl,
1481 .fb_pan_display = sm501fb_pan_pnl,
1482 .fb_blank = sm501fb_blank_pnl,
1483 .fb_setcolreg = sm501fb_setcolreg,
1484 .fb_cursor = sm501fb_cursor,
1485 .fb_fillrect = sm501fb_fillrect,
1486 .fb_copyarea = sm501fb_copyarea,
1487 .fb_imageblit = cfb_imageblit,
1488 .fb_sync = sm501fb_sync,
1489 __FB_DEFAULT_IOMEM_OPS_MMAP,
1490 };
1491
1492 /* sm501_init_cursor
1493 *
1494 * initialise hw cursor parameters
1495 */
1496
sm501_init_cursor(struct fb_info * fbi,unsigned int reg_base)1497 static int sm501_init_cursor(struct fb_info *fbi, unsigned int reg_base)
1498 {
1499 struct sm501fb_par *par;
1500 struct sm501fb_info *info;
1501 int ret;
1502
1503 if (fbi == NULL)
1504 return 0;
1505
1506 par = fbi->par;
1507 info = par->info;
1508
1509 par->cursor_regs = info->regs + reg_base;
1510
1511 ret = sm501_alloc_mem(info, &par->cursor, SM501_MEMF_CURSOR, 1024,
1512 fbi->fix.smem_len);
1513 if (ret < 0)
1514 return ret;
1515
1516 /* initialise the colour registers */
1517
1518 smc501_writel(par->cursor.sm_addr,
1519 par->cursor_regs + SM501_OFF_HWC_ADDR);
1520
1521 smc501_writel(0x00, par->cursor_regs + SM501_OFF_HWC_LOC);
1522 smc501_writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_1_2);
1523 smc501_writel(0x00, par->cursor_regs + SM501_OFF_HWC_COLOR_3);
1524 sm501fb_sync_regs(info);
1525
1526 return 0;
1527 }
1528
1529 /* sm501fb_info_start
1530 *
1531 * fills the par structure claiming resources and remapping etc.
1532 */
1533
sm501fb_start(struct sm501fb_info * info,struct platform_device * pdev)1534 static int sm501fb_start(struct sm501fb_info *info,
1535 struct platform_device *pdev)
1536 {
1537 struct resource *res;
1538 struct device *dev = &pdev->dev;
1539 int k;
1540 int ret;
1541
1542 info->irq = ret = platform_get_irq(pdev, 0);
1543 if (ret < 0) {
1544 /* we currently do not use the IRQ */
1545 dev_warn(dev, "no irq for device\n");
1546 }
1547
1548 /* allocate, reserve and remap resources for display
1549 * controller registers */
1550 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1551 if (res == NULL) {
1552 dev_err(dev, "no resource definition for registers\n");
1553 ret = -ENOENT;
1554 goto err_release;
1555 }
1556
1557 info->regs_res = request_mem_region(res->start,
1558 resource_size(res),
1559 pdev->name);
1560
1561 if (info->regs_res == NULL) {
1562 dev_err(dev, "cannot claim registers\n");
1563 ret = -ENXIO;
1564 goto err_release;
1565 }
1566
1567 info->regs = ioremap(res->start, resource_size(res));
1568 if (info->regs == NULL) {
1569 dev_err(dev, "cannot remap registers\n");
1570 ret = -ENXIO;
1571 goto err_regs_res;
1572 }
1573
1574 /* allocate, reserve and remap resources for 2d
1575 * controller registers */
1576 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1577 if (res == NULL) {
1578 dev_err(dev, "no resource definition for 2d registers\n");
1579 ret = -ENOENT;
1580 goto err_regs_map;
1581 }
1582
1583 info->regs2d_res = request_mem_region(res->start,
1584 resource_size(res),
1585 pdev->name);
1586
1587 if (info->regs2d_res == NULL) {
1588 dev_err(dev, "cannot claim registers\n");
1589 ret = -ENXIO;
1590 goto err_regs_map;
1591 }
1592
1593 info->regs2d = ioremap(res->start, resource_size(res));
1594 if (info->regs2d == NULL) {
1595 dev_err(dev, "cannot remap registers\n");
1596 ret = -ENXIO;
1597 goto err_regs2d_res;
1598 }
1599
1600 /* allocate, reserve resources for framebuffer */
1601 res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1602 if (res == NULL) {
1603 dev_err(dev, "no memory resource defined\n");
1604 ret = -ENXIO;
1605 goto err_regs2d_map;
1606 }
1607
1608 info->fbmem_res = request_mem_region(res->start,
1609 resource_size(res),
1610 pdev->name);
1611 if (info->fbmem_res == NULL) {
1612 dev_err(dev, "cannot claim framebuffer\n");
1613 ret = -ENXIO;
1614 goto err_regs2d_map;
1615 }
1616
1617 info->fbmem = ioremap(res->start, resource_size(res));
1618 if (info->fbmem == NULL) {
1619 dev_err(dev, "cannot remap framebuffer\n");
1620 ret = -ENXIO;
1621 goto err_mem_res;
1622 }
1623
1624 info->fbmem_len = resource_size(res);
1625
1626 /* clear framebuffer memory - avoids garbage data on unused fb */
1627 memset_io(info->fbmem, 0, info->fbmem_len);
1628
1629 /* clear palette ram - undefined at power on */
1630 for (k = 0; k < (256 * 3); k++)
1631 smc501_writel(0, info->regs + SM501_DC_PANEL_PALETTE + (k * 4));
1632
1633 /* enable display controller */
1634 sm501_unit_power(dev->parent, SM501_GATE_DISPLAY, 1);
1635
1636 /* enable 2d controller */
1637 sm501_unit_power(dev->parent, SM501_GATE_2D_ENGINE, 1);
1638
1639 /* setup cursors */
1640 sm501_init_cursor(info->fb[HEAD_CRT], SM501_DC_CRT_HWC_ADDR);
1641 sm501_init_cursor(info->fb[HEAD_PANEL], SM501_DC_PANEL_HWC_ADDR);
1642
1643 return 0; /* everything is setup */
1644
1645 err_mem_res:
1646 release_mem_region(info->fbmem_res->start,
1647 resource_size(info->fbmem_res));
1648
1649 err_regs2d_map:
1650 iounmap(info->regs2d);
1651
1652 err_regs2d_res:
1653 release_mem_region(info->regs2d_res->start,
1654 resource_size(info->regs2d_res));
1655
1656 err_regs_map:
1657 iounmap(info->regs);
1658
1659 err_regs_res:
1660 release_mem_region(info->regs_res->start,
1661 resource_size(info->regs_res));
1662
1663 err_release:
1664 return ret;
1665 }
1666
sm501fb_stop(struct sm501fb_info * info)1667 static void sm501fb_stop(struct sm501fb_info *info)
1668 {
1669 /* disable display controller */
1670 sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
1671
1672 iounmap(info->fbmem);
1673 release_mem_region(info->fbmem_res->start,
1674 resource_size(info->fbmem_res));
1675
1676 iounmap(info->regs2d);
1677 release_mem_region(info->regs2d_res->start,
1678 resource_size(info->regs2d_res));
1679
1680 iounmap(info->regs);
1681 release_mem_region(info->regs_res->start,
1682 resource_size(info->regs_res));
1683 }
1684
sm501fb_init_fb(struct fb_info * fb,enum sm501_controller head,const char * fbname)1685 static int sm501fb_init_fb(struct fb_info *fb, enum sm501_controller head,
1686 const char *fbname)
1687 {
1688 struct sm501_platdata_fbsub *pd;
1689 struct sm501fb_par *par = fb->par;
1690 struct sm501fb_info *info = par->info;
1691 unsigned long ctrl;
1692 unsigned int enable;
1693 int ret;
1694
1695 switch (head) {
1696 case HEAD_CRT:
1697 pd = info->pdata->fb_crt;
1698 ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL);
1699 enable = (ctrl & SM501_DC_CRT_CONTROL_ENABLE) ? 1 : 0;
1700
1701 /* ensure we set the correct source register */
1702 if (info->pdata->fb_route != SM501_FB_CRT_PANEL) {
1703 ctrl |= SM501_DC_CRT_CONTROL_SEL;
1704 smc501_writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1705 }
1706
1707 break;
1708
1709 case HEAD_PANEL:
1710 pd = info->pdata->fb_pnl;
1711 ctrl = smc501_readl(info->regs + SM501_DC_PANEL_CONTROL);
1712 enable = (ctrl & SM501_DC_PANEL_CONTROL_EN) ? 1 : 0;
1713 break;
1714
1715 default:
1716 pd = NULL; /* stop compiler warnings */
1717 ctrl = 0;
1718 enable = 0;
1719 BUG();
1720 }
1721
1722 dev_info(info->dev, "fb %s %sabled at start\n",
1723 fbname, enable ? "en" : "dis");
1724
1725 /* check to see if our routing allows this */
1726
1727 if (head == HEAD_CRT && info->pdata->fb_route == SM501_FB_CRT_PANEL) {
1728 ctrl &= ~SM501_DC_CRT_CONTROL_SEL;
1729 smc501_writel(ctrl, info->regs + SM501_DC_CRT_CONTROL);
1730 enable = 0;
1731 }
1732
1733 strscpy(fb->fix.id, fbname, sizeof(fb->fix.id));
1734
1735 memcpy(&par->ops,
1736 (head == HEAD_CRT) ? &sm501fb_ops_crt : &sm501fb_ops_pnl,
1737 sizeof(struct fb_ops));
1738
1739 /* update ops dependent on what we've been passed */
1740
1741 if ((pd->flags & SM501FB_FLAG_USE_HWCURSOR) == 0)
1742 par->ops.fb_cursor = NULL;
1743
1744 fb->fbops = &par->ops;
1745 fb->flags = FBINFO_READS_FAST |
1746 FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT |
1747 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
1748
1749 #if defined(CONFIG_OF)
1750 #ifdef __BIG_ENDIAN
1751 if (of_property_read_bool(info->dev->parent->of_node, "little-endian"))
1752 fb->flags |= FBINFO_FOREIGN_ENDIAN;
1753 #else
1754 if (of_property_read_bool(info->dev->parent->of_node, "big-endian"))
1755 fb->flags |= FBINFO_FOREIGN_ENDIAN;
1756 #endif
1757 #endif
1758 /* fixed data */
1759
1760 fb->fix.type = FB_TYPE_PACKED_PIXELS;
1761 fb->fix.type_aux = 0;
1762 fb->fix.xpanstep = 1;
1763 fb->fix.ypanstep = 1;
1764 fb->fix.ywrapstep = 0;
1765 fb->fix.accel = FB_ACCEL_NONE;
1766
1767 /* screenmode */
1768
1769 fb->var.nonstd = 0;
1770 fb->var.activate = FB_ACTIVATE_NOW;
1771 fb->var.accel_flags = 0;
1772 fb->var.vmode = FB_VMODE_NONINTERLACED;
1773 fb->var.bits_per_pixel = 16;
1774
1775 if (info->edid_data) {
1776 /* Now build modedb from EDID */
1777 fb_edid_to_monspecs(info->edid_data, &fb->monspecs);
1778 fb_videomode_to_modelist(fb->monspecs.modedb,
1779 fb->monspecs.modedb_len,
1780 &fb->modelist);
1781 }
1782
1783 if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
1784 /* TODO read the mode from the current display */
1785 } else {
1786 if (pd->def_mode) {
1787 dev_info(info->dev, "using supplied mode\n");
1788 fb_videomode_to_var(&fb->var, pd->def_mode);
1789
1790 fb->var.bits_per_pixel = pd->def_bpp ? pd->def_bpp : 8;
1791 fb->var.xres_virtual = fb->var.xres;
1792 fb->var.yres_virtual = fb->var.yres;
1793 } else {
1794 if (info->edid_data) {
1795 ret = fb_find_mode(&fb->var, fb, fb_mode,
1796 fb->monspecs.modedb,
1797 fb->monspecs.modedb_len,
1798 &sm501_default_mode, default_bpp);
1799 /* edid_data is no longer needed, free it */
1800 kfree(info->edid_data);
1801 } else {
1802 ret = fb_find_mode(&fb->var, fb,
1803 NULL, NULL, 0, NULL, 8);
1804 }
1805
1806 switch (ret) {
1807 case 1:
1808 dev_info(info->dev, "using mode specified in "
1809 "@mode\n");
1810 break;
1811 case 2:
1812 dev_info(info->dev, "using mode specified in "
1813 "@mode with ignored refresh rate\n");
1814 break;
1815 case 3:
1816 dev_info(info->dev, "using mode default "
1817 "mode\n");
1818 break;
1819 case 4:
1820 dev_info(info->dev, "using mode from list\n");
1821 break;
1822 default:
1823 dev_info(info->dev, "ret = %d\n", ret);
1824 dev_info(info->dev, "failed to find mode\n");
1825 return -EINVAL;
1826 }
1827 }
1828 }
1829
1830 /* initialise and set the palette */
1831 if (fb_alloc_cmap(&fb->cmap, NR_PALETTE, 0)) {
1832 dev_err(info->dev, "failed to allocate cmap memory\n");
1833 return -ENOMEM;
1834 }
1835 fb_set_cmap(&fb->cmap, fb);
1836
1837 ret = (fb->fbops->fb_check_var)(&fb->var, fb);
1838 if (ret)
1839 dev_err(info->dev, "check_var() failed on initial setup?\n");
1840
1841 return 0;
1842 }
1843
1844 /* default platform data if none is supplied (ie, PCI device) */
1845
1846 static struct sm501_platdata_fbsub sm501fb_pdata_crt = {
1847 .flags = (SM501FB_FLAG_USE_INIT_MODE |
1848 SM501FB_FLAG_USE_HWCURSOR |
1849 SM501FB_FLAG_USE_HWACCEL |
1850 SM501FB_FLAG_DISABLE_AT_EXIT),
1851
1852 };
1853
1854 static struct sm501_platdata_fbsub sm501fb_pdata_pnl = {
1855 .flags = (SM501FB_FLAG_USE_INIT_MODE |
1856 SM501FB_FLAG_USE_HWCURSOR |
1857 SM501FB_FLAG_USE_HWACCEL |
1858 SM501FB_FLAG_DISABLE_AT_EXIT),
1859 };
1860
1861 static struct sm501_platdata_fb sm501fb_def_pdata = {
1862 .fb_route = SM501_FB_OWN,
1863 .fb_crt = &sm501fb_pdata_crt,
1864 .fb_pnl = &sm501fb_pdata_pnl,
1865 };
1866
1867 static char driver_name_crt[] = "sm501fb-crt";
1868 static char driver_name_pnl[] = "sm501fb-panel";
1869
sm501fb_probe_one(struct sm501fb_info * info,enum sm501_controller head)1870 static int sm501fb_probe_one(struct sm501fb_info *info,
1871 enum sm501_controller head)
1872 {
1873 unsigned char *name = (head == HEAD_CRT) ? "crt" : "panel";
1874 struct sm501_platdata_fbsub *pd;
1875 struct sm501fb_par *par;
1876 struct fb_info *fbi;
1877
1878 pd = (head == HEAD_CRT) ? info->pdata->fb_crt : info->pdata->fb_pnl;
1879
1880 /* Do not initialise if we've not been given any platform data */
1881 if (pd == NULL) {
1882 dev_info(info->dev, "no data for fb %s (disabled)\n", name);
1883 return 0;
1884 }
1885
1886 fbi = framebuffer_alloc(sizeof(struct sm501fb_par), info->dev);
1887 if (!fbi)
1888 return -ENOMEM;
1889
1890 par = fbi->par;
1891 par->info = info;
1892 par->head = head;
1893 fbi->pseudo_palette = &par->pseudo_palette;
1894
1895 info->fb[head] = fbi;
1896
1897 return 0;
1898 }
1899
1900 /* Free up anything allocated by sm501fb_init_fb */
1901
sm501_free_init_fb(struct sm501fb_info * info,enum sm501_controller head)1902 static void sm501_free_init_fb(struct sm501fb_info *info,
1903 enum sm501_controller head)
1904 {
1905 struct fb_info *fbi = info->fb[head];
1906
1907 if (!fbi)
1908 return;
1909
1910 fb_dealloc_cmap(&fbi->cmap);
1911 }
1912
sm501fb_start_one(struct sm501fb_info * info,enum sm501_controller head,const char * drvname)1913 static int sm501fb_start_one(struct sm501fb_info *info,
1914 enum sm501_controller head, const char *drvname)
1915 {
1916 struct fb_info *fbi = info->fb[head];
1917 int ret;
1918
1919 if (!fbi)
1920 return 0;
1921
1922 mutex_init(&info->fb[head]->mm_lock);
1923
1924 ret = sm501fb_init_fb(info->fb[head], head, drvname);
1925 if (ret) {
1926 dev_err(info->dev, "cannot initialise fb %s\n", drvname);
1927 return ret;
1928 }
1929
1930 ret = register_framebuffer(info->fb[head]);
1931 if (ret) {
1932 dev_err(info->dev, "failed to register fb %s\n", drvname);
1933 sm501_free_init_fb(info, head);
1934 return ret;
1935 }
1936
1937 dev_info(info->dev, "fb%d: %s frame buffer\n", fbi->node, fbi->fix.id);
1938
1939 return 0;
1940 }
1941
sm501fb_probe(struct platform_device * pdev)1942 static int sm501fb_probe(struct platform_device *pdev)
1943 {
1944 struct sm501fb_info *info;
1945 struct device *dev = &pdev->dev;
1946 int ret;
1947
1948 /* allocate our framebuffers */
1949 info = kzalloc(sizeof(*info), GFP_KERNEL);
1950 if (!info) {
1951 dev_err(dev, "failed to allocate state\n");
1952 return -ENOMEM;
1953 }
1954
1955 info->dev = dev = &pdev->dev;
1956 platform_set_drvdata(pdev, info);
1957
1958 if (dev->parent->platform_data) {
1959 struct sm501_platdata *pd = dev->parent->platform_data;
1960 info->pdata = pd->fb;
1961 }
1962
1963 if (info->pdata == NULL) {
1964 int found = 0;
1965 #if defined(CONFIG_OF)
1966 struct device_node *np = pdev->dev.parent->of_node;
1967 const u8 *prop;
1968 const char *cp;
1969 int len;
1970
1971 info->pdata = &sm501fb_def_pdata;
1972 if (np) {
1973 /* Get EDID */
1974 cp = of_get_property(np, "mode", &len);
1975 if (cp)
1976 strcpy(fb_mode, cp);
1977 prop = of_get_property(np, "edid", &len);
1978 if (prop && len == EDID_LENGTH) {
1979 info->edid_data = kmemdup(prop, EDID_LENGTH,
1980 GFP_KERNEL);
1981 if (info->edid_data)
1982 found = 1;
1983 }
1984 }
1985 #endif
1986 if (!found) {
1987 dev_info(dev, "using default configuration data\n");
1988 info->pdata = &sm501fb_def_pdata;
1989 }
1990 }
1991
1992 /* probe for the presence of each panel */
1993
1994 ret = sm501fb_probe_one(info, HEAD_CRT);
1995 if (ret < 0) {
1996 dev_err(dev, "failed to probe CRT\n");
1997 goto err_alloc;
1998 }
1999
2000 ret = sm501fb_probe_one(info, HEAD_PANEL);
2001 if (ret < 0) {
2002 dev_err(dev, "failed to probe PANEL\n");
2003 goto err_probed_crt;
2004 }
2005
2006 if (info->fb[HEAD_PANEL] == NULL &&
2007 info->fb[HEAD_CRT] == NULL) {
2008 dev_err(dev, "no framebuffers found\n");
2009 ret = -ENODEV;
2010 goto err_alloc;
2011 }
2012
2013 /* get the resources for both of the framebuffers */
2014
2015 ret = sm501fb_start(info, pdev);
2016 if (ret) {
2017 dev_err(dev, "cannot initialise SM501\n");
2018 goto err_probed_panel;
2019 }
2020
2021 ret = sm501fb_start_one(info, HEAD_CRT, driver_name_crt);
2022 if (ret) {
2023 dev_err(dev, "failed to start CRT\n");
2024 goto err_started;
2025 }
2026
2027 ret = sm501fb_start_one(info, HEAD_PANEL, driver_name_pnl);
2028 if (ret) {
2029 dev_err(dev, "failed to start Panel\n");
2030 goto err_started_crt;
2031 }
2032
2033 /* we registered, return ok */
2034 return 0;
2035
2036 err_started_crt:
2037 unregister_framebuffer(info->fb[HEAD_CRT]);
2038 sm501_free_init_fb(info, HEAD_CRT);
2039
2040 err_started:
2041 sm501fb_stop(info);
2042
2043 err_probed_panel:
2044 framebuffer_release(info->fb[HEAD_PANEL]);
2045
2046 err_probed_crt:
2047 framebuffer_release(info->fb[HEAD_CRT]);
2048
2049 err_alloc:
2050 kfree(info);
2051
2052 return ret;
2053 }
2054
2055
2056 /*
2057 * Cleanup
2058 */
sm501fb_remove(struct platform_device * pdev)2059 static void sm501fb_remove(struct platform_device *pdev)
2060 {
2061 struct sm501fb_info *info = platform_get_drvdata(pdev);
2062 struct fb_info *fbinfo_crt = info->fb[0];
2063 struct fb_info *fbinfo_pnl = info->fb[1];
2064
2065 sm501_free_init_fb(info, HEAD_CRT);
2066 sm501_free_init_fb(info, HEAD_PANEL);
2067
2068 if (fbinfo_crt)
2069 unregister_framebuffer(fbinfo_crt);
2070 if (fbinfo_pnl)
2071 unregister_framebuffer(fbinfo_pnl);
2072
2073 sm501fb_stop(info);
2074 kfree(info);
2075
2076 framebuffer_release(fbinfo_pnl);
2077 framebuffer_release(fbinfo_crt);
2078 }
2079
2080 #ifdef CONFIG_PM
2081
sm501fb_suspend_fb(struct sm501fb_info * info,enum sm501_controller head)2082 static int sm501fb_suspend_fb(struct sm501fb_info *info,
2083 enum sm501_controller head)
2084 {
2085 struct fb_info *fbi = info->fb[head];
2086 struct sm501fb_par *par;
2087
2088 if (!fbi)
2089 return 0;
2090
2091 par = fbi->par;
2092 if (par->screen.size == 0)
2093 return 0;
2094
2095 /* blank the relevant interface to ensure unit power minimised */
2096 (par->ops.fb_blank)(FB_BLANK_POWERDOWN, fbi);
2097
2098 /* tell console/fb driver we are suspending */
2099
2100 console_lock();
2101 fb_set_suspend(fbi, 1);
2102 console_unlock();
2103
2104 /* backup copies in case chip is powered down over suspend */
2105
2106 par->store_fb = vmalloc(par->screen.size);
2107 if (par->store_fb == NULL) {
2108 dev_err(info->dev, "no memory to store screen\n");
2109 return -ENOMEM;
2110 }
2111
2112 par->store_cursor = vmalloc(par->cursor.size);
2113 if (par->store_cursor == NULL) {
2114 dev_err(info->dev, "no memory to store cursor\n");
2115 goto err_nocursor;
2116 }
2117
2118 dev_dbg(info->dev, "suspending screen to %p\n", par->store_fb);
2119 dev_dbg(info->dev, "suspending cursor to %p\n", par->store_cursor);
2120
2121 memcpy_fromio(par->store_fb, par->screen.k_addr, par->screen.size);
2122 memcpy_fromio(par->store_cursor, par->cursor.k_addr, par->cursor.size);
2123
2124 return 0;
2125
2126 err_nocursor:
2127 vfree(par->store_fb);
2128 par->store_fb = NULL;
2129
2130 return -ENOMEM;
2131 }
2132
sm501fb_resume_fb(struct sm501fb_info * info,enum sm501_controller head)2133 static void sm501fb_resume_fb(struct sm501fb_info *info,
2134 enum sm501_controller head)
2135 {
2136 struct fb_info *fbi = info->fb[head];
2137 struct sm501fb_par *par;
2138
2139 if (!fbi)
2140 return;
2141
2142 par = fbi->par;
2143 if (par->screen.size == 0)
2144 return;
2145
2146 /* re-activate the configuration */
2147
2148 (par->ops.fb_set_par)(fbi);
2149
2150 /* restore the data */
2151
2152 dev_dbg(info->dev, "restoring screen from %p\n", par->store_fb);
2153 dev_dbg(info->dev, "restoring cursor from %p\n", par->store_cursor);
2154
2155 if (par->store_fb)
2156 memcpy_toio(par->screen.k_addr, par->store_fb,
2157 par->screen.size);
2158
2159 if (par->store_cursor)
2160 memcpy_toio(par->cursor.k_addr, par->store_cursor,
2161 par->cursor.size);
2162
2163 console_lock();
2164 fb_set_suspend(fbi, 0);
2165 console_unlock();
2166
2167 vfree(par->store_fb);
2168 vfree(par->store_cursor);
2169 }
2170
2171
2172 /* suspend and resume support */
2173
sm501fb_suspend(struct platform_device * pdev,pm_message_t state)2174 static int sm501fb_suspend(struct platform_device *pdev, pm_message_t state)
2175 {
2176 struct sm501fb_info *info = platform_get_drvdata(pdev);
2177
2178 /* store crt control to resume with */
2179 info->pm_crt_ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL);
2180
2181 sm501fb_suspend_fb(info, HEAD_CRT);
2182 sm501fb_suspend_fb(info, HEAD_PANEL);
2183
2184 /* turn off the clocks, in case the device is not powered down */
2185 sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 0);
2186
2187 return 0;
2188 }
2189
2190 #define SM501_CRT_CTRL_SAVE (SM501_DC_CRT_CONTROL_TVP | \
2191 SM501_DC_CRT_CONTROL_SEL)
2192
2193
sm501fb_resume(struct platform_device * pdev)2194 static int sm501fb_resume(struct platform_device *pdev)
2195 {
2196 struct sm501fb_info *info = platform_get_drvdata(pdev);
2197 unsigned long crt_ctrl;
2198
2199 sm501_unit_power(info->dev->parent, SM501_GATE_DISPLAY, 1);
2200
2201 /* restore the items we want to be saved for crt control */
2202
2203 crt_ctrl = smc501_readl(info->regs + SM501_DC_CRT_CONTROL);
2204 crt_ctrl &= ~SM501_CRT_CTRL_SAVE;
2205 crt_ctrl |= info->pm_crt_ctrl & SM501_CRT_CTRL_SAVE;
2206 smc501_writel(crt_ctrl, info->regs + SM501_DC_CRT_CONTROL);
2207
2208 sm501fb_resume_fb(info, HEAD_CRT);
2209 sm501fb_resume_fb(info, HEAD_PANEL);
2210
2211 return 0;
2212 }
2213
2214 #else
2215 #define sm501fb_suspend NULL
2216 #define sm501fb_resume NULL
2217 #endif
2218
2219 static struct platform_driver sm501fb_driver = {
2220 .probe = sm501fb_probe,
2221 .remove = sm501fb_remove,
2222 .suspend = sm501fb_suspend,
2223 .resume = sm501fb_resume,
2224 .driver = {
2225 .name = "sm501-fb",
2226 .dev_groups = sm501fb_groups,
2227 },
2228 };
2229
2230 module_platform_driver(sm501fb_driver);
2231
2232 module_param_named(mode, fb_mode, charp, 0);
2233 MODULE_PARM_DESC(mode,
2234 "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
2235 module_param_named(bpp, default_bpp, ulong, 0);
2236 MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified mode");
2237 MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
2238 MODULE_DESCRIPTION("SM501 Framebuffer driver");
2239 MODULE_LICENSE("GPL v2");
2240