1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * This header is for implementations of dma_map_ops and related code.
4 * It should not be included in drivers just using the DMA API.
5 */
6 #ifndef _LINUX_DMA_MAP_OPS_H
7 #define _LINUX_DMA_MAP_OPS_H
8
9 #include <linux/dma-mapping.h>
10 #include <linux/pgtable.h>
11 #include <linux/slab.h>
12 #include <linux/android_kabi.h>
13
14 struct cma;
15 struct iommu_ops;
16
17 struct dma_map_ops {
18 void *(*alloc)(struct device *dev, size_t size,
19 dma_addr_t *dma_handle, gfp_t gfp,
20 unsigned long attrs);
21 void (*free)(struct device *dev, size_t size, void *vaddr,
22 dma_addr_t dma_handle, unsigned long attrs);
23 struct page *(*alloc_pages_op)(struct device *dev, size_t size,
24 dma_addr_t *dma_handle, enum dma_data_direction dir,
25 gfp_t gfp);
26 void (*free_pages)(struct device *dev, size_t size, struct page *vaddr,
27 dma_addr_t dma_handle, enum dma_data_direction dir);
28 int (*mmap)(struct device *, struct vm_area_struct *,
29 void *, dma_addr_t, size_t, unsigned long attrs);
30
31 int (*get_sgtable)(struct device *dev, struct sg_table *sgt,
32 void *cpu_addr, dma_addr_t dma_addr, size_t size,
33 unsigned long attrs);
34
35 dma_addr_t (*map_page)(struct device *dev, struct page *page,
36 unsigned long offset, size_t size,
37 enum dma_data_direction dir, unsigned long attrs);
38 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
39 size_t size, enum dma_data_direction dir,
40 unsigned long attrs);
41 /*
42 * map_sg should return a negative error code on error. See
43 * dma_map_sgtable() for a list of appropriate error codes
44 * and their meanings.
45 */
46 int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents,
47 enum dma_data_direction dir, unsigned long attrs);
48 void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nents,
49 enum dma_data_direction dir, unsigned long attrs);
50 dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr,
51 size_t size, enum dma_data_direction dir,
52 unsigned long attrs);
53 void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle,
54 size_t size, enum dma_data_direction dir,
55 unsigned long attrs);
56 void (*sync_single_for_cpu)(struct device *dev, dma_addr_t dma_handle,
57 size_t size, enum dma_data_direction dir);
58 void (*sync_single_for_device)(struct device *dev,
59 dma_addr_t dma_handle, size_t size,
60 enum dma_data_direction dir);
61 void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg,
62 int nents, enum dma_data_direction dir);
63 void (*sync_sg_for_device)(struct device *dev, struct scatterlist *sg,
64 int nents, enum dma_data_direction dir);
65 void (*cache_sync)(struct device *dev, void *vaddr, size_t size,
66 enum dma_data_direction direction);
67 int (*dma_supported)(struct device *dev, u64 mask);
68 u64 (*get_required_mask)(struct device *dev);
69 size_t (*max_mapping_size)(struct device *dev);
70 size_t (*opt_mapping_size)(void);
71 unsigned long (*get_merge_boundary)(struct device *dev);
72
73 ANDROID_KABI_RESERVE(1);
74 ANDROID_KABI_RESERVE(2);
75 ANDROID_KABI_RESERVE(3);
76 ANDROID_KABI_RESERVE(4);
77 };
78
79 #ifdef CONFIG_ARCH_HAS_DMA_OPS
80 #include <asm/dma-mapping.h>
81
get_dma_ops(struct device * dev)82 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
83 {
84 if (dev->dma_ops)
85 return dev->dma_ops;
86 return get_arch_dma_ops();
87 }
88
set_dma_ops(struct device * dev,const struct dma_map_ops * dma_ops)89 static inline void set_dma_ops(struct device *dev,
90 const struct dma_map_ops *dma_ops)
91 {
92 dev->dma_ops = dma_ops;
93 }
94 #else /* CONFIG_ARCH_HAS_DMA_OPS */
get_dma_ops(struct device * dev)95 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
96 {
97 return NULL;
98 }
set_dma_ops(struct device * dev,const struct dma_map_ops * dma_ops)99 static inline void set_dma_ops(struct device *dev,
100 const struct dma_map_ops *dma_ops)
101 {
102 }
103 #endif /* CONFIG_ARCH_HAS_DMA_OPS */
104
105 #ifdef CONFIG_DMA_CMA
106 extern struct cma *dma_contiguous_default_area;
107
dev_get_cma_area(struct device * dev)108 static inline struct cma *dev_get_cma_area(struct device *dev)
109 {
110 if (dev && dev->cma_area)
111 return dev->cma_area;
112 return dma_contiguous_default_area;
113 }
114
115 void dma_contiguous_reserve(phys_addr_t addr_limit);
116 int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
117 phys_addr_t limit, struct cma **res_cma, bool fixed);
118
119 struct page *dma_alloc_from_contiguous(struct device *dev, size_t count,
120 unsigned int order, bool no_warn);
121 bool dma_release_from_contiguous(struct device *dev, struct page *pages,
122 int count);
123 struct page *dma_alloc_contiguous(struct device *dev, size_t size, gfp_t gfp);
124 void dma_free_contiguous(struct device *dev, struct page *page, size_t size);
125
126 void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size);
127 #else /* CONFIG_DMA_CMA */
dev_get_cma_area(struct device * dev)128 static inline struct cma *dev_get_cma_area(struct device *dev)
129 {
130 return NULL;
131 }
dma_contiguous_reserve(phys_addr_t limit)132 static inline void dma_contiguous_reserve(phys_addr_t limit)
133 {
134 }
dma_contiguous_reserve_area(phys_addr_t size,phys_addr_t base,phys_addr_t limit,struct cma ** res_cma,bool fixed)135 static inline int dma_contiguous_reserve_area(phys_addr_t size,
136 phys_addr_t base, phys_addr_t limit, struct cma **res_cma,
137 bool fixed)
138 {
139 return -ENOSYS;
140 }
dma_alloc_from_contiguous(struct device * dev,size_t count,unsigned int order,bool no_warn)141 static inline struct page *dma_alloc_from_contiguous(struct device *dev,
142 size_t count, unsigned int order, bool no_warn)
143 {
144 return NULL;
145 }
dma_release_from_contiguous(struct device * dev,struct page * pages,int count)146 static inline bool dma_release_from_contiguous(struct device *dev,
147 struct page *pages, int count)
148 {
149 return false;
150 }
151 /* Use fallback alloc() and free() when CONFIG_DMA_CMA=n */
dma_alloc_contiguous(struct device * dev,size_t size,gfp_t gfp)152 static inline struct page *dma_alloc_contiguous(struct device *dev, size_t size,
153 gfp_t gfp)
154 {
155 return NULL;
156 }
dma_free_contiguous(struct device * dev,struct page * page,size_t size)157 static inline void dma_free_contiguous(struct device *dev, struct page *page,
158 size_t size)
159 {
160 __free_pages(page, get_order(size));
161 }
dma_contiguous_early_fixup(phys_addr_t base,unsigned long size)162 static inline void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
163 {
164 }
165 #endif /* CONFIG_DMA_CMA*/
166
167 #ifdef CONFIG_DMA_DECLARE_COHERENT
168 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
169 dma_addr_t device_addr, size_t size);
170 void dma_release_coherent_memory(struct device *dev);
171 int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
172 dma_addr_t *dma_handle, void **ret);
173 int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
174 int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma,
175 void *cpu_addr, size_t size, int *ret);
176 #else
dma_declare_coherent_memory(struct device * dev,phys_addr_t phys_addr,dma_addr_t device_addr,size_t size)177 static inline int dma_declare_coherent_memory(struct device *dev,
178 phys_addr_t phys_addr, dma_addr_t device_addr, size_t size)
179 {
180 return -ENOSYS;
181 }
182
183 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
184 #define dma_release_from_dev_coherent(dev, order, vaddr) (0)
185 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
dma_release_coherent_memory(struct device * dev)186 static inline void dma_release_coherent_memory(struct device *dev) { }
187 #endif /* CONFIG_DMA_DECLARE_COHERENT */
188
189 #ifdef CONFIG_DMA_GLOBAL_POOL
190 void *dma_alloc_from_global_coherent(struct device *dev, ssize_t size,
191 dma_addr_t *dma_handle);
192 int dma_release_from_global_coherent(int order, void *vaddr);
193 int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr,
194 size_t size, int *ret);
195 int dma_init_global_coherent(phys_addr_t phys_addr, size_t size);
196 #else
dma_alloc_from_global_coherent(struct device * dev,ssize_t size,dma_addr_t * dma_handle)197 static inline void *dma_alloc_from_global_coherent(struct device *dev,
198 ssize_t size, dma_addr_t *dma_handle)
199 {
200 return NULL;
201 }
dma_release_from_global_coherent(int order,void * vaddr)202 static inline int dma_release_from_global_coherent(int order, void *vaddr)
203 {
204 return 0;
205 }
dma_mmap_from_global_coherent(struct vm_area_struct * vma,void * cpu_addr,size_t size,int * ret)206 static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
207 void *cpu_addr, size_t size, int *ret)
208 {
209 return 0;
210 }
211 #endif /* CONFIG_DMA_GLOBAL_POOL */
212
213 int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
214 void *cpu_addr, dma_addr_t dma_addr, size_t size,
215 unsigned long attrs);
216 int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
217 void *cpu_addr, dma_addr_t dma_addr, size_t size,
218 unsigned long attrs);
219 struct page *dma_common_alloc_pages(struct device *dev, size_t size,
220 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp);
221 void dma_common_free_pages(struct device *dev, size_t size, struct page *vaddr,
222 dma_addr_t dma_handle, enum dma_data_direction dir);
223
224 struct page **dma_common_find_pages(void *cpu_addr);
225 void *dma_common_contiguous_remap(struct page *page, size_t size, pgprot_t prot,
226 const void *caller);
227 void *dma_common_pages_remap(struct page **pages, size_t size, pgprot_t prot,
228 const void *caller);
229 void dma_common_free_remap(void *cpu_addr, size_t size);
230
231 struct page *dma_alloc_from_pool(struct device *dev, size_t size,
232 void **cpu_addr, gfp_t flags,
233 bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t));
234 bool dma_free_from_pool(struct device *dev, void *start, size_t size);
235
236 int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,
237 dma_addr_t dma_start, u64 size);
238
239 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
240 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
241 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)
242 extern bool dma_default_coherent;
dev_is_dma_coherent(struct device * dev)243 static inline bool dev_is_dma_coherent(struct device *dev)
244 {
245 return dev->dma_coherent;
246 }
247 #else
248 #define dma_default_coherent true
249
dev_is_dma_coherent(struct device * dev)250 static inline bool dev_is_dma_coherent(struct device *dev)
251 {
252 return true;
253 }
254 #endif /* CONFIG_ARCH_HAS_DMA_COHERENCE_H */
255
dma_reset_need_sync(struct device * dev)256 static inline void dma_reset_need_sync(struct device *dev)
257 {
258 #ifdef CONFIG_DMA_NEED_SYNC
259 /* Reset it only once so that the function can be called on hotpath */
260 if (unlikely(dev->dma_skip_sync))
261 dev->dma_skip_sync = false;
262 #endif
263 }
264
265 /*
266 * Check whether potential kmalloc() buffers are safe for non-coherent DMA.
267 */
dma_kmalloc_safe(struct device * dev,enum dma_data_direction dir)268 static inline bool dma_kmalloc_safe(struct device *dev,
269 enum dma_data_direction dir)
270 {
271 /*
272 * If DMA bouncing of kmalloc() buffers is disabled, the kmalloc()
273 * caches have already been aligned to a DMA-safe size.
274 */
275 if (!IS_ENABLED(CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC))
276 return true;
277
278 /*
279 * kmalloc() buffers are DMA-safe irrespective of size if the device
280 * is coherent or the direction is DMA_TO_DEVICE (non-desctructive
281 * cache maintenance and benign cache line evictions).
282 */
283 if (dev_is_dma_coherent(dev) || dir == DMA_TO_DEVICE)
284 return true;
285
286 return false;
287 }
288
289 /*
290 * Check whether the given size, assuming it is for a kmalloc()'ed buffer, is
291 * sufficiently aligned for non-coherent DMA.
292 */
dma_kmalloc_size_aligned(size_t size)293 static inline bool dma_kmalloc_size_aligned(size_t size)
294 {
295 /*
296 * Larger kmalloc() sizes are guaranteed to be aligned to
297 * ARCH_DMA_MINALIGN.
298 */
299 if (size >= 2 * ARCH_DMA_MINALIGN ||
300 IS_ALIGNED(kmalloc_size_roundup(size), dma_get_cache_alignment()))
301 return true;
302
303 return false;
304 }
305
306 /*
307 * Check whether the given object size may have originated from a kmalloc()
308 * buffer with a slab alignment below the DMA-safe alignment and needs
309 * bouncing for non-coherent DMA. The pointer alignment is not considered and
310 * in-structure DMA-safe offsets are the responsibility of the caller. Such
311 * code should use the static ARCH_DMA_MINALIGN for compiler annotations.
312 *
313 * The heuristics can have false positives, bouncing unnecessarily, though the
314 * buffers would be small. False negatives are theoretically possible if, for
315 * example, multiple small kmalloc() buffers are coalesced into a larger
316 * buffer that passes the alignment check. There are no such known constructs
317 * in the kernel.
318 */
dma_kmalloc_needs_bounce(struct device * dev,size_t size,enum dma_data_direction dir)319 static inline bool dma_kmalloc_needs_bounce(struct device *dev, size_t size,
320 enum dma_data_direction dir)
321 {
322 return !dma_kmalloc_safe(dev, dir) && !dma_kmalloc_size_aligned(size);
323 }
324
325 void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
326 gfp_t gfp, unsigned long attrs);
327 void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
328 dma_addr_t dma_addr, unsigned long attrs);
329
330 #ifdef CONFIG_ARCH_HAS_DMA_SET_MASK
331 void arch_dma_set_mask(struct device *dev, u64 mask);
332 #else
333 #define arch_dma_set_mask(dev, mask) do { } while (0)
334 #endif
335
336 #ifdef CONFIG_MMU
337 /*
338 * Page protection so that devices that can't snoop CPU caches can use the
339 * memory coherently. We default to pgprot_noncached which is usually used
340 * for ioremap as a safe bet, but architectures can override this with less
341 * strict semantics if possible.
342 */
343 #ifndef pgprot_dmacoherent
344 #define pgprot_dmacoherent(prot) pgprot_noncached(prot)
345 #endif
346
347 pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs);
348 #else
dma_pgprot(struct device * dev,pgprot_t prot,unsigned long attrs)349 static inline pgprot_t dma_pgprot(struct device *dev, pgprot_t prot,
350 unsigned long attrs)
351 {
352 return prot; /* no protection bits supported without page tables */
353 }
354 #endif /* CONFIG_MMU */
355
356 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE
357 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
358 enum dma_data_direction dir);
359 #else
arch_sync_dma_for_device(phys_addr_t paddr,size_t size,enum dma_data_direction dir)360 static inline void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
361 enum dma_data_direction dir)
362 {
363 }
364 #endif /* ARCH_HAS_SYNC_DMA_FOR_DEVICE */
365
366 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU
367 void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
368 enum dma_data_direction dir);
369 #else
arch_sync_dma_for_cpu(phys_addr_t paddr,size_t size,enum dma_data_direction dir)370 static inline void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
371 enum dma_data_direction dir)
372 {
373 }
374 #endif /* ARCH_HAS_SYNC_DMA_FOR_CPU */
375
376 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
377 void arch_sync_dma_for_cpu_all(void);
378 #else
arch_sync_dma_for_cpu_all(void)379 static inline void arch_sync_dma_for_cpu_all(void)
380 {
381 }
382 #endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */
383
384 #ifdef CONFIG_ARCH_HAS_DMA_PREP_COHERENT
385 void arch_dma_prep_coherent(struct page *page, size_t size);
386 #else
arch_dma_prep_coherent(struct page * page,size_t size)387 static inline void arch_dma_prep_coherent(struct page *page, size_t size)
388 {
389 }
390 #endif /* CONFIG_ARCH_HAS_DMA_PREP_COHERENT */
391
392 #ifdef CONFIG_ARCH_HAS_DMA_MARK_CLEAN
393 void arch_dma_mark_clean(phys_addr_t paddr, size_t size);
394 #else
arch_dma_mark_clean(phys_addr_t paddr,size_t size)395 static inline void arch_dma_mark_clean(phys_addr_t paddr, size_t size)
396 {
397 }
398 #endif /* ARCH_HAS_DMA_MARK_CLEAN */
399
400 void *arch_dma_set_uncached(void *addr, size_t size);
401 void arch_dma_clear_uncached(void *addr, size_t size);
402
403 #ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT
404 bool arch_dma_map_page_direct(struct device *dev, phys_addr_t addr);
405 bool arch_dma_unmap_page_direct(struct device *dev, dma_addr_t dma_handle);
406 bool arch_dma_map_sg_direct(struct device *dev, struct scatterlist *sg,
407 int nents);
408 bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg,
409 int nents);
410 #else
411 #define arch_dma_map_page_direct(d, a) (false)
412 #define arch_dma_unmap_page_direct(d, a) (false)
413 #define arch_dma_map_sg_direct(d, s, n) (false)
414 #define arch_dma_unmap_sg_direct(d, s, n) (false)
415 #endif
416
417 #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
418 void arch_setup_dma_ops(struct device *dev, bool coherent);
419 #else
arch_setup_dma_ops(struct device * dev,bool coherent)420 static inline void arch_setup_dma_ops(struct device *dev, bool coherent)
421 {
422 }
423 #endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */
424
425 #ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS
426 void arch_teardown_dma_ops(struct device *dev);
427 #else
arch_teardown_dma_ops(struct device * dev)428 static inline void arch_teardown_dma_ops(struct device *dev)
429 {
430 }
431 #endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */
432
433 #ifdef CONFIG_DMA_API_DEBUG
434 void dma_debug_add_bus(const struct bus_type *bus);
435 void debug_dma_dump_mappings(struct device *dev);
436 #else
dma_debug_add_bus(const struct bus_type * bus)437 static inline void dma_debug_add_bus(const struct bus_type *bus)
438 {
439 }
debug_dma_dump_mappings(struct device * dev)440 static inline void debug_dma_dump_mappings(struct device *dev)
441 {
442 }
443 #endif /* CONFIG_DMA_API_DEBUG */
444
445 extern const struct dma_map_ops dma_dummy_ops;
446 #endif /* _LINUX_DMA_MAP_OPS_H */
447