1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2024 NXP 4 */ 5 6 #ifndef _SCMI_IMX_H 7 #define _SCMI_IMX_H 8 9 #include <linux/bitfield.h> 10 #include <linux/errno.h> 11 #include <linux/types.h> 12 13 #define SCMI_IMX_CTRL_PDM_CLK_SEL 0 /* AON PDM clock sel */ 14 #define SCMI_IMX_CTRL_MQS1_SETTINGS 1 /* AON MQS settings */ 15 #define SCMI_IMX_CTRL_SAI1_MCLK 2 /* AON SAI1 MCLK */ 16 #define SCMI_IMX_CTRL_SAI3_MCLK 3 /* WAKE SAI3 MCLK */ 17 #define SCMI_IMX_CTRL_SAI4_MCLK 4 /* WAKE SAI4 MCLK */ 18 #define SCMI_IMX_CTRL_SAI5_MCLK 5 /* WAKE SAI5 MCLK */ 19 20 #if IS_ENABLED(CONFIG_IMX_SCMI_MISC_DRV) 21 int scmi_imx_misc_ctrl_get(u32 id, u32 *num, u32 *val); 22 int scmi_imx_misc_ctrl_set(u32 id, u32 val); 23 #else scmi_imx_misc_ctrl_get(u32 id,u32 * num,u32 * val)24static inline int scmi_imx_misc_ctrl_get(u32 id, u32 *num, u32 *val) 25 { 26 return -EOPNOTSUPP; 27 } 28 scmi_imx_misc_ctrl_set(u32 id,u32 val)29static inline int scmi_imx_misc_ctrl_set(u32 id, u32 val) 30 { 31 return -EOPNOTSUPP; 32 } 33 #endif 34 35 #endif 36