1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/input/gpio-keys.h> 10#include <dt-bindings/input/input.h> 11#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 12 13#include "x1e80100.dtsi" 14#include "x1e80100-pmics.dtsi" 15 16/ { 17 model = "Qualcomm Technologies, Inc. X1E80100 CRD"; 18 compatible = "qcom,x1e80100-crd", "qcom,x1e80100"; 19 20 aliases { 21 serial0 = &uart21; 22 }; 23 24 wcd938x: audio-codec { 25 compatible = "qcom,wcd9385-codec"; 26 27 pinctrl-names = "default"; 28 pinctrl-0 = <&wcd_default>; 29 30 qcom,micbias1-microvolt = <1800000>; 31 qcom,micbias2-microvolt = <1800000>; 32 qcom,micbias3-microvolt = <1800000>; 33 qcom,micbias4-microvolt = <1800000>; 34 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; 35 qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 36 qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 37 qcom,rx-device = <&wcd_rx>; 38 qcom,tx-device = <&wcd_tx>; 39 40 reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>; 41 42 vdd-buck-supply = <&vreg_l15b_1p8>; 43 vdd-rxtx-supply = <&vreg_l15b_1p8>; 44 vdd-io-supply = <&vreg_l15b_1p8>; 45 vdd-mic-bias-supply = <&vreg_bob1>; 46 47 #sound-dai-cells = <1>; 48 }; 49 50 chosen { 51 stdout-path = "serial0:115200n8"; 52 }; 53 54 gpio-keys { 55 compatible = "gpio-keys"; 56 57 pinctrl-0 = <&hall_int_n_default>; 58 pinctrl-names = "default"; 59 60 switch-lid { 61 gpios = <&tlmm 92 GPIO_ACTIVE_LOW>; 62 linux,input-type = <EV_SW>; 63 linux,code = <SW_LID>; 64 wakeup-source; 65 wakeup-event-action = <EV_ACT_DEASSERTED>; 66 }; 67 }; 68 69 pmic-glink { 70 compatible = "qcom,x1e80100-pmic-glink", 71 "qcom,sm8550-pmic-glink", 72 "qcom,pmic-glink"; 73 #address-cells = <1>; 74 #size-cells = <0>; 75 orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>, 76 <&tlmm 123 GPIO_ACTIVE_HIGH>, 77 <&tlmm 125 GPIO_ACTIVE_HIGH>; 78 79 /* Left-side rear port */ 80 connector@0 { 81 compatible = "usb-c-connector"; 82 reg = <0>; 83 power-role = "dual"; 84 data-role = "dual"; 85 86 ports { 87 #address-cells = <1>; 88 #size-cells = <0>; 89 90 port@0 { 91 reg = <0>; 92 93 pmic_glink_ss0_hs_in: endpoint { 94 remote-endpoint = <&usb_1_ss0_dwc3_hs>; 95 }; 96 }; 97 98 port@1 { 99 reg = <1>; 100 101 pmic_glink_ss0_ss_in: endpoint { 102 remote-endpoint = <&usb_1_ss0_qmpphy_out>; 103 }; 104 }; 105 }; 106 }; 107 108 /* Left-side front port */ 109 connector@1 { 110 compatible = "usb-c-connector"; 111 reg = <1>; 112 power-role = "dual"; 113 data-role = "dual"; 114 115 ports { 116 #address-cells = <1>; 117 #size-cells = <0>; 118 119 port@0 { 120 reg = <0>; 121 122 pmic_glink_ss1_hs_in: endpoint { 123 remote-endpoint = <&usb_1_ss1_dwc3_hs>; 124 }; 125 }; 126 127 port@1 { 128 reg = <1>; 129 130 pmic_glink_ss1_ss_in: endpoint { 131 remote-endpoint = <&usb_1_ss1_qmpphy_out>; 132 }; 133 }; 134 }; 135 }; 136 137 /* Right-side port */ 138 connector@2 { 139 compatible = "usb-c-connector"; 140 reg = <2>; 141 power-role = "dual"; 142 data-role = "dual"; 143 144 ports { 145 #address-cells = <1>; 146 #size-cells = <0>; 147 148 port@0 { 149 reg = <0>; 150 151 pmic_glink_ss2_hs_in: endpoint { 152 remote-endpoint = <&usb_1_ss2_dwc3_hs>; 153 }; 154 }; 155 156 port@1 { 157 reg = <1>; 158 159 pmic_glink_ss2_ss_in: endpoint { 160 remote-endpoint = <&usb_1_ss2_qmpphy_out>; 161 }; 162 }; 163 }; 164 }; 165 }; 166 167 reserved-memory { 168 linux,cma { 169 compatible = "shared-dma-pool"; 170 size = <0x0 0x8000000>; 171 reusable; 172 linux,cma-default; 173 }; 174 }; 175 176 sound { 177 compatible = "qcom,x1e80100-sndcard"; 178 model = "X1E80100-CRD"; 179 audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT", 180 "TweeterLeft IN", "WSA WSA_SPK2 OUT", 181 "WooferRight IN", "WSA2 WSA_SPK2 OUT", 182 "TweeterRight IN", "WSA2 WSA_SPK2 OUT", 183 "IN1_HPHL", "HPHL_OUT", 184 "IN2_HPHR", "HPHR_OUT", 185 "AMIC2", "MIC BIAS2", 186 "VA DMIC0", "MIC BIAS3", 187 "VA DMIC1", "MIC BIAS3", 188 "VA DMIC2", "MIC BIAS1", 189 "VA DMIC3", "MIC BIAS1", 190 "VA DMIC0", "VA MIC BIAS3", 191 "VA DMIC1", "VA MIC BIAS3", 192 "VA DMIC2", "VA MIC BIAS1", 193 "VA DMIC3", "VA MIC BIAS1", 194 "TX SWR_INPUT1", "ADC2_OUTPUT"; 195 196 wcd-playback-dai-link { 197 link-name = "WCD Playback"; 198 199 cpu { 200 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; 201 }; 202 203 codec { 204 sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>; 205 }; 206 207 platform { 208 sound-dai = <&q6apm>; 209 }; 210 }; 211 212 wcd-capture-dai-link { 213 link-name = "WCD Capture"; 214 215 cpu { 216 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; 217 }; 218 219 codec { 220 sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>; 221 }; 222 223 platform { 224 sound-dai = <&q6apm>; 225 }; 226 }; 227 228 wsa-dai-link { 229 link-name = "WSA Playback"; 230 231 cpu { 232 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; 233 }; 234 235 codec { 236 sound-dai = <&left_woofer>, <&left_tweeter>, 237 <&swr0 0>, <&lpass_wsamacro 0>, 238 <&right_woofer>, <&right_tweeter>, 239 <&swr3 0>, <&lpass_wsa2macro 0>; 240 }; 241 242 platform { 243 sound-dai = <&q6apm>; 244 }; 245 }; 246 247 va-dai-link { 248 link-name = "VA Capture"; 249 250 cpu { 251 sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>; 252 }; 253 254 codec { 255 sound-dai = <&lpass_vamacro 0>; 256 }; 257 258 platform { 259 sound-dai = <&q6apm>; 260 }; 261 }; 262 }; 263 264 vph_pwr: vph-pwr-regulator { 265 compatible = "regulator-fixed"; 266 267 regulator-name = "vph_pwr"; 268 regulator-min-microvolt = <3700000>; 269 regulator-max-microvolt = <3700000>; 270 271 regulator-always-on; 272 regulator-boot-on; 273 }; 274 275 vreg_edp_3p3: regulator-edp-3p3 { 276 compatible = "regulator-fixed"; 277 278 regulator-name = "VREG_EDP_3P3"; 279 regulator-min-microvolt = <3300000>; 280 regulator-max-microvolt = <3300000>; 281 282 gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>; 283 enable-active-high; 284 285 pinctrl-0 = <&edp_reg_en>; 286 pinctrl-names = "default"; 287 288 regulator-boot-on; 289 }; 290 291 vreg_nvme: regulator-nvme { 292 compatible = "regulator-fixed"; 293 294 regulator-name = "VREG_NVME_3P3"; 295 regulator-min-microvolt = <3300000>; 296 regulator-max-microvolt = <3300000>; 297 298 gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>; 299 enable-active-high; 300 301 pinctrl-names = "default"; 302 pinctrl-0 = <&nvme_reg_en>; 303 304 regulator-boot-on; 305 }; 306 307 vreg_wwan: regulator-wwan { 308 compatible = "regulator-fixed"; 309 310 regulator-name = "SDX_VPH_PWR"; 311 regulator-min-microvolt = <3300000>; 312 regulator-max-microvolt = <3300000>; 313 314 gpio = <&tlmm 221 GPIO_ACTIVE_HIGH>; 315 enable-active-high; 316 317 pinctrl-0 = <&wwan_sw_en>; 318 pinctrl-names = "default"; 319 320 regulator-boot-on; 321 }; 322}; 323 324&apps_rsc { 325 regulators-0 { 326 compatible = "qcom,pm8550-rpmh-regulators"; 327 qcom,pmic-id = "b"; 328 329 vdd-bob1-supply = <&vph_pwr>; 330 vdd-bob2-supply = <&vph_pwr>; 331 vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>; 332 vdd-l2-l13-l14-supply = <&vreg_bob1>; 333 vdd-l5-l16-supply = <&vreg_bob1>; 334 vdd-l6-l7-supply = <&vreg_bob2>; 335 vdd-l8-l9-supply = <&vreg_bob1>; 336 vdd-l12-supply = <&vreg_s5j_1p2>; 337 vdd-l15-supply = <&vreg_s4c_1p8>; 338 vdd-l17-supply = <&vreg_bob2>; 339 340 vreg_bob1: bob1 { 341 regulator-name = "vreg_bob1"; 342 regulator-min-microvolt = <3008000>; 343 regulator-max-microvolt = <3960000>; 344 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 345 }; 346 347 vreg_bob2: bob2 { 348 regulator-name = "vreg_bob2"; 349 regulator-min-microvolt = <2504000>; 350 regulator-max-microvolt = <3008000>; 351 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 352 }; 353 354 vreg_l1b_1p8: ldo1 { 355 regulator-name = "vreg_l1b_1p8"; 356 regulator-min-microvolt = <1800000>; 357 regulator-max-microvolt = <1800000>; 358 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 359 }; 360 361 vreg_l2b_3p0: ldo2 { 362 regulator-name = "vreg_l2b_3p0"; 363 regulator-min-microvolt = <3072000>; 364 regulator-max-microvolt = <3100000>; 365 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 366 }; 367 368 vreg_l4b_1p8: ldo4 { 369 regulator-name = "vreg_l4b_1p8"; 370 regulator-min-microvolt = <1800000>; 371 regulator-max-microvolt = <1800000>; 372 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 373 }; 374 375 vreg_l5b_3p0: ldo5 { 376 regulator-name = "vreg_l5b_3p0"; 377 regulator-min-microvolt = <3000000>; 378 regulator-max-microvolt = <3000000>; 379 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 380 }; 381 382 vreg_l6b_1p8: ldo6 { 383 regulator-name = "vreg_l6b_1p8"; 384 regulator-min-microvolt = <1800000>; 385 regulator-max-microvolt = <2960000>; 386 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 387 }; 388 389 vreg_l7b_2p8: ldo7 { 390 regulator-name = "vreg_l7b_2p8"; 391 regulator-min-microvolt = <2800000>; 392 regulator-max-microvolt = <2800000>; 393 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 394 }; 395 396 vreg_l8b_3p0: ldo8 { 397 regulator-name = "vreg_l8b_3p0"; 398 regulator-min-microvolt = <3072000>; 399 regulator-max-microvolt = <3072000>; 400 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 401 }; 402 403 vreg_l9b_2p9: ldo9 { 404 regulator-name = "vreg_l9b_2p9"; 405 regulator-min-microvolt = <2960000>; 406 regulator-max-microvolt = <2960000>; 407 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 408 }; 409 410 vreg_l10b_1p8: ldo10 { 411 regulator-name = "vreg_l10b_1p8"; 412 regulator-min-microvolt = <1800000>; 413 regulator-max-microvolt = <1800000>; 414 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 415 }; 416 417 vreg_l12b_1p2: ldo12 { 418 regulator-name = "vreg_l12b_1p2"; 419 regulator-min-microvolt = <1200000>; 420 regulator-max-microvolt = <1200000>; 421 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 422 regulator-always-on; 423 }; 424 425 vreg_l13b_3p0: ldo13 { 426 regulator-name = "vreg_l13b_3p0"; 427 regulator-min-microvolt = <3072000>; 428 regulator-max-microvolt = <3100000>; 429 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 430 }; 431 432 vreg_l14b_3p0: ldo14 { 433 regulator-name = "vreg_l14b_3p0"; 434 regulator-min-microvolt = <3072000>; 435 regulator-max-microvolt = <3072000>; 436 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 437 }; 438 439 vreg_l15b_1p8: ldo15 { 440 regulator-name = "vreg_l15b_1p8"; 441 regulator-min-microvolt = <1800000>; 442 regulator-max-microvolt = <1800000>; 443 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 444 regulator-always-on; 445 }; 446 447 vreg_l16b_2p9: ldo16 { 448 regulator-name = "vreg_l16b_2p9"; 449 regulator-min-microvolt = <2912000>; 450 regulator-max-microvolt = <2912000>; 451 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 452 }; 453 454 vreg_l17b_2p5: ldo17 { 455 regulator-name = "vreg_l17b_2p5"; 456 regulator-min-microvolt = <2504000>; 457 regulator-max-microvolt = <2504000>; 458 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 459 }; 460 }; 461 462 regulators-1 { 463 compatible = "qcom,pm8550ve-rpmh-regulators"; 464 qcom,pmic-id = "c"; 465 466 vdd-l1-supply = <&vreg_s5j_1p2>; 467 vdd-l2-supply = <&vreg_s1f_0p7>; 468 vdd-l3-supply = <&vreg_s1f_0p7>; 469 vdd-s4-supply = <&vph_pwr>; 470 471 vreg_s4c_1p8: smps4 { 472 regulator-name = "vreg_s4c_1p8"; 473 regulator-min-microvolt = <1856000>; 474 regulator-max-microvolt = <2000000>; 475 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 476 }; 477 478 vreg_l1c_1p2: ldo1 { 479 regulator-name = "vreg_l1c_1p2"; 480 regulator-min-microvolt = <1200000>; 481 regulator-max-microvolt = <1200000>; 482 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 483 }; 484 485 vreg_l2c_0p8: ldo2 { 486 regulator-name = "vreg_l2c_0p8"; 487 regulator-min-microvolt = <880000>; 488 regulator-max-microvolt = <920000>; 489 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 490 }; 491 492 vreg_l3c_0p8: ldo3 { 493 regulator-name = "vreg_l3c_0p8"; 494 regulator-min-microvolt = <880000>; 495 regulator-max-microvolt = <920000>; 496 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 497 }; 498 }; 499 500 regulators-2 { 501 compatible = "qcom,pmc8380-rpmh-regulators"; 502 qcom,pmic-id = "d"; 503 504 vdd-l1-supply = <&vreg_s1f_0p7>; 505 vdd-l2-supply = <&vreg_s1f_0p7>; 506 vdd-l3-supply = <&vreg_s4c_1p8>; 507 vdd-s1-supply = <&vph_pwr>; 508 509 vreg_l1d_0p8: ldo1 { 510 regulator-name = "vreg_l1d_0p8"; 511 regulator-min-microvolt = <880000>; 512 regulator-max-microvolt = <920000>; 513 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 514 }; 515 516 vreg_l2d_0p9: ldo2 { 517 regulator-name = "vreg_l2d_0p9"; 518 regulator-min-microvolt = <912000>; 519 regulator-max-microvolt = <920000>; 520 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 521 }; 522 523 vreg_l3d_1p8: ldo3 { 524 regulator-name = "vreg_l3d_1p8"; 525 regulator-min-microvolt = <1800000>; 526 regulator-max-microvolt = <1800000>; 527 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 528 }; 529 }; 530 531 regulators-3 { 532 compatible = "qcom,pmc8380-rpmh-regulators"; 533 qcom,pmic-id = "e"; 534 535 vdd-l2-supply = <&vreg_s1f_0p7>; 536 vdd-l3-supply = <&vreg_s5j_1p2>; 537 538 vreg_l2e_0p8: ldo2 { 539 regulator-name = "vreg_l2e_0p8"; 540 regulator-min-microvolt = <880000>; 541 regulator-max-microvolt = <920000>; 542 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 543 }; 544 545 vreg_l3e_1p2: ldo3 { 546 regulator-name = "vreg_l3e_1p2"; 547 regulator-min-microvolt = <1200000>; 548 regulator-max-microvolt = <1200000>; 549 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 550 }; 551 }; 552 553 regulators-4 { 554 compatible = "qcom,pmc8380-rpmh-regulators"; 555 qcom,pmic-id = "f"; 556 557 vdd-l1-supply = <&vreg_s5j_1p2>; 558 vdd-l2-supply = <&vreg_s5j_1p2>; 559 vdd-l3-supply = <&vreg_s5j_1p2>; 560 vdd-s1-supply = <&vph_pwr>; 561 562 vreg_s1f_0p7: smps1 { 563 regulator-name = "vreg_s1f_0p7"; 564 regulator-min-microvolt = <700000>; 565 regulator-max-microvolt = <1100000>; 566 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 567 }; 568 569 vreg_l1f_1p0: ldo1 { 570 regulator-name = "vreg_l1f_1p0"; 571 regulator-min-microvolt = <1024000>; 572 regulator-max-microvolt = <1024000>; 573 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 574 }; 575 576 vreg_l2f_1p0: ldo2 { 577 regulator-name = "vreg_l2f_1p0"; 578 regulator-min-microvolt = <1024000>; 579 regulator-max-microvolt = <1024000>; 580 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 581 }; 582 583 vreg_l3f_1p0: ldo3 { 584 regulator-name = "vreg_l3f_1p0"; 585 regulator-min-microvolt = <1024000>; 586 regulator-max-microvolt = <1024000>; 587 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 588 }; 589 }; 590 591 regulators-6 { 592 compatible = "qcom,pm8550ve-rpmh-regulators"; 593 qcom,pmic-id = "i"; 594 595 vdd-l1-supply = <&vreg_s4c_1p8>; 596 vdd-l2-supply = <&vreg_s5j_1p2>; 597 vdd-l3-supply = <&vreg_s1f_0p7>; 598 vdd-s1-supply = <&vph_pwr>; 599 vdd-s2-supply = <&vph_pwr>; 600 601 vreg_s1i_0p9: smps1 { 602 regulator-name = "vreg_s1i_0p9"; 603 regulator-min-microvolt = <900000>; 604 regulator-max-microvolt = <920000>; 605 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 606 }; 607 608 vreg_s2i_1p0: smps2 { 609 regulator-name = "vreg_s2i_1p0"; 610 regulator-min-microvolt = <1000000>; 611 regulator-max-microvolt = <1100000>; 612 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 613 }; 614 615 vreg_l1i_1p8: ldo1 { 616 regulator-name = "vreg_l1i_1p8"; 617 regulator-min-microvolt = <1800000>; 618 regulator-max-microvolt = <1800000>; 619 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 620 }; 621 622 vreg_l2i_1p2: ldo2 { 623 regulator-name = "vreg_l2i_1p2"; 624 regulator-min-microvolt = <1200000>; 625 regulator-max-microvolt = <1200000>; 626 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 627 }; 628 629 vreg_l3i_0p8: ldo3 { 630 regulator-name = "vreg_l3i_0p8"; 631 regulator-min-microvolt = <880000>; 632 regulator-max-microvolt = <920000>; 633 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 634 }; 635 }; 636 637 regulators-7 { 638 compatible = "qcom,pm8550ve-rpmh-regulators"; 639 qcom,pmic-id = "j"; 640 641 vdd-l1-supply = <&vreg_s1f_0p7>; 642 vdd-l2-supply = <&vreg_s5j_1p2>; 643 vdd-l3-supply = <&vreg_s1f_0p7>; 644 vdd-s5-supply = <&vph_pwr>; 645 646 vreg_s5j_1p2: smps5 { 647 regulator-name = "vreg_s5j_1p2"; 648 regulator-min-microvolt = <1256000>; 649 regulator-max-microvolt = <1304000>; 650 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 651 }; 652 653 vreg_l1j_0p8: ldo1 { 654 regulator-name = "vreg_l1j_0p8"; 655 regulator-min-microvolt = <880000>; 656 regulator-max-microvolt = <920000>; 657 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 658 }; 659 660 vreg_l2j_1p2: ldo2 { 661 regulator-name = "vreg_l2j_1p2"; 662 regulator-min-microvolt = <1256000>; 663 regulator-max-microvolt = <1256000>; 664 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 665 }; 666 667 vreg_l3j_0p8: ldo3 { 668 regulator-name = "vreg_l3j_0p8"; 669 regulator-min-microvolt = <880000>; 670 regulator-max-microvolt = <920000>; 671 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 672 }; 673 }; 674}; 675 676&gpu { 677 status = "okay"; 678 679 zap-shader { 680 firmware-name = "qcom/x1e80100/gen70500_zap.mbn"; 681 }; 682}; 683 684&i2c0 { 685 clock-frequency = <400000>; 686 687 status = "okay"; 688 689 touchpad@15 { 690 compatible = "hid-over-i2c"; 691 reg = <0x15>; 692 693 hid-descr-addr = <0x1>; 694 interrupts-extended = <&tlmm 3 IRQ_TYPE_LEVEL_LOW>; 695 696 pinctrl-0 = <&tpad_default>; 697 pinctrl-names = "default"; 698 699 wakeup-source; 700 }; 701 702 keyboard@3a { 703 compatible = "hid-over-i2c"; 704 reg = <0x3a>; 705 706 hid-descr-addr = <0x1>; 707 interrupts-extended = <&tlmm 67 IRQ_TYPE_LEVEL_LOW>; 708 709 pinctrl-0 = <&kybd_default>; 710 pinctrl-names = "default"; 711 712 wakeup-source; 713 }; 714}; 715 716&i2c8 { 717 clock-frequency = <400000>; 718 719 status = "okay"; 720 721 touchscreen@10 { 722 compatible = "hid-over-i2c"; 723 reg = <0x10>; 724 725 hid-descr-addr = <0x1>; 726 interrupts-extended = <&tlmm 51 IRQ_TYPE_LEVEL_LOW>; 727 728 pinctrl-0 = <&ts0_default>; 729 pinctrl-names = "default"; 730 }; 731}; 732 733&lpass_tlmm { 734 spkr_01_sd_n_active: spkr-01-sd-n-active-state { 735 pins = "gpio12"; 736 function = "gpio"; 737 drive-strength = <16>; 738 bias-disable; 739 output-low; 740 }; 741 742 spkr_23_sd_n_active: spkr-23-sd-n-active-state { 743 pins = "gpio13"; 744 function = "gpio"; 745 drive-strength = <16>; 746 bias-disable; 747 output-low; 748 }; 749}; 750 751&lpass_vamacro { 752 pinctrl-0 = <&dmic01_default>, <&dmic23_default>; 753 pinctrl-names = "default"; 754 755 vdd-micb-supply = <&vreg_l1b_1p8>; 756 qcom,dmic-sample-rate = <4800000>; 757}; 758 759&mdss { 760 status = "okay"; 761}; 762 763&mdss_dp3 { 764 compatible = "qcom,x1e80100-dp"; 765 /delete-property/ #sound-dai-cells; 766 767 status = "okay"; 768 769 aux-bus { 770 panel { 771 compatible = "samsung,atna45af01", "samsung,atna33xc20"; 772 enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>; 773 power-supply = <&vreg_edp_3p3>; 774 775 pinctrl-0 = <&edp_bl_en>; 776 pinctrl-names = "default"; 777 778 port { 779 edp_panel_in: endpoint { 780 remote-endpoint = <&mdss_dp3_out>; 781 }; 782 }; 783 }; 784 }; 785 786 ports { 787 port@1 { 788 reg = <1>; 789 mdss_dp3_out: endpoint { 790 data-lanes = <0 1 2 3>; 791 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 792 793 remote-endpoint = <&edp_panel_in>; 794 }; 795 }; 796 }; 797}; 798 799&mdss_dp3_phy { 800 vdda-phy-supply = <&vreg_l3j_0p8>; 801 vdda-pll-supply = <&vreg_l2j_1p2>; 802 803 status = "okay"; 804}; 805 806&pcie4 { 807 perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>; 808 wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; 809 810 pinctrl-0 = <&pcie4_default>; 811 pinctrl-names = "default"; 812 813 status = "okay"; 814}; 815 816&pcie4_phy { 817 vdda-phy-supply = <&vreg_l3i_0p8>; 818 vdda-pll-supply = <&vreg_l3e_1p2>; 819 820 status = "okay"; 821}; 822 823&pcie5 { 824 perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>; 825 wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; 826 827 vddpe-3v3-supply = <&vreg_wwan>; 828 829 pinctrl-0 = <&pcie5_default>; 830 pinctrl-names = "default"; 831 832 status = "okay"; 833}; 834 835&pcie5_phy { 836 vdda-phy-supply = <&vreg_l3i_0p8>; 837 vdda-pll-supply = <&vreg_l3e_1p2>; 838 839 status = "okay"; 840}; 841 842&pcie6a { 843 perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; 844 wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; 845 846 vddpe-3v3-supply = <&vreg_nvme>; 847 848 pinctrl-names = "default"; 849 pinctrl-0 = <&pcie6a_default>; 850 851 status = "okay"; 852}; 853 854&pcie6a_phy { 855 vdda-phy-supply = <&vreg_l1d_0p8>; 856 vdda-pll-supply = <&vreg_l2j_1p2>; 857 858 status = "okay"; 859}; 860 861&pmc8380_3_gpios { 862 edp_bl_en: edp-bl-en-state { 863 pins = "gpio4"; 864 function = "normal"; 865 power-source = <1>; /* 1.8V */ 866 input-disable; 867 output-enable; 868 }; 869}; 870 871&qupv3_0 { 872 status = "okay"; 873}; 874 875&qupv3_1 { 876 status = "okay"; 877}; 878 879&qupv3_2 { 880 status = "okay"; 881}; 882 883&remoteproc_adsp { 884 firmware-name = "qcom/x1e80100/adsp.mbn", 885 "qcom/x1e80100/adsp_dtb.mbn"; 886 887 status = "okay"; 888}; 889 890&remoteproc_cdsp { 891 firmware-name = "qcom/x1e80100/cdsp.mbn", 892 "qcom/x1e80100/cdsp_dtb.mbn"; 893 894 status = "okay"; 895}; 896 897&smb2360_0_eusb2_repeater { 898 vdd18-supply = <&vreg_l3d_1p8>; 899 vdd3-supply = <&vreg_l2b_3p0>; 900}; 901 902&smb2360_1_eusb2_repeater { 903 vdd18-supply = <&vreg_l3d_1p8>; 904 vdd3-supply = <&vreg_l14b_3p0>; 905}; 906 907&smb2360_2 { 908 status = "okay"; 909}; 910 911&smb2360_2_eusb2_repeater { 912 vdd18-supply = <&vreg_l3d_1p8>; 913 vdd3-supply = <&vreg_l8b_3p0>; 914}; 915 916&swr0 { 917 status = "okay"; 918 919 pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>; 920 pinctrl-names = "default"; 921 922 /* WSA8845, Left Woofer */ 923 left_woofer: speaker@0,0 { 924 compatible = "sdw20217020400"; 925 reg = <0 0>; 926 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 927 #sound-dai-cells = <0>; 928 sound-name-prefix = "WooferLeft"; 929 vdd-1p8-supply = <&vreg_l15b_1p8>; 930 vdd-io-supply = <&vreg_l12b_1p2>; 931 qcom,port-mapping = <1 2 3 7 10 13>; 932 }; 933 934 /* WSA8845, Left Tweeter */ 935 left_tweeter: speaker@0,1 { 936 compatible = "sdw20217020400"; 937 reg = <0 1>; 938 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 939 #sound-dai-cells = <0>; 940 sound-name-prefix = "TweeterLeft"; 941 vdd-1p8-supply = <&vreg_l15b_1p8>; 942 vdd-io-supply = <&vreg_l12b_1p2>; 943 qcom,port-mapping = <4 5 6 7 11 13>; 944 }; 945}; 946 947&swr1 { 948 status = "okay"; 949 950 /* WCD9385 RX */ 951 wcd_rx: codec@0,4 { 952 compatible = "sdw20217010d00"; 953 reg = <0 4>; 954 qcom,rx-port-mapping = <1 2 3 4 5>; 955 }; 956}; 957 958&swr2 { 959 status = "okay"; 960 961 /* WCD9385 TX */ 962 wcd_tx: codec@0,3 { 963 compatible = "sdw20217010d00"; 964 reg = <0 3>; 965 qcom,tx-port-mapping = <2 2 3 4>; 966 }; 967}; 968 969&swr3 { 970 status = "okay"; 971 972 pinctrl-0 = <&wsa2_swr_active>, <&spkr_23_sd_n_active>; 973 pinctrl-names = "default"; 974 975 /* WSA8845, Right Woofer */ 976 right_woofer: speaker@0,0 { 977 compatible = "sdw20217020400"; 978 reg = <0 0>; 979 reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>; 980 #sound-dai-cells = <0>; 981 sound-name-prefix = "WooferRight"; 982 vdd-1p8-supply = <&vreg_l15b_1p8>; 983 vdd-io-supply = <&vreg_l12b_1p2>; 984 qcom,port-mapping = <1 2 3 7 10 13>; 985 }; 986 987 /* WSA8845, Right Tweeter */ 988 right_tweeter: speaker@0,1 { 989 compatible = "sdw20217020400"; 990 reg = <0 1>; 991 reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>; 992 #sound-dai-cells = <0>; 993 sound-name-prefix = "TweeterRight"; 994 vdd-1p8-supply = <&vreg_l15b_1p8>; 995 vdd-io-supply = <&vreg_l12b_1p2>; 996 qcom,port-mapping = <4 5 6 7 11 13>; 997 }; 998}; 999 1000&tlmm { 1001 gpio-reserved-ranges = <34 2>, /* Unused */ 1002 <44 4>, /* SPI (TPM) */ 1003 <238 1>; /* UFS Reset */ 1004 1005 edp_reg_en: edp-reg-en-state { 1006 pins = "gpio70"; 1007 function = "gpio"; 1008 drive-strength = <16>; 1009 bias-disable; 1010 }; 1011 1012 hall_int_n_default: hall-int-n-state { 1013 pins = "gpio92"; 1014 function = "gpio"; 1015 bias-disable; 1016 }; 1017 1018 kybd_default: kybd-default-state { 1019 pins = "gpio67"; 1020 function = "gpio"; 1021 bias-disable; 1022 }; 1023 1024 nvme_reg_en: nvme-reg-en-state { 1025 pins = "gpio18"; 1026 function = "gpio"; 1027 drive-strength = <2>; 1028 bias-disable; 1029 }; 1030 1031 pcie4_default: pcie4-default-state { 1032 clkreq-n-pins { 1033 pins = "gpio147"; 1034 function = "pcie4_clk"; 1035 drive-strength = <2>; 1036 bias-pull-up; 1037 }; 1038 1039 perst-n-pins { 1040 pins = "gpio146"; 1041 function = "gpio"; 1042 drive-strength = <2>; 1043 bias-disable; 1044 }; 1045 1046 wake-n-pins { 1047 pins = "gpio148"; 1048 function = "gpio"; 1049 drive-strength = <2>; 1050 bias-pull-up; 1051 }; 1052 }; 1053 1054 pcie5_default: pcie5-default-state { 1055 clkreq-n-pins { 1056 pins = "gpio150"; 1057 function = "pcie5_clk"; 1058 drive-strength = <2>; 1059 bias-pull-up; 1060 }; 1061 1062 perst-n-pins { 1063 pins = "gpio149"; 1064 function = "gpio"; 1065 drive-strength = <2>; 1066 bias-disable; 1067 }; 1068 1069 wake-n-pins { 1070 pins = "gpio151"; 1071 function = "gpio"; 1072 drive-strength = <2>; 1073 bias-pull-up; 1074 }; 1075 }; 1076 1077 pcie6a_default: pcie6a-default-state { 1078 clkreq-n-pins { 1079 pins = "gpio153"; 1080 function = "pcie6a_clk"; 1081 drive-strength = <2>; 1082 bias-pull-up; 1083 }; 1084 1085 perst-n-pins { 1086 pins = "gpio152"; 1087 function = "gpio"; 1088 drive-strength = <2>; 1089 bias-disable; 1090 }; 1091 1092 wake-n-pins { 1093 pins = "gpio154"; 1094 function = "gpio"; 1095 drive-strength = <2>; 1096 bias-pull-up; 1097 }; 1098 }; 1099 1100 tpad_default: tpad-default-state { 1101 pins = "gpio3"; 1102 function = "gpio"; 1103 bias-disable; 1104 }; 1105 1106 ts0_default: ts0-default-state { 1107 int-n-pins { 1108 pins = "gpio51"; 1109 function = "gpio"; 1110 bias-disable; 1111 }; 1112 1113 reset-n-pins { 1114 pins = "gpio48"; 1115 function = "gpio"; 1116 output-high; 1117 drive-strength = <16>; 1118 }; 1119 }; 1120 1121 wcd_default: wcd-reset-n-active-state { 1122 pins = "gpio191"; 1123 function = "gpio"; 1124 drive-strength = <16>; 1125 bias-disable; 1126 output-low; 1127 }; 1128 1129 wwan_sw_en: wwan-sw-en-state { 1130 pins = "gpio221"; 1131 function = "gpio"; 1132 drive-strength = <4>; 1133 bias-disable; 1134 }; 1135}; 1136 1137&uart21 { 1138 compatible = "qcom,geni-debug-uart"; 1139 status = "okay"; 1140}; 1141 1142&usb_1_ss0_hsphy { 1143 vdd-supply = <&vreg_l3j_0p8>; 1144 vdda12-supply = <&vreg_l2j_1p2>; 1145 1146 phys = <&smb2360_0_eusb2_repeater>; 1147 1148 status = "okay"; 1149}; 1150 1151&usb_1_ss0_qmpphy { 1152 vdda-phy-supply = <&vreg_l2j_1p2>; 1153 vdda-pll-supply = <&vreg_l1j_0p8>; 1154 1155 status = "okay"; 1156}; 1157 1158&usb_1_ss0 { 1159 status = "okay"; 1160}; 1161 1162&usb_1_ss0_dwc3 { 1163 dr_mode = "host"; 1164}; 1165 1166&usb_1_ss0_dwc3_hs { 1167 remote-endpoint = <&pmic_glink_ss0_hs_in>; 1168}; 1169 1170&usb_1_ss0_qmpphy_out { 1171 remote-endpoint = <&pmic_glink_ss0_ss_in>; 1172}; 1173 1174&usb_1_ss1_hsphy { 1175 vdd-supply = <&vreg_l3j_0p8>; 1176 vdda12-supply = <&vreg_l2j_1p2>; 1177 1178 phys = <&smb2360_1_eusb2_repeater>; 1179 1180 status = "okay"; 1181}; 1182 1183&usb_1_ss1_qmpphy { 1184 vdda-phy-supply = <&vreg_l2j_1p2>; 1185 vdda-pll-supply = <&vreg_l2d_0p9>; 1186 1187 status = "okay"; 1188}; 1189 1190&usb_1_ss1 { 1191 status = "okay"; 1192}; 1193 1194&usb_1_ss1_dwc3 { 1195 dr_mode = "host"; 1196}; 1197 1198&usb_1_ss1_dwc3_hs { 1199 remote-endpoint = <&pmic_glink_ss1_hs_in>; 1200}; 1201 1202&usb_1_ss1_qmpphy_out { 1203 remote-endpoint = <&pmic_glink_ss1_ss_in>; 1204}; 1205 1206&usb_1_ss2_hsphy { 1207 vdd-supply = <&vreg_l3j_0p8>; 1208 vdda12-supply = <&vreg_l2j_1p2>; 1209 1210 phys = <&smb2360_2_eusb2_repeater>; 1211 1212 status = "okay"; 1213}; 1214 1215&usb_1_ss2_qmpphy { 1216 vdda-phy-supply = <&vreg_l2j_1p2>; 1217 vdda-pll-supply = <&vreg_l2d_0p9>; 1218 1219 status = "okay"; 1220}; 1221 1222&usb_1_ss2 { 1223 status = "okay"; 1224}; 1225 1226&usb_1_ss2_dwc3 { 1227 dr_mode = "host"; 1228}; 1229 1230&usb_1_ss2_dwc3_hs { 1231 remote-endpoint = <&pmic_glink_ss2_hs_in>; 1232}; 1233 1234&usb_1_ss2_qmpphy_out { 1235 remote-endpoint = <&pmic_glink_ss2_ss_in>; 1236}; 1237