1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright 2020, Compass Electronics Group, LLC 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/clock/versaclock.h> 8 9/ { 10 memory@48000000 { 11 device_type = "memory"; 12 /* first 128MB is reserved for secure area. */ 13 reg = <0x0 0x48000000 0x0 0x78000000>; 14 }; 15 16 osc_32k: osc_32k { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 19 clock-frequency = <32768>; 20 clock-output-names = "osc_32k"; 21 }; 22 23 reg_1p8v: regulator-1p8v { 24 compatible = "regulator-fixed"; 25 regulator-name = "fixed-1.8V"; 26 regulator-min-microvolt = <1800000>; 27 regulator-max-microvolt = <1800000>; 28 regulator-boot-on; 29 regulator-always-on; 30 }; 31 32 reg_3p3v: regulator-3p3v { 33 compatible = "regulator-fixed"; 34 regulator-name = "fixed-3.3V"; 35 regulator-min-microvolt = <3300000>; 36 regulator-max-microvolt = <3300000>; 37 regulator-boot-on; 38 regulator-always-on; 39 }; 40 41 wlan_pwrseq: wlan_pwrseq { 42 compatible = "mmc-pwrseq-simple"; 43 reset-gpios = <&pca9654 1 GPIO_ACTIVE_LOW>; 44 clocks = <&osc_32k>; 45 clock-names = "ext_clock"; 46 post-power-on-delay-ms = <80>; 47 }; 48}; 49 50&avb { 51 pinctrl-0 = <&avb_pins>; 52 pinctrl-names = "default"; 53 phy-mode = "rgmii-rxid"; 54 phy-handle = <&phy0>; 55 rx-internal-delay-ps = <1800>; 56 tx-internal-delay-ps = <2000>; 57 clocks = <&cpg CPG_MOD 812>, <&versaclock5 4>; 58 clock-names = "fck", "refclk"; 59 status = "okay"; 60 61 phy0: ethernet-phy@0 { 62 compatible = "ethernet-phy-id0022.1640", 63 "ethernet-phy-ieee802.3-c22"; 64 reg = <0>; 65 interrupts-extended = <&gpio2 11 IRQ_TYPE_LEVEL_LOW>; 66 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 67 }; 68}; 69 70&extal_clk { 71 clock-frequency = <16666666>; 72}; 73 74&extalr_clk { 75 clock-frequency = <32768>; 76}; 77 78&gpio6 { 79 usb-hub-reset-hog { 80 gpio-hog; 81 gpios = <10 GPIO_ACTIVE_HIGH>; 82 output-high; 83 line-name = "usb-hub-reset"; 84 }; 85}; 86 87&hscif0 { 88 pinctrl-0 = <&hscif0_pins>; 89 pinctrl-names = "default"; 90 uart-has-rtscts; 91 status = "okay"; 92 93 bluetooth { 94 compatible = "brcm,bcm43438-bt"; 95 shutdown-gpios = <&pca9654 2 GPIO_ACTIVE_HIGH>; 96 host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; 97 device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>; 98 clocks = <&osc_32k>; 99 clock-names = "extclk"; 100 max-speed = <4000000>; 101 }; 102}; 103 104&hscif2 { 105 status = "okay"; 106 pinctrl-0 = <&hscif2_pins>; 107 pinctrl-names = "default"; 108}; 109 110&i2c4 { 111 status = "okay"; 112 clock-frequency = <100000>; 113 114 pca9654: gpio@20 { 115 compatible = "onnn,pca9654"; 116 reg = <0x20>; 117 gpio-controller; 118 #gpio-cells = <2>; 119 gpio-line-names = 120 "i2c4_20_0", 121 "wl_reg_on", 122 "bt_reg_on", 123 "i2c4_20_3", 124 "i2c4_20_4", 125 "bt_dev_wake", 126 "i2c4_20_6", 127 "i2c4_20_7"; 128 }; 129 130 pca9654_lte: gpio@21 { 131 compatible = "onnn,pca9654"; 132 reg = <0x21>; 133 interrupt-parent = <&gpio5>; 134 interrupts = <25 IRQ_TYPE_EDGE_FALLING>; 135 interrupt-controller; 136 #interrupt-cells = <2>; 137 gpio-controller; 138 #gpio-cells = <2>; 139 gpio-line-names = 140 "i2c4_21_0", 141 "zoe_pwr_on", 142 "zoe_extint", 143 "zoe_reset_n", 144 "sara_reset", 145 "i2c4_21_5", 146 "sara_pwr_off", 147 "sara_networking_status"; 148 }; 149 150 eeprom@50 { 151 compatible = "microchip,24c64", "atmel,24c64"; 152 pagesize = <32>; 153 read-only; /* Manufacturing EEPROM programmed at factory */ 154 reg = <0x50>; 155 }; 156 157 rtc@51 { 158 compatible = "nxp,pcf85263"; 159 reg = <0x51>; 160 }; 161 162 versaclock5: versaclock_som@6a { 163 compatible = "idt,5p49v6965"; 164 reg = <0x6a>; 165 #clock-cells = <1>; 166 clocks = <&x304_clk>; 167 clock-names = "xin"; 168 /* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */ 169 assigned-clocks = <&versaclock5 1>, 170 <&versaclock5 2>, 171 <&versaclock5 3>, 172 <&versaclock5 4>; 173 174 assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>; 175 176 OUT1 { 177 idt,mode = <VC5_CMOS>; 178 idt,voltage-microvolt = <1800000>; 179 idt,slew-percent = <100>; 180 }; 181 182 OUT2 { 183 idt,mode = <VC5_CMOS>; 184 idt,voltage-microvolt = <1800000>; 185 idt,slew-percent = <100>; 186 }; 187 188 OUT3 { 189 idt,mode = <VC5_CMOS>; 190 idt,voltage-microvolt = <1800000>; 191 idt,slew-percent = <100>; 192 }; 193 194 OUT4 { 195 idt,mode = <VC5_CMOS>; 196 idt,voltage-microvolt = <3300000>; 197 idt,slew-percent = <100>; 198 }; 199 }; 200}; 201 202&pfc { 203 pinctrl-0 = <&scif_clk_pins>; 204 pinctrl-names = "default"; 205 206 avb_pins: avb { 207 mux { 208 groups = "avb_link", "avb_mdio", "avb_mii"; 209 function = "avb"; 210 }; 211 212 pins_mdio { 213 groups = "avb_mdio"; 214 drive-strength = <24>; 215 }; 216 217 pins_mii_tx { 218 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", 219 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; 220 drive-strength = <12>; 221 }; 222 }; 223 224 scif2_pins: scif2 { 225 groups = "scif2_data_a"; 226 function = "scif2"; 227 }; 228 229 hscif0_pins: hscif0 { 230 groups = "hscif0_data", "hscif0_ctrl"; 231 function = "hscif0"; 232 }; 233 234 hscif1_pins: hscif1 { 235 groups = "hscif1_data_a", "hscif1_ctrl_a"; 236 function = "hscif1"; 237 }; 238 239 hscif2_pins: hscif2 { 240 groups = "hscif2_data_a"; 241 function = "hscif2"; 242 }; 243 244 scif0_pins: scif0 { 245 groups = "scif0_data"; 246 function = "scif0"; 247 }; 248 249 scif5_pins: scif5 { 250 groups = "scif5_data_a"; 251 function = "scif5"; 252 }; 253 254 scif_clk_pins: scif_clk { 255 groups = "scif_clk_a"; 256 function = "scif_clk"; 257 }; 258 259 i2c0_pins: i2c0 { 260 groups = "i2c0"; 261 function = "i2c0"; 262 }; 263 264 sdhi2_pins: sd2 { 265 groups = "sdhi2_data4", "sdhi2_ctrl"; 266 function = "sdhi2"; 267 power-source = <1800>; 268 }; 269 270 sdhi3_pins: sd3 { 271 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds"; 272 function = "sdhi3"; 273 power-source = <1800>; 274 }; 275}; 276 277&scif_clk { 278 clock-frequency = <14745600>; 279}; 280 281&scif2 { 282 pinctrl-0 = <&scif2_pins>; 283 pinctrl-names = "default"; 284 status = "okay"; 285}; 286 287&sdhi2 { 288 pinctrl-names = "default"; 289 pinctrl-0 = <&sdhi2_pins>; 290 bus-width = <4>; 291 vmmc-supply = <®_3p3v>; 292 vqmmc-supply = <®_1p8v>; 293 non-removable; 294 cap-power-off-card; 295 keep-power-in-suspend; 296 mmc-pwrseq = <&wlan_pwrseq>; 297 status = "okay"; 298 #address-cells = <1>; 299 #size-cells = <0>; 300 301 brcmf: bcrmf@1 { 302 reg = <1>; 303 compatible = "brcm,bcm4329-fmac"; 304 interrupt-parent = <&gpio1>; 305 interrupts = <27 IRQ_TYPE_LEVEL_LOW>; 306 interrupt-names = "host-wake"; 307 }; 308}; 309 310&sdhi3 { 311 pinctrl-0 = <&sdhi3_pins>; 312 pinctrl-1 = <&sdhi3_pins>; 313 pinctrl-names = "default", "state_uhs"; 314 vmmc-supply = <®_3p3v>; 315 vqmmc-supply = <®_1p8v>; 316 bus-width = <8>; 317 mmc-hs200-1_8v; 318 no-sd; 319 no-sdio; 320 non-removable; 321 fixed-emmc-driver-type = <1>; 322 status = "okay"; 323}; 324 325&usb2_clksel { 326 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, 327 <&versaclock5 3>, <&usb3s0_clk>; 328 status = "okay"; 329}; 330 331&usb3s0_clk { 332 clock-frequency = <100000000>; 333}; 334