1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car Gen3 ULCB board 4 * 5 * Copyright (C) 2016 Renesas Electronics Corp. 6 * Copyright (C) 2016 Cogent Embedded, Inc. 7 */ 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/input/input.h> 11 12/ { 13 model = "Renesas R-Car Gen3 ULCB board"; 14 15 aliases { 16 i2c0 = &i2c0; 17 i2c1 = &i2c1; 18 i2c2 = &i2c2; 19 i2c3 = &i2c3; 20 i2c4 = &i2c4; 21 i2c5 = &i2c5; 22 i2c6 = &i2c6; 23 i2c7 = &i2c_dvfs; 24 serial0 = &scif2; 25 ethernet0 = &avb; 26 mmc0 = &sdhi2; 27 mmc1 = &sdhi0; 28 }; 29 30 chosen { 31 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 32 stdout-path = "serial0:115200n8"; 33 }; 34 35 audio_clkout: audio-clkout { 36 /* 37 * This is same as <&rcar_sound 0> 38 * but needed to avoid cs2000/rcar_sound probe dead-lock 39 */ 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <12288000>; 43 }; 44 45 hdmi0-out { 46 compatible = "hdmi-connector"; 47 type = "a"; 48 49 port { 50 hdmi0_con: endpoint { 51 remote-endpoint = <&rcar_dw_hdmi0_out>; 52 }; 53 }; 54 }; 55 56 keyboard { 57 compatible = "gpio-keys"; 58 59 key-1 { 60 linux,code = <KEY_1>; 61 label = "SW3"; 62 wakeup-source; 63 debounce-interval = <20>; 64 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; 65 }; 66 }; 67 68 leds { 69 compatible = "gpio-leds"; 70 71 led5 { 72 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; 73 }; 74 led6 { 75 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; 76 }; 77 }; 78 79 reg_1p8v: regulator-1p8v { 80 compatible = "regulator-fixed"; 81 regulator-name = "fixed-1.8V"; 82 regulator-min-microvolt = <1800000>; 83 regulator-max-microvolt = <1800000>; 84 regulator-boot-on; 85 regulator-always-on; 86 }; 87 88 reg_3p3v: regulator-3p3v { 89 compatible = "regulator-fixed"; 90 regulator-name = "fixed-3.3V"; 91 regulator-min-microvolt = <3300000>; 92 regulator-max-microvolt = <3300000>; 93 regulator-boot-on; 94 regulator-always-on; 95 }; 96 97 vcc_sdhi0: regulator-vcc-sdhi0 { 98 compatible = "regulator-fixed"; 99 100 regulator-name = "SDHI0 Vcc"; 101 regulator-min-microvolt = <3300000>; 102 regulator-max-microvolt = <3300000>; 103 104 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; 105 enable-active-high; 106 }; 107 108 vccq_sdhi0: regulator-vccq-sdhi0 { 109 compatible = "regulator-gpio"; 110 111 regulator-name = "SDHI0 VccQ"; 112 regulator-min-microvolt = <1800000>; 113 regulator-max-microvolt = <3300000>; 114 115 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 116 gpios-states = <1>; 117 states = <3300000 1>, <1800000 0>; 118 }; 119 120 x12_clk: x12 { 121 compatible = "fixed-clock"; 122 #clock-cells = <0>; 123 clock-frequency = <24576000>; 124 }; 125 126 x23_clk: x23-clock { 127 compatible = "fixed-clock"; 128 #clock-cells = <0>; 129 clock-frequency = <25000000>; 130 }; 131}; 132 133&a57_0 { 134 cpu-supply = <&dvfs>; 135}; 136 137&audio_clk_a { 138 clock-frequency = <22579200>; 139}; 140 141&avb { 142 pinctrl-0 = <&avb_pins>; 143 pinctrl-names = "default"; 144 phy-handle = <&phy0>; 145 tx-internal-delay-ps = <2000>; 146 status = "okay"; 147 148 phy0: ethernet-phy@0 { 149 compatible = "ethernet-phy-id0022.1622", 150 "ethernet-phy-ieee802.3-c22"; 151 rxc-skew-ps = <1500>; 152 reg = <0>; 153 interrupts-extended = <&gpio2 11 IRQ_TYPE_LEVEL_LOW>; 154 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 155 }; 156}; 157 158&du { 159 status = "okay"; 160}; 161 162&ehci1 { 163 status = "okay"; 164}; 165 166&extal_clk { 167 clock-frequency = <16666666>; 168}; 169 170&extalr_clk { 171 clock-frequency = <32768>; 172}; 173 174&hdmi0 { 175 status = "okay"; 176 177 ports { 178 port@1 { 179 reg = <1>; 180 rcar_dw_hdmi0_out: endpoint { 181 remote-endpoint = <&hdmi0_con>; 182 }; 183 }; 184 port@2 { 185 reg = <2>; 186 }; 187 }; 188}; 189 190&i2c2 { 191 pinctrl-0 = <&i2c2_pins>; 192 pinctrl-names = "default"; 193 194 status = "okay"; 195 196 clock-frequency = <100000>; 197 198 ak4613: codec@10 { 199 compatible = "asahi-kasei,ak4613"; 200 reg = <0x10>; 201 clocks = <&rcar_sound 3>; 202 203 asahi-kasei,in1-single-end; 204 asahi-kasei,in2-single-end; 205 asahi-kasei,out1-single-end; 206 asahi-kasei,out2-single-end; 207 asahi-kasei,out3-single-end; 208 asahi-kasei,out4-single-end; 209 asahi-kasei,out5-single-end; 210 asahi-kasei,out6-single-end; 211 }; 212 213 cs2000: clk-multiplier@4f { 214 #clock-cells = <0>; 215 compatible = "cirrus,cs2000-cp"; 216 reg = <0x4f>; 217 clocks = <&audio_clkout>, <&x12_clk>; 218 clock-names = "clk_in", "ref_clk"; 219 220 assigned-clocks = <&cs2000>; 221 assigned-clock-rates = <24576000>; /* 1/1 divide */ 222 }; 223}; 224 225&i2c4 { 226 status = "okay"; 227 228 clock-frequency = <400000>; 229 230 versaclock5: clock-generator@6a { 231 compatible = "idt,5p49v5925"; 232 reg = <0x6a>; 233 #clock-cells = <1>; 234 clocks = <&x23_clk>; 235 clock-names = "xin"; 236 }; 237}; 238 239&i2c_dvfs { 240 status = "okay"; 241 242 clock-frequency = <400000>; 243 244 pmic: pmic@30 { 245 pinctrl-0 = <&irq0_pins>; 246 pinctrl-names = "default"; 247 248 compatible = "rohm,bd9571mwv"; 249 reg = <0x30>; 250 interrupt-parent = <&intc_ex>; 251 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 252 interrupt-controller; 253 #interrupt-cells = <2>; 254 gpio-controller; 255 #gpio-cells = <2>; 256 rohm,ddr-backup-power = <0xf>; 257 rohm,rstbmode-pulse; 258 259 regulators { 260 dvfs: dvfs { 261 regulator-name = "dvfs"; 262 regulator-min-microvolt = <750000>; 263 regulator-max-microvolt = <1030000>; 264 regulator-boot-on; 265 regulator-always-on; 266 }; 267 }; 268 }; 269 270 eeprom@50 { 271 compatible = "rohm,br24t01", "atmel,24c01"; 272 reg = <0x50>; 273 pagesize = <8>; 274 }; 275}; 276 277&ohci1 { 278 status = "okay"; 279}; 280 281&pfc { 282 pinctrl-0 = <&scif_clk_pins>; 283 pinctrl-names = "default"; 284 285 avb_pins: avb { 286 mux { 287 groups = "avb_link", "avb_mdio", "avb_mii"; 288 function = "avb"; 289 }; 290 291 pins_mdio { 292 groups = "avb_mdio"; 293 drive-strength = <24>; 294 }; 295 296 pins_mii_tx { 297 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", 298 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; 299 drive-strength = <12>; 300 }; 301 }; 302 303 i2c2_pins: i2c2 { 304 groups = "i2c2_a"; 305 function = "i2c2"; 306 }; 307 308 irq0_pins: irq0 { 309 groups = "intc_ex_irq0"; 310 function = "intc_ex"; 311 }; 312 313 scif2_pins: scif2 { 314 groups = "scif2_data_a"; 315 function = "scif2"; 316 }; 317 318 scif_clk_pins: scif_clk { 319 groups = "scif_clk_a"; 320 function = "scif_clk"; 321 }; 322 323 sdhi0_pins: sd0 { 324 groups = "sdhi0_data4", "sdhi0_ctrl"; 325 function = "sdhi0"; 326 power-source = <3300>; 327 }; 328 329 sdhi0_pins_uhs: sd0_uhs { 330 groups = "sdhi0_data4", "sdhi0_ctrl"; 331 function = "sdhi0"; 332 power-source = <1800>; 333 }; 334 335 sdhi2_pins: sd2 { 336 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; 337 function = "sdhi2"; 338 power-source = <1800>; 339 }; 340 341 sound_pins: sound { 342 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; 343 function = "ssi"; 344 }; 345 346 sound_clk_pins: sound-clk { 347 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", 348 "audio_clkout_a", "audio_clkout3_a"; 349 function = "audio_clk"; 350 }; 351 352 usb1_pins: usb1 { 353 groups = "usb1"; 354 function = "usb1"; 355 }; 356}; 357 358&rcar_sound { 359 pinctrl-0 = <&sound_pins>, <&sound_clk_pins>; 360 pinctrl-names = "default"; 361 362 /* audio_clkout0/1/2/3 */ 363 #clock-cells = <1>; 364 clock-frequency = <12288000 11289600>; 365 366 status = "okay"; 367 368 /* update <audio_clk_b> to <cs2000> */ 369 clocks = <&cpg CPG_MOD 1005>, 370 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 371 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 372 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 373 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 374 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 375 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 376 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 377 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 378 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 379 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 380 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 381 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 382 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 383 <&audio_clk_a>, <&cs2000>, 384 <&audio_clk_c>, 385 <&cpg CPG_MOD 922>; 386}; 387 388&rpc { 389 /* Left disabled. To be enabled by firmware when unlocked. */ 390 391 flash@0 { 392 compatible = "cypress,hyperflash", "cfi-flash"; 393 reg = <0>; 394 395 partitions { 396 compatible = "fixed-partitions"; 397 #address-cells = <1>; 398 #size-cells = <1>; 399 400 bootparam@0 { 401 reg = <0x00000000 0x040000>; 402 read-only; 403 }; 404 bl2@40000 { 405 reg = <0x00040000 0x140000>; 406 read-only; 407 }; 408 cert_header_sa6@180000 { 409 reg = <0x00180000 0x040000>; 410 read-only; 411 }; 412 bl31@1c0000 { 413 reg = <0x001c0000 0x040000>; 414 read-only; 415 }; 416 tee@200000 { 417 reg = <0x00200000 0x440000>; 418 read-only; 419 }; 420 uboot@640000 { 421 reg = <0x00640000 0x100000>; 422 read-only; 423 }; 424 dtb@740000 { 425 reg = <0x00740000 0x080000>; 426 }; 427 kernel@7c0000 { 428 reg = <0x007c0000 0x1400000>; 429 }; 430 user@1bc0000 { 431 reg = <0x01bc0000 0x2440000>; 432 }; 433 }; 434 }; 435}; 436 437&rwdt { 438 timeout-sec = <60>; 439 status = "okay"; 440}; 441 442&scif2 { 443 pinctrl-0 = <&scif2_pins>; 444 pinctrl-names = "default"; 445 446 status = "okay"; 447}; 448 449&scif_clk { 450 clock-frequency = <14745600>; 451}; 452 453&sdhi0 { 454 pinctrl-0 = <&sdhi0_pins>; 455 pinctrl-1 = <&sdhi0_pins_uhs>; 456 pinctrl-names = "default", "state_uhs"; 457 458 vmmc-supply = <&vcc_sdhi0>; 459 vqmmc-supply = <&vccq_sdhi0>; 460 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 461 bus-width = <4>; 462 sd-uhs-sdr50; 463 sd-uhs-sdr104; 464 status = "okay"; 465}; 466 467&sdhi2 { 468 /* used for on-board 8bit eMMC */ 469 pinctrl-0 = <&sdhi2_pins>; 470 pinctrl-1 = <&sdhi2_pins>; 471 pinctrl-names = "default", "state_uhs"; 472 473 vmmc-supply = <®_3p3v>; 474 vqmmc-supply = <®_1p8v>; 475 bus-width = <8>; 476 mmc-hs200-1_8v; 477 mmc-hs400-1_8v; 478 no-sd; 479 no-sdio; 480 non-removable; 481 full-pwr-cycle-in-suspend; 482 status = "okay"; 483}; 484 485&ssi1 { 486 shared-pin; 487}; 488 489&usb2_phy1 { 490 pinctrl-0 = <&usb1_pins>; 491 pinctrl-names = "default"; 492 493 status = "okay"; 494}; 495 496 497/* 498 * For sound-test. 499 * 500 * We can switch Audio Card for testing 501 * 502 * #include "ulcb-simple-audio-card.dtsi" 503 * #include "ulcb-simple-audio-card-mix+split.dtsi" 504 * #include "ulcb-audio-graph-card.dtsi" 505 * #include "ulcb-audio-graph-card-mix+split.dtsi" 506 * #include "ulcb-audio-graph-card2-mix+split.dtsi" 507 */ 508#include "ulcb-audio-graph-card2.dtsi" 509