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1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // ALSA SoC Texas Instruments TAS2770 20-W Digital Input Mono Class-D
4 // Audio Amplifier with Speaker I/V Sense
5 //
6 // Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
7 //	Author: Tracy Yi <tracy-yi@ti.com>
8 //	Frank Shi <shifu0704@thundersoft.com>
9 
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/err.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/pm.h>
16 #include <linux/i2c.h>
17 #include <linux/gpio/consumer.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/firmware.h>
20 #include <linux/regmap.h>
21 #include <linux/of.h>
22 #include <linux/slab.h>
23 #include <sound/soc.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/initval.h>
27 #include <sound/tlv.h>
28 
29 #include "tas2770.h"
30 
31 #define TAS2770_MDELAY 0xFFFFFFFE
32 
tas2770_reset(struct tas2770_priv * tas2770)33 static void tas2770_reset(struct tas2770_priv *tas2770)
34 {
35 	if (tas2770->reset_gpio) {
36 		gpiod_set_value_cansleep(tas2770->reset_gpio, 0);
37 		msleep(20);
38 		gpiod_set_value_cansleep(tas2770->reset_gpio, 1);
39 		usleep_range(1000, 2000);
40 	}
41 
42 	snd_soc_component_write(tas2770->component, TAS2770_SW_RST,
43 		TAS2770_RST);
44 	usleep_range(1000, 2000);
45 }
46 
tas2770_update_pwr_ctrl(struct tas2770_priv * tas2770)47 static int tas2770_update_pwr_ctrl(struct tas2770_priv *tas2770)
48 {
49 	struct snd_soc_component *component = tas2770->component;
50 	unsigned int val;
51 	int ret;
52 
53 	if (tas2770->dac_powered)
54 		val = tas2770->unmuted ?
55 			TAS2770_PWR_CTRL_ACTIVE : TAS2770_PWR_CTRL_MUTE;
56 	else
57 		val = TAS2770_PWR_CTRL_SHUTDOWN;
58 
59 	ret = snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
60 					    TAS2770_PWR_CTRL_MASK, val);
61 	if (ret < 0)
62 		return ret;
63 
64 	return 0;
65 }
66 
67 #ifdef CONFIG_PM
tas2770_codec_suspend(struct snd_soc_component * component)68 static int tas2770_codec_suspend(struct snd_soc_component *component)
69 {
70 	struct tas2770_priv *tas2770 = snd_soc_component_get_drvdata(component);
71 	int ret = 0;
72 
73 	regcache_cache_only(tas2770->regmap, true);
74 	regcache_mark_dirty(tas2770->regmap);
75 
76 	if (tas2770->sdz_gpio) {
77 		gpiod_set_value_cansleep(tas2770->sdz_gpio, 0);
78 	} else {
79 		ret = snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
80 						    TAS2770_PWR_CTRL_MASK,
81 						    TAS2770_PWR_CTRL_SHUTDOWN);
82 		if (ret < 0) {
83 			regcache_cache_only(tas2770->regmap, false);
84 			regcache_sync(tas2770->regmap);
85 			return ret;
86 		}
87 
88 		ret = 0;
89 	}
90 
91 	return ret;
92 }
93 
tas2770_codec_resume(struct snd_soc_component * component)94 static int tas2770_codec_resume(struct snd_soc_component *component)
95 {
96 	struct tas2770_priv *tas2770 = snd_soc_component_get_drvdata(component);
97 	int ret;
98 
99 	if (tas2770->sdz_gpio) {
100 		gpiod_set_value_cansleep(tas2770->sdz_gpio, 1);
101 		usleep_range(1000, 2000);
102 	} else {
103 		ret = tas2770_update_pwr_ctrl(tas2770);
104 		if (ret < 0)
105 			return ret;
106 	}
107 
108 	regcache_cache_only(tas2770->regmap, false);
109 
110 	return regcache_sync(tas2770->regmap);
111 }
112 #else
113 #define tas2770_codec_suspend NULL
114 #define tas2770_codec_resume NULL
115 #endif
116 
117 static const char * const tas2770_ASI1_src[] = {
118 	"I2C offset", "Left", "Right", "LeftRightDiv2",
119 };
120 
121 static SOC_ENUM_SINGLE_DECL(
122 	tas2770_ASI1_src_enum, TAS2770_TDM_CFG_REG2,
123 	4, tas2770_ASI1_src);
124 
125 static const struct snd_kcontrol_new tas2770_asi1_mux =
126 	SOC_DAPM_ENUM("ASI1 Source", tas2770_ASI1_src_enum);
127 
tas2770_dac_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)128 static int tas2770_dac_event(struct snd_soc_dapm_widget *w,
129 			     struct snd_kcontrol *kcontrol, int event)
130 {
131 	struct snd_soc_component *component =
132 			snd_soc_dapm_to_component(w->dapm);
133 	struct tas2770_priv *tas2770 =
134 			snd_soc_component_get_drvdata(component);
135 	int ret;
136 
137 	switch (event) {
138 	case SND_SOC_DAPM_POST_PMU:
139 		tas2770->dac_powered = 1;
140 		ret = tas2770_update_pwr_ctrl(tas2770);
141 		break;
142 	case SND_SOC_DAPM_PRE_PMD:
143 		tas2770->dac_powered = 0;
144 		ret = tas2770_update_pwr_ctrl(tas2770);
145 		break;
146 	default:
147 		dev_err(tas2770->dev, "Not supported evevt\n");
148 		return -EINVAL;
149 	}
150 
151 	return ret;
152 }
153 
154 static const struct snd_kcontrol_new isense_switch =
155 	SOC_DAPM_SINGLE("Switch", TAS2770_PWR_CTRL, 3, 1, 1);
156 static const struct snd_kcontrol_new vsense_switch =
157 	SOC_DAPM_SINGLE("Switch", TAS2770_PWR_CTRL, 2, 1, 1);
158 
sense_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)159 static int sense_event(struct snd_soc_dapm_widget *w,
160 			struct snd_kcontrol *kcontrol, int event)
161 {
162 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
163 	struct tas2770_priv *tas2770 = snd_soc_component_get_drvdata(component);
164 
165 	/*
166 	 * Powering up ISENSE/VSENSE requires a trip through the shutdown state.
167 	 * Do that here to ensure that our changes are applied properly, otherwise
168 	 * we might end up with non-functional IVSENSE if playback started earlier,
169 	 * which would break software speaker protection.
170 	 */
171 	switch (event) {
172 	case SND_SOC_DAPM_PRE_REG:
173 		return snd_soc_component_update_bits(component, TAS2770_PWR_CTRL,
174 						    TAS2770_PWR_CTRL_MASK,
175 						    TAS2770_PWR_CTRL_SHUTDOWN);
176 	case SND_SOC_DAPM_POST_REG:
177 		return tas2770_update_pwr_ctrl(tas2770);
178 	default:
179 		return 0;
180 	}
181 }
182 
183 static const struct snd_soc_dapm_widget tas2770_dapm_widgets[] = {
184 	SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
185 	SND_SOC_DAPM_MUX("ASI1 Sel", SND_SOC_NOPM, 0, 0, &tas2770_asi1_mux),
186 	SND_SOC_DAPM_SWITCH_E("ISENSE", TAS2770_PWR_CTRL, 3, 1, &isense_switch,
187 		sense_event, SND_SOC_DAPM_PRE_REG | SND_SOC_DAPM_POST_REG),
188 	SND_SOC_DAPM_SWITCH_E("VSENSE", TAS2770_PWR_CTRL, 2, 1, &vsense_switch,
189 		sense_event, SND_SOC_DAPM_PRE_REG | SND_SOC_DAPM_POST_REG),
190 	SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas2770_dac_event,
191 			   SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
192 	SND_SOC_DAPM_OUTPUT("OUT"),
193 	SND_SOC_DAPM_SIGGEN("VMON"),
194 	SND_SOC_DAPM_SIGGEN("IMON")
195 };
196 
197 static const struct snd_soc_dapm_route tas2770_audio_map[] = {
198 	{"ASI1 Sel", "I2C offset", "ASI1"},
199 	{"ASI1 Sel", "Left", "ASI1"},
200 	{"ASI1 Sel", "Right", "ASI1"},
201 	{"ASI1 Sel", "LeftRightDiv2", "ASI1"},
202 	{"DAC", NULL, "ASI1 Sel"},
203 	{"OUT", NULL, "DAC"},
204 	{"ISENSE", "Switch", "IMON"},
205 	{"VSENSE", "Switch", "VMON"},
206 };
207 
tas2770_mute(struct snd_soc_dai * dai,int mute,int direction)208 static int tas2770_mute(struct snd_soc_dai *dai, int mute, int direction)
209 {
210 	struct snd_soc_component *component = dai->component;
211 	struct tas2770_priv *tas2770 =
212 			snd_soc_component_get_drvdata(component);
213 
214 	tas2770->unmuted = !mute;
215 	return tas2770_update_pwr_ctrl(tas2770);
216 }
217 
tas2770_set_bitwidth(struct tas2770_priv * tas2770,int bitwidth)218 static int tas2770_set_bitwidth(struct tas2770_priv *tas2770, int bitwidth)
219 {
220 	int ret;
221 	struct snd_soc_component *component = tas2770->component;
222 
223 	switch (bitwidth) {
224 	case SNDRV_PCM_FORMAT_S16_LE:
225 		ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
226 						    TAS2770_TDM_CFG_REG2_RXW_MASK,
227 						    TAS2770_TDM_CFG_REG2_RXW_16BITS);
228 		tas2770->v_sense_slot = tas2770->i_sense_slot + 2;
229 		break;
230 	case SNDRV_PCM_FORMAT_S24_LE:
231 		ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
232 						    TAS2770_TDM_CFG_REG2_RXW_MASK,
233 						    TAS2770_TDM_CFG_REG2_RXW_24BITS);
234 		tas2770->v_sense_slot = tas2770->i_sense_slot + 4;
235 		break;
236 	case SNDRV_PCM_FORMAT_S32_LE:
237 		ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
238 						    TAS2770_TDM_CFG_REG2_RXW_MASK,
239 						    TAS2770_TDM_CFG_REG2_RXW_32BITS);
240 		tas2770->v_sense_slot = tas2770->i_sense_slot + 4;
241 		break;
242 
243 	default:
244 		return -EINVAL;
245 	}
246 
247 	if (ret < 0)
248 		return ret;
249 
250 	ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG5,
251 					    TAS2770_TDM_CFG_REG5_VSNS_MASK |
252 					    TAS2770_TDM_CFG_REG5_50_MASK,
253 					    TAS2770_TDM_CFG_REG5_VSNS_ENABLE |
254 		tas2770->v_sense_slot);
255 	if (ret < 0)
256 		return ret;
257 
258 	ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG6,
259 					    TAS2770_TDM_CFG_REG6_ISNS_MASK |
260 					    TAS2770_TDM_CFG_REG6_50_MASK,
261 					    TAS2770_TDM_CFG_REG6_ISNS_ENABLE |
262 					    tas2770->i_sense_slot);
263 	if (ret < 0)
264 		return ret;
265 
266 	return 0;
267 }
268 
tas2770_set_samplerate(struct tas2770_priv * tas2770,int samplerate)269 static int tas2770_set_samplerate(struct tas2770_priv *tas2770, int samplerate)
270 {
271 	struct snd_soc_component *component = tas2770->component;
272 	int ramp_rate_val;
273 	int ret;
274 
275 	switch (samplerate) {
276 	case 48000:
277 		ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
278 				TAS2770_TDM_CFG_REG0_31_44_1_48KHZ;
279 		break;
280 	case 44100:
281 		ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
282 				TAS2770_TDM_CFG_REG0_31_44_1_48KHZ;
283 		break;
284 	case 96000:
285 		ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
286 				TAS2770_TDM_CFG_REG0_31_88_2_96KHZ;
287 		break;
288 	case 88200:
289 		ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
290 				TAS2770_TDM_CFG_REG0_31_88_2_96KHZ;
291 		break;
292 	case 192000:
293 		ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_48KHZ |
294 				TAS2770_TDM_CFG_REG0_31_176_4_192KHZ;
295 		break;
296 	case 176400:
297 		ramp_rate_val = TAS2770_TDM_CFG_REG0_SMP_44_1KHZ |
298 				TAS2770_TDM_CFG_REG0_31_176_4_192KHZ;
299 		break;
300 	default:
301 		return -EINVAL;
302 	}
303 
304 	ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
305 					    TAS2770_TDM_CFG_REG0_SMP_MASK |
306 					    TAS2770_TDM_CFG_REG0_31_MASK,
307 					    ramp_rate_val);
308 	if (ret < 0)
309 		return ret;
310 
311 	return 0;
312 }
313 
tas2770_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)314 static int tas2770_hw_params(struct snd_pcm_substream *substream,
315 			     struct snd_pcm_hw_params *params,
316 			     struct snd_soc_dai *dai)
317 {
318 	struct snd_soc_component *component = dai->component;
319 	struct tas2770_priv *tas2770 =
320 			snd_soc_component_get_drvdata(component);
321 	int ret;
322 
323 	ret = tas2770_set_bitwidth(tas2770, params_format(params));
324 	if (ret)
325 		return ret;
326 
327 	return tas2770_set_samplerate(tas2770, params_rate(params));
328 }
329 
tas2770_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)330 static int tas2770_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
331 {
332 	struct snd_soc_component *component = dai->component;
333 	struct tas2770_priv *tas2770 =
334 			snd_soc_component_get_drvdata(component);
335 	u8 tdm_rx_start_slot = 0, invert_fpol = 0, fpol_preinv = 0, asi_cfg_1 = 0;
336 	int ret;
337 
338 	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
339 	case SND_SOC_DAIFMT_CBC_CFC:
340 		break;
341 	default:
342 		dev_err(tas2770->dev, "ASI invalid DAI clocking\n");
343 		return -EINVAL;
344 	}
345 
346 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
347 	case SND_SOC_DAIFMT_NB_IF:
348 		invert_fpol = 1;
349 		fallthrough;
350 	case SND_SOC_DAIFMT_NB_NF:
351 		asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_RSING;
352 		break;
353 	case SND_SOC_DAIFMT_IB_IF:
354 		invert_fpol = 1;
355 		fallthrough;
356 	case SND_SOC_DAIFMT_IB_NF:
357 		asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_FALING;
358 		break;
359 	default:
360 		dev_err(tas2770->dev, "ASI format Inverse is not found\n");
361 		return -EINVAL;
362 	}
363 
364 	ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG1,
365 					    TAS2770_TDM_CFG_REG1_RX_MASK,
366 					    asi_cfg_1);
367 	if (ret < 0)
368 		return ret;
369 
370 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
371 	case SND_SOC_DAIFMT_I2S:
372 		tdm_rx_start_slot = 1;
373 		fpol_preinv = 0;
374 		break;
375 	case SND_SOC_DAIFMT_DSP_A:
376 		tdm_rx_start_slot = 0;
377 		fpol_preinv = 1;
378 		break;
379 	case SND_SOC_DAIFMT_DSP_B:
380 		tdm_rx_start_slot = 1;
381 		fpol_preinv = 1;
382 		break;
383 	case SND_SOC_DAIFMT_LEFT_J:
384 		tdm_rx_start_slot = 0;
385 		fpol_preinv = 1;
386 		break;
387 	default:
388 		dev_err(tas2770->dev,
389 			"DAI Format is not found, fmt=0x%x\n", fmt);
390 		return -EINVAL;
391 	}
392 
393 	ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG1,
394 					    TAS2770_TDM_CFG_REG1_MASK,
395 					    (tdm_rx_start_slot << TAS2770_TDM_CFG_REG1_51_SHIFT));
396 	if (ret < 0)
397 		return ret;
398 
399 	ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
400 					    TAS2770_TDM_CFG_REG0_FPOL_MASK,
401 					    (fpol_preinv ^ invert_fpol)
402 					     ? TAS2770_TDM_CFG_REG0_FPOL_RSING
403 					     : TAS2770_TDM_CFG_REG0_FPOL_FALING);
404 	if (ret < 0)
405 		return ret;
406 
407 	return 0;
408 }
409 
tas2770_set_dai_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)410 static int tas2770_set_dai_tdm_slot(struct snd_soc_dai *dai,
411 				unsigned int tx_mask,
412 				unsigned int rx_mask,
413 				int slots, int slot_width)
414 {
415 	struct snd_soc_component *component = dai->component;
416 	int left_slot, right_slot;
417 	int ret;
418 
419 	if (tx_mask == 0 || rx_mask != 0)
420 		return -EINVAL;
421 
422 	left_slot = __ffs(tx_mask);
423 	tx_mask &= ~(1 << left_slot);
424 	if (tx_mask == 0) {
425 		right_slot = left_slot;
426 	} else {
427 		right_slot = __ffs(tx_mask);
428 		tx_mask &= ~(1 << right_slot);
429 	}
430 
431 	if (tx_mask != 0 || left_slot >= slots || right_slot >= slots)
432 		return -EINVAL;
433 
434 	ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG3,
435 					    TAS2770_TDM_CFG_REG3_30_MASK,
436 					    (left_slot << TAS2770_TDM_CFG_REG3_30_SHIFT));
437 	if (ret < 0)
438 		return ret;
439 	ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG3,
440 					    TAS2770_TDM_CFG_REG3_RXS_MASK,
441 					    (right_slot << TAS2770_TDM_CFG_REG3_RXS_SHIFT));
442 	if (ret < 0)
443 		return ret;
444 
445 	switch (slot_width) {
446 	case 16:
447 		ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
448 						    TAS2770_TDM_CFG_REG2_RXS_MASK,
449 						    TAS2770_TDM_CFG_REG2_RXS_16BITS);
450 		break;
451 	case 24:
452 		ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
453 						    TAS2770_TDM_CFG_REG2_RXS_MASK,
454 						    TAS2770_TDM_CFG_REG2_RXS_24BITS);
455 		break;
456 	case 32:
457 		ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG2,
458 						    TAS2770_TDM_CFG_REG2_RXS_MASK,
459 						    TAS2770_TDM_CFG_REG2_RXS_32BITS);
460 		break;
461 	case 0:
462 		/* Do not change slot width */
463 		ret = 0;
464 		break;
465 	default:
466 		ret = -EINVAL;
467 	}
468 
469 	if (ret < 0)
470 		return ret;
471 
472 	return 0;
473 }
474 
475 static const struct snd_soc_dai_ops tas2770_dai_ops = {
476 	.mute_stream = tas2770_mute,
477 	.hw_params  = tas2770_hw_params,
478 	.set_fmt    = tas2770_set_fmt,
479 	.set_tdm_slot = tas2770_set_dai_tdm_slot,
480 	.no_capture_mute = 1,
481 };
482 
483 #define TAS2770_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
484 		SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
485 
486 #define TAS2770_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
487 					   SNDRV_PCM_RATE_96000 |\
488 					    SNDRV_PCM_RATE_192000\
489 					  )
490 
491 static struct snd_soc_dai_driver tas2770_dai_driver[] = {
492 	{
493 		.name = "tas2770 ASI1",
494 		.id = 0,
495 		.playback = {
496 			.stream_name    = "ASI1 Playback",
497 			.channels_min   = 1,
498 			.channels_max   = 2,
499 			.rates      = TAS2770_RATES,
500 			.formats    = TAS2770_FORMATS,
501 		},
502 		.capture = {
503 			.stream_name    = "ASI1 Capture",
504 			.channels_min   = 0,
505 			.channels_max   = 2,
506 			.rates          = TAS2770_RATES,
507 			.formats    = TAS2770_FORMATS,
508 		},
509 		.ops = &tas2770_dai_ops,
510 		.symmetric_rate = 1,
511 	},
512 };
513 
514 static const struct regmap_config tas2770_i2c_regmap;
515 
tas2770_codec_probe(struct snd_soc_component * component)516 static int tas2770_codec_probe(struct snd_soc_component *component)
517 {
518 	struct tas2770_priv *tas2770 =
519 			snd_soc_component_get_drvdata(component);
520 
521 	tas2770->component = component;
522 
523 	if (tas2770->sdz_gpio) {
524 		gpiod_set_value_cansleep(tas2770->sdz_gpio, 1);
525 		usleep_range(1000, 2000);
526 	}
527 
528 	tas2770_reset(tas2770);
529 	regmap_reinit_cache(tas2770->regmap, &tas2770_i2c_regmap);
530 
531 	return 0;
532 }
533 
534 static DECLARE_TLV_DB_SCALE(tas2770_digital_tlv, 1100, 50, 0);
535 static DECLARE_TLV_DB_SCALE(tas2770_playback_volume, -10050, 50, 0);
536 
537 static const struct snd_kcontrol_new tas2770_snd_controls[] = {
538 	SOC_SINGLE_TLV("Speaker Playback Volume", TAS2770_PLAY_CFG_REG2,
539 		       0, TAS2770_PLAY_CFG_REG2_VMAX, 1, tas2770_playback_volume),
540 	SOC_SINGLE_TLV("Amp Gain Volume", TAS2770_PLAY_CFG_REG0, 0, 0x14, 0,
541 		       tas2770_digital_tlv),
542 };
543 
544 static const struct snd_soc_component_driver soc_component_driver_tas2770 = {
545 	.probe			= tas2770_codec_probe,
546 	.suspend		= tas2770_codec_suspend,
547 	.resume			= tas2770_codec_resume,
548 	.controls		= tas2770_snd_controls,
549 	.num_controls		= ARRAY_SIZE(tas2770_snd_controls),
550 	.dapm_widgets		= tas2770_dapm_widgets,
551 	.num_dapm_widgets	= ARRAY_SIZE(tas2770_dapm_widgets),
552 	.dapm_routes		= tas2770_audio_map,
553 	.num_dapm_routes	= ARRAY_SIZE(tas2770_audio_map),
554 	.idle_bias_on		= 1,
555 	.endianness		= 1,
556 };
557 
tas2770_register_codec(struct tas2770_priv * tas2770)558 static int tas2770_register_codec(struct tas2770_priv *tas2770)
559 {
560 	return devm_snd_soc_register_component(tas2770->dev,
561 		&soc_component_driver_tas2770,
562 		tas2770_dai_driver, ARRAY_SIZE(tas2770_dai_driver));
563 }
564 
565 static const struct reg_default tas2770_reg_defaults[] = {
566 	{ TAS2770_PAGE, 0x00 },
567 	{ TAS2770_SW_RST, 0x00 },
568 	{ TAS2770_PWR_CTRL, 0x0e },
569 	{ TAS2770_PLAY_CFG_REG0, 0x10 },
570 	{ TAS2770_PLAY_CFG_REG1, 0x01 },
571 	{ TAS2770_PLAY_CFG_REG2, 0x00 },
572 	{ TAS2770_MSC_CFG_REG0, 0x07 },
573 	{ TAS2770_TDM_CFG_REG1, 0x02 },
574 	{ TAS2770_TDM_CFG_REG2, 0x0a },
575 	{ TAS2770_TDM_CFG_REG3, 0x10 },
576 	{ TAS2770_INT_MASK_REG0, 0xfc },
577 	{ TAS2770_INT_MASK_REG1, 0xb1 },
578 	{ TAS2770_INT_CFG, 0x05 },
579 	{ TAS2770_MISC_IRQ, 0x81 },
580 	{ TAS2770_CLK_CGF, 0x0c },
581 
582 };
583 
tas2770_volatile(struct device * dev,unsigned int reg)584 static bool tas2770_volatile(struct device *dev, unsigned int reg)
585 {
586 	switch (reg) {
587 	case TAS2770_PAGE: /* regmap implementation requires this */
588 	case TAS2770_SW_RST: /* always clears after write */
589 	case TAS2770_BO_PRV_REG0:/* has a self clearing bit */
590 	case TAS2770_LVE_INT_REG0:
591 	case TAS2770_LVE_INT_REG1:
592 	case TAS2770_LAT_INT_REG0:/* Sticky interrupt flags */
593 	case TAS2770_LAT_INT_REG1:/* Sticky interrupt flags */
594 	case TAS2770_VBAT_MSB:
595 	case TAS2770_VBAT_LSB:
596 	case TAS2770_TEMP_MSB:
597 	case TAS2770_TEMP_LSB:
598 		return true;
599 	}
600 
601 	return false;
602 }
603 
tas2770_writeable(struct device * dev,unsigned int reg)604 static bool tas2770_writeable(struct device *dev, unsigned int reg)
605 {
606 	switch (reg) {
607 	case TAS2770_LVE_INT_REG0:
608 	case TAS2770_LVE_INT_REG1:
609 	case TAS2770_LAT_INT_REG0:
610 	case TAS2770_LAT_INT_REG1:
611 	case TAS2770_VBAT_MSB:
612 	case TAS2770_VBAT_LSB:
613 	case TAS2770_TEMP_MSB:
614 	case TAS2770_TEMP_LSB:
615 	case TAS2770_TDM_CLK_DETC:
616 	case TAS2770_REV_AND_GPID:
617 		return false;
618 	}
619 
620 	return true;
621 }
622 
623 static const struct regmap_range_cfg tas2770_regmap_ranges[] = {
624 	{
625 		.range_min = 0,
626 		.range_max = 1 * 128,
627 		.selector_reg = TAS2770_PAGE,
628 		.selector_mask = 0xff,
629 		.selector_shift = 0,
630 		.window_start = 0,
631 		.window_len = 128,
632 	},
633 };
634 
635 static const struct regmap_config tas2770_i2c_regmap = {
636 	.reg_bits = 8,
637 	.val_bits = 8,
638 	.writeable_reg = tas2770_writeable,
639 	.volatile_reg = tas2770_volatile,
640 	.reg_defaults = tas2770_reg_defaults,
641 	.num_reg_defaults = ARRAY_SIZE(tas2770_reg_defaults),
642 	.cache_type = REGCACHE_RBTREE,
643 	.ranges = tas2770_regmap_ranges,
644 	.num_ranges = ARRAY_SIZE(tas2770_regmap_ranges),
645 	.max_register = 1 * 128,
646 };
647 
tas2770_parse_dt(struct device * dev,struct tas2770_priv * tas2770)648 static int tas2770_parse_dt(struct device *dev, struct tas2770_priv *tas2770)
649 {
650 	int rc = 0;
651 
652 	rc = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no",
653 				      &tas2770->i_sense_slot);
654 	if (rc) {
655 		dev_info(tas2770->dev, "Property %s is missing setting default slot\n",
656 			 "ti,imon-slot-no");
657 
658 		tas2770->i_sense_slot = 0;
659 	}
660 
661 	rc = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no",
662 				      &tas2770->v_sense_slot);
663 	if (rc) {
664 		dev_info(tas2770->dev, "Property %s is missing setting default slot\n",
665 			 "ti,vmon-slot-no");
666 
667 		tas2770->v_sense_slot = 2;
668 	}
669 
670 	tas2770->sdz_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
671 	if (IS_ERR(tas2770->sdz_gpio)) {
672 		if (PTR_ERR(tas2770->sdz_gpio) == -EPROBE_DEFER)
673 			return -EPROBE_DEFER;
674 
675 		tas2770->sdz_gpio = NULL;
676 	}
677 
678 	return 0;
679 }
680 
tas2770_i2c_probe(struct i2c_client * client)681 static int tas2770_i2c_probe(struct i2c_client *client)
682 {
683 	struct tas2770_priv *tas2770;
684 	int result;
685 
686 	tas2770 = devm_kzalloc(&client->dev, sizeof(struct tas2770_priv),
687 			       GFP_KERNEL);
688 	if (!tas2770)
689 		return -ENOMEM;
690 
691 	tas2770->dev = &client->dev;
692 	i2c_set_clientdata(client, tas2770);
693 	dev_set_drvdata(&client->dev, tas2770);
694 
695 	tas2770->regmap = devm_regmap_init_i2c(client, &tas2770_i2c_regmap);
696 	if (IS_ERR(tas2770->regmap)) {
697 		result = PTR_ERR(tas2770->regmap);
698 		dev_err(&client->dev, "Failed to allocate register map: %d\n",
699 			result);
700 		return result;
701 	}
702 
703 	if (client->dev.of_node) {
704 		result = tas2770_parse_dt(&client->dev, tas2770);
705 		if (result) {
706 			dev_err(tas2770->dev, "%s: Failed to parse devicetree\n",
707 				__func__);
708 			return result;
709 		}
710 	}
711 
712 	tas2770->reset_gpio = devm_gpiod_get_optional(tas2770->dev, "reset",
713 						      GPIOD_OUT_HIGH);
714 	if (IS_ERR(tas2770->reset_gpio)) {
715 		if (PTR_ERR(tas2770->reset_gpio) == -EPROBE_DEFER) {
716 			tas2770->reset_gpio = NULL;
717 			return -EPROBE_DEFER;
718 		}
719 	}
720 
721 	result = tas2770_register_codec(tas2770);
722 	if (result)
723 		dev_err(tas2770->dev, "Register codec failed.\n");
724 
725 	return result;
726 }
727 
728 static const struct i2c_device_id tas2770_i2c_id[] = {
729 	{ "tas2770"},
730 	{ }
731 };
732 MODULE_DEVICE_TABLE(i2c, tas2770_i2c_id);
733 
734 #if defined(CONFIG_OF)
735 static const struct of_device_id tas2770_of_match[] = {
736 	{ .compatible = "ti,tas2770" },
737 	{},
738 };
739 MODULE_DEVICE_TABLE(of, tas2770_of_match);
740 #endif
741 
742 static struct i2c_driver tas2770_i2c_driver = {
743 	.driver = {
744 		.name   = "tas2770",
745 		.of_match_table = of_match_ptr(tas2770_of_match),
746 	},
747 	.probe      = tas2770_i2c_probe,
748 	.id_table   = tas2770_i2c_id,
749 };
750 module_i2c_driver(tas2770_i2c_driver);
751 
752 MODULE_AUTHOR("Shi Fu <shifu0704@thundersoft.com>");
753 MODULE_DESCRIPTION("TAS2770 I2C Smart Amplifier driver");
754 MODULE_LICENSE("GPL v2");
755