1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (C) 2023 SUSE LLC */ 3 #include <linux/bpf.h> 4 #include <bpf/bpf_helpers.h> 5 #include "bpf_misc.h" 6 7 SEC("?raw_tp") 8 __success __log_level(2) 9 __msg("mark_precise: frame0: regs=r2 stack= before 3: (bf) r1 = r10") 10 __msg("mark_precise: frame0: regs=r2 stack= before 2: (55) if r2 != 0xfffffff8 goto pc+2") 11 __msg("mark_precise: frame0: regs=r2 stack= before 1: (87) r2 = -r2") 12 __msg("mark_precise: frame0: regs=r2 stack= before 0: (b7) r2 = 8") bpf_neg(void)13__naked int bpf_neg(void) 14 { 15 asm volatile ( 16 "r2 = 8;" 17 "r2 = -r2;" 18 "if r2 != -8 goto 1f;" 19 "r1 = r10;" 20 "r1 += r2;" 21 "1:" 22 "r0 = 0;" 23 "exit;" 24 ::: __clobber_all); 25 } 26 27 SEC("?raw_tp") 28 __success __log_level(2) 29 __msg("mark_precise: frame0: regs=r2 stack= before 3: (bf) r1 = r10") 30 __msg("mark_precise: frame0: regs=r2 stack= before 2: (55) if r2 != 0x0 goto pc+2") 31 __msg("mark_precise: frame0: regs=r2 stack= before 1: (d4) r2 = le16 r2") 32 __msg("mark_precise: frame0: regs=r2 stack= before 0: (b7) r2 = 0") bpf_end_to_le(void)33__naked int bpf_end_to_le(void) 34 { 35 asm volatile ( 36 "r2 = 0;" 37 "r2 = le16 r2;" 38 "if r2 != 0 goto 1f;" 39 "r1 = r10;" 40 "r1 += r2;" 41 "1:" 42 "r0 = 0;" 43 "exit;" 44 ::: __clobber_all); 45 } 46 47 48 SEC("?raw_tp") 49 __success __log_level(2) 50 __msg("mark_precise: frame0: regs=r2 stack= before 3: (bf) r1 = r10") 51 __msg("mark_precise: frame0: regs=r2 stack= before 2: (55) if r2 != 0x0 goto pc+2") 52 __msg("mark_precise: frame0: regs=r2 stack= before 1: (dc) r2 = be16 r2") 53 __msg("mark_precise: frame0: regs=r2 stack= before 0: (b7) r2 = 0") bpf_end_to_be(void)54__naked int bpf_end_to_be(void) 55 { 56 asm volatile ( 57 "r2 = 0;" 58 "r2 = be16 r2;" 59 "if r2 != 0 goto 1f;" 60 "r1 = r10;" 61 "r1 += r2;" 62 "1:" 63 "r0 = 0;" 64 "exit;" 65 ::: __clobber_all); 66 } 67 68 #if (defined(__TARGET_ARCH_arm64) || defined(__TARGET_ARCH_x86) || \ 69 (defined(__TARGET_ARCH_riscv) && __riscv_xlen == 64) || \ 70 defined(__TARGET_ARCH_arm) || defined(__TARGET_ARCH_s390)) && \ 71 __clang_major__ >= 18 72 73 SEC("?raw_tp") 74 __success __log_level(2) 75 __msg("mark_precise: frame0: regs=r2 stack= before 3: (bf) r1 = r10") 76 __msg("mark_precise: frame0: regs=r2 stack= before 2: (55) if r2 != 0x0 goto pc+2") 77 __msg("mark_precise: frame0: regs=r2 stack= before 1: (d7) r2 = bswap16 r2") 78 __msg("mark_precise: frame0: regs=r2 stack= before 0: (b7) r2 = 0") bpf_end_bswap(void)79__naked int bpf_end_bswap(void) 80 { 81 asm volatile ( 82 "r2 = 0;" 83 "r2 = bswap16 r2;" 84 "if r2 != 0 goto 1f;" 85 "r1 = r10;" 86 "r1 += r2;" 87 "1:" 88 "r0 = 0;" 89 "exit;" 90 ::: __clobber_all); 91 } 92 93 #endif /* v4 instruction */ 94 95 SEC("?raw_tp") 96 __success __log_level(2) 97 /* 98 * Without the bug fix there will be no history between "last_idx 3 first_idx 3" 99 * and "parent state regs=" lines. "R0_w=6" parts are here to help anchor 100 * expected log messages to the one specific mark_chain_precision operation. 101 * 102 * This is quite fragile: if verifier checkpointing heuristic changes, this 103 * might need adjusting. 104 */ 105 __msg("2: (07) r0 += 1 ; R0_w=6") 106 __msg("3: (35) if r0 >= 0xa goto pc+1") 107 __msg("mark_precise: frame0: last_idx 3 first_idx 3 subseq_idx -1") 108 __msg("mark_precise: frame0: regs=r0 stack= before 2: (07) r0 += 1") 109 __msg("mark_precise: frame0: regs=r0 stack= before 1: (07) r0 += 1") 110 __msg("mark_precise: frame0: regs=r0 stack= before 4: (05) goto pc-4") 111 __msg("mark_precise: frame0: regs=r0 stack= before 3: (35) if r0 >= 0xa goto pc+1") 112 __msg("mark_precise: frame0: parent state regs= stack=: R0_rw=P4") 113 __msg("3: R0_w=6") state_loop_first_last_equal(void)114__naked int state_loop_first_last_equal(void) 115 { 116 asm volatile ( 117 "r0 = 0;" 118 "l0_%=:" 119 "r0 += 1;" 120 "r0 += 1;" 121 /* every few iterations we'll have a checkpoint here with 122 * first_idx == last_idx, potentially confusing precision 123 * backtracking logic 124 */ 125 "if r0 >= 10 goto l1_%=;" /* checkpoint + mark_precise */ 126 "goto l0_%=;" 127 "l1_%=:" 128 "exit;" 129 ::: __clobber_common 130 ); 131 } 132 __bpf_cond_op_r10(void)133__used __naked static void __bpf_cond_op_r10(void) 134 { 135 asm volatile ( 136 "r2 = 2314885393468386424 ll;" 137 "goto +0;" 138 "if r2 <= r10 goto +3;" 139 "if r1 >= -1835016 goto +0;" 140 "if r2 <= 8 goto +0;" 141 "if r3 <= 0 goto +0;" 142 "exit;" 143 ::: __clobber_all); 144 } 145 146 SEC("?raw_tp") 147 __success __log_level(2) 148 __msg("8: (bd) if r2 <= r10 goto pc+3") 149 __msg("9: (35) if r1 >= 0xffe3fff8 goto pc+0") 150 __msg("10: (b5) if r2 <= 0x8 goto pc+0") 151 __msg("mark_precise: frame1: last_idx 10 first_idx 0 subseq_idx -1") 152 __msg("mark_precise: frame1: regs=r2 stack= before 9: (35) if r1 >= 0xffe3fff8 goto pc+0") 153 __msg("mark_precise: frame1: regs=r2 stack= before 8: (bd) if r2 <= r10 goto pc+3") 154 __msg("mark_precise: frame1: regs=r2 stack= before 7: (05) goto pc+0") bpf_cond_op_r10(void)155__naked void bpf_cond_op_r10(void) 156 { 157 asm volatile ( 158 "r3 = 0 ll;" 159 "call __bpf_cond_op_r10;" 160 "r0 = 0;" 161 "exit;" 162 ::: __clobber_all); 163 } 164 165 SEC("?raw_tp") 166 __success __log_level(2) 167 __msg("3: (bf) r3 = r10") 168 __msg("4: (bd) if r3 <= r2 goto pc+1") 169 __msg("5: (b5) if r2 <= 0x8 goto pc+2") 170 __msg("mark_precise: frame0: last_idx 5 first_idx 0 subseq_idx -1") 171 __msg("mark_precise: frame0: regs=r2 stack= before 4: (bd) if r3 <= r2 goto pc+1") 172 __msg("mark_precise: frame0: regs=r2 stack= before 3: (bf) r3 = r10") bpf_cond_op_not_r10(void)173__naked void bpf_cond_op_not_r10(void) 174 { 175 asm volatile ( 176 "r0 = 0;" 177 "r2 = 2314885393468386424 ll;" 178 "r3 = r10;" 179 "if r3 <= r2 goto +1;" 180 "if r2 <= 8 goto +2;" 181 "r0 = 2 ll;" 182 "exit;" 183 ::: __clobber_all); 184 } 185 186 char _license[] SEC("license") = "GPL"; 187