| /kernel/linux/linux-4.19/fs/jffs2/ |
| D | xattr.c | 32 * is_xattr_datum_unchecked(c, xd) 34 * unchecked, it returns 0. 35 * unload_xattr_datum(c, xd) 41 * do_verify_xattr_datum(c, xd) 45 * 0 will be returned, if success. An negative return value means recoverable error, and 48 * do_load_xattr_datum(c, xd) 51 * load_xattr_datum(c, xd) 53 * If xd need to call do_verify_xattr_datum() at first, it's called before calling 55 * save_xattr_datum(c, xd) 56 * is used to write xdatum to medium. xd->version will be incremented. [all …]
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| D | malloc.c | 38 0, 0, NULL); in jffs2_create_slab_caches() 44 0, SLAB_HWCACHE_ALIGN, NULL); in jffs2_create_slab_caches() 50 0, SLAB_HWCACHE_ALIGN, NULL); in jffs2_create_slab_caches() 56 0, 0, NULL); in jffs2_create_slab_caches() 62 0, 0, NULL); in jffs2_create_slab_caches() 68 0, 0, NULL); in jffs2_create_slab_caches() 74 0, 0, NULL); in jffs2_create_slab_caches() 81 0, 0, NULL); in jffs2_create_slab_caches() 87 0, 0, NULL); in jffs2_create_slab_caches() 92 return 0; in jffs2_create_slab_caches() [all …]
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| /kernel/linux/linux-5.10/fs/jffs2/ |
| D | xattr.c | 32 * is_xattr_datum_unchecked(c, xd) 34 * unchecked, it returns 0. 35 * unload_xattr_datum(c, xd) 41 * do_verify_xattr_datum(c, xd) 45 * 0 will be returned, if success. An negative return value means recoverable error, and 48 * do_load_xattr_datum(c, xd) 51 * load_xattr_datum(c, xd) 53 * If xd need to call do_verify_xattr_datum() at first, it's called before calling 55 * save_xattr_datum(c, xd) 56 * is used to write xdatum to medium. xd->version will be incremented. [all …]
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| D | malloc.c | 38 0, 0, NULL); in jffs2_create_slab_caches() 44 0, SLAB_HWCACHE_ALIGN, NULL); in jffs2_create_slab_caches() 50 0, SLAB_HWCACHE_ALIGN, NULL); in jffs2_create_slab_caches() 56 0, 0, NULL); in jffs2_create_slab_caches() 62 0, 0, NULL); in jffs2_create_slab_caches() 68 0, 0, NULL); in jffs2_create_slab_caches() 74 0, 0, NULL); in jffs2_create_slab_caches() 81 0, 0, NULL); in jffs2_create_slab_caches() 87 0, 0, NULL); in jffs2_create_slab_caches() 92 return 0; in jffs2_create_slab_caches() [all …]
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| /kernel/linux/linux-5.10/drivers/thunderbolt/ |
| D | xdomain.c | 45 UUID_INIT(0xb638d70e, 0x42ff, 0x40bb, 46 0x97, 0xc2, 0x90, 0xe2, 0xc0, 0xb2, 0xff, 0x07); 85 req->result.err = 0; in tb_xdomain_copy() 114 * @xd: XDomain to send the message 122 * Return: %0 in case of success and negative errno in case of failure 124 int tb_xdomain_response(struct tb_xdomain *xd, const void *response, in tb_xdomain_response() argument 127 return __tb_xdomain_response(xd->tb->ctl, response, size, type); in tb_xdomain_response() 161 * @xd: XDomain to send the request 174 * Return: %0 in case of success and negative errno in case of failure 176 int tb_xdomain_request(struct tb_xdomain *xd, const void *request, in tb_xdomain_request() argument [all …]
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| D | icm.c | 26 #define PCIE2CIO_CMD 0x30 35 #define PCIE2CIO_WRDATA 0x34 36 #define PCIE2CIO_RDDATA 0x38 38 #define PHY_PORT_CS1 0x37 61 * @max_boot_acl: Maximum number of preboot ACL entries (%0 if not supported) 120 #define EP_NAME_INTEL_VSS 0x10 132 #define INTEL_VSS_FLAGS_RTD3 BIT(0) 181 return link ? ((link - 1) ^ 0x01) + 1 : 0; in dual_link_from_link() 192 return depth ? route & ~(0xffULL << (depth - 1) * TB_ROUTE_SHIFT) : 0; in get_parent_route() 206 return 0; in pci2cio_wait_completion() [all …]
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| /kernel/linux/linux-4.19/drivers/thunderbolt/ |
| D | xdomain.c | 47 UUID_INIT(0xb638d70e, 0x42ff, 0x40bb, 48 0x97, 0xc2, 0x90, 0xe2, 0xc0, 0xb2, 0xff, 0x07); 87 req->result.err = 0; in tb_xdomain_copy() 116 * @xd: XDomain to send the message 124 * Return: %0 in case of success and negative errno in case of failure 126 int tb_xdomain_response(struct tb_xdomain *xd, const void *response, in tb_xdomain_response() argument 129 return __tb_xdomain_response(xd->tb->ctl, response, size, type); in tb_xdomain_response() 163 * @xd: XDomain to send the request 176 * Return: %0 in case of success and negative errno in case of failure 178 int tb_xdomain_request(struct tb_xdomain *xd, const void *request, in tb_xdomain_request() argument [all …]
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| D | icm.c | 28 #define PCIE2CIO_CMD 0x30 37 #define PCIE2CIO_WRDATA 0x34 38 #define PCIE2CIO_RDDATA 0x38 40 #define PHY_PORT_CS1 0x37 60 * @max_boot_acl: Maximum number of preboot ACL entries (%0 if not supported) 106 u8 data[0]; 109 #define EP_NAME_INTEL_VSS 0x10 121 #define INTEL_VSS_FLAGS_RTD3 BIT(0) 159 return link ? ((link - 1) ^ 0x01) + 1 : 0; in dual_link_from_link() 170 return depth ? route & ~(0xffULL << (depth - 1) * TB_ROUTE_SHIFT) : 0; in get_parent_route() [all …]
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| /kernel/linux/linux-5.10/drivers/dma/ |
| D | uniphier-xdmac.c | 20 #define XDMAC_CH_WIDTH 0x100 22 #define XDMAC_TFA 0x08 24 #define XDMAC_TFA_MASK GENMASK(5, 0) 25 #define XDMAC_SADM 0x10 29 #define XDMAC_SADM_SAM_INC 0 30 #define XDMAC_DADM 0x14 35 #define XDMAC_EXSAD 0x18 36 #define XDMAC_EXDAD 0x1c 37 #define XDMAC_SAD 0x20 38 #define XDMAC_DAD 0x24 [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/sysdev/xive/ |
| D | common.c | 44 #define DBG_VERBOSE(fmt...) do { } while(0) 78 * or 0 if there is no new entry. 87 return 0; in xive_read_eq() 92 return 0; in xive_read_eq() 100 if (q->idx == 0) in xive_read_eq() 104 return cur & 0x7fffffff; in xive_read_eq() 114 * (0xff if none) and return what was found (0 if none). 132 u32 irq = 0; in xive_scan_interrupts() 133 u8 prio = 0; in xive_scan_interrupts() 136 while (xc->pending_prio != 0) { in xive_scan_interrupts() [all …]
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| /kernel/linux/linux-4.19/arch/powerpc/sysdev/xive/ |
| D | common.c | 47 #define DBG_VERBOSE(fmt...) do { } while(0) 81 * or 0 if there is no new entry. 90 return 0; in xive_read_eq() 95 return 0; in xive_read_eq() 103 if (q->idx == 0) in xive_read_eq() 107 return cur & 0x7fffffff; in xive_read_eq() 117 * (0xff if none) and return what was found (0 if none). 135 u32 irq = 0; in xive_scan_interrupts() 139 while (xc->pending_prio != 0) { in xive_scan_interrupts() 162 int p = atomic_xchg(&q->pending_count, 0); in xive_scan_interrupts() [all …]
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| /kernel/linux/linux-5.10/drivers/net/ |
| D | thunderbolt.c | 31 #define TBNET_LOCAL_PATH 0xf 45 #define TBNET_L0_PORT_NUM(route) ((route) & GENMASK(5, 0)) 56 * supported then @frame_id is filled, otherwise it stays %0. 88 #define TBIP_HDR_LENGTH_MASK GENMASK(5, 0) 147 * @xd: XDomain the service blongs to 178 struct tb_xdomain *xd; member 201 UUID_INIT(0xc66189ca, 0x1cce, 0x4195, 202 0xbd, 0xb8, 0x49, 0x59, 0x2e, 0x5f, 0x5a, 0x4f); 206 UUID_INIT(0x798f589e, 0x3616, 0x8a47, 207 0x97, 0xc6, 0x56, 0x64, 0xa9, 0x20, 0xc8, 0xdd); [all …]
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| /kernel/linux/linux-4.19/drivers/net/ |
| D | thunderbolt.c | 34 #define TBNET_LOCAL_PATH 0xf 48 #define TBNET_L0_PORT_NUM(route) ((route) & GENMASK(5, 0)) 59 * supported then @frame_id is filled, otherwise it stays %0. 91 #define TBIP_HDR_LENGTH_MASK GENMASK(5, 0) 150 * @xd: XDomain the service blongs to 181 struct tb_xdomain *xd; member 204 UUID_INIT(0xc66189ca, 0x1cce, 0x4195, 205 0xbd, 0xb8, 0x49, 0x59, 0x2e, 0x5f, 0x5a, 0x4f); 209 UUID_INIT(0x798f589e, 0x3616, 0x8a47, 210 0x97, 0xc6, 0x56, 0x64, 0xa9, 0x20, 0xc8, 0xdd); [all …]
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| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| D | sm_common.c | 4 * Common routines & support for xD format 21 return 0; in oob_sm_ooblayout_ecc() 28 case 0: in oob_sm_ooblayout_free() 30 oobregion->offset = 0; in oob_sm_ooblayout_free() 47 return 0; in oob_sm_ooblayout_free() 68 oobregion->offset = 0; in oob_sm_small_ooblayout_ecc() 70 return 0; in oob_sm_small_ooblayout_ecc() 77 case 0: in oob_sm_small_ooblayout_free() 91 return 0; in oob_sm_small_ooblayout_free() 107 oob.block_status = 0x0F; in sm_block_markbad() [all …]
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| /kernel/linux/linux-4.19/drivers/mtd/nand/raw/ |
| D | sm_common.c | 3 * Common routines & support for xD format 24 return 0; in oob_sm_ooblayout_ecc() 31 case 0: in oob_sm_ooblayout_free() 33 oobregion->offset = 0; in oob_sm_ooblayout_free() 50 return 0; in oob_sm_ooblayout_free() 71 oobregion->offset = 0; in oob_sm_small_ooblayout_ecc() 73 return 0; in oob_sm_small_ooblayout_ecc() 80 case 0: in oob_sm_small_ooblayout_free() 94 return 0; in oob_sm_small_ooblayout_free() 109 oob.block_status = 0x0F; in sm_block_markbad() [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/kvm/ |
| D | book3s_xive_template.c | 38 cppr = ack & 0xff; in GLUE() 57 static u8 GLUE(X_PFX,esb_load)(struct xive_irq_data *xd, u32 offset) in GLUE() 61 if (offset == XIVE_ESB_SET_PQ_10 && xd->flags & XIVE_IRQ_FLAG_STORE_EOI) in GLUE() 64 if (xd->flags & XIVE_IRQ_FLAG_SHIFT_BUG) in GLUE() 67 val =__x_readq(__x_eoi_page(xd) + offset); in GLUE() 75 static void GLUE(X_PFX,source_eoi)(u32 hw_irq, struct xive_irq_data *xd) in GLUE() 78 if (xd->flags & XIVE_IRQ_FLAG_STORE_EOI) in GLUE() 79 __x_writeq(0, __x_eoi_page(xd) + XIVE_ESB_STORE_EOI); in GLUE() 80 else if (hw_irq && xd->flags & XIVE_IRQ_FLAG_EOI_FW) in GLUE() 82 else if (xd->flags & XIVE_IRQ_FLAG_LSI) { in GLUE() [all …]
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| /kernel/linux/linux-4.19/arch/powerpc/kvm/ |
| D | book3s_xive_template.c | 41 cppr = ack & 0xff; in GLUE() 60 static u8 GLUE(X_PFX,esb_load)(struct xive_irq_data *xd, u32 offset) in GLUE() 64 if (xd->flags & XIVE_IRQ_FLAG_SHIFT_BUG) in GLUE() 67 val =__x_readq(__x_eoi_page(xd) + offset); in GLUE() 75 static void GLUE(X_PFX,source_eoi)(u32 hw_irq, struct xive_irq_data *xd) in GLUE() 78 if (xd->flags & XIVE_IRQ_FLAG_STORE_EOI) in GLUE() 79 __x_writeq(0, __x_eoi_page(xd) + XIVE_ESB_STORE_EOI); in GLUE() 80 else if (hw_irq && xd->flags & XIVE_IRQ_FLAG_EOI_FW) in GLUE() 82 else if (xd->flags & XIVE_IRQ_FLAG_LSI) { in GLUE() 88 __x_readq(__x_eoi_page(xd) + XIVE_ESB_LOAD_EOI); in GLUE() [all …]
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| /kernel/liteos_a/fs/jffs2/ |
| D | jffs2.patch | 4 @@ -1,307 +0,0 @@ 80 - if (count < 0) 82 - if (count == 0) 89 - for (i=0; i < count; i++) { 146 - for (i=0; i < acl->a_count; i++) { 196 - rc = do_jffs2_getxattr(inode, xprefix, "", NULL, 0); 197 - if (rc > 0) { 203 - if (rc > 0) { 217 - size_t size = 0; 225 - rc = do_jffs2_setxattr(inode, xprefix, "", value, size, 0); [all …]
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| /kernel/linux/linux-4.19/include/linux/ |
| D | thunderbolt.h | 86 unsigned long privdata[0]; 113 TB_PROPERTY_TYPE_UNKNOWN = 0x00, 114 TB_PROPERTY_TYPE_DIRECTORY = 0x44, 115 TB_PROPERTY_TYPE_DATA = 0x64, 116 TB_PROPERTY_TYPE_TEXT = 0x74, 117 TB_PROPERTY_TYPE_VALUE = 0x76, 241 int tb_xdomain_enable_paths(struct tb_xdomain *xd, u16 transmit_path, 244 int tb_xdomain_disable_paths(struct tb_xdomain *xd); 251 struct tb_xdomain *xd; in tb_xdomain_find_by_uuid_locked() local 254 xd = tb_xdomain_find_by_uuid(tb, uuid); in tb_xdomain_find_by_uuid_locked() [all …]
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| /kernel/linux/linux-5.10/include/linux/ |
| D | thunderbolt.h | 110 TB_PROPERTY_TYPE_UNKNOWN = 0x00, 111 TB_PROPERTY_TYPE_DIRECTORY = 0x44, 112 TB_PROPERTY_TYPE_DATA = 0x64, 113 TB_PROPERTY_TYPE_TEXT = 0x74, 114 TB_PROPERTY_TYPE_VALUE = 0x76, 246 int tb_xdomain_enable_paths(struct tb_xdomain *xd, u16 transmit_path, 249 int tb_xdomain_disable_paths(struct tb_xdomain *xd); 256 struct tb_xdomain *xd; in tb_xdomain_find_by_uuid_locked() local 259 xd = tb_xdomain_find_by_uuid(tb, uuid); in tb_xdomain_find_by_uuid_locked() 262 return xd; in tb_xdomain_find_by_uuid_locked() [all …]
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| /kernel/linux/linux-5.10/sound/pci/au88x0/ |
| D | au88x0_wt.h | 12 /* WT channels are grouped in banks. Each bank has 0x20 channels. */ 13 /* Bank register address boundary is 0x8000 */ 15 #define NR_WT_PB 0x20 18 #define WT_BAR(x) (((x)&0xffe0)<<0x8) 21 #define WT_CTRL(bank) (((((bank)&1)<<0xd) + 0x00)<<2) /* 0x0000 */ 22 #define WT_SRAMP(bank) (((((bank)&1)<<0xd) + 0x01)<<2) /* 0x0004 */ 23 #define WT_DSREG(bank) (((((bank)&1)<<0xd) + 0x02)<<2) /* 0x0008 */ 24 #define WT_MRAMP(bank) (((((bank)&1)<<0xd) + 0x03)<<2) /* 0x000c */ 25 #define WT_GMODE(bank) (((((bank)&1)<<0xd) + 0x04)<<2) /* 0x0010 */ 26 #define WT_ARAMP(bank) (((((bank)&1)<<0xd) + 0x05)<<2) /* 0x0014 */ [all …]
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| /kernel/linux/linux-4.19/sound/pci/au88x0/ |
| D | au88x0_wt.h | 12 /* WT channels are grouped in banks. Each bank has 0x20 channels. */ 13 /* Bank register address boundary is 0x8000 */ 15 #define NR_WT_PB 0x20 18 #define WT_BAR(x) (((x)&0xffe0)<<0x8) 21 #define WT_CTRL(bank) (((((bank)&1)<<0xd) + 0x00)<<2) /* 0x0000 */ 22 #define WT_SRAMP(bank) (((((bank)&1)<<0xd) + 0x01)<<2) /* 0x0004 */ 23 #define WT_DSREG(bank) (((((bank)&1)<<0xd) + 0x02)<<2) /* 0x0008 */ 24 #define WT_MRAMP(bank) (((((bank)&1)<<0xd) + 0x03)<<2) /* 0x000c */ 25 #define WT_GMODE(bank) (((((bank)&1)<<0xd) + 0x04)<<2) /* 0x0010 */ 26 #define WT_ARAMP(bank) (((((bank)&1)<<0xd) + 0x05)<<2) /* 0x0014 */ [all …]
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| /kernel/linux/linux-4.19/drivers/scsi/ |
| D | qlogicfas408.h | 10 again, 0 tends to be slower, but more stable. */ 25 #define QL_RESET_AT_START 0 48 /* offset 0xc */ 51 #define FASTSCSI 0 54 #define FASTCLK 0 /*(XTALFREQ>25?1:0)*/ 69 If this is 0, the bus will only transfer asynchronously */ 70 #define SYNCOFFST 0 83 int int_type; /* type of irq, 2 for ISA board, 0 for PCMCIA */ 91 #define REG0 ( outb( inb( qbase + 0xd ) & 0x7f , qbase + 0xd ), outb( 4 , qbase + 0xd )) 92 #define REG1 ( outb( inb( qbase + 0xd ) | 0x80 , qbase + 0xd ), outb( 0xb4 | int_type, qbase + 0xd … [all …]
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| /kernel/linux/linux-5.10/drivers/scsi/ |
| D | qlogicfas408.h | 10 again, 0 tends to be slower, but more stable. */ 25 #define QL_RESET_AT_START 0 48 /* offset 0xc */ 51 #define FASTSCSI 0 54 #define FASTCLK 0 /*(XTALFREQ>25?1:0)*/ 69 If this is 0, the bus will only transfer asynchronously */ 70 #define SYNCOFFST 0 83 int int_type; /* type of irq, 2 for ISA board, 0 for PCMCIA */ 91 #define REG0 ( outb( inb( qbase + 0xd ) & 0x7f , qbase + 0xd ), outb( 4 , qbase + 0xd )) 92 #define REG1 ( outb( inb( qbase + 0xd ) | 0x80 , qbase + 0xd ), outb( 0xb4 | int_type, qbase + 0xd … [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/bif/ |
| D | bif_5_0_sh_mask.h | 27 #define MM_INDEX__MM_OFFSET_MASK 0x7fffffff 28 #define MM_INDEX__MM_OFFSET__SHIFT 0x0 29 #define MM_INDEX__MM_APER_MASK 0x80000000 30 #define MM_INDEX__MM_APER__SHIFT 0x1f 31 #define MM_INDEX_HI__MM_OFFSET_HI_MASK 0xffffffff 32 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0 33 #define MM_DATA__MM_DATA_MASK 0xffffffff 34 #define MM_DATA__MM_DATA__SHIFT 0x0 35 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK 0x2 36 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE__SHIFT 0x1 [all …]
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