| /kernel/linux/linux-5.10/drivers/gpu/ipu-v3/ |
| D | ipu-cpmem.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright 2005-2012 Freescale Semiconductor, Inc. All Rights Reserved.
11 #include "ipu-prv.h"
30 #define IPU_CPMEM_WORD(word, ofs, size) ((((word) * 160 + (ofs)) << 8) | (size))
93 ipu_get_cpmem(struct ipuv3_channel *ch) in ipu_get_cpmem() argument
95 struct ipu_cpmem *cpmem = ch->ipu->cpmem_priv; in ipu_get_cpmem()
97 return cpmem->base + ch->num; in ipu_get_cpmem()
100 static void ipu_ch_param_write_field(struct ipuv3_channel *ch, u32 wbs, u32 v) in ipu_ch_param_write_field() argument
102 struct ipu_ch_param __iomem *base = ipu_get_cpmem(ch); in ipu_ch_param_write_field()
103 u32 bit = (wbs >> 8) % 160; in ipu_ch_param_write_field()
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| /kernel/linux/linux-4.19/drivers/gpu/ipu-v3/ |
| D | ipu-cpmem.c | 3 * Copyright 2005-2012 Freescale Semiconductor, Inc. All Rights Reserved.
9 * http://www.opensource.org/licenses/gpl-license.html
17 #include "ipu-prv.h"
36 #define IPU_CPMEM_WORD(word, ofs, size) ((((word) * 160 + (ofs)) << 8) | (size))
99 ipu_get_cpmem(struct ipuv3_channel *ch) in ipu_get_cpmem() argument
101 struct ipu_cpmem *cpmem = ch->ipu->cpmem_priv; in ipu_get_cpmem()
103 return cpmem->base + ch->num; in ipu_get_cpmem()
106 static void ipu_ch_param_write_field(struct ipuv3_channel *ch, u32 wbs, u32 v) in ipu_ch_param_write_field() argument
108 struct ipu_ch_param __iomem *base = ipu_get_cpmem(ch); in ipu_ch_param_write_field()
109 u32 bit = (wbs >> 8) % 160; in ipu_ch_param_write_field()
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| /kernel/linux/linux-5.10/drivers/scsi/ |
| D | ch.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * (c) 1996-2003 Gerd Knorr <kraxel@bytesex.org>
38 #define CH_TYPES 8
71 static int dt_id[CH_DT_MAX] = { [ 0 ... (CH_DT_MAX-1) ] = -1 };
76 /* tell the driver about vendor-specific slots */
77 static int vendor_firsts[CH_TYPES-4];
78 static int vendor_counts[CH_TYPES-4];
82 static const char * vendor_labels[CH_TYPES-4] = {
87 #define ch_printk(prefix, ch, fmt, a...) \ argument
88 sdev_prefix_printk(prefix, (ch)->device, (ch)->name, fmt, ##a)
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| /kernel/linux/linux-4.19/drivers/scsi/ |
| D | ch.c | 4 * (c) 1996-2003 Gerd Knorr <kraxel@bytesex.org>
37 #define CH_TYPES 8
71 static int dt_id[CH_DT_MAX] = { [ 0 ... (CH_DT_MAX-1) ] = -1 };
76 /* tell the driver about vendor-specific slots */
77 static int vendor_firsts[CH_TYPES-4];
78 static int vendor_counts[CH_TYPES-4];
82 static const char * vendor_labels[CH_TYPES-4] = {
87 #define ch_printk(prefix, ch, fmt, a...) \ argument
88 sdev_prefix_printk(prefix, (ch)->device, (ch)->name, fmt, ##a)
93 ch_printk(KERN_DEBUG, ch, fmt, ##arg); \
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| /kernel/linux/linux-5.10/drivers/gpu/drm/imx/dcss/ |
| D | dcss-dpr.c | 1 // SPDX-License-Identifier: GPL-2.0
9 #include "dcss-dev.h"
36 #define PIX_SIZE_POS 8
37 #define PIX_SIZE_MASK GENMASK(9, 8)
118 struct dcss_dpr_ch ch[3]; member
121 static void dcss_dpr_write(struct dcss_dpr_ch *ch, u32 val, u32 ofs) in dcss_dpr_write() argument
123 struct dcss_dpr *dpr = ch->dpr; in dcss_dpr_write()
125 dcss_ctxld_write(dpr->ctxld, dpr->ctx_id, val, ch->base_ofs + ofs); in dcss_dpr_write()
130 struct dcss_dpr_ch *ch; in dcss_dpr_ch_init_all() local
134 ch = &dpr->ch[i]; in dcss_dpr_ch_init_all()
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| D | dcss-scaler.c | 1 // SPDX-License-Identifier: GPL-2.0
11 #include "dcss-dev.h"
16 #define SCALE2MEM_EN BIT(8)
33 #define A2R10G10B10_FORMAT_POS 8
34 #define A2R10G10B10_FORMAT_MASK GENMASK(11, 8)
88 struct dcss_scaler_ch ch[3]; member
101 #define PSC_PHASE_MASK (PSC_NUM_PHASES - 1)
103 #define PSC_Q_ROUND_OFFSET (1 << (PSC_Q_FRACTION - 1))
106 * mult_q() - Performs fixed-point multiplication.
122 * div_q() - Performs fixed-point division.
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| /kernel/linux/linux-4.19/drivers/video/fbdev/ |
| D | sh_mobile_lcdcfb.c | 16 #include <linux/dma-mapping.h>
35 /* ----------------------------------------------------------------------------
41 #define LDBCR_UPF(n) (1 << ((n) + 8))
65 #define LDBBSIFR_SWPB (1 << 8)
94 #define LDBBSAYR_FG1G_MASK (0xff << 8)
95 #define LDBBSAYR_FG1G_SHIFT 8
103 #define LDBBSACR_FG2G_MASK (0xff << 8)
104 #define LDBBSACR_FG2G_SHIFT 8
112 #define LDBBSAAR_GY_MASK (0xff << 8)
113 #define LDBBSAAR_GY_SHIFT 8
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| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | sh_mobile_lcdcfb.c | 16 #include <linux/dma-mapping.h>
36 /* ----------------------------------------------------------------------------
42 #define LDBCR_UPF(n) (1 << ((n) + 8))
66 #define LDBBSIFR_SWPB (1 << 8)
95 #define LDBBSAYR_FG1G_MASK (0xff << 8)
96 #define LDBBSAYR_FG1G_SHIFT 8
104 #define LDBBSACR_FG2G_MASK (0xff << 8)
105 #define LDBBSACR_FG2G_SHIFT 8
113 #define LDBBSAAR_GY_MASK (0xff << 8)
114 #define LDBBSAAR_GY_SHIFT 8
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| /kernel/linux/linux-5.10/arch/x86/crypto/ |
| D | sha512-avx2-asm.S | 2 # Implement fast SHA-512 with AVX2 instructions. (x86_64)
22 # - Redistributions of source code must retain the above
26 # - Redistributions in binary form must reproduce the above
42 # This code is described in an Intel White-Paper:
43 # "Fast SHA-512 Implementations on Intel Architecture Processors"
100 XFER_SIZE = 4*8
101 SRND_SIZE = 1*8
102 INP_SIZE = 1*8
103 INPEND_SIZE = 1*8
104 CTX_SIZE = 1*8
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| /kernel/linux/linux-4.19/arch/x86/crypto/ |
| D | sha512-avx2-asm.S | 2 # Implement fast SHA-512 with AVX2 instructions. (x86_64)
22 # - Redistributions of source code must retain the above
26 # - Redistributions in binary form must reproduce the above
42 # This code is described in an Intel White-Paper:
43 # "Fast SHA-512 Implementations on Intel Architecture Processors"
101 XFER_SIZE = 4*8
102 SRND_SIZE = 1*8
103 INP_SIZE = 1*8
104 INPEND_SIZE = 1*8
105 CTX_SIZE = 1*8
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| /kernel/linux/linux-5.10/sound/pci/emu10k1/ |
| D | emu10k1_callback.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
42 * macro evaluates its args more than once, so changed to upper-case.
67 emux->ops = emu10k1_ops; in snd_emu10k1_ops_setup()
86 emu = hw->synth; in snd_emu10k1_synth_get_voice()
91 int ch; in snd_emu10k1_synth_get_voice() local
92 vp = &emu->voices[best[i].voice]; in snd_emu10k1_synth_get_voice()
93 if ((ch = vp->ch) < 0) { in snd_emu10k1_synth_get_voice()
95 dev_warn(emu->card->dev, in snd_emu10k1_synth_get_voice()
96 "synth_get_voice: ch < 0 (%d) ??", i); in snd_emu10k1_synth_get_voice()
100 vp->emu->num_voices--; in snd_emu10k1_synth_get_voice()
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| /kernel/linux/linux-4.19/sound/pci/emu10k1/ |
| D | emu10k1_callback.c | 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
55 * macro evaluates its args more than once, so changed to upper-case.
80 emux->ops = emu10k1_ops; in snd_emu10k1_ops_setup()
99 emu = hw->synth; in snd_emu10k1_synth_get_voice()
104 int ch; in snd_emu10k1_synth_get_voice() local
105 vp = &emu->voices[best[i].voice]; in snd_emu10k1_synth_get_voice()
106 if ((ch = vp->ch) < 0) { in snd_emu10k1_synth_get_voice()
108 dev_warn(emu->card->dev, in snd_emu10k1_synth_get_voice()
109 "synth_get_voice: ch < 0 (%d) ??", i); in snd_emu10k1_synth_get_voice()
113 vp->emu->num_voices--; in snd_emu10k1_synth_get_voice()
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| /kernel/linux/linux-4.19/drivers/dma/ |
| D | mic_x100_dma.h | 36 * MIC has a total of 8 dma channels.
40 #define MIC_DMA_MAX_NUM_CHAN 8
44 #define MIC_DMA_DESC_RX_SIZE (128 * 1024 - 4)
49 * DCR is a global register and all others are per-channel.
50 * DCR - bits 0, 2, 4, 6, 8, 10, 12, 14 - enable bits for channels 0 to 7
51 * bits 1, 3, 5, 7, 9, 11, 13, 15 - owner bits for channels 0 to 7
52 * DCAR - bit 24 & 25 interrupt masks for mic owned & host owned channels
53 * DHPR - head of the descriptor ring updated by s/w
54 * DTPR - tail of the descriptor ring updated by h/w
55 * DRAR_LO - lower 32 bits of descriptor ring's mic address
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/uniphier/ |
| D | clk-uniphier-mio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include "clk-uniphier.h"
12 UNIPHIER_CLK_FACTOR("sd-44m", -1, "sd-133m", 1, 3), \
13 UNIPHIER_CLK_FACTOR("sd-33m", -1, "sd-200m", 1, 6), \
14 UNIPHIER_CLK_FACTOR("sd-50m", -1, "sd-200m", 1, 4), \
15 UNIPHIER_CLK_FACTOR("sd-67m", -1, "sd-200m", 1, 3), \
16 UNIPHIER_CLK_FACTOR("sd-100m", -1, "sd-200m", 1, 2), \
17 UNIPHIER_CLK_FACTOR("sd-40m", -1, "sd-200m", 1, 5), \
18 UNIPHIER_CLK_FACTOR("sd-25m", -1, "sd-200m", 1, 8), \
19 UNIPHIER_CLK_FACTOR("sd-22m", -1, "sd-133m", 1, 6)
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/berlin/ |
| D | berlin2-avpll.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 #include <linux/clk-provider.h>
15 #include "berlin2-avpll.h"
19 * VCO with 8 channels each, channel 8 is the odd-one-out and does
29 #define NUM_CHANNELS 8
46 #define VCO_REG0V9_SEL_SHIFT 8
118 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_is_enabled()
119 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_is_enabled()
130 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_enable()
[all …]
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| /kernel/linux/linux-4.19/drivers/clk/berlin/ |
| D | berlin2-avpll.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 #include <linux/clk-provider.h>
15 #include "berlin2-avpll.h"
19 * VCO with 8 channels each, channel 8 is the odd-one-out and does
29 #define NUM_CHANNELS 8
46 #define VCO_REG0V9_SEL_SHIFT 8
118 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_is_enabled()
119 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_is_enabled()
130 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_enable()
[all …]
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| /kernel/linux/linux-5.10/drivers/tty/serial/jsm/ |
| D | jsm_neo.c | 1 // SPDX-License-Identifier: GPL-2.0+
20 static u32 jsm_offset_table[8] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
25 * a non-destructive, read-only location on the Neo card.
27 * In this case, we are reading the DVID (Read-only Device Identification)
32 readb(bd->re_map_membase + 0x8D); in neo_pci_posting_flush()
35 static void neo_set_cts_flow_control(struct jsm_channel *ch) in neo_set_cts_flow_control() argument
38 ier = readb(&ch->ch_neo_uart->ier); in neo_set_cts_flow_control()
39 efr = readb(&ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
41 jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Setting CTSFLOW\n"); in neo_set_cts_flow_control()
51 writeb(0, &ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
[all …]
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| /kernel/linux/linux-4.19/drivers/tty/serial/jsm/ |
| D | jsm_neo.c | 1 // SPDX-License-Identifier: GPL-2.0+
20 static u32 jsm_offset_table[8] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
25 * a non-destructive, read-only location on the Neo card.
27 * In this case, we are reading the DVID (Read-only Device Identification)
32 readb(bd->re_map_membase + 0x8D); in neo_pci_posting_flush()
35 static void neo_set_cts_flow_control(struct jsm_channel *ch) in neo_set_cts_flow_control() argument
38 ier = readb(&ch->ch_neo_uart->ier); in neo_set_cts_flow_control()
39 efr = readb(&ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
41 jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Setting CTSFLOW\n"); in neo_set_cts_flow_control()
51 writeb(0, &ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
[all …]
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| /kernel/linux/linux-5.10/sound/isa/sb/ |
| D | emu8000_callback.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 1999-2000 Takashi Iwai <tiwai@suse.de>
22 static void reset_voice(struct snd_emux *emu, int ch);
39 static void snd_emu8000_tweak_voice(struct snd_emu8000 *emu, int ch);
43 * macro evaluates its args more than once, so changed to upper-case.
74 hw->emu->ops = emu8000_ops; in snd_emu8000_ops_setup()
88 hw = vp->hw; in release_voice()
89 dcysusv = 0x8000 | (unsigned char)vp->reg.parm.modrelease; in release_voice()
90 EMU8000_DCYSUS_WRITE(hw, vp->ch, dcysusv); in release_voice()
91 dcysusv = 0x8000 | (unsigned char)vp->reg.parm.volrelease; in release_voice()
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| /kernel/linux/linux-4.19/drivers/clk/uniphier/ |
| D | clk-uniphier-mio.c | 18 #include "clk-uniphier.h"
21 UNIPHIER_CLK_FACTOR("sd-44m", -1, "sd-133m", 1, 3), \
22 UNIPHIER_CLK_FACTOR("sd-33m", -1, "sd-200m", 1, 6), \
23 UNIPHIER_CLK_FACTOR("sd-50m", -1, "sd-200m", 1, 4), \
24 UNIPHIER_CLK_FACTOR("sd-67m", -1, "sd-200m", 1, 3), \
25 UNIPHIER_CLK_FACTOR("sd-100m", -1, "sd-200m", 1, 2), \
26 UNIPHIER_CLK_FACTOR("sd-40m", -1, "sd-200m", 1, 5), \
27 UNIPHIER_CLK_FACTOR("sd-25m", -1, "sd-200m", 1, 8), \
28 UNIPHIER_CLK_FACTOR("sd-22m", -1, "sd-133m", 1, 6)
30 #define UNIPHIER_MIO_CLK_SD(_idx, ch) \ argument
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| /kernel/linux/linux-5.10/arch/mips/include/asm/txx9/ |
| D | tx3927.h | 20 #define TX3927_TMR_REG(ch) (TX3927_REG_BASE + 0xf000 + (ch) * 0x100) argument
22 #define TX3927_SIO_REG(ch) (TX3927_REG_BASE + 0xf300 + (ch) * 0x100) argument
26 volatile unsigned long cr[8];
33 volatile unsigned long cr[8];
46 } ch[4]; member
47 volatile unsigned long dbr[8];
162 #define TX3927_DMA_MCR_EIS(ch) (0x10000000<<(ch)) argument
163 #define TX3927_DMA_MCR_DIS(ch) (0x01000000<<(ch)) argument
165 #define TX3927_DMA_MCR_FIFUM(ch) (0x00000008<<(ch)) argument
221 #define TX3927_IR_SIO(ch) (6 + (ch)) argument
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| /kernel/linux/linux-4.19/arch/mips/include/asm/txx9/ |
| D | tx3927.h | 20 #define TX3927_TMR_REG(ch) (TX3927_REG_BASE + 0xf000 + (ch) * 0x100) argument
22 #define TX3927_SIO_REG(ch) (TX3927_REG_BASE + 0xf300 + (ch) * 0x100) argument
26 volatile unsigned long cr[8];
33 volatile unsigned long cr[8];
46 } ch[4]; member
47 volatile unsigned long dbr[8];
162 #define TX3927_DMA_MCR_EIS(ch) (0x10000000<<(ch)) argument
163 #define TX3927_DMA_MCR_DIS(ch) (0x01000000<<(ch)) argument
165 #define TX3927_DMA_MCR_FIFUM(ch) (0x00000008<<(ch)) argument
221 #define TX3927_IR_SIO(ch) (6 + (ch)) argument
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| /kernel/linux/linux-5.10/drivers/net/ipa/ |
| D | gsi_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2020 Linaro Ltd.
26 * function-like macro that takes a parameter used in the computation.
33 * parameter "ch". The "ch" value is a channel id whose maximum value is 30
34 * (though the actual limit is hardware-dependent).
38 * (though the actual limit is hardware-dependent).
51 #define GSI_CH_C_CNTXT_0_OFFSET(ch) \ argument
52 GSI_EE_N_CH_C_CNTXT_0_OFFSET((ch), GSI_EE_AP)
53 #define GSI_EE_N_CH_C_CNTXT_0_OFFSET(ch, ee) \ argument
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-ml-ioh.c | 1 // SPDX-License-Identifier: GPL-2.0-only
38 struct ioh_reg_comn regs[8];
46 * struct ioh_gpio_reg_data - The register store data.
66 * struct ioh_gpio - GPIO private data structure.
74 * @ch: Indicate GPIO channel
85 int ch; member
98 spin_lock_irqsave(&chip->spinlock, flags); in ioh_gpio_set()
99 reg_val = ioread32(&chip->reg->regs[chip->ch].po); in ioh_gpio_set()
105 iowrite32(reg_val, &chip->reg->regs[chip->ch].po); in ioh_gpio_set()
106 spin_unlock_irqrestore(&chip->spinlock, flags); in ioh_gpio_set()
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| /kernel/linux/linux-4.19/drivers/gpio/ |
| D | gpio-ml-ioh.c | 15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
50 struct ioh_reg_comn regs[8];
58 * struct ioh_gpio_reg_data - The register store data.
78 * struct ioh_gpio - GPIO private data structure.
86 * @ch: Indicate GPIO channel
97 int ch; member
110 spin_lock_irqsave(&chip->spinlock, flags); in ioh_gpio_set()
111 reg_val = ioread32(&chip->reg->regs[chip->ch].po); in ioh_gpio_set()
117 iowrite32(reg_val, &chip->reg->regs[chip->ch].po); in ioh_gpio_set()
118 spin_unlock_irqrestore(&chip->spinlock, flags); in ioh_gpio_set()
[all …]
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