| /kernel/linux/linux-4.19/drivers/gpio/ |
| D | gpio-omap.c | 79 void (*set_dataout)(struct gpio_bank *bank, unsigned gpio, int enable);
80 void (*set_dataout_multiple)(struct gpio_bank *bank,
89 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) argument
100 static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, in omap_set_gpio_direction() argument
103 void __iomem *reg = bank->base; in omap_set_gpio_direction()
106 reg += bank->regs->direction; in omap_set_gpio_direction()
113 bank->context.oe = l; in omap_set_gpio_direction()
118 static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, in omap_set_gpio_dataout_reg() argument
121 void __iomem *reg = bank->base; in omap_set_gpio_dataout_reg()
125 reg += bank->regs->set_dataout; in omap_set_gpio_dataout_reg()
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| D | gpio-brcmstb.c | 36 #define GIO_BANK_OFF(bank, off) (((bank) * GIO_BANK_SIZE) + (off * sizeof(u32))) argument
37 #define GIO_ODEN(bank) GIO_BANK_OFF(bank, GIO_REG_ODEN) argument
38 #define GIO_DATA(bank) GIO_BANK_OFF(bank, GIO_REG_DATA) argument
39 #define GIO_IODIR(bank) GIO_BANK_OFF(bank, GIO_REG_IODIR) argument
40 #define GIO_EC(bank) GIO_BANK_OFF(bank, GIO_REG_EC) argument
41 #define GIO_EI(bank) GIO_BANK_OFF(bank, GIO_REG_EI) argument
42 #define GIO_MASK(bank) GIO_BANK_OFF(bank, GIO_REG_MASK) argument
43 #define GIO_LEVEL(bank) GIO_BANK_OFF(bank, GIO_REG_LEVEL) argument
44 #define GIO_STAT(bank) GIO_BANK_OFF(bank, GIO_REG_STAT) argument
76 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); in brcmstb_gpio_gc_to_priv() local
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-omap.c | 77 void (*set_dataout)(struct gpio_bank *bank, unsigned gpio, int enable);
83 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) argument
108 static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, in omap_set_gpio_direction() argument
111 bank->context.oe = omap_gpio_rmw(bank->base + bank->regs->direction, in omap_set_gpio_direction()
117 static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, in omap_set_gpio_dataout_reg() argument
120 void __iomem *reg = bank->base; in omap_set_gpio_dataout_reg()
124 reg += bank->regs->set_dataout; in omap_set_gpio_dataout_reg()
125 bank->context.dataout |= l; in omap_set_gpio_dataout_reg()
127 reg += bank->regs->clr_dataout; in omap_set_gpio_dataout_reg()
128 bank->context.dataout &= ~l; in omap_set_gpio_dataout_reg()
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| D | gpio-brcmstb.c | 36 #define GIO_BANK_OFF(bank, off) (((bank) * GIO_BANK_SIZE) + (off * sizeof(u32))) argument
37 #define GIO_ODEN(bank) GIO_BANK_OFF(bank, GIO_REG_ODEN) argument
38 #define GIO_DATA(bank) GIO_BANK_OFF(bank, GIO_REG_DATA) argument
39 #define GIO_IODIR(bank) GIO_BANK_OFF(bank, GIO_REG_IODIR) argument
40 #define GIO_EC(bank) GIO_BANK_OFF(bank, GIO_REG_EC) argument
41 #define GIO_EI(bank) GIO_BANK_OFF(bank, GIO_REG_EI) argument
42 #define GIO_MASK(bank) GIO_BANK_OFF(bank, GIO_REG_MASK) argument
43 #define GIO_LEVEL(bank) GIO_BANK_OFF(bank, GIO_REG_LEVEL) argument
44 #define GIO_STAT(bank) GIO_BANK_OFF(bank, GIO_REG_STAT) argument
76 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); in brcmstb_gpio_gc_to_priv() local
[all …]
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| /kernel/linux/linux-4.19/drivers/pinctrl/sh-pfc/ |
| D | sh_pfc.h | 387 #define PORT_GP_CFG_1(bank, pin, fn, sfx, cfg) \ argument
388 fn(bank, pin, GP_##bank##_##pin, sfx, cfg)
389 #define PORT_GP_1(bank, pin, fn, sfx) PORT_GP_CFG_1(bank, pin, fn, sfx, 0) argument
391 #define PORT_GP_CFG_4(bank, fn, sfx, cfg) \ argument
392 PORT_GP_CFG_1(bank, 0, fn, sfx, cfg), \
393 PORT_GP_CFG_1(bank, 1, fn, sfx, cfg), \
394 PORT_GP_CFG_1(bank, 2, fn, sfx, cfg), \
395 PORT_GP_CFG_1(bank, 3, fn, sfx, cfg)
396 #define PORT_GP_4(bank, fn, sfx) PORT_GP_CFG_4(bank, fn, sfx, 0) argument
398 #define PORT_GP_CFG_6(bank, fn, sfx, cfg) \ argument
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| /kernel/linux/linux-4.19/drivers/pinctrl/samsung/ |
| D | pinctrl-exynos.c | 56 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_mask() local
57 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask()
61 spin_lock_irqsave(&bank->slock, flags); in exynos_irq_mask()
63 mask = readl(bank->eint_base + reg_mask); in exynos_irq_mask()
65 writel(mask, bank->eint_base + reg_mask); in exynos_irq_mask()
67 spin_unlock_irqrestore(&bank->slock, flags); in exynos_irq_mask()
74 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_ack() local
75 unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset; in exynos_irq_ack()
77 writel(1 << irqd->hwirq, bank->eint_base + reg_pend); in exynos_irq_ack()
84 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_unmask() local
[all …]
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| /kernel/linux/linux-5.10/drivers/pinctrl/renesas/ |
| D | sh_pfc.h | 448 #define PORT_GP_CFG_1(bank, pin, fn, sfx, cfg) \ argument
449 fn(bank, pin, GP_##bank##_##pin, sfx, cfg)
450 #define PORT_GP_1(bank, pin, fn, sfx) PORT_GP_CFG_1(bank, pin, fn, sfx, 0) argument
452 #define PORT_GP_CFG_4(bank, fn, sfx, cfg) \ argument
453 PORT_GP_CFG_1(bank, 0, fn, sfx, cfg), \
454 PORT_GP_CFG_1(bank, 1, fn, sfx, cfg), \
455 PORT_GP_CFG_1(bank, 2, fn, sfx, cfg), \
456 PORT_GP_CFG_1(bank, 3, fn, sfx, cfg)
457 #define PORT_GP_4(bank, fn, sfx) PORT_GP_CFG_4(bank, fn, sfx, 0) argument
459 #define PORT_GP_CFG_6(bank, fn, sfx, cfg) \ argument
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| /kernel/linux/linux-5.10/drivers/crypto/qat/qat_common/ |
| D | adf_transport.c | 36 static int adf_reserve_ring(struct adf_etr_bank_data *bank, u32 ring) in adf_reserve_ring() argument
38 spin_lock(&bank->lock); in adf_reserve_ring()
39 if (bank->ring_mask & (1 << ring)) { in adf_reserve_ring()
40 spin_unlock(&bank->lock); in adf_reserve_ring()
43 bank->ring_mask |= (1 << ring); in adf_reserve_ring()
44 spin_unlock(&bank->lock); in adf_reserve_ring()
48 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, u32 ring) in adf_unreserve_ring() argument
50 spin_lock(&bank->lock); in adf_unreserve_ring()
51 bank->ring_mask &= ~(1 << ring); in adf_unreserve_ring()
52 spin_unlock(&bank->lock); in adf_unreserve_ring()
[all …]
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| D | adf_transport_access_macros.h | 77 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
78 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
80 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
81 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
83 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument
84 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
86 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ argument
87 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
89 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ argument
94 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
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| D | adf_transport_debug.c | 44 struct adf_etr_bank_data *bank = ring->bank; in adf_ring_show() local
45 void __iomem *csr = ring->bank->csr_addr; in adf_ring_show()
50 head = READ_CSR_RING_HEAD(csr, bank->bank_number, in adf_ring_show()
52 tail = READ_CSR_RING_TAIL(csr, bank->bank_number, in adf_ring_show()
54 empty = READ_CSR_E_STAT(csr, bank->bank_number); in adf_ring_show()
59 seq_printf(sfile, "ring num %d, bank num %d\n", in adf_ring_show()
60 ring->ring_number, ring->bank->bank_number); in adf_ring_show()
103 ring->bank->bank_debug_dir, in adf_ring_debugfs_add()
140 struct adf_etr_bank_data *bank = sfile->private; in adf_bank_show() local
143 seq_printf(sfile, "------- Bank %d configuration -------\n", in adf_bank_show()
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| /kernel/linux/linux-5.10/drivers/pinctrl/samsung/ |
| D | pinctrl-exynos.c | 56 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_mask() local
57 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask()
61 spin_lock_irqsave(&bank->slock, flags); in exynos_irq_mask()
63 mask = readl(bank->eint_base + reg_mask); in exynos_irq_mask()
65 writel(mask, bank->eint_base + reg_mask); in exynos_irq_mask()
67 spin_unlock_irqrestore(&bank->slock, flags); in exynos_irq_mask()
74 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_ack() local
75 unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset; in exynos_irq_ack()
77 writel(1 << irqd->hwirq, bank->eint_base + reg_pend); in exynos_irq_ack()
84 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_unmask() local
[all …]
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| /kernel/linux/linux-4.19/drivers/crypto/qat/qat_common/ |
| D | adf_transport.c | 80 static int adf_reserve_ring(struct adf_etr_bank_data *bank, uint32_t ring) in adf_reserve_ring() argument
82 spin_lock(&bank->lock); in adf_reserve_ring()
83 if (bank->ring_mask & (1 << ring)) { in adf_reserve_ring()
84 spin_unlock(&bank->lock); in adf_reserve_ring()
87 bank->ring_mask |= (1 << ring); in adf_reserve_ring()
88 spin_unlock(&bank->lock); in adf_reserve_ring()
92 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, uint32_t ring) in adf_unreserve_ring() argument
94 spin_lock(&bank->lock); in adf_unreserve_ring()
95 bank->ring_mask &= ~(1 << ring); in adf_unreserve_ring()
96 spin_unlock(&bank->lock); in adf_unreserve_ring()
[all …]
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| /kernel/linux/linux-5.10/drivers/pinctrl/stm32/ |
| D | pinctrl-stm32.c | 153 static void stm32_gpio_backup_value(struct stm32_gpio_bank *bank, in stm32_gpio_backup_value() argument
156 bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_VAL); in stm32_gpio_backup_value()
157 bank->pin_backup[offset] |= value << STM32_GPIO_BKP_VAL; in stm32_gpio_backup_value()
160 static void stm32_gpio_backup_mode(struct stm32_gpio_bank *bank, u32 offset, in stm32_gpio_backup_mode() argument
163 bank->pin_backup[offset] &= ~(STM32_GPIO_BKP_MODE_MASK | in stm32_gpio_backup_mode()
165 bank->pin_backup[offset] |= mode << STM32_GPIO_BKP_MODE_SHIFT; in stm32_gpio_backup_mode()
166 bank->pin_backup[offset] |= alt << STM32_GPIO_BKP_ALT_SHIFT; in stm32_gpio_backup_mode()
169 static void stm32_gpio_backup_driving(struct stm32_gpio_bank *bank, u32 offset, in stm32_gpio_backup_driving() argument
172 bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_TYPE); in stm32_gpio_backup_driving()
173 bank->pin_backup[offset] |= drive << STM32_GPIO_BKP_TYPE; in stm32_gpio_backup_driving()
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| /kernel/linux/linux-4.19/drivers/pinctrl/stm32/ |
| D | pinctrl-stm32.c | 131 static inline void __stm32_gpio_set(struct stm32_gpio_bank *bank, in __stm32_gpio_set() argument
137 clk_enable(bank->clk); in __stm32_gpio_set()
139 writel_relaxed(BIT(offset), bank->base + STM32_GPIO_BSRR); in __stm32_gpio_set()
141 clk_disable(bank->clk); in __stm32_gpio_set()
146 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); in stm32_gpio_request() local
147 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_request()
149 int pin = offset + (bank->bank_nr * STM32_GPIO_PINS_PER_BANK); in stm32_gpio_request()
167 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); in stm32_gpio_get() local
170 clk_enable(bank->clk); in stm32_gpio_get()
172 ret = !!(readl_relaxed(bank->base + STM32_GPIO_IDR) & BIT(offset)); in stm32_gpio_get()
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| /kernel/linux/linux-4.19/drivers/pinctrl/ |
| D | pinctrl-rockchip.c | 128 * @reg_base: register base of the gpio bank
130 * @clk: clock of the gpio bank
131 * @irq: interrupt of the gpio bank
134 * @nr_pins: number of pins in this bank
135 * @name: name of the bank
136 * @bank_num: number of the bank, to account for holes
137 * @iomux: array describing the 4 iomux sources of the bank
138 * @drv: array describing the 4 drive strength sources of the bank
139 * @pull_type: array describing the 4 pull type sources of the bank
141 * @of_node: dt node of this bank
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| /kernel/linux/linux-5.10/drivers/net/phy/mscc/ |
| D | mscc_macsec.c | 23 enum macsec_bank bank, u32 reg) in vsc8584_macsec_phy_read() argument
34 MSCC_PHY_MACSEC_20_TARGET(bank >> 2)); in vsc8584_macsec_phy_read()
36 if (bank >> 2 == 0x1) in vsc8584_macsec_phy_read()
38 bank &= 0x3; in vsc8584_macsec_phy_read()
40 bank = 0; in vsc8584_macsec_phy_read()
45 MSCC_PHY_MACSEC_19_TARGET(bank)); in vsc8584_macsec_phy_read()
62 enum macsec_bank bank, u32 reg, u32 val) in vsc8584_macsec_phy_write() argument
72 MSCC_PHY_MACSEC_20_TARGET(bank >> 2)); in vsc8584_macsec_phy_write()
74 if ((bank >> 2 == 0x1) || (bank >> 2 == 0x3)) in vsc8584_macsec_phy_write()
75 bank &= 0x3; in vsc8584_macsec_phy_write()
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| /kernel/linux/linux-5.10/drivers/bus/ |
| D | uniphier-system-bus.c | 23 #define UNIPHIER_SBC_STRIDE 0x10 /* register stride to next bank */
25 #define UNIPHIER_SBC_BASE_DUMMY 0xffffffff /* data to squash bank 0, 1 */
35 struct uniphier_system_bus_bank bank[UNIPHIER_SBC_NR_BANKS]; member
39 int bank, u32 addr, u64 paddr, u32 size) in uniphier_system_bus_add_bank() argument
44 "range found: bank = %d, addr = %08x, paddr = %08llx, size = %08x\n", in uniphier_system_bus_add_bank()
45 bank, addr, paddr, size); in uniphier_system_bus_add_bank()
47 if (bank >= ARRAY_SIZE(priv->bank)) { in uniphier_system_bus_add_bank()
48 dev_err(priv->dev, "unsupported bank number %d\n", bank); in uniphier_system_bus_add_bank()
52 if (priv->bank[bank].base || priv->bank[bank].end) { in uniphier_system_bus_add_bank()
54 "range for bank %d has already been specified\n", bank); in uniphier_system_bus_add_bank()
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-s3c/ |
| D | iotiming-s3c2412.c | 41 unsigned int bank; in s3c2412_print_timing() local
43 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_print_timing()
44 bt = iot->bank[bank].io_2412; in s3c2412_print_timing()
49 "wstoen=%d.%d wstwen=%d.%d wstbrd=%d.%d\n", pfx, bank, in s3c2412_print_timing()
87 * s3c2412_calc_bank - calculate the bank divisor settings.
89 * @bt: The bank timing.
108 * s3c2412_iotiming_debugfs - debugfs show io bank timing information
111 * @iob: The IO bank information to decode.
131 * s3c2412_iotiming_calc - calculate all the bank divisor settings.
133 * @iot: The bank timing information.
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| D | iotiming-s3c2410.c | 27 * s3c2410_print_timing - print bank timing data for debug purposes
35 int bank; in s3c2410_print_timing() local
37 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2410_print_timing()
38 bt = timings->bank[bank].io_2410; in s3c2410_print_timing()
43 "Tcoh=%d.%d, Tcah=%d.%d\n", pfx, bank, in s3c2410_print_timing()
53 * bank_reg - convert bank number to pointer to the control register.
54 * @bank: The IO bank number.
56 static inline void __iomem *bank_reg(unsigned int bank) in bank_reg() argument
58 return S3C2410_BANKCON0 + (bank << 2); in bank_reg()
62 * bank_is_io - test whether bank is used for IO
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| /kernel/linux/linux-4.19/arch/arm/mach-s3c24xx/ |
| D | iotiming-s3c2412.c | 41 unsigned int bank; in s3c2412_print_timing() local
43 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_print_timing()
44 bt = iot->bank[bank].io_2412; in s3c2412_print_timing()
49 "wstoen=%d.%d wstwen=%d.%d wstbrd=%d.%d\n", pfx, bank, in s3c2412_print_timing()
87 * s3c2412_calc_bank - calculate the bank divisor settings.
89 * @bt: The bank timing.
108 * s3c2412_iotiming_debugfs - debugfs show io bank timing information
111 * @iob: The IO bank information to decode.
131 * s3c2412_iotiming_calc - calculate all the bank divisor settings.
133 * @iot: The bank timing information.
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| D | iotiming-s3c2410.c | 27 * s3c2410_print_timing - print bank timing data for debug purposes
35 int bank; in s3c2410_print_timing() local
37 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2410_print_timing()
38 bt = timings->bank[bank].io_2410; in s3c2410_print_timing()
43 "Tcoh=%d.%d, Tcah=%d.%d\n", pfx, bank, in s3c2410_print_timing()
53 * bank_reg - convert bank number to pointer to the control register.
54 * @bank: The IO bank number.
56 static inline void __iomem *bank_reg(unsigned int bank) in bank_reg() argument
58 return S3C2410_BANKCON0 + (bank << 2); in bank_reg()
62 * bank_is_io - test whether bank is used for IO
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| /kernel/linux/linux-4.19/drivers/bus/ |
| D | uniphier-system-bus.c | 32 #define UNIPHIER_SBC_STRIDE 0x10 /* register stride to next bank */
34 #define UNIPHIER_SBC_BASE_DUMMY 0xffffffff /* data to squash bank 0, 1 */
44 struct uniphier_system_bus_bank bank[UNIPHIER_SBC_NR_BANKS]; member
48 int bank, u32 addr, u64 paddr, u32 size) in uniphier_system_bus_add_bank() argument
53 "range found: bank = %d, addr = %08x, paddr = %08llx, size = %08x\n", in uniphier_system_bus_add_bank()
54 bank, addr, paddr, size); in uniphier_system_bus_add_bank()
56 if (bank >= ARRAY_SIZE(priv->bank)) { in uniphier_system_bus_add_bank()
57 dev_err(priv->dev, "unsupported bank number %d\n", bank); in uniphier_system_bus_add_bank()
61 if (priv->bank[bank].base || priv->bank[bank].end) { in uniphier_system_bus_add_bank()
63 "range for bank %d has already been specified\n", bank); in uniphier_system_bus_add_bank()
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| /kernel/linux/linux-5.10/arch/x86/kernel/cpu/mce/ |
| D | amd.c | 120 static enum smca_bank_types smca_get_bank_type(unsigned int bank) in smca_get_bank_type() argument
124 if (bank >= MAX_NR_BANKS) in smca_get_bank_type()
127 b = &smca_banks[bank]; in smca_get_bank_type()
185 * So to define a unique name for each bank, we use a temp c-string to append
214 static void smca_set_misc_banks_map(unsigned int bank, unsigned int cpu) in smca_set_misc_banks_map() argument
222 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_CONFIG(bank), &low, &high)) in smca_set_misc_banks_map()
228 if (rdmsr_safe(MSR_AMD64_SMCA_MCx_MISC(bank), &low, &high)) in smca_set_misc_banks_map()
232 per_cpu(smca_misc_banks_map, cpu) |= BIT(bank); in smca_set_misc_banks_map()
236 static void smca_configure(unsigned int bank, unsigned int cpu) in smca_configure() argument
241 u32 smca_config = MSR_AMD64_SMCA_MCx_CONFIG(bank); in smca_configure()
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| /kernel/linux/linux-5.10/drivers/pinctrl/ |
| D | pinctrl-rockchip.c | 125 * @reg_base: register base of the gpio bank
127 * @clk: clock of the gpio bank
128 * @irq: interrupt of the gpio bank
131 * @nr_pins: number of pins in this bank
132 * @name: name of the bank
133 * @bank_num: number of the bank, to account for holes
134 * @iomux: array describing the 4 iomux sources of the bank
135 * @drv: array describing the 4 drive strength sources of the bank
136 * @pull_type: array describing the 4 pull type sources of the bank
138 * @of_node: dt node of this bank
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| /kernel/linux/linux-4.19/arch/x86/kernel/cpu/mcheck/ |
| D | mce_amd.c | 120 static enum smca_bank_types smca_get_bank_type(unsigned int bank) in smca_get_bank_type() argument
124 if (bank >= MAX_NR_BANKS) in smca_get_bank_type()
127 b = &smca_banks[bank]; in smca_get_bank_type()
172 * So to define a unique name for each bank, we use a temp c-string to append
193 static void smca_configure(unsigned int bank, unsigned int cpu) in smca_configure() argument
198 u32 smca_config = MSR_AMD64_SMCA_MCx_CONFIG(bank); in smca_configure()
205 * bank. It also means that the OS will configure deferred in smca_configure()
214 * SMCA sets the Deferred Error Interrupt type per bank. in smca_configure()
230 /* Return early if this bank was already initialized. */ in smca_configure()
231 if (smca_banks[bank].hwid && smca_banks[bank].hwid->hwid_mcatype != 0) in smca_configure()
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