| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | nau8540.c | 1 // SPDX-License-Identifier: GPL-2.0-only
24 #include <sound/soc-dapm.h>
39 { 1, 0x0 },
40 { 2, 0x2 },
41 { 4, 0x3 },
42 { 8, 0x4 },
43 { 16, 0x5 },
44 { 32, 0x6 },
45 { 3, 0x7 },
46 { 6, 0xa },
[all …]
|
| D | sta350.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Codec driver for ST STA350 2.1-channel high-efficiency digital audio system
35 #include <sound/soc-dapm.h>
58 /* Power-up register defaults */
60 { 0x0, 0x63 },
61 { 0x1, 0x80 },
62 { 0x2, 0xdf },
63 { 0x3, 0x40 },
64 { 0x4, 0xc2 },
65 { 0x5, 0x5c },
[all …]
|
| D | ak5558.c | 1 // SPDX-License-Identifier: GPL-2.0
21 #include <sound/soc-dapm.h>
45 { 0x0, 0xFF }, /* 0x00 AK5558_00_POWER_MANAGEMENT1 */
46 { 0x1, 0x01 }, /* 0x01 AK5558_01_POWER_MANAGEMENT2 */
47 { 0x2, 0x01 }, /* 0x02 AK5558_02_CONTROL1 */
48 { 0x3, 0x00 }, /* 0x03 AK5558_03_CONTROL2 */
49 { 0x4, 0x00 }, /* 0x04 AK5558_04_CONTROL3 */
50 { 0x5, 0x00 } /* 0x05 AK5558_05_DSD */
63 "Sharp Roll-Off", "Show Roll-Off",
64 "Short Delay Sharp Roll-Off", "Short Delay Show Roll-Off",
[all …]
|
| D | sta32x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Codec driver for ST STA32x 2.1-channel high-efficiency digital audio system
35 #include <sound/soc-dapm.h>
58 /* Power-up register defaults */
60 { 0x0, 0x63 },
61 { 0x1, 0x80 },
62 { 0x2, 0xc2 },
63 { 0x3, 0x40 },
64 { 0x4, 0xc2 },
65 { 0x5, 0x5c },
[all …]
|
| /kernel/linux/linux-4.19/sound/soc/codecs/ |
| D | nau8540.c | 27 #include <sound/soc-dapm.h>
42 { 1, 0x0 },
43 { 2, 0x2 },
44 { 4, 0x3 },
45 { 8, 0x4 },
46 { 16, 0x5 },
47 { 32, 0x6 },
48 { 3, 0x7 },
49 { 6, 0xa },
50 { 12, 0xb },
[all …]
|
| D | sta350.c | 2 * Codec driver for ST STA350 2.1-channel high-efficiency digital audio system
39 #include <sound/soc-dapm.h>
62 /* Power-up register defaults */
64 { 0x0, 0x63 },
65 { 0x1, 0x80 },
66 { 0x2, 0xdf },
67 { 0x3, 0x40 },
68 { 0x4, 0xc2 },
69 { 0x5, 0x5c },
70 { 0x6, 0x00 },
[all …]
|
| D | ak5558.c | 1 // SPDX-License-Identifier: GPL-2.0
20 #include <sound/soc-dapm.h>
37 { 0x0, 0xFF }, /* 0x00 AK5558_00_POWER_MANAGEMENT1 */
38 { 0x1, 0x01 }, /* 0x01 AK5558_01_POWER_MANAGEMENT2 */
39 { 0x2, 0x01 }, /* 0x02 AK5558_02_CONTROL1 */
40 { 0x3, 0x00 }, /* 0x03 AK5558_03_CONTROL2 */
41 { 0x4, 0x00 }, /* 0x04 AK5558_04_CONTROL3 */
42 { 0x5, 0x00 } /* 0x05 AK5558_05_DSD */
55 "Sharp Roll-Off", "Show Roll-Off",
56 "Short Delay Sharp Roll-Off", "Short Delay Show Roll-Off",
[all …]
|
| /kernel/linux/linux-5.10/sound/soc/mediatek/mt8183/ |
| D | mt8183-dai-tdm.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #include "mt8183-afe-clk.h"
11 #include "mt8183-afe-common.h"
12 #include "mt8183-interconnection.h"
13 #include "mt8183-reg.h"
28 TDM_OUT_I2S = 0,
33 TDM_BCK_NON_INV = 0,
38 TDM_LCK_NON_INV = 0,
48 TDM_CHANNEL_BCK_16 = 0,
54 TDM_CHANNEL_NUM_2 = 0,
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/tests/ |
| D | api-io.c | 1 // SPDX-License-Identifier: GPL-2.0-only
16 #define TEMPL "/tmp/perf-test-XXXXXX"
23 ret = -1; \
25 } while (0)
32 ret = -1; \
34 } while (0)
43 if (fd < 0) { in make_test_file()
45 return -1; in make_test_file()
51 return -1; in make_test_file()
54 return 0; in make_test_file()
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mfd/ |
| D | stm32-timers.txt | 4 - advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable
6 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a
8 - basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler.
11 - compatible: must be "st,stm32-timers"
13 - reg: Physical base address and length of the controller's
15 - clock-names: Set to "int".
16 - clocks: Phandle to the clock used by the timer module.
17 For Clk properties, please refer to ../clock/clock-bindings.txt
20 - resets: Phandle to the parent reset controller.
21 See ../reset/st,stm32-rcc.txt
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | stih407-clock.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/stih407-clks.h>
10 clk_sysin: clk-sysin {
11 #clock-cells = <0>;
12 compatible = "fixed-clock";
13 clock-frequency = <30000000>;
16 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
17 #clock-cells = <0>;
18 compatible = "fixed-clock";
19 clock-frequency = <0>;
[all …]
|
| D | stih418-clock.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/stih418-clks.h>
10 clk_sysin: clk-sysin {
11 #clock-cells = <0>;
12 compatible = "fixed-clock";
13 clock-frequency = <30000000>;
14 clock-output-names = "CLK_SYSIN";
17 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
18 #clock-cells = <0>;
19 compatible = "fixed-clock";
[all …]
|
| D | stih410-clock.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/stih410-clks.h>
10 clk_sysin: clk-sysin {
11 #clock-cells = <0>;
12 compatible = "fixed-clock";
13 clock-frequency = <30000000>;
14 clock-output-names = "CLK_SYSIN";
17 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
18 #clock-cells = <0>;
19 compatible = "fixed-clock";
[all …]
|
| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | stih407-clock.dtsi | 8 #include <dt-bindings/clock/stih407-clks.h>
13 clk_sysin: clk-sysin {
14 #clock-cells = <0>;
15 compatible = "fixed-clock";
16 clock-frequency = <30000000>;
19 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
20 #clock-cells = <0>;
21 compatible = "fixed-clock";
22 clock-frequency = <0>;
26 #address-cells = <1>;
[all …]
|
| D | stih410-clock.dtsi | 8 #include <dt-bindings/clock/stih410-clks.h>
13 clk_sysin: clk-sysin {
14 #clock-cells = <0>;
15 compatible = "fixed-clock";
16 clock-frequency = <30000000>;
17 clock-output-names = "CLK_SYSIN";
20 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
23 clock-frequency = <0>;
[all …]
|
| D | stih418-clock.dtsi | 8 #include <dt-bindings/clock/stih418-clks.h>
13 clk_sysin: clk-sysin {
14 #clock-cells = <0>;
15 compatible = "fixed-clock";
16 clock-frequency = <30000000>;
17 clock-output-names = "CLK_SYSIN";
20 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
23 clock-frequency = <0>;
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | st,stm32-timers.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16 - basic timers consist of a 16-bit auto-reload counter driven by a
20 - Benjamin Gaignard <benjamin.gaignard@st.com>
21 - Fabrice Gasnier <fabrice.gasnier@st.com>
25 const: st,stm32-timers
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/sound/ |
| D | st,sta32x.txt | 7 - compatible: "st,sta32x"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
22 - st,output-conf: number, Selects the output configuration:
23 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power
[all …]
|
| D | st,sta350.txt | 7 - compatible: "st,sta350"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - vdd-dig-supply: regulator spec, providing 3.3V
17 - vdd-pll-supply: regulator spec, providing 3.3V
18 - vcc-supply: regulator spec, providing 5V - 26V
22 - st,output-conf: number, Selects the output configuration:
23 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/dma/ |
| D | renesas,rcar-dmac.txt | 1 * Renesas R-Car (RZ/G) DMA Controller Device Tree bindings
3 Renesas R-Car Generation 2 SoCs have multiple multi-channel DMA
9 an 8-bit port number called the MID/RID. A DMA controller can thus serve up to
17 - compatible: "renesas,dmac-<soctype>", "renesas,rcar-dmac" as fallback.
19 - "renesas,dmac-r8a7743" (RZ/G1M)
20 - "renesas,dmac-r8a7745" (RZ/G1E)
21 - "renesas,dmac-r8a77470" (RZ/G1C)
22 - "renesas,dmac-r8a7790" (R-Car H2)
23 - "renesas,dmac-r8a7791" (R-Car M2-W)
24 - "renesas,dmac-r8a7792" (R-Car V2H)
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | st,sta32x.txt | 7 - compatible: "st,sta32x"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
22 - clocks, clock-names: Clock specifier for XTI input clock.
24 and disabled when it is removed. The 'clock-names' must be set to 'xti'.
26 - st,output-conf: number, Selects the output configuration:
[all …]
|
| D | st,sta350.txt | 7 - compatible: "st,sta350"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - vdd-dig-supply: regulator spec, providing 3.3V
17 - vdd-pll-supply: regulator spec, providing 3.3V
18 - vcc-supply: regulator spec, providing 5V - 26V
22 - st,output-conf: number, Selects the output configuration:
23 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/ |
| D | uniphier-clock.txt | 5 ------------
8 - compatible: should be one of the following:
9 "socionext,uniphier-ld4-clock" - for LD4 SoC.
10 "socionext,uniphier-pro4-clock" - for Pro4 SoC.
11 "socionext,uniphier-sld8-clock" - for sLD8 SoC.
12 "socionext,uniphier-pro5-clock" - for Pro5 SoC.
13 "socionext,uniphier-pxs2-clock" - for PXs2/LD6b SoC.
14 "socionext,uniphier-ld11-clock" - for LD11 SoC.
15 "socionext,uniphier-ld20-clock" - for LD20 SoC.
16 "socionext,uniphier-pxs3-clock" - for PXs3 SoC
[all …]
|
| /kernel/linux/linux-4.19/arch/arm64/boot/dts/renesas/ |
| D | r8a7795-salvator-xs.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Salvator-X 2nd version board with R-Car H3 ES2.0
5 * Copyright (C) 2015-2017 Renesas Electronics Corp.
8 /dts-v1/;
10 #include "salvator-xs.dtsi"
13 model = "Renesas Salvator-X 2nd version board based on r8a7795 ES2.0+";
14 compatible = "renesas,salvator-xs", "renesas,r8a7795";
19 reg = <0x0 0x48000000 0x0 0x38000000>;
24 reg = <0x5 0x00000000 0x0 0x40000000>;
29 reg = <0x6 0x00000000 0x0 0x40000000>;
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/renesas/ |
| D | r8a77951-salvator-xs.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Salvator-X 2nd version board with R-Car H3 ES2.0+
5 * Copyright (C) 2015-2017 Renesas Electronics Corp.
8 /dts-v1/;
10 #include "salvator-xs.dtsi"
13 model = "Renesas Salvator-X 2nd version board based on r8a77951";
14 compatible = "renesas,salvator-xs", "renesas,r8a7795";
19 reg = <0x0 0x48000000 0x0 0x38000000>;
24 reg = <0x5 0x00000000 0x0 0x40000000>;
29 reg = <0x6 0x00000000 0x0 0x40000000>;
[all …]
|