| /kernel/linux/linux-5.10/drivers/gpu/drm/bridge/ |
| D | nwl-dsi.c | 3 * i.MX8 NWL MIPI DSI host driver
33 #include "nwl-dsi.h"
35 #define DRV_NAME "nwl-dsi"
83 * The DSI host controller needs this reset sequence according to NWL:
84 * 1. Deassert pclk reset to get access to DSI regs
85 * 2. Configure DSI Host and DPHY and enable DPHY
87 * 4. Send DSI cmds to configure peripheral (handled by panel drv)
89 * DSI data
91 * TODO: Since panel_bridges do their DSI setup in enable we
100 /* DSI clocks */
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| /kernel/linux/linux-4.19/drivers/gpu/drm/mediatek/ |
| D | mtk_dsi.c | 202 static void mtk_dsi_mask(struct mtk_dsi *dsi, u32 offset, u32 mask, u32 data) in mtk_dsi_mask() argument
204 u32 temp = readl(dsi->regs + offset); in mtk_dsi_mask()
206 writel((temp & ~mask) | (data & mask), dsi->regs + offset); in mtk_dsi_mask()
209 static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi) in mtk_dsi_phy_timconfig() argument
214 ui = 1000 / dsi->data_rate + 0x01; in mtk_dsi_phy_timconfig()
215 cycle_time = 8000 / dsi->data_rate + 0x01; in mtk_dsi_phy_timconfig()
225 writel(timcon0, dsi->regs + DSI_PHY_TIMECON0); in mtk_dsi_phy_timconfig()
226 writel(timcon1, dsi->regs + DSI_PHY_TIMECON1); in mtk_dsi_phy_timconfig()
227 writel(timcon2, dsi->regs + DSI_PHY_TIMECON2); in mtk_dsi_phy_timconfig()
228 writel(timcon3, dsi->regs + DSI_PHY_TIMECON3); in mtk_dsi_phy_timconfig()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/mediatek/ |
| D | mtk_dsi.c | 220 static void mtk_dsi_mask(struct mtk_dsi *dsi, u32 offset, u32 mask, u32 data) in mtk_dsi_mask() argument
222 u32 temp = readl(dsi->regs + offset); in mtk_dsi_mask()
224 writel((temp & ~mask) | (data & mask), dsi->regs + offset); in mtk_dsi_mask()
227 static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi) in mtk_dsi_phy_timconfig() argument
230 u32 data_rate_mhz = DIV_ROUND_UP(dsi->data_rate, 1000000); in mtk_dsi_phy_timconfig()
231 struct mtk_phy_timing *timing = &dsi->phy_timing; in mtk_dsi_phy_timconfig()
259 writel(timcon0, dsi->regs + DSI_PHY_TIMECON0); in mtk_dsi_phy_timconfig()
260 writel(timcon1, dsi->regs + DSI_PHY_TIMECON1); in mtk_dsi_phy_timconfig()
261 writel(timcon2, dsi->regs + DSI_PHY_TIMECON2); in mtk_dsi_phy_timconfig()
262 writel(timcon3, dsi->regs + DSI_PHY_TIMECON3); in mtk_dsi_phy_timconfig()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/bridge/synopsys/ |
| D | dw-mipi-dsi.c | 7 * This generic Synopsys DesignWare MIPI DSI host driver is based on the
8 * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
226 #define VPG_DEFS(name, dsi) \ argument
227 ((void __force *)&((*dsi).vpg_defs.name))
229 #define REGISTER(name, mask, dsi) \ argument
230 { #name, VPG_DEFS(name, dsi), mask, dsi }
236 struct dw_mipi_dsi *dsi; member
265 struct dw_mipi_dsi *master; /* dual-dsi master ptr */
266 struct dw_mipi_dsi *slave; /* dual-dsi slave ptr */
274 static inline bool dw_mipi_is_dual_mode(struct dw_mipi_dsi *dsi) in dw_mipi_is_dual_mode() argument
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| /kernel/linux/linux-4.19/drivers/gpu/drm/rockchip/ |
| D | dw-mipi-dsi.c | 31 #define DRIVER_NAME "dw-mipi-dsi"
378 static inline void dsi_write(struct dw_mipi_dsi *dsi, u32 reg, u32 val) in dsi_write() argument
380 writel(val, dsi->base + reg); in dsi_write()
383 static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg) in dsi_read() argument
385 return readl(dsi->base + reg); in dsi_read()
388 static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi *dsi, u8 test_code, in dw_mipi_dsi_phy_write() argument
396 dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR); in dw_mipi_dsi_phy_write()
398 dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_TESTEN | PHY_TESTDOUT(0) | in dw_mipi_dsi_phy_write()
401 dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLK | PHY_UNTESTCLR); in dw_mipi_dsi_phy_write()
403 dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_UNTESTEN | PHY_TESTDOUT(0) | in dw_mipi_dsi_phy_write()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/tegra/ |
| D | dsi.c | 29 #include "dsi.h"
102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) in tegra_dsi_get_state() argument
104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state()
107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() argument
109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl()
111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl()
116 static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value, in tegra_dsi_writel() argument
119 trace_dsi_writel(dsi->dev, offset, value); in tegra_dsi_writel()
120 writel(value, dsi->regs + (offset << 2)); in tegra_dsi_writel()
202 struct tegra_dsi *dsi = node->info_ent->data; in tegra_dsi_show_regs() local
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| /kernel/linux/linux-4.19/drivers/gpu/drm/tegra/ |
| D | dsi.c | 29 #include "dsi.h"
102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) in tegra_dsi_get_state() argument
104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state()
107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() argument
109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl()
111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl()
116 static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value, in tegra_dsi_writel() argument
119 trace_dsi_writel(dsi->dev, offset, value); in tegra_dsi_writel()
120 writel(value, dsi->regs + (offset << 2)); in tegra_dsi_writel()
202 struct tegra_dsi *dsi = node->info_ent->data; in tegra_dsi_show_regs() local
[all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/omapdrm/dss/ |
| D | dsi.c | 18 #define DSS_SUBSYS_NAME "DSI"
58 /* DSI Protocol Engine */
122 #define REG_GET(dsi, idx, start, end) \ argument
123 FLD_GET(dsi_read_reg(dsi, idx), start, end)
125 #define REG_FLD_MOD(dsi, idx, val, start, end) \ argument
126 dsi_write_reg(dsi, idx, FLD_MOD(dsi_read_reg(dsi, idx), val, start, end))
218 static int dsi_display_init_dispc(struct dsi_data *dsi);
219 static void dsi_display_uninit_dispc(struct dsi_data *dsi);
221 static int dsi_vc_send_null(struct dsi_data *dsi, int channel);
223 /* DSI PLL HSDIV indices */
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| /kernel/linux/linux-4.19/drivers/gpu/drm/bridge/synopsys/ |
| D | dw-mipi-dsi.c | 7 * This generic Synopsys DesignWare MIPI DSI host driver is based on the
8 * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
259 static inline void dsi_write(struct dw_mipi_dsi *dsi, u32 reg, u32 val) in dsi_write() argument
261 writel(val, dsi->base + reg); in dsi_write()
264 static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg) in dsi_read() argument
266 return readl(dsi->base + reg); in dsi_read()
272 struct dw_mipi_dsi *dsi = host_to_dsi(host); in dw_mipi_dsi_host_attach() local
277 if (device->lanes > dsi->plat_data->max_data_lanes) { in dw_mipi_dsi_host_attach()
278 dev_err(dsi->dev, "the number of data lanes(%u) is too many\n", in dw_mipi_dsi_host_attach()
283 dsi->lanes = device->lanes; in dw_mipi_dsi_host_attach()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/omapdrm/dss/ |
| D | dsi.c | 7 #define DSS_SUBSYS_NAME "DSI"
47 /* DSI Protocol Engine */
111 #define REG_GET(dsi, idx, start, end) \ argument
112 FLD_GET(dsi_read_reg(dsi, idx), start, end)
114 #define REG_FLD_MOD(dsi, idx, val, start, end) \ argument
115 dsi_write_reg(dsi, idx, FLD_MOD(dsi_read_reg(dsi, idx), val, start, end))
207 static int dsi_display_init_dispc(struct dsi_data *dsi);
208 static void dsi_display_uninit_dispc(struct dsi_data *dsi);
210 static int dsi_vc_send_null(struct dsi_data *dsi, int channel);
212 /* DSI PLL HSDIV indices */
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| /kernel/linux/linux-4.19/drivers/gpu/drm/ |
| D | drm_mipi_dsi.c | 2 * MIPI DSI Bus
39 * DOC: dsi helpers
41 * These functions contain some common logic and helpers to deal with MIPI DSI
44 * Helpers are provided for a number of standard MIPI DSI command as well as a
50 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in mipi_dsi_device_match() local
56 /* compare DSI device and driver names */ in mipi_dsi_device_match()
57 if (!strcmp(dsi->name, drv->name)) in mipi_dsi_device_match()
65 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in mipi_dsi_uevent() local
73 dsi->name); in mipi_dsi_uevent()
90 .name = "mipi-dsi",
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| /kernel/linux/linux-5.10/drivers/gpu/drm/ |
| D | drm_mipi_dsi.c | 2 * MIPI DSI Bus
41 * DOC: dsi helpers
43 * These functions contain some common logic and helpers to deal with MIPI DSI
46 * Helpers are provided for a number of standard MIPI DSI command as well as a
52 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in mipi_dsi_device_match() local
58 /* compare DSI device and driver names */ in mipi_dsi_device_match()
59 if (!strcmp(dsi->name, drv->name)) in mipi_dsi_device_match()
67 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in mipi_dsi_uevent() local
75 dsi->name); in mipi_dsi_uevent()
92 .name = "mipi-dsi",
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| /kernel/linux/linux-5.10/drivers/gpu/drm/exynos/ |
| D | exynos_drm_dsi.c | 3 * Samsung SoC MIPI DSI Master driver.
321 static inline void exynos_dsi_write(struct exynos_dsi *dsi, enum reg_idx idx, in exynos_dsi_write() argument
325 writel(val, dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in exynos_dsi_write()
328 static inline u32 exynos_dsi_read(struct exynos_dsi *dsi, enum reg_idx idx) in exynos_dsi_read() argument
330 return readl(dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in exynos_dsi_read()
510 { .compatible = "samsung,exynos3250-mipi-dsi",
512 { .compatible = "samsung,exynos4210-mipi-dsi",
514 { .compatible = "samsung,exynos5410-mipi-dsi",
516 { .compatible = "samsung,exynos5422-mipi-dsi",
518 { .compatible = "samsung,exynos5433-mipi-dsi",
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| /kernel/linux/linux-4.19/drivers/gpu/drm/exynos/ |
| D | exynos_drm_dsi.c | 2 * Samsung SoC MIPI DSI Master driver.
318 static inline void exynos_dsi_write(struct exynos_dsi *dsi, enum reg_idx idx, in exynos_dsi_write() argument
322 writel(val, dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in exynos_dsi_write()
325 static inline u32 exynos_dsi_read(struct exynos_dsi *dsi, enum reg_idx idx) in exynos_dsi_read() argument
327 return readl(dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in exynos_dsi_read()
507 { .compatible = "samsung,exynos3250-mipi-dsi",
509 { .compatible = "samsung,exynos4210-mipi-dsi",
511 { .compatible = "samsung,exynos5410-mipi-dsi",
513 { .compatible = "samsung,exynos5422-mipi-dsi",
515 { .compatible = "samsung,exynos5433-mipi-dsi",
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/panel/ |
| D | panel-asus-z00t-tm5p5-n35596.c | 16 struct mipi_dsi_device *dsi; member
27 #define dsi_generic_write_seq(dsi, seq...) do { \ argument
30 ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
35 #define dsi_dcs_write_seq(dsi, seq...) do { \ argument
38 ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
55 struct mipi_dsi_device *dsi = ctx->dsi; in tm5p5_nt35596_on() local
57 dsi_generic_write_seq(dsi, 0xff, 0x05); in tm5p5_nt35596_on()
58 dsi_generic_write_seq(dsi, 0xfb, 0x01); in tm5p5_nt35596_on()
59 dsi_generic_write_seq(dsi, 0xc5, 0x31); in tm5p5_nt35596_on()
60 dsi_generic_write_seq(dsi, 0xff, 0x04); in tm5p5_nt35596_on()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/ |
| D | sun6i_mipi_dsi.c | 291 static void sun6i_dsi_inst_abort(struct sun6i_dsi *dsi) in sun6i_dsi_inst_abort() argument
293 regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_abort()
297 static void sun6i_dsi_inst_commit(struct sun6i_dsi *dsi) in sun6i_dsi_inst_commit() argument
299 regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_commit()
304 static int sun6i_dsi_inst_wait_for_completion(struct sun6i_dsi *dsi) in sun6i_dsi_inst_wait_for_completion() argument
308 return regmap_read_poll_timeout(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_wait_for_completion()
314 static void sun6i_dsi_inst_setup(struct sun6i_dsi *dsi, in sun6i_dsi_inst_setup() argument
321 regmap_write(dsi->regs, SUN6I_DSI_INST_FUNC_REG(id), in sun6i_dsi_inst_setup()
329 static void sun6i_dsi_inst_init(struct sun6i_dsi *dsi, in sun6i_dsi_inst_init() argument
334 sun6i_dsi_inst_setup(dsi, DSI_INST_ID_LP11, DSI_INST_MODE_STOP, in sun6i_dsi_inst_init()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/rockchip/ |
| D | dw-mipi-dsi-rockchip.c | 309 static inline void dsi_write(struct dw_mipi_dsi_rockchip *dsi, u32 reg, u32 val) in dsi_write() argument
311 writel(val, dsi->base + reg); in dsi_write()
314 static inline u32 dsi_read(struct dw_mipi_dsi_rockchip *dsi, u32 reg) in dsi_read() argument
316 return readl(dsi->base + reg); in dsi_read()
319 static inline void dsi_set(struct dw_mipi_dsi_rockchip *dsi, u32 reg, u32 mask) in dsi_set() argument
321 dsi_write(dsi, reg, dsi_read(dsi, reg) | mask); in dsi_set()
324 static inline void dsi_update_bits(struct dw_mipi_dsi_rockchip *dsi, u32 reg, in dsi_update_bits() argument
327 dsi_write(dsi, reg, (dsi_read(dsi, reg) & ~mask) | val); in dsi_update_bits()
330 static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi_rockchip *dsi, in dw_mipi_dsi_phy_write() argument
339 dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR); in dw_mipi_dsi_phy_write()
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| /kernel/linux/linux-4.19/drivers/gpu/drm/sun4i/ |
| D | sun6i_mipi_dsi.c | 283 static void sun6i_dsi_inst_abort(struct sun6i_dsi *dsi) in sun6i_dsi_inst_abort() argument
285 regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_abort()
289 static void sun6i_dsi_inst_commit(struct sun6i_dsi *dsi) in sun6i_dsi_inst_commit() argument
291 regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_commit()
296 static int sun6i_dsi_inst_wait_for_completion(struct sun6i_dsi *dsi) in sun6i_dsi_inst_wait_for_completion() argument
300 return regmap_read_poll_timeout(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_wait_for_completion()
306 static void sun6i_dsi_inst_setup(struct sun6i_dsi *dsi, in sun6i_dsi_inst_setup() argument
313 regmap_write(dsi->regs, SUN6I_DSI_INST_FUNC_REG(id), in sun6i_dsi_inst_setup()
321 static void sun6i_dsi_inst_init(struct sun6i_dsi *dsi, in sun6i_dsi_inst_init() argument
326 sun6i_dsi_inst_setup(dsi, DSI_INST_ID_LP11, DSI_INST_MODE_STOP, in sun6i_dsi_inst_init()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/stm/ |
| D | dw_mipi_dsi-stm.c | 25 /* DSI digital registers & bit definitions */
29 /* DSI wrapper registers & bit definitions */
32 #define WCFGR_DSIM BIT(0) /* DSI Mode */
36 #define WCR_DSIEN BIT(3) /* DSI ENable */
60 /* dsi color format coding according to the datasheet */
80 struct dw_mipi_dsi *dsi; member
87 static inline void dsi_write(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 val) in dsi_write() argument
89 writel(val, dsi->base + reg); in dsi_write()
92 static inline u32 dsi_read(struct dw_mipi_dsi_stm *dsi, u32 reg) in dsi_read() argument
94 return readl(dsi->base + reg); in dsi_read()
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| /kernel/linux/linux-4.19/drivers/gpu/drm/stm/ |
| D | dw_mipi_dsi-stm.c | 20 /* DSI digital registers & bit definitions */
24 /* DSI wrapper registers & bit definitions */
27 #define WCFGR_DSIM BIT(0) /* DSI Mode */
31 #define WCR_DSIEN BIT(3) /* DSI ENable */
55 /* dsi color format coding according to the datasheet */
75 struct dw_mipi_dsi *dsi; member
81 static inline void dsi_write(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 val) in dsi_write() argument
83 writel(val, dsi->base + reg); in dsi_write()
86 static inline u32 dsi_read(struct dw_mipi_dsi_stm *dsi, u32 reg) in dsi_read() argument
88 return readl(dsi->base + reg); in dsi_read()
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| /kernel/linux/linux-4.19/include/drm/ |
| D | drm_mipi_dsi.h | 2 * MIPI DSI Bus
26 * struct mipi_dsi_msg - read/write DSI buffer
51 * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
69 * struct mipi_dsi_host_ops - DSI bus operations
70 * @attach: attach DSI device to DSI host
71 * @detach: detach DSI device from DSI host
72 * @transfer: transmit a DSI packet
74 * DSI packets transmitted by .transfer() are passed in as mipi_dsi_msg
82 * Note that typically DSI packet transmission is atomic, so the .transfer()
88 struct mipi_dsi_device *dsi);
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| /kernel/linux/linux-5.10/include/drm/ |
| D | drm_mipi_dsi.h | 3 * MIPI DSI Bus
24 * struct mipi_dsi_msg - read/write DSI buffer
49 * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
67 * struct mipi_dsi_host_ops - DSI bus operations
68 * @attach: attach DSI device to DSI host
69 * @detach: detach DSI device from DSI host
70 * @transfer: transmit a DSI packet
72 * DSI packets transmitted by .transfer() are passed in as mipi_dsi_msg
80 * Note that typically DSI packet transmission is atomic, so the .transfer()
86 struct mipi_dsi_device *dsi);
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| /kernel/linux/linux-5.10/drivers/gpu/drm/vc4/ |
| D | vc4_dsi.c | 9 * BCM2835 contains two DSI modules, DSI0 and DSI1. DSI0 is a
10 * single-lane DSI controller, while DSI1 is a more modern 4-lane DSI
496 /* General DSI hardware state. */
515 /* DSI channel for the panel we're connected to. */
522 /* Input clock from CPRMAN to the digital PHY, for the DSI
527 /* Input clock to the analog PHY, used to generate the DSI bit
532 /* HS Clocks generated within the DSI analog PHY. */
551 dsi_dma_workaround_write(struct vc4_dsi *dsi, u32 offset, u32 val) in dsi_dma_workaround_write() argument
553 struct dma_chan *chan = dsi->reg_dma_chan; in dsi_dma_workaround_write()
560 writel(val, dsi->regs + offset); in dsi_dma_workaround_write()
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| /kernel/linux/linux-4.19/drivers/gpu/drm/vc4/ |
| D | vc4_dsi.c | 20 * BCM2835 contains two DSI modules, DSI0 and DSI1. DSI0 is a
21 * single-lane DSI controller, while DSI1 is a more modern 4-lane DSI
501 /* General DSI hardware state. */
519 /* DSI channel for the panel we're connected to. */
526 /* Input clock from CPRMAN to the digital PHY, for the DSI
531 /* Input clock to the analog PHY, used to generate the DSI bit
536 /* HS Clocks generated within the DSI analog PHY. */
553 dsi_dma_workaround_write(struct vc4_dsi *dsi, u32 offset, u32 val) in dsi_dma_workaround_write() argument
555 struct dma_chan *chan = dsi->reg_dma_chan; in dsi_dma_workaround_write()
562 writel(val, dsi->regs + offset); in dsi_dma_workaround_write()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ |
| D | mipi-dsi-bus.txt | 1 MIPI DSI (Display Serial Interface) busses
6 define the syntax used to represent a DSI bus in a device tree.
8 This document describes DSI bus-specific properties only or defines existing
9 standard properties in the context of the DSI bus.
11 Each DSI host provides a DSI bus. The DSI host controller's node contains a
15 The following assumes that only a single peripheral is connected to a DSI
18 DSI host
22 a DSI host, the following properties apply to a node representing a DSI host.
26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
34 conjunction with another DSI host to drive the same peripheral. Hardware
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