Searched +full:hardware +full:- +full:triggered (Results 1 – 25 of 1015) sorted by relevance
12345678910>>...41
| /kernel/linux/linux-4.19/Documentation/hwmon/ |
| D | via686a | 5 * Via VT82C686A, VT82C686B Southbridge Integrated Hardware Monitor
7 Addresses scanned: ISA in PCI-space encoded address
8 Datasheet: On request through web form (http://www.via.com.tw/en/resources/download-center/)
14 (Some conversion-factor data were contributed by
19 -----------------
30 -----------
35 The Via 686a southbridge has integrated hardware monitor functionality.
36 It also has an I2C bus, but this driver only supports the hardware monitor.
37 For the I2C bus driver, see <file:Documentation/i2c/busses/i2c-viapro>
42 Temperatures are measured in degrees Celsius. An alarm is triggered once
[all …]
|
| D | sis5595 | 5 * Silicon Integrated Systems Corp. SiS5595 Southbridge Hardware Monitor
7 Addresses scanned: ISA in PCI-space encoded address
15 SiS southbridge has a LM78-like chip integrated on the same IC.
41 -----------------
51 -----------
53 The SiS5595 southbridge has integrated hardware monitor functions. It also
54 has an I2C bus, but this driver only supports the hardware monitor. For the
55 I2C bus driver see i2c-sis5595.
68 Temperatures are measured in degrees Celsius. An alarm is triggered once
69 when the max is crossed; it is also triggered when it drops below the min
[all …]
|
| D | lm78 | 5 * National Semiconductor LM78 / LM78-J
7 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
12 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
20 -----------
22 This driver implements support for the National Semiconductor LM78, LM78-J
23 and LM79. They are described as 'Microprocessor System Hardware Monitors'.
26 the LM78 and LM78-J are exactly identical. The LM79 has one more VID line,
33 Temperatures are measured in degrees Celsius. An alarm is triggered once
34 when the Overtemperature Shutdown limit is crossed; it is triggered again
39 between -55 and +125 degrees, with a resolution of 1 degree.
[all …]
|
| D | lm87 | 7 Addresses scanned: I2C 0x2c - 0x2e
11 Addresses scanned: I2C 0x2c - 0x2e
24 -----------
39 triggered if the rotation speed has dropped below a programmable limit. Fan
46 volts. An alarm is triggered if the voltage has crossed a programmable
50 If an alarm triggers, it will remain triggered until the hardware register
53 hardware registers are read whenever any data is read (unless it is less
55 miss once-only alarms.
61 Hardware Configurations
62 -----------------------
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|
| D | gl518sm | 16 Hong-Gunn Chew <hglinux@gunnet.org>
20 -----------
39 situation. Measurements are guaranteed between -10 degrees and +110
40 degrees, with a accuracy of +/-3 degrees.
43 triggered if the rotation speed has dropped below a programmable limit. In
44 case when you have selected to turn fan1 off, no fan1 alarm is triggered.
52 An alarm is triggered if the voltage has crossed a programmable minimum or
61 When an alarm is triggered, you can be warned by a beeping signal through your
65 If an alarm triggers, it will remain triggered until the hardware register
68 implementation, all hardware registers are read whenever any data is read
[all …]
|
| D | lm80 | 7 Addresses scanned: I2C 0x28 - 0x2f
12 Addresses scanned: I2C 0x28 - 0x2f
21 -----------
24 It is described as a 'Serial Interface ACPI-Compatible Microprocessor
25 System Hardware Monitor'. The LM96080 is a more recent incarnation,
37 is unclear about this). Measurements are guaranteed between -55 and
42 triggered if the rotation speed has dropped below a programmable limit. Fan
49 An alarm is triggered if the voltage has crossed a programmable minimum
55 If an alarm triggers, it will remain triggered until the hardware register
58 hardware registers are read whenever any data is read (unless it is less
[all …]
|
| D | smsc47m1 | 26 fan.c program: http://www.lsc-group.phys.uwm.edu/%7Eballen/driver/
31 -----------
36 The LPC47M15x, LPC47M192 and LPC47M292 chips contain a full 'hardware
38 hardware monitoring block is not supported by this driver, use the
45 triggered if the rotation speed has dropped below a programmable limit. Fan
53 If an alarm triggers, it will remain triggered until the hardware register
56 hardware registers are read whenever any data is read (unless it is less
58 miss once-only alarms.
|
| D | w83791d | 7 Addresses scanned: I2C 0x2c - 0x2f
8 Datasheet: http://www.winbond-usa.com/products/winbond_products/pdfs/PCIC/W83791D_W83791Gb.pdf
28 -----------------
51 -----------
59 parameter; this will put it into a more well-behaved state first.
65 degC for temp1 and 0.5 degC for temp2 and temp3. An alarm is triggered when
70 An alarm is triggered if the voltage has crossed a programmable minimum
74 triggered if the rotation speed has dropped below a programmable limit. Fan
80 PWM 1-3 support Thermal Cruise mode, in which the PWMs are automatically
81 regulated to keep respectively temp 1-3 at a certain target temperature.
[all …]
|
| /kernel/linux/linux-5.10/Documentation/hwmon/ |
| D | via686a.rst | 6 * Via VT82C686A, VT82C686B Southbridge Integrated Hardware Monitor
10 Addresses scanned: ISA in PCI-space encoded address
12 Datasheet: On request through web form (http://www.via.com.tw/en/resources/download-center/)
15 - Kyösti Mälkki <kmalkki@cc.hut.fi>,
16 - Mark D. Studebaker <mdsxyz123@yahoo.com>
17 - Bob Dougherty <bobd@stanford.edu>
18 - (Some conversion-factor data were contributed by
19 - Jonathan Teh Soon Yew <j.teh@iname.com>
20 - and Alex van Kaam <darkside@chello.nl>.)
23 -----------------
[all …]
|
| D | sis5595.rst | 6 * Silicon Integrated Systems Corp. SiS5595 Southbridge Hardware Monitor
10 Addresses scanned: ISA in PCI-space encoded address
18 - Kyösti Mälkki <kmalkki@cc.hut.fi>,
19 - Mark D. Studebaker <mdsxyz123@yahoo.com>,
20 - Aurelien Jarno <aurelien@aurel32.net> 2.6 port
22 SiS southbridge has a LM78-like chip integrated on the same IC.
55 -----------------
69 -----------
71 The SiS5595 southbridge has integrated hardware monitor functions. It also
72 has an I2C bus, but this driver only supports the hardware monitor. For the
[all …]
|
| D | lm78.rst | 6 * National Semiconductor LM78 / LM78-J
10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
20 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
28 - Frodo Looijaard <frodol@dds.nl>
29 - Jean Delvare <jdelvare@suse.de>
32 -----------
34 This driver implements support for the National Semiconductor LM78, LM78-J
35 and LM79. They are described as 'Microprocessor System Hardware Monitors'.
38 the LM78 and LM78-J are exactly identical. The LM79 has one more VID line,
45 Temperatures are measured in degrees Celsius. An alarm is triggered once
[all …]
|
| D | lm87.rst | 10 Addresses scanned: I2C 0x2c - 0x2e
18 Addresses scanned: I2C 0x2c - 0x2e
24 - Frodo Looijaard <frodol@dds.nl>,
25 - Philip Edelbrock <phil@netroedge.com>,
26 - Mark Studebaker <mdsxyz123@yahoo.com>,
27 - Stephen Rousset <stephen.rousset@rocketlogix.com>,
28 - Dan Eaton <dan.eaton@rocketlogix.com>,
29 - Jean Delvare <jdelvare@suse.de>,
30 - Original 2.6 port Jeff Oliver
33 -----------
[all …]
|
| D | gl518sm.rst | 21 - Frodo Looijaard <frodol@dds.nl>,
22 - Kyösti Mälkki <kmalkki@cc.hut.fi>
23 - Hong-Gunn Chew <hglinux@gunnet.org>
24 - Jean Delvare <jdelvare@suse.de>
27 -----------
46 situation. Measurements are guaranteed between -10 degrees and +110
47 degrees, with a accuracy of +/-3 degrees.
50 triggered if the rotation speed has dropped below a programmable limit. In
51 case when you have selected to turn fan1 off, no fan1 alarm is triggered.
59 An alarm is triggered if the voltage has crossed a programmable minimum or
[all …]
|
| D | lm80.rst | 10 Addresses scanned: I2C 0x28 - 0x2f
20 Addresses scanned: I2C 0x28 - 0x2f
28 - Frodo Looijaard <frodol@dds.nl>,
29 - Philip Edelbrock <phil@netroedge.com>
32 -----------
35 It is described as a 'Serial Interface ACPI-Compatible Microprocessor
36 System Hardware Monitor'. The LM96080 is a more recent incarnation,
48 is unclear about this). Measurements are guaranteed between -55 and
53 triggered if the rotation speed has dropped below a programmable limit. Fan
60 An alarm is triggered if the voltage has crossed a programmable minimum
[all …]
|
| D | smsc47m1.rst | 44 - Mark D. Studebaker <mdsxyz123@yahoo.com>,
45 - With assistance from Bruce Allen <ballen@uwm.edu>, and his
48 - http://www.lsc-group.phys.uwm.edu/%7Eballen/driver/
50 - Gabriele Gorla <gorlik@yahoo.com>,
51 - Jean Delvare <jdelvare@suse.de>
54 -----------
59 The LPC47M15x, LPC47M192 and LPC47M292 chips contain a full 'hardware
61 hardware monitoring block is not supported by this driver, use the
68 triggered if the rotation speed has dropped below a programmable limit. Fan
76 If an alarm triggers, it will remain triggered until the hardware register
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/spi/ |
| D | spi-sprd-adi.txt | 3 ADI is the abbreviation of Anolog-Digital interface, which is used to access
5 framework for its hardware implementation is alike to SPI bus and its timing
9 48 hardware channels to access analog chip. For 2 software read/write channels,
10 users should set ADI registers to access analog chip. For hardware channels,
11 we can configure them to allow other hardware components to use it independently,
12 which means we can just link one analog chip address to one hardware channel,
13 then users can access the mapped analog chip address by this hardware channel
14 triggered by hardware components instead of ADI software channels.
16 Thus we introduce one property named "sprd,hw-channels" to configure hardware
17 channels, the first value specifies the hardware channel id which is used to
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | spi-sprd-adi.txt | 3 ADI is the abbreviation of Anolog-Digital interface, which is used to access
5 framework for its hardware implementation is alike to SPI bus and its timing
9 48 hardware channels to access analog chip. For 2 software read/write channels,
10 users should set ADI registers to access analog chip. For hardware channels,
11 we can configure them to allow other hardware components to use it independently,
12 which means we can just link one analog chip address to one hardware channel,
13 then users can access the mapped analog chip address by this hardware channel
14 triggered by hardware components instead of ADI software channels.
16 Thus we introduce one property named "sprd,hw-channels" to configure hardware
17 channels, the first value specifies the hardware channel id which is used to
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/soc/qcom/ |
| D | rpmh-rsc.txt | 2 ------------
7 val) pair and triggered. Messages in the TCS are then sent in sequence over an
10 The hardware block (Direct Resource Voter or DRV) is a part of the h/w entity
16 A TCS may be triggered from Linux or triggered by the F/W after all the CPUs
17 have powered off to facilitate idle power saving. TCS could be classified as -
19 ACTIVE /* Triggered by Linux */
20 SLEEP /* Triggered by F/W */
21 WAKE /* Triggered by F/W */
22 CONTROL /* Triggered by F/W */
24 The order in which they are described in the DT, should match the hardware
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/qcom/ |
| D | rpmh-rsc.txt | 2 ------------
7 val) pair and triggered. Messages in the TCS are then sent in sequence over an
10 The hardware block (Direct Resource Voter or DRV) is a part of the h/w entity
16 A TCS may be triggered from Linux or triggered by the F/W after all the CPUs
17 have powered off to facilitate idle power saving. TCS could be classified as -
19 ACTIVE /* Triggered by Linux */
20 SLEEP /* Triggered by F/W */
21 WAKE /* Triggered by F/W */
22 CONTROL /* Triggered by F/W */
24 The order in which they are described in the DT, should match the hardware
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/thermal/ |
| D | nvidia,tegra124-soctherm.txt | 4 or interrupt-based thermal monitoring, CPU and GPU throttling based
10 - compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
11 For Tegra132, must contain "nvidia,tegra132-soctherm".
12 For Tegra210, must contain "nvidia,tegra210-soctherm".
13 - reg : Should contain at least 2 entries for each entry in reg-names:
14 - SOCTHERM register set
15 - Tegra CAR register set: Required for Tegra124 and Tegra210.
16 - CCROC register set: Required for Tegra132.
17 - reg-names : Should contain at least 2 entries:
18 - soctherm-reg
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | samsung-pinctrl.txt | 3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
6 on-chip controllers onto these pads.
9 - compatible: should be one of the following.
10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
16 - "samsung,exynos3250-pinctrl": for Exynos3250 compatible pin-controller.
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/pinctrl/ |
| D | samsung-pinctrl.txt | 3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
6 on-chip controllers onto these pads.
9 - compatible: should be one of the following.
10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
16 - "samsung,exynos3250-pinctrl": for Exynos3250 compatible pin-controller.
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/thermal/ |
| D | nvidia,tegra124-soctherm.txt | 4 or interrupt-based thermal monitoring, CPU and GPU throttling based
10 - compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
11 For Tegra132, must contain "nvidia,tegra132-soctherm".
12 For Tegra210, must contain "nvidia,tegra210-soctherm".
13 - reg : Should contain at least 2 entries for each entry in reg-names:
14 - SOCTHERM register set
15 - Tegra CAR register set: Required for Tegra124 and Tegra210.
16 - CCROC register set: Required for Tegra132.
17 - reg-names : Should contain at least 2 entries:
18 - soctherm-reg
[all …]
|
| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra20-pmc.txt | 7 modes. It provides power-gating controllers for SoC and CPU power-islands.
10 - name : Should be pmc
11 - compatible : Should contain one of the following:
12 For Tegra20 must contain "nvidia,tegra20-pmc".
13 For Tegra30 must contain "nvidia,tegra30-pmc".
14 For Tegra114 must contain "nvidia,tegra114-pmc"
15 For Tegra124 must contain "nvidia,tegra124-pmc"
16 For Tegra132 must contain "nvidia,tegra124-pmc"
17 For Tegra210 must contain "nvidia,tegra210-pmc"
18 - reg : Offset and length of the register set for the device
[all …]
|
| /kernel/linux/linux-5.10/drivers/iio/buffer/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
8 tristate "IIO callback buffer used for push in-kernel interfaces"
10 Should be selected by any drivers that do in-kernel push
37 to another device in hardware. In this case buffers for data transfers
38 are handled by hardware.
51 tristate "Industrial I/O triggered buffer support"
55 Provides helper functions for setting up triggered buffers.
|
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