| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/rtc/ |
| D | rtc-mxc.txt | 3 RTC controller for the i.MX SoCs 6 - compatible: Should be "fsl,imx1-rtc" or "fsl,imx21-rtc". 7 - reg: physical base address of the controller and length of memory mapped 9 - interrupts: IRQ line for the RTC. 10 - clocks: should contain two entries: 12 * one for the the SoC RTC 13 - clock-names: should contain: 15 * "ipg" for the SoC RTC clock 19 rtc@10007000 { 20 compatible = "fsl,imx21-rtc"; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/rtc/ |
| D | rtc-mxc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/rtc/rtc-mxc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - $ref: "rtc.yaml#" 13 - Philippe Reynes <tremyfr@gmail.com> 18 - fsl,imx1-rtc 19 - fsl,imx21-rtc 29 - description: input reference 30 - description: the SoC RTC clock [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx31.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com> 4 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> 7 #address-cells = <1>; 8 #size-cells = <1>; 11 * pre-existing /chosen node to be available to insert the 34 #address-cells = <1>; 35 #size-cells = <0>; 38 compatible = "arm,arm1136jf-s"; 44 avic: interrupt-controller@68000000 { [all …]
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| D | imx27.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include "imx27-pinfunc.h" 7 #include <dt-bindings/clock/imx27-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 43 aitc: aitc-interrupt-controller@10040000 { [all …]
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| D | imx53.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx53-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; [all …]
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| D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 44 #address-cells = <1>; 45 #size-cells = <0>; [all …]
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| D | imx25.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx25-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 13 * pre-existing /chosen node to be available to insert the 46 #address-cells = <1>; 47 #size-cells = <0>; 50 compatible = "arm,arm926ej-s"; 56 asic: asic-interrupt-controller@68000000 { [all …]
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| D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/imx7-reset.h> 12 #include "imx7d-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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| D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a9"; [all …]
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| D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 57 #address-cells = <1>; [all …]
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | imx31.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com> 4 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> 7 #address-cells = <1>; 8 #size-cells = <1>; 11 * pre-existing /chosen node to be available to insert the 34 #address-cells = <1>; 35 #size-cells = <0>; 38 compatible = "arm,arm1136jf-s"; 44 avic: interrupt-controller@68000000 { [all …]
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| D | imx27.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include "imx27-pinfunc.h" 7 #include <dt-bindings/clock/imx27-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 43 aitc: aitc-interrupt-controller@e0000000 { [all …]
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| D | imx53.dtsi | 9 * http://www.opensource.org/licenses/gpl-license.html 13 #include "imx53-pinfunc.h" 14 #include <dt-bindings/clock/imx5-clock.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/interrupt-controller/irq.h> 20 #address-cells = <1>; 21 #size-cells = <1>; 24 * pre-existing /chosen node to be available to insert the 56 #address-cells = <1>; [all …]
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| D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 44 #address-cells = <1>; 45 #size-cells = <0>; [all …]
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| D | imx25.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx25-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 13 * pre-existing /chosen node to be available to insert the 46 #address-cells = <1>; 47 #size-cells = <0>; 50 compatible = "arm,arm926ej-s"; 56 asic: asic-interrupt-controller@68000000 { [all …]
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| D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx7d-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 18 * pre-existing /chosen node to be available to insert the [all …]
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| D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 40 #address-cells = <1>; 41 #size-cells = <0>; 44 compatible = "arm,cortex-a9"; [all …]
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| /kernel/linux/linux-4.19/arch/arm/mach-imx/devices/ |
| D | platform-mxc_rtc.c | 2 * Copyright (C) 2010-2011 Pengutronix 3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> 10 #include "devices-common.h" 21 imx_mxc_rtc_data_entry_single(MX31, "imx21-rtc"); 26 imx_mxc_rtc_data_entry_single(MX35, "imx21-rtc"); 34 .start = data->iobase, in imx_add_mxc_rtc() 35 .end = data->iobase + SZ_16K - 1, in imx_add_mxc_rtc() 38 .start = data->irq, in imx_add_mxc_rtc() 39 .end = data->irq, in imx_add_mxc_rtc() 44 return imx_add_platform_device(data->devid, -1, in imx_add_mxc_rtc()
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| /kernel/linux/linux-4.19/drivers/clk/imx/ |
| D | clk-imx31.c | 157 clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); in mx31_clocks_init() 158 clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); in mx31_clocks_init() 159 clk_register_clkdev(clk[cspi1_gate], NULL, "imx31-cspi.0"); in mx31_clocks_init() 160 clk_register_clkdev(clk[cspi2_gate], NULL, "imx31-cspi.1"); in mx31_clocks_init() 161 clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2"); in mx31_clocks_init() 163 clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); in mx31_clocks_init() 164 clk_register_clkdev(clk[ckil], "ref", "imx21-rtc"); in mx31_clocks_init() 165 clk_register_clkdev(clk[rtc_gate], "ipg", "imx21-rtc"); in mx31_clocks_init() 168 clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0"); in mx31_clocks_init() 169 clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); in mx31_clocks_init() [all …]
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| D | clk-imx35.c | 110 if (!aad->arm) { in _mx35_clocks_init() 126 if (aad->sel) in _mx35_clocks_init() 127 clk[arm] = imx_clk_fixed_factor("arm", "mpll_075", 1, aad->arm); in _mx35_clocks_init() 129 clk[arm] = imx_clk_fixed_factor("arm", "mpll", 1, aad->arm); in _mx35_clocks_init() 144 clk[ahb] = imx_clk_fixed_factor("ahb", "arm", 1, aad->ahb); in _mx35_clocks_init() 262 clk_register_clkdev(clk[cspi1_gate], "per", "imx35-cspi.0"); in mx35_clocks_init() 263 clk_register_clkdev(clk[cspi1_gate], "ipg", "imx35-cspi.0"); in mx35_clocks_init() 264 clk_register_clkdev(clk[cspi2_gate], "per", "imx35-cspi.1"); in mx35_clocks_init() 265 clk_register_clkdev(clk[cspi2_gate], "ipg", "imx35-cspi.1"); in mx35_clocks_init() 266 clk_register_clkdev(clk[epit1_gate], NULL, "imx-epit.0"); in mx35_clocks_init() [all …]
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| /kernel/linux/linux-4.19/drivers/rtc/ |
| D | rtc-mxc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. 6 #include <linux/rtc.h> 43 #define RTC_HOURMIN 0x00 /* 32bit rtc hour/min counter reg */ 44 #define RTC_SECOND 0x04 /* 32bit rtc seconds counter reg */ 45 #define RTC_ALRM_HM 0x08 /* 32bit rtc alarm hour/min reg */ 46 #define RTC_ALRM_SEC 0x0C /* 32bit rtc alarm seconds reg */ 47 #define RTC_RTCCTL 0x10 /* 32bit rtc control reg */ 48 #define RTC_RTCISR 0x14 /* 32bit rtc interrupt status reg */ 49 #define RTC_RTCIENR 0x18 /* 32bit rtc interrupt enable reg */ [all …]
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| /kernel/linux/linux-5.10/drivers/rtc/ |
| D | rtc-mxc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. 6 #include <linux/rtc.h> 44 #define RTC_HOURMIN 0x00 /* 32bit rtc hour/min counter reg */ 45 #define RTC_SECOND 0x04 /* 32bit rtc seconds counter reg */ 46 #define RTC_ALRM_HM 0x08 /* 32bit rtc alarm hour/min reg */ 47 #define RTC_ALRM_SEC 0x0C /* 32bit rtc alarm seconds reg */ 48 #define RTC_RTCCTL 0x10 /* 32bit rtc control reg */ 49 #define RTC_RTCISR 0x14 /* 32bit rtc interrupt status reg */ 50 #define RTC_RTCIENR 0x18 /* 32bit rtc interrupt enable reg */ [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mp-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8mp-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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| D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8mn-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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| D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8mm-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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