Searched +full:imx35 +full:- +full:gpio (Results 1 – 25 of 45) sorted by relevance
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | imx35.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include "imx35-pinfunc.h" 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 32 #address-cells = <1>; 33 #size-cells = <0>; 36 compatible = "arm,arm1136jf-s"; 42 avic: avic-interrupt-controller@68000000 { 43 compatible = "fsl,imx35-avic", "fsl,avic"; [all …]
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| D | imx50.dtsi | 10 * http://www.opensource.org/licenses/gpl-license.html 14 #include "imx50-pinfunc.h" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/clock/imx5-clock.h> 19 #address-cells = <1>; 20 #size-cells = <1>; 23 * pre-existing /chosen node to be available to insert the 44 #address-cells = <1>; 45 #size-cells = <0>; 48 compatible = "arm,cortex-a8"; [all …]
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| D | imx35-eukrea-mbimxsd35-baseboard.dts | 14 /dts-v1/; 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/input/input.h> 18 #include "imx35-eukrea-cpuimx35.dtsi" 22 compatible = "eukrea,mbimxsd35-baseboard", "eukrea,cpuimx35", "fsl,imx35"; 25 compatible = "gpio-keys"; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&pinctrl_bp1>; 33 wakeup-source; 34 linux,input-type = <1>; [all …]
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| D | imx53.dtsi | 9 * http://www.opensource.org/licenses/gpl-license.html 13 #include "imx53-pinfunc.h" 14 #include <dt-bindings/clock/imx5-clock.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/interrupt-controller/irq.h> 20 #address-cells = <1>; 21 #size-cells = <1>; 24 * pre-existing /chosen node to be available to insert the 56 #address-cells = <1>; [all …]
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| D | imx25.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx25-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 13 * pre-existing /chosen node to be available to insert the 46 #address-cells = <1>; 47 #size-cells = <0>; 50 compatible = "arm,arm926ej-s"; 56 asic: asic-interrupt-controller@68000000 { [all …]
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| D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 44 #address-cells = <1>; 45 #size-cells = <0>; [all …]
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| D | imx51.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx51-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 42 tzic: tz-interrupt-controller@e0000000 { [all …]
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| D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx7d-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 18 * pre-existing /chosen node to be available to insert the [all …]
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| D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 16 * Also for U-Boot there must be a pre-existing /memory node. 55 compatible = "fsl,imx-ckil", "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <32768>; [all …]
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| D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6ul-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 55 #address-cells = <1>; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx35.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include "imx35-pinfunc.h" 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 38 #address-cells = <1>; 39 #size-cells = <0>; 42 compatible = "arm,arm1136jf-s"; 48 avic: avic-interrupt-controller@68000000 { 49 compatible = "fsl,imx35-avic", "fsl,avic"; [all …]
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| D | imx35-eukrea-mbimxsd35-baseboard.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include "imx35-eukrea-cpuimx35.dtsi" 14 compatible = "eukrea,mbimxsd35-baseboard", "eukrea,cpuimx35", "fsl,imx35"; 17 compatible = "gpio-keys"; 18 pinctrl-names = "default"; 19 pinctrl-0 = <&pinctrl_bp1>; 25 wakeup-source; [all …]
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| D | imx50.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 #include "imx50-pinfunc.h" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/imx5-clock.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a8"; [all …]
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| D | imx53.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx53-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; [all …]
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| D | imx25.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx25-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 13 * pre-existing /chosen node to be available to insert the 46 #address-cells = <1>; 47 #size-cells = <0>; 50 compatible = "arm,arm926ej-s"; 56 asic: asic-interrupt-controller@68000000 { [all …]
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| D | imx51.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx51-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 42 tzic: tz-interrupt-controller@e0000000 { [all …]
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| D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 44 #address-cells = <1>; 45 #size-cells = <0>; [all …]
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| D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 * pre-existing /chosen node to be available to insert the 54 compatible = "fsl,imx-ckil", "fixed-clock"; 55 #clock-cells = <0>; 56 clock-frequency = <32768>; [all …]
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| D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/imx7-reset.h> 12 #include "imx7d-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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| D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 57 #address-cells = <1>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | fsl-imx-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/gpio/fsl-imx-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX/MXC GPIO controller 10 - Anson Huang <Anson.Huang@nxp.com> 15 - enum: 16 - fsl,imx1-gpio 17 - fsl,imx21-gpio 18 - fsl,imx31-gpio [all …]
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| /kernel/linux/linux-4.19/arch/arm/mach-imx/ |
| D | mm-imx3.c | 5 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. 6 * - add MX31 specific definitions 27 #include <asm/hardware/cache-l2x0.h> 31 #include "crmregs-imx3.h" 32 #include "devices/devices-common.h" 34 #include "iomux-v3.h" 170 .fw_name = "sdma-imx31-to2.bin", 191 mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); in imx31_soc_init() 192 mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); in imx31_soc_init() 193 mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); in imx31_soc_init() [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | imx8qxp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2018 NXP 8 #include <dt-bindings/clock/imx8-clock.h> 9 #include <dt-bindings/firmware/imx/rsrc.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/pinctrl/pads-imx8qxp.h> 14 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; [all …]
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| D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mp-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8mp-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/gpio/ |
| D | fsl-imx-gpio.txt | 1 * Freescale i.MX/MXC GPIO controller 4 - compatible : Should be "fsl,<soc>-gpio" 5 - reg : Address and length of the register set for the device 6 - interrupts : Should be the port interrupt shared by all 32 pins, if 9 - gpio-controller : Marks the device node as a gpio controller. 10 - #gpio-cells : Should be two. The first cell is the pin number and 11 the second cell is used to specify the gpio polarity: 14 - interrupt-controller: Marks the device node as an interrupt controller. 15 - #interrupt-cells : Should be 2. The first cell is the GPIO number. 17 1 = low-to-high edge triggered. [all …]
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