| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/interrupt-controller/ |
| D | renesas,intc-irqpin.txt | 1 DT bindings for the R-/SH-Mobile irqpin controller
5 - compatible: has to be "renesas,intc-irqpin-<soctype>", "renesas,intc-irqpin"
8 - "renesas,intc-irqpin-r8a7740" (R-Mobile A1)
9 - "renesas,intc-irqpin-r8a7778" (R-Car M1A)
10 - "renesas,intc-irqpin-r8a7779" (R-Car H1)
11 - "renesas,intc-irqpin-sh73a0" (SH-Mobile AG5)
13 - reg: Base address and length of each register bank used by the external
16 - interrupt-controller: Identifies the node as an interrupt controller.
17 - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
19 - interrupts: Must contain a list of interrupt specifiers. For each interrupt
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | renesas,intc-irqpin.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,intc-irqpin.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - enum:
16 - renesas,intc-irqpin-r8a7740 # R-Mobile A1
17 - renesas,intc-irqpin-r8a7778 # R-Car M1A
18 - renesas,intc-irqpin-r8a7779 # R-Car H1
19 - renesas,intc-irqpin-sh73a0 # SH-Mobile AG5
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/aquantia/atlantic/hw_atl/ |
| D | hw_atl_llh_internal.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) 2014-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
15 /* COM Temperature Sense Reset Bitfield Definitions */
21 /* COM Temperature Sense Power Down Bitfield Definitions */
27 /* COM Temperature Sense Ready Bitfield Definitions */
33 /* COM Temperature Sense Ready Latch High Bitfield Definitions */
39 /* COM Temperature Sense Data Out [B:0] Bitfield Definitions */
50 /* register address for bitfield rx dma good octet counter lsw [1f:0] */
52 /* register address for bitfield rx dma good packet counter lsw [1f:0] */
[all …]
|
| /kernel/linux/linux-5.10/drivers/irqchip/ |
| D | irq-renesas-intc-irqpin.c | 1 // SPDX-License-Identifier: GPL-2.0
36 * SENSE is read-write 32-bit with 2-bits or 4-bits per IRQ (*)
37 * PRIO is read-write 32-bit with 4-bits per IRQ (**)
38 * SOURCE is read-only 32-bit or 8-bit with 1-bit per IRQ (***)
39 * MASK is write-only 32-bit or 8-bit with 1-bit per IRQ (***)
40 * CLEAR is write-only 32-bit or 8-bit with 1-bit per IRQ (***)
42 * (*) May be accessed by more than one driver instance - lock needed
43 * (**) Read-modify-write access by one driver instance - lock needed
44 * (***) Accessed by one driver instance only - no locking needed
51 int width; member
[all …]
|
| /kernel/linux/linux-4.19/drivers/irqchip/ |
| D | irq-renesas-intc-irqpin.c | 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
48 * SENSE is read-write 32-bit with 2-bits or 4-bits per IRQ (*)
49 * PRIO is read-write 32-bit with 4-bits per IRQ (**)
50 * SOURCE is read-only 32-bit or 8-bit with 1-bit per IRQ (***)
51 * MASK is write-only 32-bit or 8-bit with 1-bit per IRQ (***)
52 * CLEAR is write-only 32-bit or 8-bit with 1-bit per IRQ (***)
54 * (*) May be accessed by more than one driver instance - lock needed
55 * (**) Read-modify-write access by one driver instance - lock needed
56 * (***) Accessed by one driver instance only - no locking needed
63 int width; member
[all …]
|
| /kernel/linux/linux-4.19/drivers/clk/bcm/ |
| D | clk-kona-setup.c | 18 #include "clk-kona.h"
21 #define selector_clear_exists(sel) ((sel)->width = 0)
28 struct ccu_policy *ccu_policy = &ccu->policy; in ccu_data_offsets_valid()
31 limit = ccu->range - sizeof(u32); in ccu_data_offsets_valid()
34 if (ccu_policy->enable.offset > limit) { in ccu_data_offsets_valid()
37 ccu->name, ccu_policy->enable.offset, limit); in ccu_data_offsets_valid()
40 if (ccu_policy->control.offset > limit) { in ccu_data_offsets_valid()
43 ccu->name, ccu_policy->control.offset, limit); in ccu_data_offsets_valid()
53 struct peri_clk_data *peri = bcm_clk->u.peri; in clk_requires_trigger()
57 if (bcm_clk->type != bcm_clk_peri) in clk_requires_trigger()
[all …]
|
| D | clk-kona.c | 15 #include "clk-kona.h"
32 /* Bitfield operations */
34 /* Produces a mask of set bits covering a range of a 32-bit value */
35 static inline u32 bitfield_mask(u32 shift, u32 width) in bitfield_mask() argument
37 return ((1 << width) - 1) << shift; in bitfield_mask()
40 /* Extract the value of a bitfield found within a given register value */
41 static inline u32 bitfield_extract(u32 reg_val, u32 shift, u32 width) in bitfield_extract() argument
43 return (reg_val & bitfield_mask(shift, width)) >> shift; in bitfield_extract()
46 /* Replace the value of a bitfield found within a given register value */
47 static inline u32 bitfield_replace(u32 reg_val, u32 shift, u32 width, u32 val) in bitfield_replace() argument
[all …]
|
| /kernel/linux/linux-5.10/drivers/clk/bcm/ |
| D | clk-kona-setup.c | 18 #include "clk-kona.h"
21 #define selector_clear_exists(sel) ((sel)->width = 0)
28 struct ccu_policy *ccu_policy = &ccu->policy; in ccu_data_offsets_valid()
31 limit = ccu->range - sizeof(u32); in ccu_data_offsets_valid()
34 if (ccu_policy->enable.offset > limit) { in ccu_data_offsets_valid()
37 ccu->name, ccu_policy->enable.offset, limit); in ccu_data_offsets_valid()
40 if (ccu_policy->control.offset > limit) { in ccu_data_offsets_valid()
43 ccu->name, ccu_policy->control.offset, limit); in ccu_data_offsets_valid()
53 struct peri_clk_data *peri = bcm_clk->u.peri; in clk_requires_trigger()
57 if (bcm_clk->type != bcm_clk_peri) in clk_requires_trigger()
[all …]
|
| D | clk-kona.c | 15 #include "clk-kona.h"
20 #include <linux/clk-provider.h>
33 /* Bitfield operations */
35 /* Produces a mask of set bits covering a range of a 32-bit value */
36 static inline u32 bitfield_mask(u32 shift, u32 width) in bitfield_mask() argument
38 return ((1 << width) - 1) << shift; in bitfield_mask()
41 /* Extract the value of a bitfield found within a given register value */
42 static inline u32 bitfield_extract(u32 reg_val, u32 shift, u32 width) in bitfield_extract() argument
44 return (reg_val & bitfield_mask(shift, width)) >> shift; in bitfield_extract()
47 /* Replace the value of a bitfield found within a given register value */
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/panfrost/ |
| D | panfrost_gpu.c | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/bitfield.h>
8 #include <linux/dma-mapping.h>
35 dev_warn(pfdev->dev, "GPU Fault 0x%08x (%s) at 0x%016llx\n", in panfrost_gpu_irq_handler()
40 dev_warn(pfdev->dev, "There were multiple GPU faults - some have not been reported\n"); in panfrost_gpu_irq_handler()
65 ret = readl_relaxed_poll_timeout(pfdev->iomem + GPU_INT_RAWSTAT, in panfrost_gpu_soft_reset()
69 dev_err(pfdev->dev, "gpu soft reset timed out\n"); in panfrost_gpu_soft_reset()
82 * The Amlogic integrated Mali-T820, Mali-G31 & Mali-G52 needs in panfrost_gpu_amlogic_quirk()
129 /* Limit read & write ID width for AXI */ in panfrost_gpu_init_quirks()
141 pfdev->features.revision >= 0x2000) in panfrost_gpu_init_quirks()
[all …]
|
| /kernel/linux/linux-5.10/include/linux/ssb/ |
| D | ssb_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
33 #define SSB_MAX_NR_CORES ((SSB_ENUM_LIMIT - SSB_ENUM_BASE) / SSB_CORE_SIZE)
108 #define SSB_TMSHIGH_SERR 0x00000001 /* S-error */
144 #define SSB_IDLOW_CCW 0x000C0000 /* Cycle counter width */
168 * in two-byte quantities.
202 #define SSB_SPROM1_BINF_ANTBG 0x3000 /* Available B-PHY and G-PHY antennas */
204 #define SSB_SPROM1_BINF_ANTA 0xC000 /* Available A-PHY antennas */
218 #define SSB_SPROM1_MAXPWR_BG 0x00FF /* B-PHY and G-PHY (in dBm Q5.2) */
219 #define SSB_SPROM1_MAXPWR_A 0xFF00 /* A-PHY (in dBm Q5.2) */
225 #define SSB_SPROM1_ITSSI_BG 0x00FF /* B-PHY and G-PHY*/
[all …]
|
| /kernel/linux/linux-4.19/include/linux/ssb/ |
| D | ssb_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
33 #define SSB_MAX_NR_CORES ((SSB_ENUM_LIMIT - SSB_ENUM_BASE) / SSB_CORE_SIZE)
108 #define SSB_TMSHIGH_SERR 0x00000001 /* S-error */
144 #define SSB_IDLOW_CCW 0x000C0000 /* Cycle counter width */
168 * in two-byte quantities.
202 #define SSB_SPROM1_BINF_ANTBG 0x3000 /* Available B-PHY and G-PHY antennas */
204 #define SSB_SPROM1_BINF_ANTA 0xC000 /* Available A-PHY antennas */
218 #define SSB_SPROM1_MAXPWR_BG 0x00FF /* B-PHY and G-PHY (in dBm Q5.2) */
219 #define SSB_SPROM1_MAXPWR_A 0xFF00 /* A-PHY (in dBm Q5.2) */
225 #define SSB_SPROM1_ITSSI_BG 0x00FF /* B-PHY and G-PHY*/
[all …]
|
| /kernel/linux/linux-4.19/Documentation/hwmon/ |
| D | sysfs-interface | 2 ------------------------------------------------
5 through the sysfs interface. Since lm-sensors 3.0.0, libsensors is
6 completely chip-independent. It assumes that all the kernel drivers
10 This is a major improvement compared to lm-sensors 2.
16 before they make full sense. For example, most chips can only measure
22 For this reason, even if we aim at a chip-independent libsensors, it will
37 Up to lm-sensors 3.0.0, libsensors looks for hardware monitoring attributes
38 in the "physical" device directory. Since lm-sensors 3.0.1, attributes found
61 to cause an alarm) is chip-dependent.
68 -------------------------------------------------------------------------
[all …]
|
| /kernel/linux/linux-5.10/Documentation/hwmon/ |
| D | sysfs-interface.rst | 5 through the sysfs interface. Since lm-sensors 3.0.0, libsensors is
6 completely chip-independent. It assumes that all the kernel drivers
10 This is a major improvement compared to lm-sensors 2.
16 before they make full sense. For example, most chips can only measure
22 For this reason, even if we aim at a chip-independent libsensors, it will
37 Up to lm-sensors 3.0.0, libsensors looks for hardware monitoring attributes
38 in the "physical" device directory. Since lm-sensors 3.0.1, attributes found
61 to cause an alarm) is chip-dependent.
68 -------------------------------------------------------------------------
71 `[0-*]` denotes any positive number starting from 0
[all …]
|
| /kernel/linux/linux-5.10/include/xen/interface/ |
| D | xen.h | 86 /* Architecture-specific hypercall definitions. */
100 * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a
101 * global VIRQ. The former can be bound once per VCPU and cannot be re-bound.
103 * allocated to VCPU0 but can subsequently be re-bound.
119 /* Architecture-specific VIRQ definitions. */
144 * x != 0 => PFD == x - 1
146 * Sub-commands: ptr[1:0] specifies the appropriate MMU_* command.
147 * -------------
155 * ptr[:2] -- Machine address of the page-table entry to modify.
156 * val -- Value to write.
[all …]
|
| /kernel/linux/linux-4.19/include/xen/interface/ |
| D | xen.h | 86 /* Architecture-specific hypercall definitions. */
100 * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a
101 * global VIRQ. The former can be bound once per VCPU and cannot be re-bound.
103 * allocated to VCPU0 but can subsequently be re-bound.
119 /* Architecture-specific VIRQ definitions. */
144 * x != 0 => PFD == x - 1
146 * Sub-commands: ptr[1:0] specifies the appropriate MMU_* command.
147 * -------------
155 * ptr[:2] -- Machine address of the page-table entry to modify.
156 * val -- Value to write.
[all …]
|
| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | r8a7779.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/r8a7779-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7779-sysc.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
[all …]
|
| D | r8a7778.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/r8a7778-clock.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
20 interrupt-parent = <&gic>;
21 #address-cells = <1>;
22 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
30 compatible = "arm,cortex-a9";
[all …]
|
| /kernel/linux/linux-4.19/include/uapi/linux/ |
| D | videodev2.h | 1 /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) */
5 * Copyright (C) 1999-2012 the contributors
47 * All kernel-specific stuff were moved to media/v4l2-dev.h, so
66 #include <linux/v4l2-common.h>
67 #include <linux/v4l2-controls.h>
80 /* Four-character-code (FOURCC) */
98 buffer, top-bottom order */
99 V4L2_FIELD_SEQ_BT = 6, /* same as above + bottom-top order */
194 /* Obsolete pre-1998 SMPTE 240M HDTV standard, superseded by Rec 709 */
207 * NTSC 1953 colorspace. This only makes sense when dealing with
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | r8a7778.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M1A (R8A77781) SoC
14 #include <dt-bindings/clock/r8a7778-clock.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
20 interrupt-parent = <&gic>;
21 #address-cells = <1>;
22 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
|
| D | r8a7779.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H1 (R8A77790) SoC
9 #include <dt-bindings/clock/r8a7779-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7779-sysc.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
21 #address-cells = <1>;
[all …]
|
| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | videodev2.h | 1 /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) */
5 * Copyright (C) 1999-2012 the contributors
47 * All kernel-specific stuff were moved to media/v4l2-dev.h, so
66 #include <linux/v4l2-common.h>
67 #include <linux/v4l2-controls.h>
80 /* Four-character-code (FOURCC) */
98 buffer, top-bottom order */
99 V4L2_FIELD_SEQ_BT = 6, /* same as above + bottom-top order */
205 /* Obsolete pre-1998 SMPTE 240M HDTV standard, superseded by Rec 709 */
218 * NTSC 1953 colorspace. This only makes sense when dealing with
[all …]
|
| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | cavium.c | 9 * Copyright (C) 2012-2017 Cavium Inc.
16 #include <linux/bitfield.h>
18 #include <linux/dma-direction.h>
19 #include <linux/dma-mapping.h>
23 #include <linux/mmc/slot-gpio.h>
46 * being used. However, non-MMC devices like SD use command and
128 cr = cvm_mmc_cr_types + (cmd->opcode & 0x3f); in cvm_mmc_get_cr_mods()
129 hardware_ctype = cr->ctype; in cvm_mmc_get_cr_mods()
130 hardware_rtype = cr->rtype; in cvm_mmc_get_cr_mods()
131 if (cmd->opcode == MMC_GEN_CMD) in cvm_mmc_get_cr_mods()
[all …]
|
| /kernel/linux/linux-4.19/drivers/mmc/host/ |
| D | cavium.c | 9 * Copyright (C) 2012-2017 Cavium Inc.
16 #include <linux/bitfield.h>
18 #include <linux/dma-direction.h>
19 #include <linux/dma-mapping.h>
23 #include <linux/mmc/slot-gpio.h>
46 * being used. However, non-MMC devices like SD use command and
128 cr = cvm_mmc_cr_types + (cmd->opcode & 0x3f); in cvm_mmc_get_cr_mods()
129 hardware_ctype = cr->ctype; in cvm_mmc_get_cr_mods()
130 hardware_rtype = cr->rtype; in cvm_mmc_get_cr_mods()
131 if (cmd->opcode == MMC_GEN_CMD) in cvm_mmc_get_cr_mods()
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/cadence/ |
| D | macb.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2004-2006 Atmel Corporation
107 #define GEM_TX65CNT 0x011c /* 65-127 byte Frames TX counter */
108 #define GEM_TX128CNT 0x0120 /* 128-255 byte Frames TX counter */
109 #define GEM_TX256CNT 0x0124 /* 256-511 byte Frames TX counter */
110 #define GEM_TX512CNT 0x0128 /* 512-1023 byte Frames TX counter */
111 #define GEM_TX1024CNT 0x012c /* 1024-1518 byte Frames TX counter */
119 #define GEM_TXCSENSECNT 0x014c /* Carrier Sense Error Counter */
128 #define GEM_RX65CNT 0x016c /* 65-127 byte Frames RX Counter */
129 #define GEM_RX128CNT 0x0170 /* 128-255 byte Frames RX Counter */
[all …]
|