| /kernel/linux/linux-4.19/drivers/staging/axis-fifo/ |
| D | axis-fifo.txt | 1 Xilinx AXI-Stream FIFO v4.1 IP core
3 This IP core has read and write AXI-Stream FIFOs, the contents of which can
4 be accessed from the AXI4 memory-mapped interface. This is useful for
11 Currently supports only store-forward mode with a 32-bit
12 AXI4-Lite interface. DOES NOT support:
13 - cut-through mode
14 - AXI4 (non-lite)
17 - compatible: Should be "xlnx,axi-fifo-mm-s-4.1"
18 - interrupt-names: Should be "interrupt"
19 - interrupt-parent: Should be <&intc>
[all …]
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| /kernel/linux/linux-5.10/drivers/staging/axis-fifo/ |
| D | axis-fifo.txt | 1 Xilinx AXI-Stream FIFO v4.1 IP core
3 This IP core has read and write AXI-Stream FIFOs, the contents of which can
4 be accessed from the AXI4 memory-mapped interface. This is useful for
11 Currently supports only store-forward mode with a 32-bit
12 AXI4-Lite interface. DOES NOT support:
13 - cut-through mode
14 - AXI4 (non-lite)
17 - compatible: Should be "xlnx,axi-fifo-mm-s-4.1"
18 - interrupt-names: Should be "interrupt"
19 - interrupt-parent: Should be <&intc>
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/usb/ |
| D | dwc3.txt | 3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
7 - compatible: must be "snps,dwc3"
8 - reg : Address and length of the register set for the device
9 - interrupts: Interrupts used by the dwc3 controller.
10 - clock-names: should contain "ref", "bus_early", "suspend"
11 - clocks: list of phandle and clock specifier pairs corresponding to
12 entries in the clock-names property.
15 clocks are optional if the parent node (i.e. glue-layer) is compatible to
17 "amlogic,meson-axg-dwc3"
18 "amlogic,meson-gxl-dwc3"
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | dwc3.txt | 3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
7 - compatible: must be "snps,dwc3"
8 - reg : Address and length of the register set for the device
9 - interrupts: Interrupts used by the dwc3 controller.
10 - clock-names: list of clock names. Ideally should be "ref",
12 - clocks: list of phandle and clock specifier pairs corresponding to
13 entries in the clock-names property.
16 clocks are optional if the parent node (i.e. glue-layer) is compatible to
18 "cavium,octeon-7130-usb-uctl"
20 "samsung,exynos5250-dwusb3"
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| D | power.h | 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
10 * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
11 * Copyright (C) 2018 - 2020 Intel Corporation
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
33 * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
34 * Copyright (C) 2018 - 2020 Intel Corporation
71 * enum iwl_ltr_config_flags - masks for LTR config command flags
[all …]
|
| /kernel/linux/linux-4.19/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| D | power.h | 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
10 * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
31 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
32 * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
69 * enum iwl_ltr_config_flags - masks for LTR config command flags
95 * struct iwl_ltr_config_cmd_v1 - configures the LTR
109 * struct iwl_ltr_config_cmd - configures the LTR
[all …]
|
| /kernel/linux/linux-4.19/drivers/net/wireless/broadcom/b43/ |
| D | phy_n.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 /* N-PHY registers. */
15 #define B43_NPHY_TXERR B43_PHY_N(0x007) /* TX error */
18 #define B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */
19 #define B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */
20 #define B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */
21 #define B43_NPHY_BIST_STAT0 B43_PHY_N(0x00E) /* Built-in self test status 0 */
22 #define B43_NPHY_BIST_STAT1 B43_PHY_N(0x00F) /* Built-in self test status 1 */
58 #define B43_NPHY_C1_INITGAIN_TRTX 0x2000 /* TR TX index */
70 #define B43_NPHY_C1_CLIPWBTHRES B43_PHY_N(0x027) /* Core 1 clip wideband threshold */
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43/ |
| D | phy_n.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 /* N-PHY registers. */
15 #define B43_NPHY_TXERR B43_PHY_N(0x007) /* TX error */
18 #define B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */
19 #define B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */
20 #define B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */
21 #define B43_NPHY_BIST_STAT0 B43_PHY_N(0x00E) /* Built-in self test status 0 */
22 #define B43_NPHY_BIST_STAT1 B43_PHY_N(0x00F) /* Built-in self test status 1 */
58 #define B43_NPHY_C1_INITGAIN_TRTX 0x2000 /* TR TX index */
70 #define B43_NPHY_C1_CLIPWBTHRES B43_PHY_N(0x027) /* Core 1 clip wideband threshold */
[all …]
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| /kernel/linux/linux-5.10/sound/soc/ti/ |
| D | omap-mcbsp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap-mcbsp.c -- OMAP ALSA SoC DAI driver using McBSP port
24 #include "omap-mcbsp-priv.h"
25 #include "omap-mcbsp.h"
26 #include "sdma-pcm.h"
41 dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id); in omap_mcbsp_dump_reg()
42 dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n", MCBSP_READ(mcbsp, DRR2)); in omap_mcbsp_dump_reg()
43 dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n", MCBSP_READ(mcbsp, DRR1)); in omap_mcbsp_dump_reg()
44 dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n", MCBSP_READ(mcbsp, DXR2)); in omap_mcbsp_dump_reg()
45 dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n", MCBSP_READ(mcbsp, DXR1)); in omap_mcbsp_dump_reg()
[all …]
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| D | omap-mcpdm.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port
5 * Copyright (C) 2009 - 2011 Texas Instruments
30 #include "omap-mcpdm.h"
31 #include "sdma-pcm.h"
35 u32 threshold; /* FIFO threshold */ member
69 writel_relaxed(val, mcpdm->io_base + reg); in omap_mcpdm_write()
74 return readl_relaxed(mcpdm->io_base + reg); in omap_mcpdm_read()
80 dev_dbg(mcpdm->dev, "***********************\n"); in omap_mcpdm_reg_dump()
81 dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n", in omap_mcpdm_reg_dump()
[all …]
|
| /kernel/linux/linux-4.19/sound/soc/omap/ |
| D | mcbsp.c | 29 #include <linux/platform_data/asoc-ti-mcbsp.h>
35 void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; in omap_mcbsp_write()
37 if (mcbsp->pdata->reg_size == 2) { in omap_mcbsp_write()
38 ((u16 *)mcbsp->reg_cache)[reg] = (u16)val; in omap_mcbsp_write()
41 ((u32 *)mcbsp->reg_cache)[reg] = val; in omap_mcbsp_write()
48 void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; in omap_mcbsp_read()
50 if (mcbsp->pdata->reg_size == 2) { in omap_mcbsp_read()
52 ((u16 *)mcbsp->reg_cache)[reg]; in omap_mcbsp_read()
55 ((u32 *)mcbsp->reg_cache)[reg]; in omap_mcbsp_read()
61 writel_relaxed(val, mcbsp->st_data->io_base_st + reg); in omap_mcbsp_st_write()
[all …]
|
| D | omap-mcpdm.c | 2 * omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port
4 * Copyright (C) 2009 - 2011 Texas Instruments
23 * 02110-1301 USA
44 #include "omap-mcpdm.h"
45 #include "sdma-pcm.h"
49 u32 threshold; /* FIFO threshold */ member
83 writel_relaxed(val, mcpdm->io_base + reg); in omap_mcpdm_write()
88 return readl_relaxed(mcpdm->io_base + reg); in omap_mcpdm_read()
94 dev_dbg(mcpdm->dev, "***********************\n"); in omap_mcpdm_reg_dump()
95 dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n", in omap_mcpdm_reg_dump()
[all …]
|
| /kernel/linux/linux-4.19/include/linux/soc/ti/ |
| D | knav_dma.h | 25 #define MASK(x) (BIT(x) - 1)
54 /* Tx channel scheduling priority */
68 /* Rx flow size threshold configuration */
83 * struct knav_dma_tx_cfg: Tx channel configuration
86 * @knav_dma_tx_priority: Tx channel scheduling priority
103 * @thresh: Rx flow size threshold
105 * @sz_thresh0: RX packet size threshold 0
106 * @sz_thresh1: RX packet size threshold 1
107 * @sz_thresh2: RX packet size threshold 2
127 * @tx: Tx channel configuration
[all …]
|
| /kernel/linux/linux-5.10/include/linux/soc/ti/ |
| D | knav_dma.h | 25 #define MASK(x) (BIT(x) - 1)
54 /* Tx channel scheduling priority */
68 /* Rx flow size threshold configuration */
83 * struct knav_dma_tx_cfg: Tx channel configuration
86 * @knav_dma_tx_priority: Tx channel scheduling priority
103 * @thresh: Rx flow size threshold
105 * @sz_thresh0: RX packet size threshold 0
106 * @sz_thresh1: RX packet size threshold 1
107 * @sz_thresh2: RX packet size threshold 2
127 * @tx: Tx channel configuration
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/wireless/ralink/rt2x00/ |
| D | rt2500pci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
36 * Default offset is required for RSSI <-> dBm conversion.
53 * Number of TX queues.
122 * TXDONE_TXRING: Tx ring transmit done interrupt.
128 * UART1_TX_TRESHOLD: UART1 TX reaches threshold.
129 * UART1_RX_TRESHOLD: UART1 RX reaches threshold.
130 * UART1_IDLE_TRESHOLD: UART1 IDLE over threshold.
131 * UART1_TX_BUFF_ERROR: UART1 TX buffer error.
133 * UART2_TX_TRESHOLD: UART2 TX reaches threshold.
[all …]
|
| /kernel/linux/linux-4.19/drivers/net/wireless/intel/iwlwifi/ |
| D | iwl-config.h | 8 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
9 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
35 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
36 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
74 #include "iwl-csr.h"
116 * enum iwl_nvm_type - nvm formats
128 * This is the threshold value of plcp error rate per 100mSecs. It is
138 /* TX queue watchdog timeouts in mSecs */
173 * The detail algorithm is described in iwl-led.c
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlwifi/ |
| D | iwl-config.h | 8 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
9 * Copyright(c) 2007 - 2014, 2018 - 2020 Intel Corporation
25 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
29 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
30 * Copyright(c) 2005 - 2014, 2018 - 2020 Intel Corporation
67 #include "iwl-csr.h"
109 * enum iwl_nvm_type - nvm formats
121 * This is the threshold value of plcp error rate per 100mSecs. It is
131 /* TX queue watchdog timeouts in mSecs */
162 * struct iwl_base_params - params not likely to change within a device family
[all …]
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| /kernel/linux/linux-4.19/drivers/net/wireless/ralink/rt2x00/ |
| D | rt2500pci.h | 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
47 * Default offset is required for RSSI <-> dBm conversion.
64 * Number of TX queues.
133 * TXDONE_TXRING: Tx ring transmit done interrupt.
139 * UART1_TX_TRESHOLD: UART1 TX reaches threshold.
140 * UART1_RX_TRESHOLD: UART1 RX reaches threshold.
141 * UART1_IDLE_TRESHOLD: UART1 IDLE over threshold.
142 * UART1_TX_BUFF_ERROR: UART1 TX buffer error.
144 * UART2_TX_TRESHOLD: UART2 TX reaches threshold.
145 * UART2_RX_TRESHOLD: UART2 RX reaches threshold.
[all …]
|
| /kernel/linux/linux-4.19/drivers/net/ethernet/intel/igb/ |
| D | e1000_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
7 #define E1000_CTRL 0x00000 /* Device Control - RW */
8 #define E1000_STATUS 0x00008 /* Device Status - RO */
9 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
10 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
11 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
12 #define E1000_MDIC 0x00020 /* MDI Control - RW */
13 #define E1000_MDICNFG 0x00E04 /* MDI Config - RW */
14 #define E1000_SCTL 0x00024 /* SerDes Control - RW */
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/igb/ |
| D | e1000_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
7 #define E1000_CTRL 0x00000 /* Device Control - RW */
8 #define E1000_STATUS 0x00008 /* Device Status - RO */
9 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
10 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
11 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
12 #define E1000_MDIC 0x00020 /* MDI Control - RW */
13 #define E1000_MDICNFG 0x00E04 /* MDI Config - RW */
14 #define E1000_SCTL 0x00024 /* SerDes Control - RW */
[all …]
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| /kernel/linux/linux-4.19/drivers/net/ethernet/aquantia/atlantic/hw_atl/ |
| D | hw_atl_llh.h | 3 * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
49 /* get tx dma good octet counter lsw */
52 /* get tx dma good packet counter lsw */
61 /* get tx dma good octet counter msw */
64 /* get tx dma good packet counter msw */
88 /* get msm tx errors counter register */
91 /* get msm tx unicast frames counter register */
94 /* get msm tx multicast frames counter register */
97 /* get msm tx broadcast frames counter register */
100 /* get msm tx multicast octets counter register 1 */
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/ti/wlcore/ |
| D | conf.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
117 * Range: 0 - 0xFFFFFFFF
122 * Packet detection threshold in the PHY.
130 * after a PS-poll has been transmitted.
132 * Range: 0 - 200000
139 * Range: 0 - 200000
147 * Range: 0 - 4096
152 * The RX Clear Channel Assessment threshold in the PHY
153 * (the energy threshold).
161 * Occupied Rx mem-blocks number which requires interrupting the host
[all …]
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| /kernel/linux/linux-4.19/drivers/net/wireless/ti/wlcore/ |
| D | conf.h | 20 * 02110-1301 USA
131 * Range: 0 - 0xFFFFFFFF
136 * Packet detection threshold in the PHY.
144 * after a PS-poll has been transmitted.
146 * Range: 0 - 200000
153 * Range: 0 - 200000
161 * Range: 0 - 4096
166 * The RX Clear Channel Assessment threshold in the PHY
167 * (the energy threshold).
175 * Occupied Rx mem-blocks number which requires interrupting the host
[all …]
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| /kernel/linux/linux-5.10/include/linux/platform_data/ |
| D | xilinx-ll-temac.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
10 bool txcsum; /* Enable/disable TX checksum */
20 /* Pre-initialized mutex to use for synchronizing indirect
27 u8 tx_irq_timeout; /* TX Interrupt Delay Time-out */
28 u8 tx_irq_count; /* TX Interrupt Coalescing Threshold Count */
29 u8 rx_irq_timeout; /* RX Interrupt Delay Time-out */
30 u8 rx_irq_count; /* RX Interrupt Coalescing Threshold Count */
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/cortina/ |
| D | gemini.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
6 * Copyright (C) 2010 Michał Mirosław <mirq-linux@rere.qmqm.pl>
49 * GMAC 0/1 SW TX Q0-5, and GMAC 0/1 HW TX Q0-5
58 #define __RWPTR_PREV(x, mask) (((unsigned int)(x) - 1) & (mask))
59 #define __RWPTR_DISTANCE(r, w, mask) (((unsigned int)(w) - (r)) & (mask))
60 #define __RWPTR_MASK(order) ((1 << (order)) - 1)
145 /* GMAC Hash/Rx/Tx AHB Weighting register */
274 #define TOE_QH_FULL_INT_BIT(x) BIT(x - 32)
321 /* 7:0 Software Free Queue Empty Threshold */
[all …]
|