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Searched refs:DDRC3_CURR_FUNC_OFST (Results 1 – 8 of 8) sorted by relevance

/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3520dv500/
Dlowlevel_init_v300.c47 #define DDRC3_CURR_FUNC_OFST 0xb000 + 0x294 macro
189 …reg_val[3] = ddrc_isvalid[3]?(reg_get(REG_BASE_DDRC + DDRC3_CURR_FUNC_OFST) & DDRC_SELF_REFURBISH_… in ddr_scramb()
223 …reg_val[3] = ddrc_isvalid[3]?(reg_get(REG_BASE_DDRC + DDRC3_CURR_FUNC_OFST) & DDRC_SELF_REFURBISH_… in ddr_scramb()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3521dv200/
Dlowlevel_init_v300.c47 #define DDRC3_CURR_FUNC_OFST 0xb000 + 0x294 macro
189 …reg_val[3] = ddrc_isvalid[3]?(reg_get(REG_BASE_DDRC + DDRC3_CURR_FUNC_OFST) & DDRC_SELF_REFURBISH_… in ddr_scramb()
223 …reg_val[3] = ddrc_isvalid[3]?(reg_get(REG_BASE_DDRC + DDRC3_CURR_FUNC_OFST) & DDRC_SELF_REFURBISH_… in ddr_scramb()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3535av100/
Dlowlevel_init_v300.c47 #define DDRC3_CURR_FUNC_OFST 0xb000 + 0x294 macro
188 reg_val[3] = ddrc_isvalid[3]?(reg_get(REG_BASE_DDRC + DDRC3_CURR_FUNC_OFST) & 0x1):1; in ddr_scramb()
267 reg_val[3] = ddrc_isvalid[3]?(reg_get(REG_BASE_DDRC + DDRC3_CURR_FUNC_OFST) & 0x1):0; in ddr_scramb()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3531dv200/
Dlowlevel_init_v300.c47 #define DDRC3_CURR_FUNC_OFST 0xb000 + 0x294 macro
188 reg_val[3] = ddrc_isvalid[3]?(reg_get(REG_BASE_DDRC + DDRC3_CURR_FUNC_OFST) & 0x1):1; in ddr_scramb()
267 reg_val[3] = ddrc_isvalid[3]?(reg_get(REG_BASE_DDRC + DDRC3_CURR_FUNC_OFST) & 0x1):0; in ddr_scramb()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3569v100/
Dlowlevel_init_v300.c50 #define DDRC3_CURR_FUNC_OFST (0xb000 + 0x294) macro
215 DDRC3_CURR_FUNC_OFST) & 0x1) : 1; in ddr_scramb()
255 DDRC3_CURR_FUNC_OFST) & 0x1) : 0; in ddr_scramb()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3559av100/
Dlowlevel_init_v300.c50 #define DDRC3_CURR_FUNC_OFST (0xb000 + 0x294) macro
215 DDRC3_CURR_FUNC_OFST) & 0x1) : 1; in ddr_scramb()
255 DDRC3_CURR_FUNC_OFST) & 0x1) : 0; in ddr_scramb()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3556av100/
Dlowlevel_init_v300.c50 #define DDRC3_CURR_FUNC_OFST (0xb000 + 0x294) macro
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3519av100/
Dlowlevel_init_v300.c49 #define DDRC3_CURR_FUNC_OFST (0xb000 + 0x294) macro