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Searched refs:GATE_PERI0 (Results 1 – 2 of 2) sorted by relevance

/third_party/uboot/u-boot-2020.01/drivers/clk/mediatek/
Dclk-mt7623.c630 #define GATE_PERI0(_id, _parent, _shift) { \ macro
647 GATE_PERI0(CLK_PERI_NFI, CLK_TOP_NFI2X_SEL, 0),
648 GATE_PERI0(CLK_PERI_THERM, CLK_TOP_AXI_SEL, 1),
649 GATE_PERI0(CLK_PERI_PWM1, CLK_TOP_AXISEL_D4, 2),
650 GATE_PERI0(CLK_PERI_PWM2, CLK_TOP_AXISEL_D4, 3),
651 GATE_PERI0(CLK_PERI_PWM3, CLK_TOP_AXISEL_D4, 4),
652 GATE_PERI0(CLK_PERI_PWM4, CLK_TOP_AXISEL_D4, 5),
653 GATE_PERI0(CLK_PERI_PWM5, CLK_TOP_AXISEL_D4, 6),
654 GATE_PERI0(CLK_PERI_PWM6, CLK_TOP_AXISEL_D4, 7),
655 GATE_PERI0(CLK_PERI_PWM7, CLK_TOP_AXISEL_D4, 8),
[all …]
Dclk-mt7629.c454 #define GATE_PERI0(_id, _parent, _shift) { \ macro
471 GATE_PERI0(CLK_PERI_PWM1_PD, CLK_TOP_PWM_QTR_26M, 2),
472 GATE_PERI0(CLK_PERI_PWM2_PD, CLK_TOP_PWM_QTR_26M, 3),
473 GATE_PERI0(CLK_PERI_PWM3_PD, CLK_TOP_PWM_QTR_26M, 4),
474 GATE_PERI0(CLK_PERI_PWM4_PD, CLK_TOP_PWM_QTR_26M, 5),
475 GATE_PERI0(CLK_PERI_PWM5_PD, CLK_TOP_PWM_QTR_26M, 6),
476 GATE_PERI0(CLK_PERI_PWM6_PD, CLK_TOP_PWM_QTR_26M, 7),
477 GATE_PERI0(CLK_PERI_PWM7_PD, CLK_TOP_PWM_QTR_26M, 8),
478 GATE_PERI0(CLK_PERI_PWM_PD, CLK_TOP_PWM_QTR_26M, 9),
479 GATE_PERI0(CLK_PERI_AP_DMA_PD, CLK_TOP_FAXI, 12),
[all …]