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Searched refs:LITEOS_REGN_WR_MID_MASK (Results 1 – 3 of 3) sorted by relevance

/third_party/uboot/u-boot-2020.01/board/hisilicon/hi3519av100/
Dhi3519av100.c461 #define LITEOS_REGN_WR_MID_MASK (0x1 << A53CPU1_MID) macro
462 #define LITEOS_REGN_RD_MID_MASK LITEOS_REGN_WR_MID_MASK
547 writel(LITEOS_REGN_WR_MID_MASK, in liteos_tzasc_init()
Dhi3519av100_amp.c624 #define LITEOS_REGN_WR_MID_MASK (0x1 << A53CPU1_MID) macro
625 #define LITEOS_REGN_RD_MID_MASK LITEOS_REGN_WR_MID_MASK
709 writel(LITEOS_REGN_WR_MID_MASK, in liteos_tzasc_init()
/third_party/uboot/u-boot-2020.01/board/hisilicon/hi3556av100/
Dhi3556av100.c625 #define LITEOS_REGN_WR_MID_MASK (0x1 << A53CPU1_MID) macro
626 #define LITEOS_REGN_RD_MID_MASK LITEOS_REGN_WR_MID_MASK
711 writel(LITEOS_REGN_WR_MID_MASK, in liteos_tzasc_init()