Home
last modified time | relevance | path

Searched refs:REG_FMC_CRG (Results 1 – 25 of 27) sorted by relevance

12

/third_party/uboot/u-boot-2020.01/drivers/mtd/
Dhifmc_hi3519av100.c59 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc100_nand_controller_enable()
71 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc100_nand_controller_enable()
89 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc_set_fmc_system_clock()
109 REG_FMC_CRG, regval); in hifmc_set_fmc_system_clock()
110 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc_set_fmc_system_clock()
Dhifmc_hi3556av100.c59 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc100_nand_controller_enable()
71 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc100_nand_controller_enable()
89 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc_set_fmc_system_clock()
109 REG_FMC_CRG, regval); in hifmc_set_fmc_system_clock()
110 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc_set_fmc_system_clock()
Dhifmc_hi3559av100.c68 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc100_nand_controller_enable()
80 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc100_nand_controller_enable()
123 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc_set_fmc_system_clock()
143 REG_FMC_CRG, regval); in hifmc_set_fmc_system_clock()
144 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc_set_fmc_system_clock()
Dhifmc_hi3516av300.c48 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc_set_fmc_system_clock()
67 REG_FMC_CRG, regval); in hifmc_set_fmc_system_clock()
68 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc_set_fmc_system_clock()
Dhifmc_hi3516cv500.c48 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc_set_fmc_system_clock()
67 REG_FMC_CRG, regval); in hifmc_set_fmc_system_clock()
68 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc_set_fmc_system_clock()
Dhifmc_hi3516dv300.c48 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc_set_fmc_system_clock()
67 REG_FMC_CRG, regval); in hifmc_set_fmc_system_clock()
68 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc_set_fmc_system_clock()
Dhifmc_hi3516ev300.c61 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc_set_fmc_system_clock()
83 REG_FMC_CRG, regval); in hifmc_set_fmc_system_clock()
84 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc_set_fmc_system_clock()
Dhifmc_hi3518ev300.c61 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc_set_fmc_system_clock()
83 REG_FMC_CRG, regval); in hifmc_set_fmc_system_clock()
84 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc_set_fmc_system_clock()
Dhifmc_hi3520dv500.c55 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc_set_fmc_system_clock()
74 REG_FMC_CRG, regval); in hifmc_set_fmc_system_clock()
75 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc_set_fmc_system_clock()
Dhifmc_hi3516ev200.c61 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc_set_fmc_system_clock()
83 REG_FMC_CRG, regval); in hifmc_set_fmc_system_clock()
84 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc_set_fmc_system_clock()
Dhifmc_hi3521dv200.c55 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc_set_fmc_system_clock()
74 REG_FMC_CRG, regval); in hifmc_set_fmc_system_clock()
75 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc_set_fmc_system_clock()
Dhifmc_hi3516dv200.c61 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc_set_fmc_system_clock()
83 REG_FMC_CRG, regval); in hifmc_set_fmc_system_clock()
84 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc_set_fmc_system_clock()
Dhifmc_hi3531dv200.c80 old_val = regval = readl(CRG_REG_BASE + REG_FMC_CRG); in hifmc_set_fmc_system_clock()
100 REG_FMC_CRG, regval); in hifmc_set_fmc_system_clock()
101 writel(regval, (CRG_REG_BASE + REG_FMC_CRG)); in hifmc_set_fmc_system_clock()
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3516dv300/
Dplatform.h83 #define REG_FMC_CRG REG_CRG81 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3516cv500/
Dplatform.h83 #define REG_FMC_CRG REG_CRG81 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3516av300/
Dplatform.h83 #define REG_FMC_CRG REG_CRG81 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3516dv200/
Dplatform.h82 #define REG_FMC_CRG REG_CRG81 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3518ev300/
Dplatform.h82 #define REG_FMC_CRG REG_CRG81 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3516ev300/
Dplatform.h82 #define REG_FMC_CRG REG_CRG81 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3516ev200/
Dplatform.h82 #define REG_FMC_CRG REG_CRG81 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3520dv500/
Dplatform.h117 #define REG_FMC_CRG 0x3f40 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3519av100/
Dplatform.h85 #define REG_FMC_CRG REG_CRG92 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3556av100/
Dplatform.h85 #define REG_FMC_CRG REG_CRG92 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3559av100/
Dplatform.h126 #define REG_FMC_CRG 0x0170 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3521dv200/
Dplatform.h117 #define REG_FMC_CRG 0x3f40 macro

12