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Searched refs:bus_start (Results 1 – 25 of 31) sorted by relevance

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/third_party/uboot/u-boot-2020.01/board/freescale/mpc837xerdb/
Dpci.c14 bus_start: CONFIG_SYS_PCI_MEM_BASE,
20 bus_start: CONFIG_SYS_PCI_MMIO_BASE,
26 bus_start: CONFIG_SYS_PCI_IO_BASE,
35 .bus_start = CONFIG_SYS_PCIE1_MEM_BASE,
41 .bus_start = CONFIG_SYS_PCIE1_IO_BASE,
50 .bus_start = CONFIG_SYS_PCIE2_MEM_BASE,
56 .bus_start = CONFIG_SYS_PCIE2_IO_BASE,
/third_party/uboot/u-boot-2020.01/board/freescale/mpc8349itx/
Dpci.c18 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
24 bus_start: CONFIG_SYS_PCI1_IO_BASE,
30 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
40 bus_start: CONFIG_SYS_PCI2_MEM_BASE,
46 bus_start: CONFIG_SYS_PCI2_IO_BASE,
52 bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
/third_party/uboot/u-boot-2020.01/board/freescale/mpc837xemds/
Dpci.c20 bus_start: CONFIG_SYS_PCI_MEM_BASE,
26 bus_start: CONFIG_SYS_PCI_MMIO_BASE,
32 bus_start: CONFIG_SYS_PCI_IO_BASE,
41 .bus_start = CONFIG_SYS_PCIE1_MEM_BASE,
47 .bus_start = CONFIG_SYS_PCIE1_IO_BASE,
56 .bus_start = CONFIG_SYS_PCIE2_MEM_BASE,
62 .bus_start = CONFIG_SYS_PCIE2_IO_BASE,
/third_party/uboot/u-boot-2020.01/board/freescale/mpc832xemds/
Dpci.c21 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
27 bus_start: CONFIG_SYS_PCI1_IO_BASE,
33 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
43 bus_start: CONFIG_SYS_PCI2_MEM_BASE,
49 bus_start: CONFIG_SYS_PCI2_IO_BASE,
55 bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
/third_party/uboot/u-boot-2020.01/board/freescale/mpc8315erdb/
Dmpc8315erdb.c69 bus_start: CONFIG_SYS_PCI_MEM_BASE,
75 bus_start: CONFIG_SYS_PCI_MMIO_BASE,
81 bus_start: CONFIG_SYS_PCI_IO_BASE,
90 .bus_start = CONFIG_SYS_PCIE1_MEM_BASE,
96 .bus_start = CONFIG_SYS_PCIE1_IO_BASE,
105 .bus_start = CONFIG_SYS_PCIE2_MEM_BASE,
111 .bus_start = CONFIG_SYS_PCIE2_IO_BASE,
/third_party/uboot/u-boot-2020.01/board/freescale/mpc8349emds/
Dpci.c17 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
23 bus_start: CONFIG_SYS_PCI1_IO_BASE,
29 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
39 bus_start: CONFIG_SYS_PCI2_MEM_BASE,
45 bus_start: CONFIG_SYS_PCI2_IO_BASE,
51 bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
/third_party/uboot/u-boot-2020.01/drivers/pci/
Dpci_auto_common.c27 res->bus_lower = res->bus_start < 0x1000 ? 0x1000 : res->bus_start; in pciauto_region_init()
47 if (addr - res->bus_start + size > res->size) { in pciauto_region_allocate()
77 (unsigned long long)region->bus_start, in pciauto_show_region()
78 (unsigned long long)(region->bus_start + region->size - 1), in pciauto_show_region()
Dfsl_pci_init.c61 out_be32(&pi->piwbar, r->bus_start >> 12); in set_inbound_window()
63 out_be32(&pi->piwbear, r->bus_start >> 44); in set_inbound_window()
92 pci_addr_t bus_start = CONFIG_SYS_PCI_MEMORY_BUS; in fsl_pci_setup_inbound_windows() local
96 if (bus_start > out_lo) { in fsl_pci_setup_inbound_windows()
102 if ((bus_start + sz) > out_lo) { in fsl_pci_setup_inbound_windows()
103 sz = out_lo - bus_start; in fsl_pci_setup_inbound_windows()
114 (u64)bus_start, (u64)phys_start, (u64)sz); in fsl_pci_setup_inbound_windows()
115 pci_set_region(r, bus_start, phys_start, sz, in fsl_pci_setup_inbound_windows()
130 (u64)bus_start, (u64)phys_start, (u64)pci_sz); in fsl_pci_setup_inbound_windows()
131 pci_set_region(r, bus_start, phys_start, pci_sz, in fsl_pci_setup_inbound_windows()
[all …]
Dpci_common.c165 if (bus_addr >= res->bus_start && in __pci_hose_bus_to_phys()
166 (bus_addr - res->bus_start) < res->size) { in __pci_hose_bus_to_phys()
167 *pa = (bus_addr - res->bus_start + res->phys_start); in __pci_hose_bus_to_phys()
225 bus_addr = phys_addr - res->phys_start + res->bus_start; in __pci_hose_phys_to_bus()
227 if (bus_addr >= res->bus_start && in __pci_hose_phys_to_bus()
228 (bus_addr - res->bus_start) < res->size) { in __pci_hose_phys_to_bus()
Dpcie_dw_mvebu.c269 pcie->io.bus_start, pcie->io.size); in pcie_dw_mvebu_read_config()
314 pcie->io.bus_start, pcie->io.size); in pcie_dw_mvebu_write_config()
515 pcie->io.bus_start = hose->regions[0].bus_start; /* IO_bus_addr */ in pcie_dw_mvebu_probe()
519 pcie->mem.bus_start = hose->regions[1].bus_start; /* MEM_bus_addr */ in pcie_dw_mvebu_probe()
524 pcie->mem.bus_start, pcie->mem.size); in pcie_dw_mvebu_probe()
Dpcie_dw_ti.c318 pcie->io.bus_start, pcie->io.size); in pcie_dw_ti_read_config()
363 pcie->io.bus_start, pcie->io.size); in pcie_dw_ti_write_config()
653 pci->io.bus_start = hose->regions[0].bus_start; /* IO_bus_addr */ in pcie_dw_ti_probe()
657 pci->mem.bus_start = hose->regions[1].bus_start; /* MEM_bus_addr */ in pcie_dw_ti_probe()
663 pci->mem.bus_start, pci->mem.size); in pcie_dw_ti_probe()
Dpci_mpc85xx.c91 out_be32(&pcix->potar1, (mem->bus_start >> 12) & 0x000fffff); in mpc85xx_pci_dm_probe()
99 out_be32(&pcix->potar2, (io->bus_start >> 12) & 0x000fffff); in mpc85xx_pci_dm_probe()
Dpcie_fsl.c326 io->bus_start, in fsl_pcie_setup_outbound_wins()
334 mem->bus_start, in fsl_pcie_setup_outbound_wins()
342 pci_addr_t bus_start = CONFIG_SYS_PCI_MEMORY_BUS; in fsl_pcie_setup_inbound_wins() local
355 (u64)bus_start, (u64)phys_start, (u64)sz); in fsl_pcie_setup_inbound_wins()
Dpcie_layerscape.c201 io->bus_start, in ls_pcie_setup_atu()
209 mem->bus_start, in ls_pcie_setup_atu()
217 pref->bus_start, in ls_pcie_setup_atu()
Dpcie_layerscape_gen4.c164 io->phys_start, io->bus_start, in ls_pcie_g4_setup_wins()
170 mem->phys_start, mem->bus_start, in ls_pcie_g4_setup_wins()
176 pref->phys_start, pref->bus_start, in ls_pcie_g4_setup_wins()
/third_party/uboot/u-boot-2020.01/board/sbc8349/
Dpci.c21 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
27 bus_start: CONFIG_SYS_PCI1_IO_BASE,
33 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
/third_party/uboot/u-boot-2020.01/board/tqc/tqm834x/
Dpci.c19 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
25 bus_start: CONFIG_SYS_PCI1_IO_BASE,
31 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
/third_party/uboot/u-boot-2020.01/board/esd/vme8349/
Dpci.c25 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
31 bus_start: CONFIG_SYS_PCI1_IO_BASE,
37 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
/third_party/uboot/u-boot-2020.01/board/freescale/mpc8313erdb/
Dmpc8313erdb.c57 .bus_start = CONFIG_SYS_PCI1_MEM_BASE,
63 .bus_start = CONFIG_SYS_PCI1_MMIO_BASE,
69 .bus_start = CONFIG_SYS_PCI1_IO_BASE,
/third_party/uboot/u-boot-2020.01/board/mpc8308_p1m/
Dmpc8308_p1m.c28 .bus_start = CONFIG_SYS_PCIE1_MEM_BASE,
34 .bus_start = CONFIG_SYS_PCIE1_IO_BASE,
/third_party/uboot/u-boot-2020.01/board/freescale/mpc8323erdb/
Dmpc8323erdb.c143 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
149 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
155 bus_start: CONFIG_SYS_PCI1_IO_BASE,
/third_party/uboot/u-boot-2020.01/board/ve8313/
Dve8313.c154 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
160 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
166 bus_start: CONFIG_SYS_PCI1_IO_BASE,
/third_party/uboot/u-boot-2020.01/board/freescale/mpc8308rdb/
Dmpc8308rdb.c92 .bus_start = CONFIG_SYS_PCIE1_MEM_BASE,
98 .bus_start = CONFIG_SYS_PCIE1_IO_BASE,
/third_party/uboot/u-boot-2020.01/arch/powerpc/cpu/mpc83xx/
Dpci.c47 pot->potar = reg->bus_start >> 12; in pci_init_bus()
72 hose->regions[i].bus_start = 0; in pci_init_bus()
Dpcie.c130 hose->regions[i].bus_start = 0; in PCIE_OP()
136 hose->regions[i].bus_start = CONFIG_SYS_IMMR; in PCIE_OP()
250 out_le32(&out_win->tarl, reg[i].bus_start); in mpc83xx_pcie_init_bus()

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