Searched refs:cscmr1 (Results 1 – 16 of 16) sorted by relevance
| /third_party/uboot/u-boot-2020.01/arch/arm/mach-imx/mx5/ |
| D | clock.c | 77 clrsetbits_le32(&mxc_ccm->cscmr1, in set_usboh3_clk()
120 clrbits_le32(&mxc_ccm->cscmr1, MXC_CCM_CSCMR1_USB_PHY_CLK_SEL); in set_usb_phy_clk()
351 reg = readl(&mxc_ccm->cscmr1); in get_uart_clk()
369 u32 cscmr1 = readl(&mxc_ccm->cscmr1); in imx_get_cspiclk() local
374 clk_sel = MXC_CCM_CSCMR1_CSPI_CLK_SEL_RD(cscmr1); in imx_get_cspiclk()
386 u32 cscmr1 = readl(&mxc_ccm->cscmr1); in get_esdhc_clk() local
391 clk_sel = MXC_CCM_CSCMR1_ESDHC1_MSHC1_CLK_SEL_RD(cscmr1); in get_esdhc_clk()
396 clk_sel = MXC_CCM_CSCMR1_ESDHC2_MSHC2_CLK_SEL_RD(cscmr1); in get_esdhc_clk()
401 if (cscmr1 & MXC_CCM_CSCMR1_ESDHC3_CLK_SEL) in get_esdhc_clk()
406 if (cscmr1 & MXC_CCM_CSCMR1_ESDHC4_CLK_SEL) in get_esdhc_clk()
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| /third_party/uboot/u-boot-2020.01/arch/arm/mach-imx/mx6/ |
| D | clock.c | 385 reg = __raw_readl(&imx_ccm->cscmr1); in get_ipg_per_clk()
453 u32 emi_clk_sel, emi_slow_podf, cscmr1, root_freq = 0; in get_emi_slow_clk() local
455 cscmr1 = __raw_readl(&imx_ccm->cscmr1); in get_emi_slow_clk()
456 emi_clk_sel = cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_MASK; in get_emi_slow_clk()
458 emi_slow_podf = cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK; in get_emi_slow_clk()
738 clrsetbits_le32(&imx_ccm->cscmr1, in mxs_set_lcdclk()
760 clrsetbits_le32(&imx_ccm->cscmr1, in mxs_set_lcdclk()
866 reg = readl(&imx_ccm->cscmr1); in enable_qspi_clk()
871 writel(reg, &imx_ccm->cscmr1); in enable_qspi_clk()
984 u32 cscmr1 = __raw_readl(&imx_ccm->cscmr1); in get_usdhc_clk() local
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| D | soc.c | 471 setbits_le32(&ccm->cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK); in arch_cpu_init()
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| /third_party/uboot/u-boot-2020.01/board/freescale/mx6sabreauto/ |
| D | mx6sabreauto.c | 228 int cscmr1, ccgr6; in eim_clk_setup() local
241 cscmr1 = readl(&imx_ccm->cscmr1); in eim_clk_setup()
242 cscmr1 &= ~(MXC_CCM_CSCMR1_ACLK_EMI_SLOW_MASK | in eim_clk_setup()
244 cscmr1 |= (1 << MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_OFFSET); in eim_clk_setup()
245 writel(cscmr1, &imx_ccm->cscmr1); in eim_clk_setup()
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| /third_party/uboot/u-boot-2020.01/board/toradex/colibri_vf/ |
| D | dcu.c | 19 clrbits_le32(&ccm->cscmr1, CCM_CSCMR1_DCU0_CLK_SEL); in dcu_set_pixel_clock()
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| D | colibri_vf.c | 343 clrsetbits_le32(&ccm->cscmr1, CCM_REG_CTRL_MASK, in clock_init()
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| /third_party/uboot/u-boot-2020.01/board/engicam/imx6ul/ |
| D | imx6ul.c | 68 clrbits_le32(&mxc_ccm->cscmr1, in setup_gpmi_nand()
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| /third_party/uboot/u-boot-2020.01/board/variscite/dart_6ul/ |
| D | dart_6ul.c | 72 clrbits_le32(&mxc_ccm->cscmr1, in setup_gpmi_nand()
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| /third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-vf610/ |
| D | crm_regs.h | 19 u32 cscmr1; member
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| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/vf610/ |
| D | generic.c | 143 ccm_cscmr1 = readl(&ccm->cscmr1); in get_sdhc_clk()
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| /third_party/uboot/u-boot-2020.01/board/phytec/pcm052/ |
| D | pcm052.c | 260 clrsetbits_le32(&ccm->cscmr1, CCM_REG_CTRL_MASK, in clock_init()
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| /third_party/uboot/u-boot-2020.01/board/freescale/vf610twr/ |
| D | vf610twr.c | 313 clrsetbits_le32(&ccm->cscmr1, CCM_REG_CTRL_MASK, in clock_init()
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| /third_party/uboot/u-boot-2020.01/arch/arm/lib/ |
| D | asm-offsets.c | 159 DEFINE(CLKCTL_CSCMR1, offsetof(struct clkctl, cscmr1)); in main()
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| /third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-mx5/ |
| D | imx-regs.h | 308 u32 cscmr1; member
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| D | crm_regs.h | 36 u32 cscmr1; member
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| /third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-mx6/ |
| D | crm_regs.h | 29 u32 cscmr1; member
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