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Searched refs:rate (Results 1 – 25 of 1407) sorted by relevance

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/third_party/pulseaudio/src/pulsecore/
Dmime-type.c38 if (ss->rate != 8000 && in pa_sample_spec_is_mime()
39 ss->rate != 11025 && in pa_sample_spec_is_mime()
40 ss->rate != 16000 && in pa_sample_spec_is_mime()
41 ss->rate != 22050 && in pa_sample_spec_is_mime()
42 ss->rate != 24000 && in pa_sample_spec_is_mime()
43 ss->rate != 32000 && in pa_sample_spec_is_mime()
44 ss->rate != 44100 && in pa_sample_spec_is_mime()
45 ss->rate != 48000) in pa_sample_spec_is_mime()
60 if (ss->rate != 8000) in pa_sample_spec_is_mime()
87 if (ss->rate > 44100) in pa_sample_spec_mimefy()
[all …]
/third_party/uboot/u-boot-2020.01/drivers/clk/renesas/
Dclk-rcar-gen3.c110 static int gen3_clk_setup_sdif_div(struct clk *clk, ulong rate) in gen3_clk_setup_sdif_div() argument
136 writel((rate == 400000000) ? 0x4 : 0x1, priv->base + core->offset); in gen3_clk_setup_sdif_div()
164 u64 rate = 0; in gen3_clk_get_rate64() local
176 rate = gen3_clk_get_rate64(&parent); in gen3_clk_get_rate64()
178 __func__, __LINE__, parent.id, rate); in gen3_clk_get_rate64()
179 return rate; in gen3_clk_get_rate64()
189 rate = clk_get_rate(&priv->clk_extal); in gen3_clk_get_rate64()
191 __func__, __LINE__, rate); in gen3_clk_get_rate64()
192 return rate; in gen3_clk_get_rate64()
196 rate = clk_get_rate(&priv->clk_extalr); in gen3_clk_get_rate64()
[all …]
Dclk-rcar-gen2.c82 u32 value, mult, div, rate = 0; in gen2_clk_get_rate() local
94 rate = gen2_clk_get_rate(&parent); in gen2_clk_get_rate()
96 __func__, __LINE__, parent.id, rate); in gen2_clk_get_rate()
97 return rate; in gen2_clk_get_rate()
107 rate = clk_get_rate(&priv->clk_extal); in gen2_clk_get_rate()
109 __func__, __LINE__, rate); in gen2_clk_get_rate()
110 return rate; in gen2_clk_get_rate()
114 rate = clk_get_rate(&priv->clk_extal_usb); in gen2_clk_get_rate()
116 __func__, __LINE__, rate); in gen2_clk_get_rate()
117 return rate; in gen2_clk_get_rate()
[all …]
/third_party/libnl/lib/cli/qdisc/
Dhtb.c90 long rate; in htb_parse_class_argv() local
123 rate = nl_size2int(optarg); in htb_parse_class_argv()
124 if (rate < 0) { in htb_parse_class_argv()
125 nl_cli_fatal(rate, "Unable to parse htb rate " in htb_parse_class_argv()
129 rtnl_htb_set_rate(class, rate); in htb_parse_class_argv()
133 rate = nl_size2int(optarg); in htb_parse_class_argv()
134 if (rate < 0) { in htb_parse_class_argv()
135 nl_cli_fatal(rate, "Unable to parse htb ceil rate " in htb_parse_class_argv()
139 rtnl_htb_set_ceil(class, rate); in htb_parse_class_argv()
147 rate = nl_size2int(optarg); in htb_parse_class_argv()
[all …]
/third_party/uboot/u-boot-2020.01/drivers/clk/rockchip/
Dclk_pll.c166 rockchip_get_pll_settings(struct rockchip_pll_clock *pll, ulong rate) in rockchip_get_pll_settings() argument
170 while (rate_table->rate) { in rockchip_get_pll_settings()
171 if (rate_table->rate == rate) in rockchip_get_pll_settings()
175 if (rate_table->rate != rate) in rockchip_get_pll_settings()
176 return rockchip_pll_clk_set_by_auto(24 * MHZ, rate); in rockchip_get_pll_settings()
185 const struct rockchip_pll_rate_table *rate; in rk3036_pll_set_rate() local
187 rate = rockchip_get_pll_settings(pll, drate); in rk3036_pll_set_rate()
188 if (!rate) { in rk3036_pll_set_rate()
194 __func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv); in rk3036_pll_set_rate()
196 __func__, rate->rate, rate->postdiv2, rate->dsmpd, rate->frac); in rk3036_pll_set_rate()
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Dclk_px30.c33 .rate = _rate##U, \
44 .rate = _rate##U, \
94 struct pll_rate_table *rate = &auto_table; in pll_clk_set_by_auto() local
124 rate->postdiv1 = postdiv1; in pll_clk_set_by_auto()
125 rate->postdiv2 = postdiv2; in pll_clk_set_by_auto()
145 rate->refdiv = refdiv; in pll_clk_set_by_auto()
146 rate->fbdiv = fbdiv; in pll_clk_set_by_auto()
156 return rate; in pll_clk_set_by_auto()
159 static const struct pll_rate_table *get_pll_settings(unsigned long rate) in get_pll_settings() argument
165 if (rate == px30_pll_rates[i].rate) in get_pll_settings()
[all …]
/third_party/uboot/u-boot-2020.01/arch/arm/mach-imx/mx7ulp/
Dscg.c54 u32 reg, val, rate; in scg_sircdiv_get_rate() local
84 rate = scg_src_get_rate(SCG_SIRC_CLK); in scg_sircdiv_get_rate()
85 rate = rate / (1 << (val - 1)); in scg_sircdiv_get_rate()
87 return rate; in scg_sircdiv_get_rate()
92 u32 reg, val, rate; in scg_fircdiv_get_rate() local
122 rate = scg_src_get_rate(SCG_FIRC_CLK); in scg_fircdiv_get_rate()
123 rate = rate / (1 << (val - 1)); in scg_fircdiv_get_rate()
125 return rate; in scg_fircdiv_get_rate()
130 u32 reg, val, rate; in scg_soscdiv_get_rate() local
160 rate = scg_src_get_rate(SCG_SOSC_CLK); in scg_soscdiv_get_rate()
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/third_party/uboot/u-boot-2020.01/arch/mips/mach-pic32/
Dcpu.c25 static ulong rate(int id) in rate() function
30 ulong rate; in rate() local
43 rate = clk_get_rate(&clk); in rate()
47 return rate; in rate()
52 return rate(PB7CLK); in clk_get_cpu_rate()
61 ulong rate; in prefetch_init() local
64 rate = clk_get_cpu_rate() / 1000000; in prefetch_init()
71 if (rate < 66) in prefetch_init()
73 else if (rate < 133) in prefetch_init()
78 if (rate <= 83) in prefetch_init()
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/third_party/gstreamer/gstplugins_base/gst-libs/gst/audio/
Dgstaudiostreamalign.c47 gint rate; member
83 gst_audio_stream_align_new (gint rate, GstClockTime alignment_threshold, in gst_audio_stream_align_new() argument
88 g_return_val_if_fail (rate != 0, NULL); in gst_audio_stream_align_new()
91 align->rate = rate; in gst_audio_stream_align_new()
152 gst_audio_stream_align_set_rate (GstAudioStreamAlign * align, gint rate) in gst_audio_stream_align_set_rate() argument
155 g_return_if_fail (rate != 0); in gst_audio_stream_align_set_rate()
157 if (align->rate == rate) in gst_audio_stream_align_set_rate()
160 align->rate = rate; in gst_audio_stream_align_set_rate()
179 return align->rate; in gst_audio_stream_align_get_rate()
354 gst_util_uint64_scale (start_time, ABS (align->rate), GST_SECOND); in gst_audio_stream_align_process()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCScheduleE5500.td74 [30, 2, 2], // Latency= 4..26, Repeat rate= 4..26
80 [20, 2, 2], // Latency= 4..16, Repeat rate= 4..16
85 [11], // Latency = 7, Repeat rate = 1
89 [11, 2, 2], // Latency = 7, Repeat rate = 7
94 [9, 2, 2], // Latency = 4..7, Repeat rate = 2..4
100 [8, 2, 2], // Latency = 4, Repeat rate = 1
106 [8, 2, 2], // Latency = 4, Repeat rate = 1
122 [6, 2, 2], // Latency = 2, Repeat rate = 2
127 [5, 2, 2], // Latency = 1, Repeat rate = 1
132 [6, 2, 2], // Latency = 2, Repeat rate = 2
[all …]
/third_party/uboot/u-boot-2020.01/drivers/clk/imx/
Dclk-pll14xx.c52 struct clk_pll14xx *pll, unsigned long rate) in imx_get_pll_settings() argument
58 if (rate == rate_table[i].rate) in imx_get_pll_settings()
104 static inline bool clk_pll1416x_mp_change(const struct imx_pll14xx_rate_table *rate, in clk_pll1416x_mp_change() argument
112 return rate->mdiv != old_mdiv || rate->pdiv != old_pdiv; in clk_pll1416x_mp_change()
115 static inline bool clk_pll1443x_mpk_change(const struct imx_pll14xx_rate_table *rate, in clk_pll1443x_mpk_change() argument
124 return rate->mdiv != old_mdiv || rate->pdiv != old_pdiv || in clk_pll1443x_mpk_change()
125 rate->kdiv != old_kdiv; in clk_pll1443x_mpk_change()
128 static inline bool clk_pll1443x_mp_change(const struct imx_pll14xx_rate_table *rate, in clk_pll1443x_mp_change() argument
137 return rate->mdiv != old_mdiv || rate->pdiv != old_pdiv || in clk_pll1443x_mp_change()
138 rate->kdiv != old_kdiv; in clk_pll1443x_mp_change()
[all …]
/third_party/openGLES/extensions/NV/
DNV_primitive_shading_rate.txt51 provide OpenGL API support for using a per-primitive shading rate value to
52 control the computation of the rate used to process each fragment.
54 In the NV_shading_rate_image extension, the shading rate for each fragment
56 shading rate image and using that value as an index into a shading rate
57 palette. That extension provides a separate shading rate image lookup
60 viewport to determine the shading rate.
62 This extension decouples the shading rate image enables and palettes from
67 palette to determine the shading rate. Otherwise, the viewport number for
95 (modify the introduction of the shading rate image functionality to decouple
96 shading rate image enables and viewports)
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/third_party/uboot/u-boot-2020.01/drivers/clk/meson/
Dg12a.c96 static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate,
102 ulong rate, ulong current_rate);
233 unsigned int rate, parent_rate; in meson_div_get_rate() local
274 rate = parent_rate / (reg + 1); in meson_div_get_rate()
276 debug("%s: rate of %ld is %d\n", __func__, id, rate); in meson_div_get_rate()
278 return rate; in meson_div_get_rate()
281 static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate, in meson_div_set_rate() argument
291 if (current_rate == rate) in meson_div_set_rate()
295 __func__, id, current_rate, rate); in meson_div_set_rate()
329 if (!parent_rate || rate > parent_rate) in meson_div_set_rate()
[all …]
Dgxbb.c74 static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate,
80 ulong rate, ulong current_rate);
271 unsigned int rate, parent_rate; in meson_div_get_rate() local
308 rate = parent_rate / (reg + 1); in meson_div_get_rate()
310 debug("%s: rate of %ld is %d\n", __func__, id, rate); in meson_div_get_rate()
312 return rate; in meson_div_get_rate()
315 static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate, in meson_div_set_rate() argument
325 if (current_rate == rate) in meson_div_set_rate()
329 __func__, id, current_rate, rate); in meson_div_set_rate()
359 if (!parent_rate || rate > parent_rate) in meson_div_set_rate()
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/third_party/uboot/u-boot-2020.01/drivers/clk/
Dclk-hsdk-cgu.c183 u32 rate; member
241 int (*update_rate)(struct hsdk_cgu_clk *clk, unsigned long rate,
280 ulong (*set_rate)(struct clk *clk, ulong rate);
372 u64 rate; in pll_get() local
395 rate = (u64)PARENT_RATE * fbdiv; in pll_get()
396 do_div(rate, idiv * odiv); in pll_get()
398 return rate; in pll_get()
401 static unsigned long hsdk_pll_round_rate(struct clk *sclk, unsigned long rate) in hsdk_pll_round_rate() argument
408 if (pll_cfg[0].rate == 0) in hsdk_pll_round_rate()
411 best_rate = pll_cfg[0].rate; in hsdk_pll_round_rate()
[all …]
Dclk_pic32.c170 int parent_rate, int rate, int parent_id) in pic32_set_refclk() argument
181 if (parent_rate <= rate) { in pic32_set_refclk()
185 div = parent_rate / (rate << 1); in pic32_set_refclk()
188 do_div(frac, rate); in pic32_set_refclk()
284 u64 rate; in pic32_get_mpll_rate() local
292 rate = (SYS_POSC_CLK_HZ / idiv) * mul; in pic32_get_mpll_rate()
293 do_div(rate, odiv1); in pic32_get_mpll_rate()
294 do_div(rate, odiv2); in pic32_get_mpll_rate()
296 return (ulong)rate; in pic32_get_mpll_rate()
321 ulong rate, pll_hz; in pic32_clk_init() local
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/third_party/ffmpeg/libavutil/
Dtimecode.c167 tc->rate.num, tc->rate.den); in check_timecode()
172 static int fps_from_frame_rate(AVRational rate) in fps_from_frame_rate() argument
174 if (!rate.den || !rate.num) in fps_from_frame_rate()
176 return (rate.num + rate.den/2) / rate.den; in fps_from_frame_rate()
179 int av_timecode_check_frame_rate(AVRational rate) in av_timecode_check_frame_rate() argument
181 return check_fps(fps_from_frame_rate(rate)); in av_timecode_check_frame_rate()
184 int av_timecode_init(AVTimecode *tc, AVRational rate, int flags, int frame_start, void *log_ctx) in av_timecode_init() argument
189 tc->rate = rate; in av_timecode_init()
190 tc->fps = fps_from_frame_rate(rate); in av_timecode_init()
194 int av_timecode_init_from_string(AVTimecode *tc, AVRational rate, const char *str, void *log_ctx) in av_timecode_init_from_string() argument
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/third_party/python/Lib/test/
Dtest_ossaudiodev.py29 rate = au.getframerate()
40 return (data, rate, 16, nchannels)
44 def play_sound_file(self, data, rate, ssize, nchannels): argument
75 expected_time = float(len(data)) / (ssize/8) / nchannels / rate
78 dsp.setparameters(AFMT_S16_NE, nchannels, rate)
102 (fmt, channels, rate) = config
105 dsp.speed(rate) == rate):
113 result = dsp.setparameters(fmt, channels, rate, False)
114 self.assertEqual(result, (fmt, channels, rate),
117 result = dsp.setparameters(fmt, channels, rate, True)
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/third_party/node/benchmark/
Drun.js68 console.log(`"${data.name}", "${conf}", ${data.rate}, ${data.time}`);
70 let rate = data.rate.toString().split('.');
71 rate[0] = rate[0].replace(/(\d)(?=(?:\d\d\d)+(?!\d))/g, '$1,');
72 rate = (rate[1] ? rate.join('.') : rate[0]);
73 console.log(`${data.name} ${conf}: ${rate}`);
Dscatter.R52 rate = subdat$rate; functionVar
56 if (length(rate) > 1) {
57 se = sqrt(var(rate)/length(rate));
58 ci = se * qt(0.975, length(rate) - 1)
63 rate = mean(rate), nameattr
78 aes(ymin=rate-confidence.interval, ymax=rate+confidence.interval),
/third_party/uboot/u-boot-2020.01/arch/arm/mach-zynq/
Dclk.c37 ulong rate; in set_cpu_clk_info() local
51 rate = clk_get_rate(&clk) / 1000000; in set_cpu_clk_info()
53 gd->bd->bi_ddr_freq = rate; in set_cpu_clk_info()
55 gd->bd->bi_arm_freq = rate; in set_cpu_clk_info()
85 unsigned long rate; in soc_clk_dump() local
92 rate = clk_get_rate(&clk); in soc_clk_dump()
96 if ((rate == (unsigned long)-ENOSYS) || in soc_clk_dump()
97 (rate == (unsigned long)-ENXIO)) in soc_clk_dump()
100 printf("%10s%20lu\n", name, rate); in soc_clk_dump()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/bcm281xx/
Dclk-core.c96 __func__, c->name, c->rate, c->div, c->sel, in peri_clk_enable()
97 c->parent->rate); in peri_clk_enable()
160 static int peri_clk_set_rate(struct clk *c, unsigned long rate) in peri_clk_set_rate() argument
171 diff = rate; in peri_clk_set_rate()
182 div = ref->clk.rate / rate; in peri_clk_set_rate()
186 new_rate = ref->clk.rate / div; in peri_clk_set_rate()
189 if (abs(new_rate - rate) < diff) { in peri_clk_set_rate()
190 diff = abs(new_rate - rate); in peri_clk_set_rate()
193 c->rate = new_rate; in peri_clk_set_rate()
199 c->name, c->rate, c->div, c->sel, c->parent->rate); in peri_clk_set_rate()
[all …]
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/bcm235xx/
Dclk-core.c96 __func__, c->name, c->rate, c->div, c->sel, in peri_clk_enable()
97 c->parent->rate); in peri_clk_enable()
160 static int peri_clk_set_rate(struct clk *c, unsigned long rate) in peri_clk_set_rate() argument
171 diff = rate; in peri_clk_set_rate()
182 div = ref->clk.rate / rate; in peri_clk_set_rate()
186 new_rate = ref->clk.rate / div; in peri_clk_set_rate()
189 if (abs(new_rate - rate) < diff) { in peri_clk_set_rate()
190 diff = abs(new_rate - rate); in peri_clk_set_rate()
193 c->rate = new_rate; in peri_clk_set_rate()
199 c->name, c->rate, c->div, c->sel, c->parent->rate); in peri_clk_set_rate()
[all …]
/third_party/uboot/u-boot-2020.01/drivers/clk/aspeed/
Dclk_ast2500.c119 ulong rate; in ast2500_clk_get_rate() local
128 rate = ast2500_get_hpll_rate(clkin, in ast2500_clk_get_rate()
132 rate = ast2500_get_mpll_rate(clkin, in ast2500_clk_get_rate()
140 rate = ast2500_get_hpll_rate(clkin, in ast2500_clk_get_rate()
143 rate = rate / apb_div; in ast2500_clk_get_rate()
151 rate = ast2500_get_hpll_rate(clkin, in ast2500_clk_get_rate()
154 rate = rate / apb_div; in ast2500_clk_get_rate()
158 rate = ast2500_get_uart_clk_rate(priv->scu, 1); in ast2500_clk_get_rate()
161 rate = ast2500_get_uart_clk_rate(priv->scu, 2); in ast2500_clk_get_rate()
164 rate = ast2500_get_uart_clk_rate(priv->scu, 3); in ast2500_clk_get_rate()
[all …]
/third_party/uboot/u-boot-2020.01/test/dm/
Dclk_ccf.c22 long long rate; in dm_test_clk_ccf() local
38 rate = clk_get_parent_rate(clk); in dm_test_clk_ccf()
39 ut_asserteq(rate, 20000000); in dm_test_clk_ccf()
46 rate = clk_get_parent_rate(clk); in dm_test_clk_ccf()
47 ut_asserteq(rate, 60000000); in dm_test_clk_ccf()
53 rate = clk_get_parent_rate(clk); in dm_test_clk_ccf()
54 ut_asserteq(rate, 80000000); in dm_test_clk_ccf()
64 rate = clk_get_rate(clk); in dm_test_clk_ccf()
65 ut_asserteq(rate, 60000000); in dm_test_clk_ccf()

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