| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3535av100/ |
| D | lowlevel_init_v300.c | 84 #undef reg_get
85 #define reg_get(addr) (*(volatile unsigned int *)((long)addr)) macro
122 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DATA_ST_OFST); in get_random_num()
127 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DSTA_FIFO_DATA_OFST); in get_random_num()
137 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG_TRNG); in trng_init()
152 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG_TRNG); in trng_deinit()
168 ddrc_isvalid[0] = (reg_get(REG_BASE_DDRC + DDRC_CFG_DDRMODE_OFST) & 0xf)?1:0; in ddr_scramb()
169 ddrc_isvalid[1] = (reg_get(REG_BASE_DDRC + DDRC1_CFG_DDRMODE_OFST)& 0xf)?1:0; in ddr_scramb()
170 ddrc_isvalid[2] = (reg_get(REG_BASE_DDRC + DDRC2_CFG_DDRMODE_OFST)& 0xf)?1:0; in ddr_scramb()
171 ddrc_isvalid[3] = (reg_get(REG_BASE_DDRC + DDRC3_CFG_DDRMODE_OFST)& 0xf)?1:0; in ddr_scramb()
[all …]
|
| D | sdhci_boot.c | 134 #define reg_get(addr) (*(volatile unsigned int *)((uintptr_t)(addr))) macro
138 return !(reg_get(REG_BASE_SCTL + REG_PERI_EMMC_STAT) & EMMC_NORMAL_MODE); in is_bootmode()
143 return reg_get(REG_SAVE_HCS) & OCR_HCS; in get_hcs()
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3531dv200/ |
| D | lowlevel_init_v300.c | 84 #undef reg_get
85 #define reg_get(addr) (*(volatile unsigned int *)((long)addr)) macro
122 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DATA_ST_OFST); in get_random_num()
127 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DSTA_FIFO_DATA_OFST); in get_random_num()
137 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG_TRNG); in trng_init()
152 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG_TRNG); in trng_deinit()
168 ddrc_isvalid[0] = (reg_get(REG_BASE_DDRC + DDRC_CFG_DDRMODE_OFST) & 0xf)?1:0; in ddr_scramb()
169 ddrc_isvalid[1] = (reg_get(REG_BASE_DDRC + DDRC1_CFG_DDRMODE_OFST)& 0xf)?1:0; in ddr_scramb()
170 ddrc_isvalid[2] = (reg_get(REG_BASE_DDRC + DDRC2_CFG_DDRMODE_OFST)& 0xf)?1:0; in ddr_scramb()
171 ddrc_isvalid[3] = (reg_get(REG_BASE_DDRC + DDRC3_CFG_DDRMODE_OFST)& 0xf)?1:0; in ddr_scramb()
[all …]
|
| D | sdhci_boot.c | 134 #define reg_get(addr) (*(volatile unsigned int *)((uintptr_t)(addr))) macro
138 return !(reg_get(REG_BASE_SCTL + REG_PERI_EMMC_STAT) & EMMC_NORMAL_MODE); in is_bootmode()
143 return reg_get(REG_SAVE_HCS) & OCR_HCS; in get_hcs()
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3556av100/ |
| D | lowlevel_init_v300.c | 138 #undef reg_get
139 #define reg_get(addr) (*(volatile unsigned int *)((long)addr)) macro
150 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DATA_ST_OFST); in get_random_num()
154 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DSTA_FIFO_DATA_OFST); in get_random_num()
164 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG101); in trng_init()
178 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG101); in trng_deinit()
194 (reg_get(REG_BASE_DDRC + DDRC_CFG_DDRMODE_OFST) & 0xf) ? 1 : 0; in ddr_scramb()
196 (reg_get(REG_BASE_DDRC + DDRC1_CFG_DDRMODE_OFST) & 0xf) ? 1 : 0; in ddr_scramb()
208 (reg_get(REG_BASE_DDRC + DDRC_CURR_FUNC_OFST) & 0x1) : 1; in ddr_scramb()
210 (reg_get(REG_BASE_DDRC + DDRC1_CURR_FUNC_OFST) & 0x1) : 1; in ddr_scramb()
[all …]
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3520dv500/ |
| D | lowlevel_init_v300.c | 85 #undef reg_get
86 #define reg_get(addr) (*(volatile unsigned int *)((long)addr)) macro
124 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DATA_ST_OFST); in get_random_num()
129 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DSTA_FIFO_DATA_OFST); in get_random_num()
139 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG_TRNG); in trng_init()
154 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG_TRNG); in trng_deinit()
169 ddrc_isvalid[0] = (reg_get(REG_BASE_DDRC + DDRC_CFG_DDRMODE_OFST) & 0xf)?1:0; in ddr_scramb()
170 ddrc_isvalid[1] = (reg_get(REG_BASE_DDRC + DDRC1_CFG_DDRMODE_OFST) & 0xf)?1:0; in ddr_scramb()
171 ddrc_isvalid[2] = (reg_get(REG_BASE_DDRC + DDRC2_CFG_DDRMODE_OFST) & 0xf)?1:0; in ddr_scramb()
172 ddrc_isvalid[3] = (reg_get(REG_BASE_DDRC + DDRC3_CFG_DDRMODE_OFST) & 0xf)?1:0; in ddr_scramb()
[all …]
|
| D | himci_boot.c | 138 #define reg_get(addr) (*(volatile unsigned int *)((uintptr_t)(addr))) macro
142 return !(reg_get(REG_BASE_SCTL + REG_PERI_EMMC_STAT) & EMMC_NORMAL_MODE); in is_bootmode()
147 return reg_get(REG_SAVE_HCS) & OCR_HCS; in get_hcs()
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3521dv200/ |
| D | lowlevel_init_v300.c | 85 #undef reg_get
86 #define reg_get(addr) (*(volatile unsigned int *)((long)addr)) macro
124 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DATA_ST_OFST); in get_random_num()
129 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DSTA_FIFO_DATA_OFST); in get_random_num()
139 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG_TRNG); in trng_init()
154 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG_TRNG); in trng_deinit()
169 ddrc_isvalid[0] = (reg_get(REG_BASE_DDRC + DDRC_CFG_DDRMODE_OFST) & 0xf)?1:0; in ddr_scramb()
170 ddrc_isvalid[1] = (reg_get(REG_BASE_DDRC + DDRC1_CFG_DDRMODE_OFST) & 0xf)?1:0; in ddr_scramb()
171 ddrc_isvalid[2] = (reg_get(REG_BASE_DDRC + DDRC2_CFG_DDRMODE_OFST) & 0xf)?1:0; in ddr_scramb()
172 ddrc_isvalid[3] = (reg_get(REG_BASE_DDRC + DDRC3_CFG_DDRMODE_OFST) & 0xf)?1:0; in ddr_scramb()
[all …]
|
| D | himci_boot.c | 138 #define reg_get(addr) (*(volatile unsigned int *)((uintptr_t)(addr))) macro
142 return !(reg_get(REG_BASE_SCTL + REG_PERI_EMMC_STAT) & EMMC_NORMAL_MODE); in is_bootmode()
147 return reg_get(REG_SAVE_HCS) & OCR_HCS; in get_hcs()
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3569v100/ |
| D | lowlevel_init_v300.c | 104 #undef reg_get
105 #define reg_get(addr) (*(volatile unsigned int *)((long)addr)) macro
142 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DATA_ST_OFST); in get_random_num()
146 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DSTA_FIFO_DATA_OFST); in get_random_num()
155 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG101); in trng_init()
169 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG101); in trng_deinit()
185 (reg_get(REG_BASE_DDRC + DDRC_CFG_DDRMODE_OFST) & 0xf) ? 1 : 0; in ddr_scramb()
187 (reg_get(REG_BASE_DDRC + DDRC1_CFG_DDRMODE_OFST) & 0xf) ? 1 : 0; in ddr_scramb()
189 (reg_get(REG_BASE_DDRC + DDRC2_CFG_DDRMODE_OFST) & 0xf) ? 1 : 0; in ddr_scramb()
191 (reg_get(REG_BASE_DDRC + DDRC3_CFG_DDRMODE_OFST) & 0xf) ? 1 : 0; in ddr_scramb()
[all …]
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3559av100/ |
| D | lowlevel_init_v300.c | 104 #undef reg_get
105 #define reg_get(addr) (*(volatile unsigned int *)((long)addr)) macro
142 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DATA_ST_OFST); in get_random_num()
146 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DSTA_FIFO_DATA_OFST); in get_random_num()
155 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG101); in trng_init()
169 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG101); in trng_deinit()
185 (reg_get(REG_BASE_DDRC + DDRC_CFG_DDRMODE_OFST) & 0xf) ? 1 : 0; in ddr_scramb()
187 (reg_get(REG_BASE_DDRC + DDRC1_CFG_DDRMODE_OFST) & 0xf) ? 1 : 0; in ddr_scramb()
189 (reg_get(REG_BASE_DDRC + DDRC2_CFG_DDRMODE_OFST) & 0xf) ? 1 : 0; in ddr_scramb()
191 (reg_get(REG_BASE_DDRC + DDRC3_CFG_DDRMODE_OFST) & 0xf) ? 1 : 0; in ddr_scramb()
[all …]
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3519av100/ |
| D | lowlevel_init_v300.c | 136 #undef reg_get
137 #define reg_get(addr) (*(volatile unsigned int *)((long)addr)) macro
148 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DATA_ST_OFST); in get_random_num()
152 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DSTA_FIFO_DATA_OFST); in get_random_num()
161 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG101); in trng_init()
175 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG101); in trng_deinit()
191 (reg_get(REG_BASE_DDRC + DDRC_CFG_DDRMODE_OFST) & 0xf) ? 1 : 0; in ddr_scramb()
193 (reg_get(REG_BASE_DDRC + DDRC1_CFG_DDRMODE_OFST) & 0xf) ? 1 : 0; in ddr_scramb()
205 (reg_get(REG_BASE_DDRC + DDRC_CURR_FUNC_OFST) & 0x1) : 1; in ddr_scramb()
207 (reg_get(REG_BASE_DDRC + DDRC1_CURR_FUNC_OFST) & 0x1) : 1; in ddr_scramb()
[all …]
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516av300/ |
| D | lowlevel_init_v300.c | 89 #undef reg_get
91 #define reg_get(addr) readl(addr) macro
102 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_init()
116 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_deinit()
126 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DATA_ST_OFST); in get_random_num()
130 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DSTA_FIFO_DATA_OFST); in get_random_num()
158 ddrc_isvalid = (reg_get(REG_BASE_DDRC + DDRC_CFG_DDRMODE_OFST) & in ddr_scramb()
166 reg_val = ddrc_isvalid ? (reg_get(REG_BASE_DDRC + in ddr_scramb()
192 reg_val = ddrc_isvalid ? (reg_get(REG_BASE_DDRC + in ddr_scramb()
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516cv500/ |
| D | lowlevel_init_v300.c | 83 #undef reg_get
85 #define reg_get(addr) readl(addr) macro
102 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_init()
116 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_deinit()
126 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DATA_ST_OFST); in get_random_num()
130 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DSTA_FIFO_DATA_OFST); in get_random_num()
158 ddrc_isvalid = (reg_get(REG_BASE_DDRC + DDRC_CFG_DDRMODE_OFST) & in ddr_scramb()
167 reg_val = ddrc_isvalid ? (reg_get(REG_BASE_DDRC + in ddr_scramb()
194 reg_val = ddrc_isvalid ? (reg_get(REG_BASE_DDRC + in ddr_scramb()
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516dv300/ |
| D | lowlevel_init_v300.c | 82 #undef reg_get
84 #define reg_get(addr) readl(addr) macro
95 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_init()
109 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_deinit()
119 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DATA_ST_OFST); in get_random_num()
123 reg_val = reg_get(REG_BASE_RNG_GEN + TRNG_DSTA_FIFO_DATA_OFST); in get_random_num()
151 ddrc_isvalid = (reg_get(REG_BASE_DDRC + DDRC_CFG_DDRMODE_OFST) & in ddr_scramb()
159 reg_val = ddrc_isvalid ? (reg_get(REG_BASE_DDRC + DDRC_CURR_FUNC_OFST) & in ddr_scramb()
186 reg_val = ddrc_isvalid ? (reg_get(REG_BASE_DDRC + in ddr_scramb()
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516ev200/ |
| D | lowlevel_init_v300.c | 90 #undef reg_get
92 #define reg_get(addr) readl(addr) macro
104 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_init()
118 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_deinit()
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516ev300/ |
| D | lowlevel_init_v300.c | 88 #undef reg_get
90 #define reg_get(addr) readl(addr) macro
103 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_init()
117 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_deinit()
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516dv200/ |
| D | lowlevel_init_v300.c | 81 #undef reg_get
83 #define reg_get(addr) readl(addr) macro
95 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_init()
109 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_deinit()
|
| /third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3518ev300/ |
| D | lowlevel_init_v300.c | 91 #undef reg_get
93 #define reg_get(addr) readl(addr) macro
105 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_init()
119 reg_val = reg_get(CRG_REG_BASE + REG_PERI_CRG104); in trng_deinit()
|